diff --git a/drivers/gpu/drm/amd/powerplay/eventmgr/eventtasks.c b/drivers/gpu/drm/amd/powerplay/eventmgr/eventtasks.c index f0b44915765324be50e92a62586c95c0f46bbe90..5cd123472db471bcf4d5b3cfe4f21fc5000d4b17 100644 --- a/drivers/gpu/drm/amd/powerplay/eventmgr/eventtasks.c +++ b/drivers/gpu/drm/amd/powerplay/eventmgr/eventtasks.c @@ -68,8 +68,7 @@ int pem_task_adjust_power_state(struct pp_eventmgr *eventmgr, struct pem_event_d int pem_task_power_down_asic(struct pp_eventmgr *eventmgr, struct pem_event_data *event_data) { - /* TODO */ - return 0; + return phm_power_down_asic(eventmgr->hwmgr); } int pem_task_set_boot_state(struct pp_eventmgr *eventmgr, struct pem_event_data *event_data) diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/hardwaremanager.c b/drivers/gpu/drm/amd/powerplay/hwmgr/hardwaremanager.c index f9bf4fccbc79b7c3aa6c5549e305ad4bd3e95f5d..0f2d5e4bc241a46042b1182f4524781d47ab42a4 100644 --- a/drivers/gpu/drm/amd/powerplay/hwmgr/hardwaremanager.c +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/hardwaremanager.c @@ -90,6 +90,22 @@ int phm_setup_asic(struct pp_hwmgr *hwmgr) return 0; } +int phm_power_down_asic(struct pp_hwmgr *hwmgr) +{ + PHM_FUNC_CHECK(hwmgr); + + if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps, + PHM_PlatformCaps_TablelessHardwareInterface)) { + if (NULL != hwmgr->hwmgr_func->power_off_asic) + return hwmgr->hwmgr_func->power_off_asic(hwmgr); + } else { + return phm_dispatch_table(hwmgr, &(hwmgr->power_down_asic), + NULL, NULL); + } + + return 0; +} + int phm_set_power_state(struct pp_hwmgr *hwmgr, const struct pp_hw_power_state *pcurrent_state, const struct pp_hw_power_state *pnew_power_state) @@ -247,7 +263,6 @@ int phm_register_thermal_interrupt(struct pp_hwmgr *hwmgr, const void *info) */ int phm_start_thermal_controller(struct pp_hwmgr *hwmgr, struct PP_TemperatureRange *temperature_range) { - return phm_dispatch_table(hwmgr, &(hwmgr->start_thermal_controller), temperature_range, NULL); } diff --git a/drivers/gpu/drm/amd/powerplay/inc/hardwaremanager.h b/drivers/gpu/drm/amd/powerplay/inc/hardwaremanager.h index a503306c3d0e183c0d04b70e1344e8cb3d824694..91795efe13365a5a55c79b47bab02ae70a52669d 100644 --- a/drivers/gpu/drm/amd/powerplay/inc/hardwaremanager.h +++ b/drivers/gpu/drm/amd/powerplay/inc/hardwaremanager.h @@ -379,5 +379,7 @@ extern int phm_get_dal_power_level(struct pp_hwmgr *hwmgr, extern int phm_set_cpu_power_state(struct pp_hwmgr *hwmgr); +extern int phm_power_down_asic(struct pp_hwmgr *hwmgr); + #endif /* _HARDWARE_MANAGER_H_ */ diff --git a/drivers/gpu/drm/amd/powerplay/inc/hwmgr.h b/drivers/gpu/drm/amd/powerplay/inc/hwmgr.h index eb0f1b22d42d70bf218f87dbc0fcdb47b551b199..aeaa3dbba525ce98dfaf4cb4c006f9ddabbc6c7d 100644 --- a/drivers/gpu/drm/amd/powerplay/inc/hwmgr.h +++ b/drivers/gpu/drm/amd/powerplay/inc/hwmgr.h @@ -325,7 +325,8 @@ struct pp_hwmgr_func { bool cc6_disable, bool pstate_disable, bool pstate_switch_disable); int (*get_dal_power_level)(struct pp_hwmgr *hwmgr, - struct amd_pp_dal_clock_info*info); + struct amd_pp_dal_clock_info *info); + int (*power_off_asic)(struct pp_hwmgr *hwmgr); }; struct pp_table_func { @@ -576,9 +577,10 @@ struct pp_hwmgr { void *pptable; struct phm_platform_descriptor platform_descriptor; void *backend; - enum PP_DAL_POWERLEVEL dal_power_level; + enum PP_DAL_POWERLEVEL dal_power_level; struct phm_dynamic_state_info dyn_state; struct phm_runtime_table_header setup_asic; + struct phm_runtime_table_header power_down_asic; struct phm_runtime_table_header disable_dynamic_state_management; struct phm_runtime_table_header enable_dynamic_state_management; struct phm_runtime_table_header set_power_state;