From d6ed287a6b982f43810caa01826f68644f97c42c Mon Sep 17 00:00:00 2001 From: Babu Moger Date: Wed, 21 Nov 2018 20:28:35 +0000 Subject: [PATCH] x86/resctrl: Bring cbm_validate() into the resource structure to #26613714 commit a36c5ff560fb32d17c020fa3e7f4c70f753d8834 upstream. Bring all the functions that are different between the vendors into the resource structure and initialize them dynamically. Add _intel suffix to the Intel-specific functions. cbm_validate() which does cache bitmask validation, differs between the vendors as AMD allows non-contiguous masks. So, use separate functions for Intel and AMD. [ bp: Massage commit message and fixup rdt_resource members' vertical alignment. ] Signed-off-by: Babu Moger Signed-off-by: Borislav Petkov Cc: Andrew Morton Cc: Andy Lutomirski Cc: Arnd Bergmann Cc: Brijesh Singh Cc: "Chang S. Bae" Cc: David Miller Cc: David Woodhouse Cc: Dmitry Safonov Cc: Fenghua Yu Cc: Greg Kroah-Hartman Cc: "H. Peter Anvin" Cc: Ingo Molnar Cc: Jann Horn Cc: Joerg Roedel Cc: Jonathan Corbet Cc: Josh Poimboeuf Cc: Kate Stewart Cc: "Kirill A. Shutemov" Cc: Cc: Mauro Carvalho Chehab Cc: Paolo Bonzini Cc: Peter Zijlstra Cc: Philippe Ombredanne Cc: Pu Wen Cc: Cc: "Rafael J. Wysocki" Cc: Reinette Chatre Cc: Rian Hunter Cc: Sherry Hurwitz Cc: Suravee Suthikulpanit Cc: Thomas Gleixner Cc: Thomas Lendacky Cc: Tony Luck Cc: Vitaly Kuznetsov Cc: Link: https://lkml.kernel.org/r/20181121202811.4492-7-babu.moger@amd.com Signed-off-by: Shile Zhang Tested-by: WANG Siyuan Acked-by: Joseph Qi --- arch/x86/kernel/cpu/resctrl/core.c | 9 ++++++++- arch/x86/kernel/cpu/resctrl/ctrlmondata.c | 4 ++-- arch/x86/kernel/cpu/resctrl/internal.h | 15 +++++++++------ 3 files changed, 19 insertions(+), 9 deletions(-) diff --git a/arch/x86/kernel/cpu/resctrl/core.c b/arch/x86/kernel/cpu/resctrl/core.c index 9328e90b9f3e..8ce26aec0723 100644 --- a/arch/x86/kernel/cpu/resctrl/core.c +++ b/arch/x86/kernel/cpu/resctrl/core.c @@ -880,7 +880,14 @@ static __init void rdt_init_res_defs_intel(void) struct rdt_resource *r; for_each_rdt_resource(r) { - if (r->rid == RDT_RESOURCE_MBA) { + if (r->rid == RDT_RESOURCE_L3 || + r->rid == RDT_RESOURCE_L3DATA || + r->rid == RDT_RESOURCE_L3CODE || + r->rid == RDT_RESOURCE_L2 || + r->rid == RDT_RESOURCE_L2DATA || + r->rid == RDT_RESOURCE_L2CODE) + r->cbm_validate = cbm_validate_intel; + else if (r->rid == RDT_RESOURCE_MBA) { r->msr_base = MSR_IA32_MBA_THRTL_BASE; r->msr_update = mba_wrmsr_intel; r->parse_ctrlval = parse_bw_intel; diff --git a/arch/x86/kernel/cpu/resctrl/ctrlmondata.c b/arch/x86/kernel/cpu/resctrl/ctrlmondata.c index 6678fe9e8317..ed617cbeb375 100644 --- a/arch/x86/kernel/cpu/resctrl/ctrlmondata.c +++ b/arch/x86/kernel/cpu/resctrl/ctrlmondata.c @@ -89,7 +89,7 @@ int parse_bw_intel(struct rdt_parse_data *data, struct rdt_resource *r, * are allowed (e.g. FFFFH, 0FF0H, 003CH, etc.). * Additionally Haswell requires at least two bits set. */ -static bool cbm_validate(char *buf, u32 *data, struct rdt_resource *r) +bool cbm_validate_intel(char *buf, u32 *data, struct rdt_resource *r) { unsigned long first_bit, zero_bit, val; unsigned int cbm_len = r->cache.cbm_len; @@ -149,7 +149,7 @@ int parse_cbm(struct rdt_parse_data *data, struct rdt_resource *r, return -EINVAL; } - if (!cbm_validate(data->buf, &cbm_val, r)) + if (r->cbm_validate && !r->cbm_validate(data->buf, &cbm_val, r)) return -EINVAL; if ((rdtgrp->mode == RDT_MODE_EXCLUSIVE || diff --git a/arch/x86/kernel/cpu/resctrl/internal.h b/arch/x86/kernel/cpu/resctrl/internal.h index 9a643f444723..599cad34a6a8 100644 --- a/arch/x86/kernel/cpu/resctrl/internal.h +++ b/arch/x86/kernel/cpu/resctrl/internal.h @@ -396,9 +396,9 @@ struct rdt_parse_data { * struct rdt_resource - attributes of an RDT resource * @rid: The index of the resource * @alloc_enabled: Is allocation enabled on this machine - * @mon_enabled: Is monitoring enabled for this feature + * @mon_enabled: Is monitoring enabled for this feature * @alloc_capable: Is allocation available on this machine - * @mon_capable: Is monitor feature available on this machine + * @mon_capable: Is monitor feature available on this machine * @name: Name to use in "schemata" file * @num_closid: Number of CLOSIDs available * @cache_level: Which cache level defines scope of this resource @@ -410,10 +410,11 @@ struct rdt_parse_data { * @cache: Cache allocation related data * @format_str: Per resource format string to show domain value * @parse_ctrlval: Per resource function pointer to parse control values - * @evt_list: List of monitoring events - * @num_rmid: Number of RMIDs available - * @mon_scale: cqm counter * mon_scale = occupancy in bytes - * @fflags: flags to choose base and info files + * @cbm_validate Cache bitmask validate function + * @evt_list: List of monitoring events + * @num_rmid: Number of RMIDs available + * @mon_scale: cqm counter * mon_scale = occupancy in bytes + * @fflags: flags to choose base and info files */ struct rdt_resource { int rid; @@ -436,6 +437,7 @@ struct rdt_resource { int (*parse_ctrlval)(struct rdt_parse_data *data, struct rdt_resource *r, struct rdt_domain *d); + bool (*cbm_validate)(char *buf, u32 *data, struct rdt_resource *r); struct list_head evt_list; int num_rmid; unsigned int mon_scale; @@ -576,5 +578,6 @@ void cqm_setup_limbo_handler(struct rdt_domain *dom, unsigned long delay_ms); void cqm_handle_limbo(struct work_struct *work); bool has_busy_rmid(struct rdt_resource *r, struct rdt_domain *d); void __check_limbo(struct rdt_domain *d, bool force_free); +bool cbm_validate_intel(char *buf, u32 *data, struct rdt_resource *r); #endif /* _ASM_X86_RESCTRL_INTERNAL_H */ -- GitLab