提交 cd4b356f 编写于 作者: A Alex Deucher 提交者: Alex Deucher

drm/amd/display/dm: add KV, KB, ML (v2)

Add DCE8 APUs to display manager.

v2: rebase changes
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
Reviewed-by: NHarry Wentland <harry.wentland@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
上级 2cf5a5e6
...@@ -1355,6 +1355,9 @@ int amdgpu_dm_initialize_drm_device(struct amdgpu_device *adev) ...@@ -1355,6 +1355,9 @@ int amdgpu_dm_initialize_drm_device(struct amdgpu_device *adev)
switch (adev->asic_type) { switch (adev->asic_type) {
case CHIP_BONAIRE: case CHIP_BONAIRE:
case CHIP_HAWAII: case CHIP_HAWAII:
case CHIP_KAVERI:
case CHIP_KABINI:
case CHIP_MULLINS:
case CHIP_TONGA: case CHIP_TONGA:
case CHIP_FIJI: case CHIP_FIJI:
case CHIP_CARRIZO: case CHIP_CARRIZO:
...@@ -1519,6 +1522,19 @@ static int dm_early_init(void *handle) ...@@ -1519,6 +1522,19 @@ static int dm_early_init(void *handle)
adev->mode_info.num_dig = 6; adev->mode_info.num_dig = 6;
adev->mode_info.plane_type = dm_plane_type_default; adev->mode_info.plane_type = dm_plane_type_default;
break; break;
case CHIP_KAVERI:
adev->mode_info.num_crtc = 4;
adev->mode_info.num_hpd = 6;
adev->mode_info.num_dig = 7;
adev->mode_info.plane_type = dm_plane_type_default;
break;
case CHIP_KABINI:
case CHIP_MULLINS:
adev->mode_info.num_crtc = 2;
adev->mode_info.num_hpd = 6;
adev->mode_info.num_dig = 6;
adev->mode_info.plane_type = dm_plane_type_default;
break;
case CHIP_FIJI: case CHIP_FIJI:
case CHIP_TONGA: case CHIP_TONGA:
adev->mode_info.num_crtc = 6; adev->mode_info.num_crtc = 6;
......
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