From cc8cd6479cb9d6b384ccdaa4b21fcbf0826bd232 Mon Sep 17 00:00:00 2001 From: Ben Skeggs Date: Fri, 28 Jan 2011 13:42:16 +1000 Subject: [PATCH] drm/nvc0/pfifo: semi-handle a couple more irqs And also, don't disable PFIFO IRQs completely whenever we recieve one, just when we don't know about it already. Signed-off-by: Ben Skeggs --- drivers/gpu/drm/nouveau/nvc0_fifo.c | 15 +++++++++++++-- 1 file changed, 13 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/nouveau/nvc0_fifo.c b/drivers/gpu/drm/nouveau/nvc0_fifo.c index e6f92c541dba..e9f8643bed9b 100644 --- a/drivers/gpu/drm/nouveau/nvc0_fifo.c +++ b/drivers/gpu/drm/nouveau/nvc0_fifo.c @@ -418,6 +418,12 @@ nvc0_fifo_isr(struct drm_device *dev) { u32 stat = nv_rd32(dev, 0x002100); + if (stat & 0x00000100) { + NV_INFO(dev, "PFIFO: unknown status 0x00000100\n"); + nv_wr32(dev, 0x002100, 0x00000100); + stat &= ~0x00000100; + } + if (stat & 0x10000000) { u32 units = nv_rd32(dev, 0x00259c); u32 u = units; @@ -446,10 +452,15 @@ nvc0_fifo_isr(struct drm_device *dev) stat &= ~0x20000000; } + if (stat & 0x40000000) { + NV_INFO(dev, "PFIFO: unknown status 0x40000000\n"); + nv_mask(dev, 0x002a00, 0x00000000, 0x00000000); + stat &= ~0x40000000; + } + if (stat) { NV_INFO(dev, "PFIFO: unhandled status 0x%08x\n", stat); nv_wr32(dev, 0x002100, stat); + nv_wr32(dev, 0x002140, 0); } - - nv_wr32(dev, 0x2140, 0); } -- GitLab