提交 cb9a2b12 编写于 作者: W Wolfram Sang 提交者: Simon Horman

ARM: shmobile: r8a7790: lager: use iic cores instead of i2c

On Lager board, i2c and iic cores can be interchanged since they can be
muxed to the same wires. Commit e489c2a9
("ARM: shmobile: lager: enable i2c devices") activated the i2c cores,
yet the iic cores should be default since they have the more interesting
features for generic use cases, i.e. SMBUS_QUICK and DMA (yet to be
supported).
Reported-by: NKhiem Nguyen <khiem.nguyen.xt@renesas.com>
Signed-off-by: NWolfram Sang <wsa+renesas@sang-engineering.com>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
上级 5179ffd0
...@@ -205,14 +205,14 @@ ...@@ -205,14 +205,14 @@
renesas,function = "msiof1"; renesas,function = "msiof1";
}; };
i2c1_pins: i2c1 { iic1_pins: iic1 {
renesas,groups = "i2c1"; renesas,groups = "iic1";
renesas,function = "i2c1"; renesas,function = "iic1";
}; };
i2c2_pins: i2c2 { iic2_pins: iic2 {
renesas,groups = "i2c2"; renesas,groups = "iic2";
renesas,function = "i2c2"; renesas,function = "iic2";
}; };
iic3_pins: iic3 { iic3_pins: iic3 {
...@@ -352,19 +352,19 @@ ...@@ -352,19 +352,19 @@
cpu0-supply = <&vdd_dvfs>; cpu0-supply = <&vdd_dvfs>;
}; };
&i2c0 { &iic0 {
status = "ok"; status = "ok";
}; };
&i2c1 { &iic1 {
status = "ok"; status = "ok";
pinctrl-0 = <&i2c1_pins>; pinctrl-0 = <&iic1_pins>;
pinctrl-names = "default"; pinctrl-names = "default";
}; };
&i2c2 { &iic2 {
status = "ok"; status = "ok";
pinctrl-0 = <&i2c2_pins>; pinctrl-0 = <&iic2_pins>;
pinctrl-names = "default"; pinctrl-names = "default";
}; };
......
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