提交 c8458413 编写于 作者: P Paul Walmsley

Merge branches 'powerdomain_fixes_3.1', 'hardware_workarounds_3.1',...

Merge branches 'powerdomain_fixes_3.1', 'hardware_workarounds_3.1', 'hwmod_dss_fix_3.1' and 'i2c_fixes_3.1' into prcm-fixes-3.1
...@@ -4,14 +4,14 @@ ...@@ -4,14 +4,14 @@
# Common support # Common support
obj-y := io.o id.o sram.o time.o irq.o mux.o flash.o serial.o devices.o dma.o obj-y := io.o id.o sram.o time.o irq.o mux.o flash.o serial.o devices.o dma.o
obj-y += clock.o clock_data.o opp_data.o reset.o obj-y += clock.o clock_data.o opp_data.o reset.o pm_bus.o
obj-$(CONFIG_OMAP_MCBSP) += mcbsp.o obj-$(CONFIG_OMAP_MCBSP) += mcbsp.o
obj-$(CONFIG_OMAP_32K_TIMER) += timer32k.o obj-$(CONFIG_OMAP_32K_TIMER) += timer32k.o
# Power Management # Power Management
obj-$(CONFIG_PM) += pm.o sleep.o pm_bus.o obj-$(CONFIG_PM) += pm.o sleep.o
# DSP # DSP
obj-$(CONFIG_OMAP_MBOX_FWK) += mailbox_mach.o obj-$(CONFIG_OMAP_MBOX_FWK) += mailbox_mach.o
......
...@@ -138,7 +138,7 @@ void ams_delta_latch2_write(u16 mask, u16 value) ...@@ -138,7 +138,7 @@ void ams_delta_latch2_write(u16 mask, u16 value)
static void __init ams_delta_init_irq(void) static void __init ams_delta_init_irq(void)
{ {
omap1_init_common_hw(); omap1_init_common_hw();
omap_init_irq(); omap1_init_irq();
} }
static struct map_desc ams_delta_io_desc[] __initdata = { static struct map_desc ams_delta_io_desc[] __initdata = {
...@@ -391,7 +391,7 @@ MACHINE_START(AMS_DELTA, "Amstrad E3 (Delta)") ...@@ -391,7 +391,7 @@ MACHINE_START(AMS_DELTA, "Amstrad E3 (Delta)")
.reserve = omap_reserve, .reserve = omap_reserve,
.init_irq = ams_delta_init_irq, .init_irq = ams_delta_init_irq,
.init_machine = ams_delta_init, .init_machine = ams_delta_init,
.timer = &omap_timer, .timer = &omap1_timer,
MACHINE_END MACHINE_END
EXPORT_SYMBOL(ams_delta_latch1_write); EXPORT_SYMBOL(ams_delta_latch1_write);
......
...@@ -329,7 +329,7 @@ static void __init omap_fsample_init(void) ...@@ -329,7 +329,7 @@ static void __init omap_fsample_init(void)
static void __init omap_fsample_init_irq(void) static void __init omap_fsample_init_irq(void)
{ {
omap1_init_common_hw(); omap1_init_common_hw();
omap_init_irq(); omap1_init_irq();
} }
/* Only FPGA needs to be mapped here. All others are done with ioremap */ /* Only FPGA needs to be mapped here. All others are done with ioremap */
...@@ -394,5 +394,5 @@ MACHINE_START(OMAP_FSAMPLE, "OMAP730 F-Sample") ...@@ -394,5 +394,5 @@ MACHINE_START(OMAP_FSAMPLE, "OMAP730 F-Sample")
.reserve = omap_reserve, .reserve = omap_reserve,
.init_irq = omap_fsample_init_irq, .init_irq = omap_fsample_init_irq,
.init_machine = omap_fsample_init, .init_machine = omap_fsample_init,
.timer = &omap_timer, .timer = &omap1_timer,
MACHINE_END MACHINE_END
...@@ -31,7 +31,7 @@ ...@@ -31,7 +31,7 @@
static void __init omap_generic_init_irq(void) static void __init omap_generic_init_irq(void)
{ {
omap1_init_common_hw(); omap1_init_common_hw();
omap_init_irq(); omap1_init_irq();
} }
/* assume no Mini-AB port */ /* assume no Mini-AB port */
...@@ -99,5 +99,5 @@ MACHINE_START(OMAP_GENERIC, "Generic OMAP1510/1610/1710") ...@@ -99,5 +99,5 @@ MACHINE_START(OMAP_GENERIC, "Generic OMAP1510/1610/1710")
.reserve = omap_reserve, .reserve = omap_reserve,
.init_irq = omap_generic_init_irq, .init_irq = omap_generic_init_irq,
.init_machine = omap_generic_init, .init_machine = omap_generic_init,
.timer = &omap_timer, .timer = &omap1_timer,
MACHINE_END MACHINE_END
...@@ -376,7 +376,7 @@ static struct i2c_board_info __initdata h2_i2c_board_info[] = { ...@@ -376,7 +376,7 @@ static struct i2c_board_info __initdata h2_i2c_board_info[] = {
static void __init h2_init_irq(void) static void __init h2_init_irq(void)
{ {
omap1_init_common_hw(); omap1_init_common_hw();
omap_init_irq(); omap1_init_irq();
} }
static struct omap_usb_config h2_usb_config __initdata = { static struct omap_usb_config h2_usb_config __initdata = {
...@@ -466,5 +466,5 @@ MACHINE_START(OMAP_H2, "TI-H2") ...@@ -466,5 +466,5 @@ MACHINE_START(OMAP_H2, "TI-H2")
.reserve = omap_reserve, .reserve = omap_reserve,
.init_irq = h2_init_irq, .init_irq = h2_init_irq,
.init_machine = h2_init, .init_machine = h2_init,
.timer = &omap_timer, .timer = &omap1_timer,
MACHINE_END MACHINE_END
...@@ -439,7 +439,7 @@ static void __init h3_init(void) ...@@ -439,7 +439,7 @@ static void __init h3_init(void)
static void __init h3_init_irq(void) static void __init h3_init_irq(void)
{ {
omap1_init_common_hw(); omap1_init_common_hw();
omap_init_irq(); omap1_init_irq();
} }
static void __init h3_map_io(void) static void __init h3_map_io(void)
...@@ -454,5 +454,5 @@ MACHINE_START(OMAP_H3, "TI OMAP1710 H3 board") ...@@ -454,5 +454,5 @@ MACHINE_START(OMAP_H3, "TI OMAP1710 H3 board")
.reserve = omap_reserve, .reserve = omap_reserve,
.init_irq = h3_init_irq, .init_irq = h3_init_irq,
.init_machine = h3_init, .init_machine = h3_init,
.timer = &omap_timer, .timer = &omap1_timer,
MACHINE_END MACHINE_END
...@@ -605,7 +605,7 @@ static void __init htcherald_init_irq(void) ...@@ -605,7 +605,7 @@ static void __init htcherald_init_irq(void)
{ {
printk(KERN_INFO "htcherald_init_irq.\n"); printk(KERN_INFO "htcherald_init_irq.\n");
omap1_init_common_hw(); omap1_init_common_hw();
omap_init_irq(); omap1_init_irq();
} }
MACHINE_START(HERALD, "HTC Herald") MACHINE_START(HERALD, "HTC Herald")
...@@ -616,5 +616,5 @@ MACHINE_START(HERALD, "HTC Herald") ...@@ -616,5 +616,5 @@ MACHINE_START(HERALD, "HTC Herald")
.reserve = omap_reserve, .reserve = omap_reserve,
.init_irq = htcherald_init_irq, .init_irq = htcherald_init_irq,
.init_machine = htcherald_init, .init_machine = htcherald_init,
.timer = &omap_timer, .timer = &omap1_timer,
MACHINE_END MACHINE_END
...@@ -292,7 +292,7 @@ static void __init innovator_init_smc91x(void) ...@@ -292,7 +292,7 @@ static void __init innovator_init_smc91x(void)
static void __init innovator_init_irq(void) static void __init innovator_init_irq(void)
{ {
omap1_init_common_hw(); omap1_init_common_hw();
omap_init_irq(); omap1_init_irq();
} }
#ifdef CONFIG_ARCH_OMAP15XX #ifdef CONFIG_ARCH_OMAP15XX
...@@ -464,5 +464,5 @@ MACHINE_START(OMAP_INNOVATOR, "TI-Innovator") ...@@ -464,5 +464,5 @@ MACHINE_START(OMAP_INNOVATOR, "TI-Innovator")
.reserve = omap_reserve, .reserve = omap_reserve,
.init_irq = innovator_init_irq, .init_irq = innovator_init_irq,
.init_machine = innovator_init, .init_machine = innovator_init,
.timer = &omap_timer, .timer = &omap1_timer,
MACHINE_END MACHINE_END
...@@ -51,7 +51,7 @@ static void __init omap_nokia770_init_irq(void) ...@@ -51,7 +51,7 @@ static void __init omap_nokia770_init_irq(void)
omap_writew((omap_readw(0xfffb5004) & ~2), 0xfffb5004); omap_writew((omap_readw(0xfffb5004) & ~2), 0xfffb5004);
omap1_init_common_hw(); omap1_init_common_hw();
omap_init_irq(); omap1_init_irq();
} }
static const unsigned int nokia770_keymap[] = { static const unsigned int nokia770_keymap[] = {
...@@ -269,5 +269,5 @@ MACHINE_START(NOKIA770, "Nokia 770") ...@@ -269,5 +269,5 @@ MACHINE_START(NOKIA770, "Nokia 770")
.reserve = omap_reserve, .reserve = omap_reserve,
.init_irq = omap_nokia770_init_irq, .init_irq = omap_nokia770_init_irq,
.init_machine = omap_nokia770_init, .init_machine = omap_nokia770_init,
.timer = &omap_timer, .timer = &omap1_timer,
MACHINE_END MACHINE_END
...@@ -282,7 +282,7 @@ static void __init osk_init_cf(void) ...@@ -282,7 +282,7 @@ static void __init osk_init_cf(void)
static void __init osk_init_irq(void) static void __init osk_init_irq(void)
{ {
omap1_init_common_hw(); omap1_init_common_hw();
omap_init_irq(); omap1_init_irq();
} }
static struct omap_usb_config osk_usb_config __initdata = { static struct omap_usb_config osk_usb_config __initdata = {
...@@ -588,5 +588,5 @@ MACHINE_START(OMAP_OSK, "TI-OSK") ...@@ -588,5 +588,5 @@ MACHINE_START(OMAP_OSK, "TI-OSK")
.reserve = omap_reserve, .reserve = omap_reserve,
.init_irq = osk_init_irq, .init_irq = osk_init_irq,
.init_machine = osk_init, .init_machine = osk_init,
.timer = &omap_timer, .timer = &omap1_timer,
MACHINE_END MACHINE_END
...@@ -62,7 +62,7 @@ ...@@ -62,7 +62,7 @@
static void __init omap_palmte_init_irq(void) static void __init omap_palmte_init_irq(void)
{ {
omap1_init_common_hw(); omap1_init_common_hw();
omap_init_irq(); omap1_init_irq();
} }
static const unsigned int palmte_keymap[] = { static const unsigned int palmte_keymap[] = {
...@@ -280,5 +280,5 @@ MACHINE_START(OMAP_PALMTE, "OMAP310 based Palm Tungsten E") ...@@ -280,5 +280,5 @@ MACHINE_START(OMAP_PALMTE, "OMAP310 based Palm Tungsten E")
.reserve = omap_reserve, .reserve = omap_reserve,
.init_irq = omap_palmte_init_irq, .init_irq = omap_palmte_init_irq,
.init_machine = omap_palmte_init, .init_machine = omap_palmte_init,
.timer = &omap_timer, .timer = &omap1_timer,
MACHINE_END MACHINE_END
...@@ -266,7 +266,7 @@ static struct spi_board_info __initdata palmtt_boardinfo[] = { ...@@ -266,7 +266,7 @@ static struct spi_board_info __initdata palmtt_boardinfo[] = {
static void __init omap_palmtt_init_irq(void) static void __init omap_palmtt_init_irq(void)
{ {
omap1_init_common_hw(); omap1_init_common_hw();
omap_init_irq(); omap1_init_irq();
} }
static struct omap_usb_config palmtt_usb_config __initdata = { static struct omap_usb_config palmtt_usb_config __initdata = {
...@@ -326,5 +326,5 @@ MACHINE_START(OMAP_PALMTT, "OMAP1510 based Palm Tungsten|T") ...@@ -326,5 +326,5 @@ MACHINE_START(OMAP_PALMTT, "OMAP1510 based Palm Tungsten|T")
.reserve = omap_reserve, .reserve = omap_reserve,
.init_irq = omap_palmtt_init_irq, .init_irq = omap_palmtt_init_irq,
.init_machine = omap_palmtt_init, .init_machine = omap_palmtt_init,
.timer = &omap_timer, .timer = &omap1_timer,
MACHINE_END MACHINE_END
...@@ -61,7 +61,7 @@ static void __init ...@@ -61,7 +61,7 @@ static void __init
omap_palmz71_init_irq(void) omap_palmz71_init_irq(void)
{ {
omap1_init_common_hw(); omap1_init_common_hw();
omap_init_irq(); omap1_init_irq();
} }
static const unsigned int palmz71_keymap[] = { static const unsigned int palmz71_keymap[] = {
...@@ -346,5 +346,5 @@ MACHINE_START(OMAP_PALMZ71, "OMAP310 based Palm Zire71") ...@@ -346,5 +346,5 @@ MACHINE_START(OMAP_PALMZ71, "OMAP310 based Palm Zire71")
.reserve = omap_reserve, .reserve = omap_reserve,
.init_irq = omap_palmz71_init_irq, .init_irq = omap_palmz71_init_irq,
.init_machine = omap_palmz71_init, .init_machine = omap_palmz71_init,
.timer = &omap_timer, .timer = &omap1_timer,
MACHINE_END MACHINE_END
...@@ -297,7 +297,7 @@ static void __init omap_perseus2_init(void) ...@@ -297,7 +297,7 @@ static void __init omap_perseus2_init(void)
static void __init omap_perseus2_init_irq(void) static void __init omap_perseus2_init_irq(void)
{ {
omap1_init_common_hw(); omap1_init_common_hw();
omap_init_irq(); omap1_init_irq();
} }
/* Only FPGA needs to be mapped here. All others are done with ioremap */ /* Only FPGA needs to be mapped here. All others are done with ioremap */
static struct map_desc omap_perseus2_io_desc[] __initdata = { static struct map_desc omap_perseus2_io_desc[] __initdata = {
...@@ -355,5 +355,5 @@ MACHINE_START(OMAP_PERSEUS2, "OMAP730 Perseus2") ...@@ -355,5 +355,5 @@ MACHINE_START(OMAP_PERSEUS2, "OMAP730 Perseus2")
.reserve = omap_reserve, .reserve = omap_reserve,
.init_irq = omap_perseus2_init_irq, .init_irq = omap_perseus2_init_irq,
.init_machine = omap_perseus2_init, .init_machine = omap_perseus2_init,
.timer = &omap_timer, .timer = &omap1_timer,
MACHINE_END MACHINE_END
...@@ -411,7 +411,7 @@ static void __init omap_sx1_init(void) ...@@ -411,7 +411,7 @@ static void __init omap_sx1_init(void)
static void __init omap_sx1_init_irq(void) static void __init omap_sx1_init_irq(void)
{ {
omap1_init_common_hw(); omap1_init_common_hw();
omap_init_irq(); omap1_init_irq();
} }
/*----------------------------------------*/ /*----------------------------------------*/
...@@ -426,5 +426,5 @@ MACHINE_START(SX1, "OMAP310 based Siemens SX1") ...@@ -426,5 +426,5 @@ MACHINE_START(SX1, "OMAP310 based Siemens SX1")
.reserve = omap_reserve, .reserve = omap_reserve,
.init_irq = omap_sx1_init_irq, .init_irq = omap_sx1_init_irq,
.init_machine = omap_sx1_init, .init_machine = omap_sx1_init,
.timer = &omap_timer, .timer = &omap1_timer,
MACHINE_END MACHINE_END
...@@ -162,7 +162,7 @@ static struct omap_board_config_kernel voiceblue_config[] = { ...@@ -162,7 +162,7 @@ static struct omap_board_config_kernel voiceblue_config[] = {
static void __init voiceblue_init_irq(void) static void __init voiceblue_init_irq(void)
{ {
omap1_init_common_hw(); omap1_init_common_hw();
omap_init_irq(); omap1_init_irq();
} }
static void __init voiceblue_map_io(void) static void __init voiceblue_map_io(void)
...@@ -306,5 +306,5 @@ MACHINE_START(VOICEBLUE, "VoiceBlue OMAP5910") ...@@ -306,5 +306,5 @@ MACHINE_START(VOICEBLUE, "VoiceBlue OMAP5910")
.reserve = omap_reserve, .reserve = omap_reserve,
.init_irq = voiceblue_init_irq, .init_irq = voiceblue_init_irq,
.init_machine = voiceblue_init, .init_machine = voiceblue_init,
.timer = &omap_timer, .timer = &omap1_timer,
MACHINE_END MACHINE_END
...@@ -175,7 +175,7 @@ static struct irq_chip omap_irq_chip = { ...@@ -175,7 +175,7 @@ static struct irq_chip omap_irq_chip = {
.irq_set_wake = omap_wake_irq, .irq_set_wake = omap_wake_irq,
}; };
void __init omap_init_irq(void) void __init omap1_init_irq(void)
{ {
int i, j; int i, j;
......
...@@ -38,7 +38,7 @@ static void omap1_mcbsp_request(unsigned int id) ...@@ -38,7 +38,7 @@ static void omap1_mcbsp_request(unsigned int id)
* On 1510, 1610 and 1710, McBSP1 and McBSP3 * On 1510, 1610 and 1710, McBSP1 and McBSP3
* are DSP public peripherals. * are DSP public peripherals.
*/ */
if (id == OMAP_MCBSP1 || id == OMAP_MCBSP3) { if (id == 0 || id == 2) {
if (dsp_use++ == 0) { if (dsp_use++ == 0) {
api_clk = clk_get(NULL, "api_ck"); api_clk = clk_get(NULL, "api_ck");
dsp_clk = clk_get(NULL, "dsp_ck"); dsp_clk = clk_get(NULL, "dsp_ck");
...@@ -59,7 +59,7 @@ static void omap1_mcbsp_request(unsigned int id) ...@@ -59,7 +59,7 @@ static void omap1_mcbsp_request(unsigned int id)
static void omap1_mcbsp_free(unsigned int id) static void omap1_mcbsp_free(unsigned int id)
{ {
if (id == OMAP_MCBSP1 || id == OMAP_MCBSP3) { if (id == 0 || id == 2) {
if (--dsp_use == 0) { if (--dsp_use == 0) {
if (!IS_ERR(api_clk)) { if (!IS_ERR(api_clk)) {
clk_disable(api_clk); clk_disable(api_clk);
......
...@@ -56,9 +56,13 @@ static struct dev_power_domain default_power_domain = { ...@@ -56,9 +56,13 @@ static struct dev_power_domain default_power_domain = {
USE_PLATFORM_PM_SLEEP_OPS USE_PLATFORM_PM_SLEEP_OPS
}, },
}; };
#define OMAP1_PWR_DOMAIN (&default_power_domain)
#else
#define OMAP1_PWR_DOMAIN NULL
#endif /* CONFIG_PM_RUNTIME */
static struct pm_clk_notifier_block platform_bus_notifier = { static struct pm_clk_notifier_block platform_bus_notifier = {
.pwr_domain = &default_power_domain, .pwr_domain = OMAP1_PWR_DOMAIN,
.con_ids = { "ick", "fck", NULL, }, .con_ids = { "ick", "fck", NULL, },
}; };
...@@ -72,4 +76,4 @@ static int __init omap1_pm_runtime_init(void) ...@@ -72,4 +76,4 @@ static int __init omap1_pm_runtime_init(void)
return 0; return 0;
} }
core_initcall(omap1_pm_runtime_init); core_initcall(omap1_pm_runtime_init);
#endif /* CONFIG_PM_RUNTIME */
...@@ -297,7 +297,7 @@ static inline int omap_32k_timer_usable(void) ...@@ -297,7 +297,7 @@ static inline int omap_32k_timer_usable(void)
* Timer initialization * Timer initialization
* --------------------------------------------------------------------------- * ---------------------------------------------------------------------------
*/ */
static void __init omap_timer_init(void) static void __init omap1_timer_init(void)
{ {
if (omap_32k_timer_usable()) { if (omap_32k_timer_usable()) {
preferred_sched_clock_init(1); preferred_sched_clock_init(1);
...@@ -307,6 +307,6 @@ static void __init omap_timer_init(void) ...@@ -307,6 +307,6 @@ static void __init omap_timer_init(void)
} }
} }
struct sys_timer omap_timer = { struct sys_timer omap1_timer = {
.init = omap_timer_init, .init = omap1_timer_init,
}; };
...@@ -183,10 +183,6 @@ static __init void omap_init_32k_timer(void) ...@@ -183,10 +183,6 @@ static __init void omap_init_32k_timer(void)
bool __init omap_32k_timer_init(void) bool __init omap_32k_timer_init(void)
{ {
omap_init_clocksource_32k(); omap_init_clocksource_32k();
#ifdef CONFIG_OMAP_DM_TIMER
omap_dm_timer_init();
#endif
omap_init_32k_timer(); omap_init_32k_timer();
return true; return true;
......
...@@ -3,7 +3,7 @@ ...@@ -3,7 +3,7 @@
# #
# Common support # Common support
obj-y := id.o io.o control.o mux.o devices.o serial.o gpmc.o timer-gp.o pm.o \ obj-y := id.o io.o control.o mux.o devices.o serial.o gpmc.o timer.o pm.o \
common.o gpio.o dma.o wd_timer.o common.o gpio.o dma.o wd_timer.o
omap-2-3-common = irq.o sdrc.o omap-2-3-common = irq.o sdrc.o
...@@ -145,9 +145,19 @@ obj-$(CONFIG_SOC_OMAP2420) += opp2420_data.o ...@@ -145,9 +145,19 @@ obj-$(CONFIG_SOC_OMAP2420) += opp2420_data.o
obj-$(CONFIG_SOC_OMAP2430) += opp2430_data.o obj-$(CONFIG_SOC_OMAP2430) += opp2430_data.o
# hwmod data # hwmod data
obj-$(CONFIG_SOC_OMAP2420) += omap_hwmod_2420_data.o obj-$(CONFIG_SOC_OMAP2420) += omap_hwmod_2xxx_ipblock_data.o \
obj-$(CONFIG_SOC_OMAP2430) += omap_hwmod_2430_data.o omap_hwmod_2xxx_3xxx_ipblock_data.o \
obj-$(CONFIG_ARCH_OMAP3) += omap_hwmod_3xxx_data.o omap_hwmod_2xxx_interconnect_data.o \
omap_hwmod_2xxx_3xxx_interconnect_data.o \
omap_hwmod_2420_data.o
obj-$(CONFIG_SOC_OMAP2430) += omap_hwmod_2xxx_ipblock_data.o \
omap_hwmod_2xxx_3xxx_ipblock_data.o \
omap_hwmod_2xxx_interconnect_data.o \
omap_hwmod_2xxx_3xxx_interconnect_data.o \
omap_hwmod_2430_data.o
obj-$(CONFIG_ARCH_OMAP3) += omap_hwmod_2xxx_3xxx_ipblock_data.o \
omap_hwmod_2xxx_3xxx_interconnect_data.o \
omap_hwmod_3xxx_data.o
obj-$(CONFIG_ARCH_OMAP4) += omap_hwmod_44xx_data.o obj-$(CONFIG_ARCH_OMAP4) += omap_hwmod_44xx_data.o
# EMU peripherals # EMU peripherals
...@@ -269,4 +279,4 @@ obj-$(CONFIG_ARCH_OMAP4) += hwspinlock.o ...@@ -269,4 +279,4 @@ obj-$(CONFIG_ARCH_OMAP4) += hwspinlock.o
disp-$(CONFIG_OMAP2_DSS) := display.o disp-$(CONFIG_OMAP2_DSS) := display.o
obj-y += $(disp-m) $(disp-y) obj-y += $(disp-m) $(disp-y)
obj-y += common-board-devices.o obj-y += common-board-devices.o twl-common.o
...@@ -260,7 +260,7 @@ MACHINE_START(OMAP_2430SDP, "OMAP2430 sdp2430 board") ...@@ -260,7 +260,7 @@ MACHINE_START(OMAP_2430SDP, "OMAP2430 sdp2430 board")
.reserve = omap_reserve, .reserve = omap_reserve,
.map_io = omap_2430sdp_map_io, .map_io = omap_2430sdp_map_io,
.init_early = omap_2430sdp_init_early, .init_early = omap_2430sdp_init_early,
.init_irq = omap_init_irq, .init_irq = omap2_init_irq,
.init_machine = omap_2430sdp_init, .init_machine = omap_2430sdp_init,
.timer = &omap_timer, .timer = &omap2_timer,
MACHINE_END MACHINE_END
...@@ -231,22 +231,6 @@ static void __init omap_3430sdp_init_early(void) ...@@ -231,22 +231,6 @@ static void __init omap_3430sdp_init_early(void)
omap2_init_common_devices(hyb18m512160af6_sdrc_params, NULL); omap2_init_common_devices(hyb18m512160af6_sdrc_params, NULL);
} }
static int sdp3430_batt_table[] = {
/* 0 C*/
30800, 29500, 28300, 27100,
26000, 24900, 23900, 22900, 22000, 21100, 20300, 19400, 18700, 17900,
17200, 16500, 15900, 15300, 14700, 14100, 13600, 13100, 12600, 12100,
11600, 11200, 10800, 10400, 10000, 9630, 9280, 8950, 8620, 8310,
8020, 7730, 7460, 7200, 6950, 6710, 6470, 6250, 6040, 5830,
5640, 5450, 5260, 5090, 4920, 4760, 4600, 4450, 4310, 4170,
4040, 3910, 3790, 3670, 3550
};
static struct twl4030_bci_platform_data sdp3430_bci_data = {
.battery_tmp_tbl = sdp3430_batt_table,
.tblsize = ARRAY_SIZE(sdp3430_batt_table),
};
static struct omap2_hsmmc_info mmc[] = { static struct omap2_hsmmc_info mmc[] = {
{ {
.mmc = 1, .mmc = 1,
...@@ -292,14 +276,6 @@ static struct twl4030_gpio_platform_data sdp3430_gpio_data = { ...@@ -292,14 +276,6 @@ static struct twl4030_gpio_platform_data sdp3430_gpio_data = {
.setup = sdp3430_twl_gpio_setup, .setup = sdp3430_twl_gpio_setup,
}; };
static struct twl4030_usb_data sdp3430_usb_data = {
.usb_mode = T2_USB_MODE_ULPI,
};
static struct twl4030_madc_platform_data sdp3430_madc_data = {
.irq_line = 1,
};
/* regulator consumer mappings */ /* regulator consumer mappings */
/* ads7846 on SPI */ /* ads7846 on SPI */
...@@ -307,16 +283,6 @@ static struct regulator_consumer_supply sdp3430_vaux3_supplies[] = { ...@@ -307,16 +283,6 @@ static struct regulator_consumer_supply sdp3430_vaux3_supplies[] = {
REGULATOR_SUPPLY("vcc", "spi1.0"), REGULATOR_SUPPLY("vcc", "spi1.0"),
}; };
static struct regulator_consumer_supply sdp3430_vdda_dac_supplies[] = {
REGULATOR_SUPPLY("vdda_dac", "omapdss_venc"),
};
/* VPLL2 for digital video outputs */
static struct regulator_consumer_supply sdp3430_vpll2_supplies[] = {
REGULATOR_SUPPLY("vdds_dsi", "omapdss"),
REGULATOR_SUPPLY("vdds_dsi", "omapdss_dsi1"),
};
static struct regulator_consumer_supply sdp3430_vmmc1_supplies[] = { static struct regulator_consumer_supply sdp3430_vmmc1_supplies[] = {
REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"), REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"),
}; };
...@@ -433,54 +399,10 @@ static struct regulator_init_data sdp3430_vsim = { ...@@ -433,54 +399,10 @@ static struct regulator_init_data sdp3430_vsim = {
.consumer_supplies = sdp3430_vsim_supplies, .consumer_supplies = sdp3430_vsim_supplies,
}; };
/* VDAC for DSS driving S-Video */
static struct regulator_init_data sdp3430_vdac = {
.constraints = {
.min_uV = 1800000,
.max_uV = 1800000,
.apply_uV = true,
.valid_modes_mask = REGULATOR_MODE_NORMAL
| REGULATOR_MODE_STANDBY,
.valid_ops_mask = REGULATOR_CHANGE_MODE
| REGULATOR_CHANGE_STATUS,
},
.num_consumer_supplies = ARRAY_SIZE(sdp3430_vdda_dac_supplies),
.consumer_supplies = sdp3430_vdda_dac_supplies,
};
static struct regulator_init_data sdp3430_vpll2 = {
.constraints = {
.name = "VDVI",
.min_uV = 1800000,
.max_uV = 1800000,
.apply_uV = true,
.valid_modes_mask = REGULATOR_MODE_NORMAL
| REGULATOR_MODE_STANDBY,
.valid_ops_mask = REGULATOR_CHANGE_MODE
| REGULATOR_CHANGE_STATUS,
},
.num_consumer_supplies = ARRAY_SIZE(sdp3430_vpll2_supplies),
.consumer_supplies = sdp3430_vpll2_supplies,
};
static struct twl4030_codec_audio_data sdp3430_audio;
static struct twl4030_codec_data sdp3430_codec = {
.audio_mclk = 26000000,
.audio = &sdp3430_audio,
};
static struct twl4030_platform_data sdp3430_twldata = { static struct twl4030_platform_data sdp3430_twldata = {
.irq_base = TWL4030_IRQ_BASE,
.irq_end = TWL4030_IRQ_END,
/* platform_data for children goes here */ /* platform_data for children goes here */
.bci = &sdp3430_bci_data,
.gpio = &sdp3430_gpio_data, .gpio = &sdp3430_gpio_data,
.madc = &sdp3430_madc_data,
.keypad = &sdp3430_kp_data, .keypad = &sdp3430_kp_data,
.usb = &sdp3430_usb_data,
.codec = &sdp3430_codec,
.vaux1 = &sdp3430_vaux1, .vaux1 = &sdp3430_vaux1,
.vaux2 = &sdp3430_vaux2, .vaux2 = &sdp3430_vaux2,
...@@ -489,14 +411,21 @@ static struct twl4030_platform_data sdp3430_twldata = { ...@@ -489,14 +411,21 @@ static struct twl4030_platform_data sdp3430_twldata = {
.vmmc1 = &sdp3430_vmmc1, .vmmc1 = &sdp3430_vmmc1,
.vmmc2 = &sdp3430_vmmc2, .vmmc2 = &sdp3430_vmmc2,
.vsim = &sdp3430_vsim, .vsim = &sdp3430_vsim,
.vdac = &sdp3430_vdac,
.vpll2 = &sdp3430_vpll2,
}; };
static int __init omap3430_i2c_init(void) static int __init omap3430_i2c_init(void)
{ {
/* i2c1 for PMIC only */ /* i2c1 for PMIC only */
omap3_pmic_get_config(&sdp3430_twldata,
TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_BCI |
TWL_COMMON_PDATA_MADC | TWL_COMMON_PDATA_AUDIO,
TWL_COMMON_REGULATOR_VDAC | TWL_COMMON_REGULATOR_VPLL2);
sdp3430_twldata.vdac->constraints.apply_uV = true;
sdp3430_twldata.vpll2->constraints.apply_uV = true;
sdp3430_twldata.vpll2->constraints.name = "VDVI";
omap3_pmic_init("twl4030", &sdp3430_twldata); omap3_pmic_init("twl4030", &sdp3430_twldata);
/* i2c2 on camera connector (for sensor control) and optional isp1301 */ /* i2c2 on camera connector (for sensor control) and optional isp1301 */
omap_register_i2c_bus(2, 400, NULL, 0); omap_register_i2c_bus(2, 400, NULL, 0);
/* i2c3 on display connector (for DVI, tfp410) */ /* i2c3 on display connector (for DVI, tfp410) */
...@@ -804,7 +733,7 @@ MACHINE_START(OMAP_3430SDP, "OMAP3430 3430SDP board") ...@@ -804,7 +733,7 @@ MACHINE_START(OMAP_3430SDP, "OMAP3430 3430SDP board")
.reserve = omap_reserve, .reserve = omap_reserve,
.map_io = omap3_map_io, .map_io = omap3_map_io,
.init_early = omap_3430sdp_init_early, .init_early = omap_3430sdp_init_early,
.init_irq = omap_init_irq, .init_irq = omap3_init_irq,
.init_machine = omap_3430sdp_init, .init_machine = omap_3430sdp_init,
.timer = &omap_timer, .timer = &omap3_timer,
MACHINE_END MACHINE_END
...@@ -219,7 +219,7 @@ MACHINE_START(OMAP_3630SDP, "OMAP 3630SDP board") ...@@ -219,7 +219,7 @@ MACHINE_START(OMAP_3630SDP, "OMAP 3630SDP board")
.reserve = omap_reserve, .reserve = omap_reserve,
.map_io = omap3_map_io, .map_io = omap3_map_io,
.init_early = omap_sdp_init_early, .init_early = omap_sdp_init_early,
.init_irq = omap_init_irq, .init_irq = omap3_init_irq,
.init_machine = omap_sdp_init, .init_machine = omap_sdp_init,
.timer = &omap_timer, .timer = &omap3_timer,
MACHINE_END MACHINE_END
...@@ -40,7 +40,6 @@ ...@@ -40,7 +40,6 @@
#include "mux.h" #include "mux.h"
#include "hsmmc.h" #include "hsmmc.h"
#include "timer-gp.h"
#include "control.h" #include "control.h"
#include "common-board-devices.h" #include "common-board-devices.h"
...@@ -295,9 +294,6 @@ static void __init omap_4430sdp_init_early(void) ...@@ -295,9 +294,6 @@ static void __init omap_4430sdp_init_early(void)
{ {
omap2_init_common_infrastructure(); omap2_init_common_infrastructure();
omap2_init_common_devices(NULL, NULL); omap2_init_common_devices(NULL, NULL);
#ifdef CONFIG_OMAP_32K_TIMER
omap2_gp_clockevent_set_gptimer(1);
#endif
} }
static struct omap_musb_board_data musb_board_data = { static struct omap_musb_board_data musb_board_data = {
...@@ -306,14 +302,6 @@ static struct omap_musb_board_data musb_board_data = { ...@@ -306,14 +302,6 @@ static struct omap_musb_board_data musb_board_data = {
.power = 100, .power = 100,
}; };
static struct twl4030_usb_data omap4_usbphy_data = {
.phy_init = omap4430_phy_init,
.phy_exit = omap4430_phy_exit,
.phy_power = omap4430_phy_power,
.phy_set_clock = omap4430_phy_set_clk,
.phy_suspend = omap4430_phy_suspend,
};
static struct omap2_hsmmc_info mmc[] = { static struct omap2_hsmmc_info mmc[] = {
{ {
.mmc = 2, .mmc = 2,
...@@ -333,16 +321,7 @@ static struct omap2_hsmmc_info mmc[] = { ...@@ -333,16 +321,7 @@ static struct omap2_hsmmc_info mmc[] = {
}; };
static struct regulator_consumer_supply sdp4430_vaux_supply[] = { static struct regulator_consumer_supply sdp4430_vaux_supply[] = {
{ REGULATOR_SUPPLY("vmmc", "omap_hsmmc.1"),
.supply = "vmmc",
.dev_name = "omap_hsmmc.1",
},
};
static struct regulator_consumer_supply sdp4430_vmmc_supply[] = {
{
.supply = "vmmc",
.dev_name = "omap_hsmmc.0",
},
}; };
static int omap4_twl6030_hsmmc_late_init(struct device *dev) static int omap4_twl6030_hsmmc_late_init(struct device *dev)
...@@ -399,65 +378,10 @@ static struct regulator_init_data sdp4430_vaux1 = { ...@@ -399,65 +378,10 @@ static struct regulator_init_data sdp4430_vaux1 = {
| REGULATOR_CHANGE_MODE | REGULATOR_CHANGE_MODE
| REGULATOR_CHANGE_STATUS, | REGULATOR_CHANGE_STATUS,
}, },
.num_consumer_supplies = 1, .num_consumer_supplies = ARRAY_SIZE(sdp4430_vaux_supply),
.consumer_supplies = sdp4430_vaux_supply, .consumer_supplies = sdp4430_vaux_supply,
}; };
static struct regulator_init_data sdp4430_vaux2 = {
.constraints = {
.min_uV = 1200000,
.max_uV = 2800000,
.apply_uV = true,
.valid_modes_mask = REGULATOR_MODE_NORMAL
| REGULATOR_MODE_STANDBY,
.valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
| REGULATOR_CHANGE_MODE
| REGULATOR_CHANGE_STATUS,
},
};
static struct regulator_init_data sdp4430_vaux3 = {
.constraints = {
.min_uV = 1000000,
.max_uV = 3000000,
.apply_uV = true,
.valid_modes_mask = REGULATOR_MODE_NORMAL
| REGULATOR_MODE_STANDBY,
.valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
| REGULATOR_CHANGE_MODE
| REGULATOR_CHANGE_STATUS,
},
};
/* VMMC1 for MMC1 card */
static struct regulator_init_data sdp4430_vmmc = {
.constraints = {
.min_uV = 1200000,
.max_uV = 3000000,
.apply_uV = true,
.valid_modes_mask = REGULATOR_MODE_NORMAL
| REGULATOR_MODE_STANDBY,
.valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
| REGULATOR_CHANGE_MODE
| REGULATOR_CHANGE_STATUS,
},
.num_consumer_supplies = 1,
.consumer_supplies = sdp4430_vmmc_supply,
};
static struct regulator_init_data sdp4430_vpp = {
.constraints = {
.min_uV = 1800000,
.max_uV = 2500000,
.apply_uV = true,
.valid_modes_mask = REGULATOR_MODE_NORMAL
| REGULATOR_MODE_STANDBY,
.valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
| REGULATOR_CHANGE_MODE
| REGULATOR_CHANGE_STATUS,
},
};
static struct regulator_init_data sdp4430_vusim = { static struct regulator_init_data sdp4430_vusim = {
.constraints = { .constraints = {
.min_uV = 1200000, .min_uV = 1200000,
...@@ -471,74 +395,10 @@ static struct regulator_init_data sdp4430_vusim = { ...@@ -471,74 +395,10 @@ static struct regulator_init_data sdp4430_vusim = {
}, },
}; };
static struct regulator_init_data sdp4430_vana = {
.constraints = {
.min_uV = 2100000,
.max_uV = 2100000,
.valid_modes_mask = REGULATOR_MODE_NORMAL
| REGULATOR_MODE_STANDBY,
.valid_ops_mask = REGULATOR_CHANGE_MODE
| REGULATOR_CHANGE_STATUS,
},
};
static struct regulator_init_data sdp4430_vcxio = {
.constraints = {
.min_uV = 1800000,
.max_uV = 1800000,
.valid_modes_mask = REGULATOR_MODE_NORMAL
| REGULATOR_MODE_STANDBY,
.valid_ops_mask = REGULATOR_CHANGE_MODE
| REGULATOR_CHANGE_STATUS,
},
};
static struct regulator_init_data sdp4430_vdac = {
.constraints = {
.min_uV = 1800000,
.max_uV = 1800000,
.valid_modes_mask = REGULATOR_MODE_NORMAL
| REGULATOR_MODE_STANDBY,
.valid_ops_mask = REGULATOR_CHANGE_MODE
| REGULATOR_CHANGE_STATUS,
},
};
static struct regulator_init_data sdp4430_vusb = {
.constraints = {
.min_uV = 3300000,
.max_uV = 3300000,
.apply_uV = true,
.valid_modes_mask = REGULATOR_MODE_NORMAL
| REGULATOR_MODE_STANDBY,
.valid_ops_mask = REGULATOR_CHANGE_MODE
| REGULATOR_CHANGE_STATUS,
},
};
static struct regulator_init_data sdp4430_clk32kg = {
.constraints = {
.valid_ops_mask = REGULATOR_CHANGE_STATUS,
},
};
static struct twl4030_platform_data sdp4430_twldata = { static struct twl4030_platform_data sdp4430_twldata = {
.irq_base = TWL6030_IRQ_BASE,
.irq_end = TWL6030_IRQ_END,
/* Regulators */ /* Regulators */
.vmmc = &sdp4430_vmmc,
.vpp = &sdp4430_vpp,
.vusim = &sdp4430_vusim, .vusim = &sdp4430_vusim,
.vana = &sdp4430_vana,
.vcxio = &sdp4430_vcxio,
.vdac = &sdp4430_vdac,
.vusb = &sdp4430_vusb,
.vaux1 = &sdp4430_vaux1, .vaux1 = &sdp4430_vaux1,
.vaux2 = &sdp4430_vaux2,
.vaux3 = &sdp4430_vaux3,
.clk32kg = &sdp4430_clk32kg,
.usb = &omap4_usbphy_data
}; };
static struct i2c_board_info __initdata sdp4430_i2c_3_boardinfo[] = { static struct i2c_board_info __initdata sdp4430_i2c_3_boardinfo[] = {
...@@ -556,6 +416,16 @@ static struct i2c_board_info __initdata sdp4430_i2c_4_boardinfo[] = { ...@@ -556,6 +416,16 @@ static struct i2c_board_info __initdata sdp4430_i2c_4_boardinfo[] = {
}; };
static int __init omap4_i2c_init(void) static int __init omap4_i2c_init(void)
{ {
omap4_pmic_get_config(&sdp4430_twldata, TWL_COMMON_PDATA_USB,
TWL_COMMON_REGULATOR_VDAC |
TWL_COMMON_REGULATOR_VAUX2 |
TWL_COMMON_REGULATOR_VAUX3 |
TWL_COMMON_REGULATOR_VMMC |
TWL_COMMON_REGULATOR_VPP |
TWL_COMMON_REGULATOR_VANA |
TWL_COMMON_REGULATOR_VCXIO |
TWL_COMMON_REGULATOR_VUSB |
TWL_COMMON_REGULATOR_CLK32KG);
omap4_pmic_init("twl6030", &sdp4430_twldata); omap4_pmic_init("twl6030", &sdp4430_twldata);
omap_register_i2c_bus(2, 400, NULL, 0); omap_register_i2c_bus(2, 400, NULL, 0);
omap_register_i2c_bus(3, 400, sdp4430_i2c_3_boardinfo, omap_register_i2c_bus(3, 400, sdp4430_i2c_3_boardinfo,
...@@ -773,5 +643,5 @@ MACHINE_START(OMAP_4430SDP, "OMAP4430 4430SDP board") ...@@ -773,5 +643,5 @@ MACHINE_START(OMAP_4430SDP, "OMAP4430 4430SDP board")
.init_early = omap_4430sdp_init_early, .init_early = omap_4430sdp_init_early,
.init_irq = gic_init_irq, .init_irq = gic_init_irq,
.init_machine = omap_4430sdp_init, .init_machine = omap_4430sdp_init,
.timer = &omap_timer, .timer = &omap4_timer,
MACHINE_END MACHINE_END
...@@ -104,7 +104,7 @@ MACHINE_START(CRANEBOARD, "AM3517/05 CRANEBOARD") ...@@ -104,7 +104,7 @@ MACHINE_START(CRANEBOARD, "AM3517/05 CRANEBOARD")
.reserve = omap_reserve, .reserve = omap_reserve,
.map_io = omap3_map_io, .map_io = omap3_map_io,
.init_early = am3517_crane_init_early, .init_early = am3517_crane_init_early,
.init_irq = omap_init_irq, .init_irq = omap3_init_irq,
.init_machine = am3517_crane_init, .init_machine = am3517_crane_init,
.timer = &omap_timer, .timer = &omap3_timer,
MACHINE_END MACHINE_END
...@@ -494,7 +494,7 @@ MACHINE_START(OMAP3517EVM, "OMAP3517/AM3517 EVM") ...@@ -494,7 +494,7 @@ MACHINE_START(OMAP3517EVM, "OMAP3517/AM3517 EVM")
.reserve = omap_reserve, .reserve = omap_reserve,
.map_io = omap3_map_io, .map_io = omap3_map_io,
.init_early = am3517_evm_init_early, .init_early = am3517_evm_init_early,
.init_irq = omap_init_irq, .init_irq = omap3_init_irq,
.init_machine = am3517_evm_init, .init_machine = am3517_evm_init,
.timer = &omap_timer, .timer = &omap3_timer,
MACHINE_END MACHINE_END
...@@ -354,7 +354,7 @@ MACHINE_START(OMAP_APOLLON, "OMAP24xx Apollon") ...@@ -354,7 +354,7 @@ MACHINE_START(OMAP_APOLLON, "OMAP24xx Apollon")
.reserve = omap_reserve, .reserve = omap_reserve,
.map_io = omap_apollon_map_io, .map_io = omap_apollon_map_io,
.init_early = omap_apollon_init_early, .init_early = omap_apollon_init_early,
.init_irq = omap_init_irq, .init_irq = omap2_init_irq,
.init_machine = omap_apollon_init, .init_machine = omap_apollon_init,
.timer = &omap_timer, .timer = &omap2_timer,
MACHINE_END MACHINE_END
...@@ -162,9 +162,7 @@ static struct mtd_partition cm_t35_nand_partitions[] = { ...@@ -162,9 +162,7 @@ static struct mtd_partition cm_t35_nand_partitions[] = {
static struct omap_nand_platform_data cm_t35_nand_data = { static struct omap_nand_platform_data cm_t35_nand_data = {
.parts = cm_t35_nand_partitions, .parts = cm_t35_nand_partitions,
.nr_parts = ARRAY_SIZE(cm_t35_nand_partitions), .nr_parts = ARRAY_SIZE(cm_t35_nand_partitions),
.dma_channel = -1, /* disable DMA in OMAP NAND driver */
.cs = 0, .cs = 0,
}; };
static void __init cm_t35_init_nand(void) static void __init cm_t35_init_nand(void)
...@@ -337,19 +335,17 @@ static void __init cm_t35_init_display(void) ...@@ -337,19 +335,17 @@ static void __init cm_t35_init_display(void)
} }
} }
static struct regulator_consumer_supply cm_t35_vmmc1_supply = { static struct regulator_consumer_supply cm_t35_vmmc1_supply[] = {
.supply = "vmmc", REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"),
}; };
static struct regulator_consumer_supply cm_t35_vsim_supply = { static struct regulator_consumer_supply cm_t35_vsim_supply[] = {
.supply = "vmmc_aux", REGULATOR_SUPPLY("vmmc_aux", "omap_hsmmc.0"),
}; };
static struct regulator_consumer_supply cm_t35_vdac_supply = static struct regulator_consumer_supply cm_t35_vdvi_supply[] = {
REGULATOR_SUPPLY("vdda_dac", "omapdss_venc"); REGULATOR_SUPPLY("vdvi", "omapdss"),
};
static struct regulator_consumer_supply cm_t35_vdvi_supply =
REGULATOR_SUPPLY("vdvi", "omapdss");
/* VMMC1 for MMC1 pins CMD, CLK, DAT0..DAT3 (20 mA, plus card == max 220 mA) */ /* VMMC1 for MMC1 pins CMD, CLK, DAT0..DAT3 (20 mA, plus card == max 220 mA) */
static struct regulator_init_data cm_t35_vmmc1 = { static struct regulator_init_data cm_t35_vmmc1 = {
...@@ -362,8 +358,8 @@ static struct regulator_init_data cm_t35_vmmc1 = { ...@@ -362,8 +358,8 @@ static struct regulator_init_data cm_t35_vmmc1 = {
| REGULATOR_CHANGE_MODE | REGULATOR_CHANGE_MODE
| REGULATOR_CHANGE_STATUS, | REGULATOR_CHANGE_STATUS,
}, },
.num_consumer_supplies = 1, .num_consumer_supplies = ARRAY_SIZE(cm_t35_vmmc1_supply),
.consumer_supplies = &cm_t35_vmmc1_supply, .consumer_supplies = cm_t35_vmmc1_supply,
}; };
/* VSIM for MMC1 pins DAT4..DAT7 (2 mA, plus card == max 50 mA) */ /* VSIM for MMC1 pins DAT4..DAT7 (2 mA, plus card == max 50 mA) */
...@@ -377,41 +373,8 @@ static struct regulator_init_data cm_t35_vsim = { ...@@ -377,41 +373,8 @@ static struct regulator_init_data cm_t35_vsim = {
| REGULATOR_CHANGE_MODE | REGULATOR_CHANGE_MODE
| REGULATOR_CHANGE_STATUS, | REGULATOR_CHANGE_STATUS,
}, },
.num_consumer_supplies = 1, .num_consumer_supplies = ARRAY_SIZE(cm_t35_vsim_supply),
.consumer_supplies = &cm_t35_vsim_supply, .consumer_supplies = cm_t35_vsim_supply,
};
/* VDAC for DSS driving S-Video (8 mA unloaded, max 65 mA) */
static struct regulator_init_data cm_t35_vdac = {
.constraints = {
.min_uV = 1800000,
.max_uV = 1800000,
.valid_modes_mask = REGULATOR_MODE_NORMAL
| REGULATOR_MODE_STANDBY,
.valid_ops_mask = REGULATOR_CHANGE_MODE
| REGULATOR_CHANGE_STATUS,
},
.num_consumer_supplies = 1,
.consumer_supplies = &cm_t35_vdac_supply,
};
/* VPLL2 for digital video outputs */
static struct regulator_init_data cm_t35_vpll2 = {
.constraints = {
.name = "VDVI",
.min_uV = 1800000,
.max_uV = 1800000,
.valid_modes_mask = REGULATOR_MODE_NORMAL
| REGULATOR_MODE_STANDBY,
.valid_ops_mask = REGULATOR_CHANGE_MODE
| REGULATOR_CHANGE_STATUS,
},
.num_consumer_supplies = 1,
.consumer_supplies = &cm_t35_vdvi_supply,
};
static struct twl4030_usb_data cm_t35_usb_data = {
.usb_mode = T2_USB_MODE_ULPI,
}; };
static uint32_t cm_t35_keymap[] = { static uint32_t cm_t35_keymap[] = {
...@@ -481,10 +444,6 @@ static int cm_t35_twl_gpio_setup(struct device *dev, unsigned gpio, ...@@ -481,10 +444,6 @@ static int cm_t35_twl_gpio_setup(struct device *dev, unsigned gpio,
mmc[0].gpio_cd = gpio + 0; mmc[0].gpio_cd = gpio + 0;
omap2_hsmmc_init(mmc); omap2_hsmmc_init(mmc);
/* link regulators to MMC adapters */
cm_t35_vmmc1_supply.dev = mmc[0].dev;
cm_t35_vsim_supply.dev = mmc[0].dev;
return 0; return 0;
} }
...@@ -496,21 +455,23 @@ static struct twl4030_gpio_platform_data cm_t35_gpio_data = { ...@@ -496,21 +455,23 @@ static struct twl4030_gpio_platform_data cm_t35_gpio_data = {
}; };
static struct twl4030_platform_data cm_t35_twldata = { static struct twl4030_platform_data cm_t35_twldata = {
.irq_base = TWL4030_IRQ_BASE,
.irq_end = TWL4030_IRQ_END,
/* platform_data for children goes here */ /* platform_data for children goes here */
.keypad = &cm_t35_kp_data, .keypad = &cm_t35_kp_data,
.usb = &cm_t35_usb_data,
.gpio = &cm_t35_gpio_data, .gpio = &cm_t35_gpio_data,
.vmmc1 = &cm_t35_vmmc1, .vmmc1 = &cm_t35_vmmc1,
.vsim = &cm_t35_vsim, .vsim = &cm_t35_vsim,
.vdac = &cm_t35_vdac,
.vpll2 = &cm_t35_vpll2,
}; };
static void __init cm_t35_init_i2c(void) static void __init cm_t35_init_i2c(void)
{ {
omap3_pmic_get_config(&cm_t35_twldata, TWL_COMMON_PDATA_USB,
TWL_COMMON_REGULATOR_VDAC | TWL_COMMON_REGULATOR_VPLL2);
cm_t35_twldata.vpll2->constraints.name = "VDVI";
cm_t35_twldata.vpll2->num_consumer_supplies =
ARRAY_SIZE(cm_t35_vdvi_supply);
cm_t35_twldata.vpll2->consumer_supplies = cm_t35_vdvi_supply;
omap3_pmic_init("tps65930", &cm_t35_twldata); omap3_pmic_init("tps65930", &cm_t35_twldata);
} }
...@@ -646,7 +607,7 @@ MACHINE_START(CM_T35, "Compulab CM-T35") ...@@ -646,7 +607,7 @@ MACHINE_START(CM_T35, "Compulab CM-T35")
.reserve = omap_reserve, .reserve = omap_reserve,
.map_io = omap3_map_io, .map_io = omap3_map_io,
.init_early = cm_t35_init_early, .init_early = cm_t35_init_early,
.init_irq = omap_init_irq, .init_irq = omap3_init_irq,
.init_machine = cm_t35_init, .init_machine = cm_t35_init,
.timer = &omap_timer, .timer = &omap3_timer,
MACHINE_END MACHINE_END
...@@ -236,7 +236,6 @@ static struct mtd_partition cm_t3517_nand_partitions[] = { ...@@ -236,7 +236,6 @@ static struct mtd_partition cm_t3517_nand_partitions[] = {
static struct omap_nand_platform_data cm_t3517_nand_data = { static struct omap_nand_platform_data cm_t3517_nand_data = {
.parts = cm_t3517_nand_partitions, .parts = cm_t3517_nand_partitions,
.nr_parts = ARRAY_SIZE(cm_t3517_nand_partitions), .nr_parts = ARRAY_SIZE(cm_t3517_nand_partitions),
.dma_channel = -1, /* disable DMA in OMAP NAND driver */
.cs = 0, .cs = 0,
}; };
...@@ -304,7 +303,7 @@ MACHINE_START(CM_T3517, "Compulab CM-T3517") ...@@ -304,7 +303,7 @@ MACHINE_START(CM_T3517, "Compulab CM-T3517")
.reserve = omap_reserve, .reserve = omap_reserve,
.map_io = omap3_map_io, .map_io = omap3_map_io,
.init_early = cm_t3517_init_early, .init_early = cm_t3517_init_early,
.init_irq = omap_init_irq, .init_irq = omap3_init_irq,
.init_machine = cm_t3517_init, .init_machine = cm_t3517_init,
.timer = &omap_timer, .timer = &omap3_timer,
MACHINE_END MACHINE_END
...@@ -58,7 +58,6 @@ ...@@ -58,7 +58,6 @@
#include "mux.h" #include "mux.h"
#include "hsmmc.h" #include "hsmmc.h"
#include "timer-gp.h"
#include "common-board-devices.h" #include "common-board-devices.h"
#define OMAP_DM9000_GPIO_IRQ 25 #define OMAP_DM9000_GPIO_IRQ 25
...@@ -130,13 +129,14 @@ static void devkit8000_panel_disable_dvi(struct omap_dss_device *dssdev) ...@@ -130,13 +129,14 @@ static void devkit8000_panel_disable_dvi(struct omap_dss_device *dssdev)
gpio_set_value_cansleep(dssdev->reset_gpio, 0); gpio_set_value_cansleep(dssdev->reset_gpio, 0);
} }
static struct regulator_consumer_supply devkit8000_vmmc1_supply = static struct regulator_consumer_supply devkit8000_vmmc1_supply[] = {
REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"); REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"),
};
/* ads7846 on SPI */ /* ads7846 on SPI */
static struct regulator_consumer_supply devkit8000_vio_supply = static struct regulator_consumer_supply devkit8000_vio_supply[] = {
REGULATOR_SUPPLY("vcc", "spi2.0"); REGULATOR_SUPPLY("vcc", "spi2.0"),
};
static struct panel_generic_dpi_data lcd_panel = { static struct panel_generic_dpi_data lcd_panel = {
.name = "generic", .name = "generic",
...@@ -186,9 +186,6 @@ static struct omap_dss_board_info devkit8000_dss_data = { ...@@ -186,9 +186,6 @@ static struct omap_dss_board_info devkit8000_dss_data = {
.default_device = &devkit8000_lcd_device, .default_device = &devkit8000_lcd_device,
}; };
static struct regulator_consumer_supply devkit8000_vdda_dac_supply =
REGULATOR_SUPPLY("vdda_dac", "omapdss_venc");
static uint32_t board_keymap[] = { static uint32_t board_keymap[] = {
KEY(0, 0, KEY_1), KEY(0, 0, KEY_1),
KEY(1, 0, KEY_2), KEY(1, 0, KEY_2),
...@@ -284,22 +281,8 @@ static struct regulator_init_data devkit8000_vmmc1 = { ...@@ -284,22 +281,8 @@ static struct regulator_init_data devkit8000_vmmc1 = {
| REGULATOR_CHANGE_MODE | REGULATOR_CHANGE_MODE
| REGULATOR_CHANGE_STATUS, | REGULATOR_CHANGE_STATUS,
}, },
.num_consumer_supplies = 1, .num_consumer_supplies = ARRAY_SIZE(devkit8000_vmmc1_supply),
.consumer_supplies = &devkit8000_vmmc1_supply, .consumer_supplies = devkit8000_vmmc1_supply,
};
/* VDAC for DSS driving S-Video (8 mA unloaded, max 65 mA) */
static struct regulator_init_data devkit8000_vdac = {
.constraints = {
.min_uV = 1800000,
.max_uV = 1800000,
.valid_modes_mask = REGULATOR_MODE_NORMAL
| REGULATOR_MODE_STANDBY,
.valid_ops_mask = REGULATOR_CHANGE_MODE
| REGULATOR_CHANGE_STATUS,
},
.num_consumer_supplies = 1,
.consumer_supplies = &devkit8000_vdda_dac_supply,
}; };
/* VPLL1 for digital video outputs */ /* VPLL1 for digital video outputs */
...@@ -327,31 +310,14 @@ static struct regulator_init_data devkit8000_vio = { ...@@ -327,31 +310,14 @@ static struct regulator_init_data devkit8000_vio = {
.valid_ops_mask = REGULATOR_CHANGE_MODE .valid_ops_mask = REGULATOR_CHANGE_MODE
| REGULATOR_CHANGE_STATUS, | REGULATOR_CHANGE_STATUS,
}, },
.num_consumer_supplies = 1, .num_consumer_supplies = ARRAY_SIZE(devkit8000_vio_supply),
.consumer_supplies = &devkit8000_vio_supply, .consumer_supplies = devkit8000_vio_supply,
};
static struct twl4030_usb_data devkit8000_usb_data = {
.usb_mode = T2_USB_MODE_ULPI,
};
static struct twl4030_codec_audio_data devkit8000_audio_data;
static struct twl4030_codec_data devkit8000_codec_data = {
.audio_mclk = 26000000,
.audio = &devkit8000_audio_data,
}; };
static struct twl4030_platform_data devkit8000_twldata = { static struct twl4030_platform_data devkit8000_twldata = {
.irq_base = TWL4030_IRQ_BASE,
.irq_end = TWL4030_IRQ_END,
/* platform_data for children goes here */ /* platform_data for children goes here */
.usb = &devkit8000_usb_data,
.gpio = &devkit8000_gpio_data, .gpio = &devkit8000_gpio_data,
.codec = &devkit8000_codec_data,
.vmmc1 = &devkit8000_vmmc1, .vmmc1 = &devkit8000_vmmc1,
.vdac = &devkit8000_vdac,
.vpll1 = &devkit8000_vpll1, .vpll1 = &devkit8000_vpll1,
.vio = &devkit8000_vio, .vio = &devkit8000_vio,
.keypad = &devkit8000_kp_data, .keypad = &devkit8000_kp_data,
...@@ -359,6 +325,9 @@ static struct twl4030_platform_data devkit8000_twldata = { ...@@ -359,6 +325,9 @@ static struct twl4030_platform_data devkit8000_twldata = {
static int __init devkit8000_i2c_init(void) static int __init devkit8000_i2c_init(void)
{ {
omap3_pmic_get_config(&devkit8000_twldata,
TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_AUDIO,
TWL_COMMON_REGULATOR_VDAC);
omap3_pmic_init("tps65930", &devkit8000_twldata); omap3_pmic_init("tps65930", &devkit8000_twldata);
/* Bus 3 is attached to the DVI port where devices like the pico DLP /* Bus 3 is attached to the DVI port where devices like the pico DLP
* projector don't work reliably with 400kHz */ * projector don't work reliably with 400kHz */
...@@ -438,10 +407,7 @@ static void __init devkit8000_init_early(void) ...@@ -438,10 +407,7 @@ static void __init devkit8000_init_early(void)
static void __init devkit8000_init_irq(void) static void __init devkit8000_init_irq(void)
{ {
omap_init_irq(); omap3_init_irq();
#ifdef CONFIG_OMAP_32K_TIMER
omap2_gp_clockevent_set_gptimer(12);
#endif
} }
#define OMAP_DM9000_BASE 0x2c000000 #define OMAP_DM9000_BASE 0x2c000000
...@@ -707,5 +673,5 @@ MACHINE_START(DEVKIT8000, "OMAP3 Devkit8000") ...@@ -707,5 +673,5 @@ MACHINE_START(DEVKIT8000, "OMAP3 Devkit8000")
.init_early = devkit8000_init_early, .init_early = devkit8000_init_early,
.init_irq = devkit8000_init_irq, .init_irq = devkit8000_init_irq,
.init_machine = devkit8000_init, .init_machine = devkit8000_init,
.timer = &omap_timer, .timer = &omap3_secure_timer,
MACHINE_END MACHINE_END
...@@ -132,11 +132,7 @@ static struct gpmc_timings nand_timings = { ...@@ -132,11 +132,7 @@ static struct gpmc_timings nand_timings = {
}; };
static struct omap_nand_platform_data board_nand_data = { static struct omap_nand_platform_data board_nand_data = {
.nand_setup = NULL,
.gpmc_t = &nand_timings, .gpmc_t = &nand_timings,
.dma_channel = -1, /* disable DMA in OMAP NAND driver */
.dev_ready = NULL,
.devsize = 0, /* '0' for 8-bit, '1' for 16-bit device */
}; };
void void
......
...@@ -70,7 +70,7 @@ MACHINE_START(OMAP_GENERIC, "Generic OMAP24xx") ...@@ -70,7 +70,7 @@ MACHINE_START(OMAP_GENERIC, "Generic OMAP24xx")
.reserve = omap_reserve, .reserve = omap_reserve,
.map_io = omap_generic_map_io, .map_io = omap_generic_map_io,
.init_early = omap_generic_init_early, .init_early = omap_generic_init_early,
.init_irq = omap_init_irq, .init_irq = omap2_init_irq,
.init_machine = omap_generic_init, .init_machine = omap_generic_init,
.timer = &omap_timer, .timer = &omap2_timer,
MACHINE_END MACHINE_END
...@@ -298,7 +298,7 @@ static void __init omap_h4_init_early(void) ...@@ -298,7 +298,7 @@ static void __init omap_h4_init_early(void)
static void __init omap_h4_init_irq(void) static void __init omap_h4_init_irq(void)
{ {
omap_init_irq(); omap2_init_irq();
} }
static struct at24_platform_data m24c01 = { static struct at24_platform_data m24c01 = {
...@@ -388,5 +388,5 @@ MACHINE_START(OMAP_H4, "OMAP2420 H4 board") ...@@ -388,5 +388,5 @@ MACHINE_START(OMAP_H4, "OMAP2420 H4 board")
.init_early = omap_h4_init_early, .init_early = omap_h4_init_early,
.init_irq = omap_h4_init_irq, .init_irq = omap_h4_init_irq,
.init_machine = omap_h4_init, .init_machine = omap_h4_init,
.timer = &omap_timer, .timer = &omap2_timer,
MACHINE_END MACHINE_END
...@@ -222,8 +222,9 @@ static inline void __init igep2_init_smsc911x(void) ...@@ -222,8 +222,9 @@ static inline void __init igep2_init_smsc911x(void)
static inline void __init igep2_init_smsc911x(void) { } static inline void __init igep2_init_smsc911x(void) { }
#endif #endif
static struct regulator_consumer_supply igep_vmmc1_supply = static struct regulator_consumer_supply igep_vmmc1_supply[] = {
REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"); REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"),
};
/* VMMC1 for OMAP VDD_MMC1 (i/o) and MMC1 card */ /* VMMC1 for OMAP VDD_MMC1 (i/o) and MMC1 card */
static struct regulator_init_data igep_vmmc1 = { static struct regulator_init_data igep_vmmc1 = {
...@@ -236,12 +237,13 @@ static struct regulator_init_data igep_vmmc1 = { ...@@ -236,12 +237,13 @@ static struct regulator_init_data igep_vmmc1 = {
| REGULATOR_CHANGE_MODE | REGULATOR_CHANGE_MODE
| REGULATOR_CHANGE_STATUS, | REGULATOR_CHANGE_STATUS,
}, },
.num_consumer_supplies = 1, .num_consumer_supplies = ARRAY_SIZE(igep_vmmc1_supply),
.consumer_supplies = &igep_vmmc1_supply, .consumer_supplies = igep_vmmc1_supply,
}; };
static struct regulator_consumer_supply igep_vio_supply = static struct regulator_consumer_supply igep_vio_supply[] = {
REGULATOR_SUPPLY("vmmc_aux", "omap_hsmmc.1"); REGULATOR_SUPPLY("vmmc_aux", "omap_hsmmc.1"),
};
static struct regulator_init_data igep_vio = { static struct regulator_init_data igep_vio = {
.constraints = { .constraints = {
...@@ -254,20 +256,21 @@ static struct regulator_init_data igep_vio = { ...@@ -254,20 +256,21 @@ static struct regulator_init_data igep_vio = {
| REGULATOR_CHANGE_MODE | REGULATOR_CHANGE_MODE
| REGULATOR_CHANGE_STATUS, | REGULATOR_CHANGE_STATUS,
}, },
.num_consumer_supplies = 1, .num_consumer_supplies = ARRAY_SIZE(igep_vio_supply),
.consumer_supplies = &igep_vio_supply, .consumer_supplies = igep_vio_supply,
}; };
static struct regulator_consumer_supply igep_vmmc2_supply = static struct regulator_consumer_supply igep_vmmc2_supply[] = {
REGULATOR_SUPPLY("vmmc", "omap_hsmmc.1"); REGULATOR_SUPPLY("vmmc", "omap_hsmmc.1"),
};
static struct regulator_init_data igep_vmmc2 = { static struct regulator_init_data igep_vmmc2 = {
.constraints = { .constraints = {
.valid_modes_mask = REGULATOR_MODE_NORMAL, .valid_modes_mask = REGULATOR_MODE_NORMAL,
.always_on = 1, .always_on = 1,
}, },
.num_consumer_supplies = 1, .num_consumer_supplies = ARRAY_SIZE(igep_vmmc2_supply),
.consumer_supplies = &igep_vmmc2_supply, .consumer_supplies = igep_vmmc2_supply,
}; };
static struct fixed_voltage_config igep_vwlan = { static struct fixed_voltage_config igep_vwlan = {
...@@ -440,10 +443,6 @@ static struct twl4030_gpio_platform_data igep_twl4030_gpio_pdata = { ...@@ -440,10 +443,6 @@ static struct twl4030_gpio_platform_data igep_twl4030_gpio_pdata = {
.setup = igep_twl_gpio_setup, .setup = igep_twl_gpio_setup,
}; };
static struct twl4030_usb_data igep_usb_data = {
.usb_mode = T2_USB_MODE_ULPI,
};
static int igep2_enable_dvi(struct omap_dss_device *dssdev) static int igep2_enable_dvi(struct omap_dss_device *dssdev)
{ {
gpio_direction_output(IGEP2_GPIO_DVI_PUP, 1); gpio_direction_output(IGEP2_GPIO_DVI_PUP, 1);
...@@ -480,26 +479,6 @@ static struct omap_dss_board_info igep2_dss_data = { ...@@ -480,26 +479,6 @@ static struct omap_dss_board_info igep2_dss_data = {
.default_device = &igep2_dvi_device, .default_device = &igep2_dvi_device,
}; };
static struct regulator_consumer_supply igep2_vpll2_supplies[] = {
REGULATOR_SUPPLY("vdds_dsi", "omapdss"),
REGULATOR_SUPPLY("vdds_dsi", "omapdss_dsi1"),
};
static struct regulator_init_data igep2_vpll2 = {
.constraints = {
.name = "VDVI",
.min_uV = 1800000,
.max_uV = 1800000,
.apply_uV = true,
.valid_modes_mask = REGULATOR_MODE_NORMAL
| REGULATOR_MODE_STANDBY,
.valid_ops_mask = REGULATOR_CHANGE_MODE
| REGULATOR_CHANGE_STATUS,
},
.num_consumer_supplies = ARRAY_SIZE(igep2_vpll2_supplies),
.consumer_supplies = igep2_vpll2_supplies,
};
static void __init igep2_display_init(void) static void __init igep2_display_init(void)
{ {
int err = gpio_request_one(IGEP2_GPIO_DVI_PUP, GPIOF_OUT_INIT_HIGH, int err = gpio_request_one(IGEP2_GPIO_DVI_PUP, GPIOF_OUT_INIT_HIGH,
...@@ -519,13 +498,6 @@ static void __init igep_init_early(void) ...@@ -519,13 +498,6 @@ static void __init igep_init_early(void)
m65kxxxxam_sdrc_params); m65kxxxxam_sdrc_params);
} }
static struct twl4030_codec_audio_data igep2_audio_data;
static struct twl4030_codec_data igep2_codec_data = {
.audio_mclk = 26000000,
.audio = &igep2_audio_data,
};
static int igep2_keymap[] = { static int igep2_keymap[] = {
KEY(0, 0, KEY_LEFT), KEY(0, 0, KEY_LEFT),
KEY(0, 1, KEY_RIGHT), KEY(0, 1, KEY_RIGHT),
...@@ -558,11 +530,7 @@ static struct twl4030_keypad_data igep2_keypad_pdata = { ...@@ -558,11 +530,7 @@ static struct twl4030_keypad_data igep2_keypad_pdata = {
}; };
static struct twl4030_platform_data igep_twldata = { static struct twl4030_platform_data igep_twldata = {
.irq_base = TWL4030_IRQ_BASE,
.irq_end = TWL4030_IRQ_END,
/* platform_data for children goes here */ /* platform_data for children goes here */
.usb = &igep_usb_data,
.gpio = &igep_twl4030_gpio_pdata, .gpio = &igep_twl4030_gpio_pdata,
.vmmc1 = &igep_vmmc1, .vmmc1 = &igep_vmmc1,
.vio = &igep_vio, .vio = &igep_vio,
...@@ -578,6 +546,8 @@ static void __init igep_i2c_init(void) ...@@ -578,6 +546,8 @@ static void __init igep_i2c_init(void)
{ {
int ret; int ret;
omap3_pmic_get_config(&igep_twldata, TWL_COMMON_PDATA_USB, 0);
if (machine_is_igep0020()) { if (machine_is_igep0020()) {
/* /*
* Bus 3 is attached to the DVI port where devices like the * Bus 3 is attached to the DVI port where devices like the
...@@ -588,9 +558,12 @@ static void __init igep_i2c_init(void) ...@@ -588,9 +558,12 @@ static void __init igep_i2c_init(void)
if (ret) if (ret)
pr_warning("IGEP2: Could not register I2C3 bus (%d)\n", ret); pr_warning("IGEP2: Could not register I2C3 bus (%d)\n", ret);
igep_twldata.codec = &igep2_codec_data;
igep_twldata.keypad = &igep2_keypad_pdata; igep_twldata.keypad = &igep2_keypad_pdata;
igep_twldata.vpll2 = &igep2_vpll2; /* Get common pmic data */
omap3_pmic_get_config(&igep_twldata, TWL_COMMON_PDATA_AUDIO,
TWL_COMMON_REGULATOR_VPLL2);
igep_twldata.vpll2->constraints.apply_uV = true;
igep_twldata.vpll2->constraints.name = "VDVI";
} }
omap3_pmic_init("twl4030", &igep_twldata); omap3_pmic_init("twl4030", &igep_twldata);
...@@ -703,9 +676,9 @@ MACHINE_START(IGEP0020, "IGEP v2 board") ...@@ -703,9 +676,9 @@ MACHINE_START(IGEP0020, "IGEP v2 board")
.reserve = omap_reserve, .reserve = omap_reserve,
.map_io = omap3_map_io, .map_io = omap3_map_io,
.init_early = igep_init_early, .init_early = igep_init_early,
.init_irq = omap_init_irq, .init_irq = omap3_init_irq,
.init_machine = igep_init, .init_machine = igep_init,
.timer = &omap_timer, .timer = &omap3_timer,
MACHINE_END MACHINE_END
MACHINE_START(IGEP0030, "IGEP OMAP3 module") MACHINE_START(IGEP0030, "IGEP OMAP3 module")
...@@ -713,7 +686,7 @@ MACHINE_START(IGEP0030, "IGEP OMAP3 module") ...@@ -713,7 +686,7 @@ MACHINE_START(IGEP0030, "IGEP OMAP3 module")
.reserve = omap_reserve, .reserve = omap_reserve,
.map_io = omap3_map_io, .map_io = omap3_map_io,
.init_early = igep_init_early, .init_early = igep_init_early,
.init_irq = omap_init_irq, .init_irq = omap3_init_irq,
.init_machine = igep_init, .init_machine = igep_init,
.timer = &omap_timer, .timer = &omap3_timer,
MACHINE_END MACHINE_END
...@@ -199,22 +199,14 @@ static void __init omap_ldp_init_early(void) ...@@ -199,22 +199,14 @@ static void __init omap_ldp_init_early(void)
omap2_init_common_devices(NULL, NULL); omap2_init_common_devices(NULL, NULL);
} }
static struct twl4030_usb_data ldp_usb_data = {
.usb_mode = T2_USB_MODE_ULPI,
};
static struct twl4030_gpio_platform_data ldp_gpio_data = { static struct twl4030_gpio_platform_data ldp_gpio_data = {
.gpio_base = OMAP_MAX_GPIO_LINES, .gpio_base = OMAP_MAX_GPIO_LINES,
.irq_base = TWL4030_GPIO_IRQ_BASE, .irq_base = TWL4030_GPIO_IRQ_BASE,
.irq_end = TWL4030_GPIO_IRQ_END, .irq_end = TWL4030_GPIO_IRQ_END,
}; };
static struct twl4030_madc_platform_data ldp_madc_data = { static struct regulator_consumer_supply ldp_vmmc1_supply[] = {
.irq_line = 1, REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"),
};
static struct regulator_consumer_supply ldp_vmmc1_supply = {
.supply = "vmmc",
}; };
/* VMMC1 for MMC1 pins CMD, CLK, DAT0..DAT3 (20 mA, plus card == max 220 mA) */ /* VMMC1 for MMC1 pins CMD, CLK, DAT0..DAT3 (20 mA, plus card == max 220 mA) */
...@@ -228,8 +220,8 @@ static struct regulator_init_data ldp_vmmc1 = { ...@@ -228,8 +220,8 @@ static struct regulator_init_data ldp_vmmc1 = {
| REGULATOR_CHANGE_MODE | REGULATOR_CHANGE_MODE
| REGULATOR_CHANGE_STATUS, | REGULATOR_CHANGE_STATUS,
}, },
.num_consumer_supplies = 1, .num_consumer_supplies = ARRAY_SIZE(ldp_vmmc1_supply),
.consumer_supplies = &ldp_vmmc1_supply, .consumer_supplies = ldp_vmmc1_supply,
}; };
/* ads7846 on SPI */ /* ads7846 on SPI */
...@@ -253,12 +245,7 @@ static struct regulator_init_data ldp_vaux1 = { ...@@ -253,12 +245,7 @@ static struct regulator_init_data ldp_vaux1 = {
}; };
static struct twl4030_platform_data ldp_twldata = { static struct twl4030_platform_data ldp_twldata = {
.irq_base = TWL4030_IRQ_BASE,
.irq_end = TWL4030_IRQ_END,
/* platform_data for children goes here */ /* platform_data for children goes here */
.madc = &ldp_madc_data,
.usb = &ldp_usb_data,
.vmmc1 = &ldp_vmmc1, .vmmc1 = &ldp_vmmc1,
.vaux1 = &ldp_vaux1, .vaux1 = &ldp_vaux1,
.gpio = &ldp_gpio_data, .gpio = &ldp_gpio_data,
...@@ -267,6 +254,8 @@ static struct twl4030_platform_data ldp_twldata = { ...@@ -267,6 +254,8 @@ static struct twl4030_platform_data ldp_twldata = {
static int __init omap_i2c_init(void) static int __init omap_i2c_init(void)
{ {
omap3_pmic_get_config(&ldp_twldata,
TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_MADC, 0);
omap3_pmic_init("twl4030", &ldp_twldata); omap3_pmic_init("twl4030", &ldp_twldata);
omap_register_i2c_bus(2, 400, NULL, 0); omap_register_i2c_bus(2, 400, NULL, 0);
omap_register_i2c_bus(3, 400, NULL, 0); omap_register_i2c_bus(3, 400, NULL, 0);
...@@ -341,8 +330,6 @@ static void __init omap_ldp_init(void) ...@@ -341,8 +330,6 @@ static void __init omap_ldp_init(void)
ARRAY_SIZE(ldp_nand_partitions), ZOOM_NAND_CS, 0); ARRAY_SIZE(ldp_nand_partitions), ZOOM_NAND_CS, 0);
omap2_hsmmc_init(mmc); omap2_hsmmc_init(mmc);
/* link regulators to MMC adapters */
ldp_vmmc1_supply.dev = mmc[0].dev;
} }
MACHINE_START(OMAP_LDP, "OMAP LDP board") MACHINE_START(OMAP_LDP, "OMAP LDP board")
...@@ -350,7 +337,7 @@ MACHINE_START(OMAP_LDP, "OMAP LDP board") ...@@ -350,7 +337,7 @@ MACHINE_START(OMAP_LDP, "OMAP LDP board")
.reserve = omap_reserve, .reserve = omap_reserve,
.map_io = omap3_map_io, .map_io = omap3_map_io,
.init_early = omap_ldp_init_early, .init_early = omap_ldp_init_early,
.init_irq = omap_init_irq, .init_irq = omap3_init_irq,
.init_machine = omap_ldp_init, .init_machine = omap_ldp_init,
.timer = &omap_timer, .timer = &omap3_timer,
MACHINE_END MACHINE_END
...@@ -699,9 +699,9 @@ MACHINE_START(NOKIA_N800, "Nokia N800") ...@@ -699,9 +699,9 @@ MACHINE_START(NOKIA_N800, "Nokia N800")
.reserve = omap_reserve, .reserve = omap_reserve,
.map_io = n8x0_map_io, .map_io = n8x0_map_io,
.init_early = n8x0_init_early, .init_early = n8x0_init_early,
.init_irq = omap_init_irq, .init_irq = omap2_init_irq,
.init_machine = n8x0_init_machine, .init_machine = n8x0_init_machine,
.timer = &omap_timer, .timer = &omap2_timer,
MACHINE_END MACHINE_END
MACHINE_START(NOKIA_N810, "Nokia N810") MACHINE_START(NOKIA_N810, "Nokia N810")
...@@ -709,9 +709,9 @@ MACHINE_START(NOKIA_N810, "Nokia N810") ...@@ -709,9 +709,9 @@ MACHINE_START(NOKIA_N810, "Nokia N810")
.reserve = omap_reserve, .reserve = omap_reserve,
.map_io = n8x0_map_io, .map_io = n8x0_map_io,
.init_early = n8x0_init_early, .init_early = n8x0_init_early,
.init_irq = omap_init_irq, .init_irq = omap2_init_irq,
.init_machine = n8x0_init_machine, .init_machine = n8x0_init_machine,
.timer = &omap_timer, .timer = &omap2_timer,
MACHINE_END MACHINE_END
MACHINE_START(NOKIA_N810_WIMAX, "Nokia N810 WiMAX") MACHINE_START(NOKIA_N810_WIMAX, "Nokia N810 WiMAX")
...@@ -719,7 +719,7 @@ MACHINE_START(NOKIA_N810_WIMAX, "Nokia N810 WiMAX") ...@@ -719,7 +719,7 @@ MACHINE_START(NOKIA_N810_WIMAX, "Nokia N810 WiMAX")
.reserve = omap_reserve, .reserve = omap_reserve,
.map_io = n8x0_map_io, .map_io = n8x0_map_io,
.init_early = n8x0_init_early, .init_early = n8x0_init_early,
.init_irq = omap_init_irq, .init_irq = omap2_init_irq,
.init_machine = n8x0_init_machine, .init_machine = n8x0_init_machine,
.timer = &omap_timer, .timer = &omap2_timer,
MACHINE_END MACHINE_END
...@@ -50,7 +50,6 @@ ...@@ -50,7 +50,6 @@
#include "mux.h" #include "mux.h"
#include "hsmmc.h" #include "hsmmc.h"
#include "timer-gp.h"
#include "pm.h" #include "pm.h"
#include "common-board-devices.h" #include "common-board-devices.h"
...@@ -210,14 +209,6 @@ static struct omap_dss_board_info beagle_dss_data = { ...@@ -210,14 +209,6 @@ static struct omap_dss_board_info beagle_dss_data = {
.default_device = &beagle_dvi_device, .default_device = &beagle_dvi_device,
}; };
static struct regulator_consumer_supply beagle_vdac_supply =
REGULATOR_SUPPLY("vdda_dac", "omapdss_venc");
static struct regulator_consumer_supply beagle_vdvi_supplies[] = {
REGULATOR_SUPPLY("vdds_dsi", "omapdss"),
REGULATOR_SUPPLY("vdds_dsi", "omapdss_dsi1"),
};
static void __init beagle_display_init(void) static void __init beagle_display_init(void)
{ {
int r; int r;
...@@ -239,12 +230,12 @@ static struct omap2_hsmmc_info mmc[] = { ...@@ -239,12 +230,12 @@ static struct omap2_hsmmc_info mmc[] = {
{} /* Terminator */ {} /* Terminator */
}; };
static struct regulator_consumer_supply beagle_vmmc1_supply = { static struct regulator_consumer_supply beagle_vmmc1_supply[] = {
.supply = "vmmc", REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"),
}; };
static struct regulator_consumer_supply beagle_vsim_supply = { static struct regulator_consumer_supply beagle_vsim_supply[] = {
.supply = "vmmc_aux", REGULATOR_SUPPLY("vmmc_aux", "omap_hsmmc.0"),
}; };
static struct gpio_led gpio_leds[]; static struct gpio_led gpio_leds[];
...@@ -267,10 +258,6 @@ static int beagle_twl_gpio_setup(struct device *dev, ...@@ -267,10 +258,6 @@ static int beagle_twl_gpio_setup(struct device *dev,
mmc[0].gpio_cd = gpio + 0; mmc[0].gpio_cd = gpio + 0;
omap2_hsmmc_init(mmc); omap2_hsmmc_init(mmc);
/* link regulators to MMC adapters */
beagle_vmmc1_supply.dev = mmc[0].dev;
beagle_vsim_supply.dev = mmc[0].dev;
/* /*
* TWL4030_GPIO_MAX + 0 == ledA, EHCI nEN_USB_PWR (out, XM active * TWL4030_GPIO_MAX + 0 == ledA, EHCI nEN_USB_PWR (out, XM active
* high / others active low) * high / others active low)
...@@ -336,8 +323,8 @@ static struct regulator_init_data beagle_vmmc1 = { ...@@ -336,8 +323,8 @@ static struct regulator_init_data beagle_vmmc1 = {
| REGULATOR_CHANGE_MODE | REGULATOR_CHANGE_MODE
| REGULATOR_CHANGE_STATUS, | REGULATOR_CHANGE_STATUS,
}, },
.num_consumer_supplies = 1, .num_consumer_supplies = ARRAY_SIZE(beagle_vmmc1_supply),
.consumer_supplies = &beagle_vmmc1_supply, .consumer_supplies = beagle_vmmc1_supply,
}; };
/* VSIM for MMC1 pins DAT4..DAT7 (2 mA, plus card == max 50 mA) */ /* VSIM for MMC1 pins DAT4..DAT7 (2 mA, plus card == max 50 mA) */
...@@ -351,62 +338,15 @@ static struct regulator_init_data beagle_vsim = { ...@@ -351,62 +338,15 @@ static struct regulator_init_data beagle_vsim = {
| REGULATOR_CHANGE_MODE | REGULATOR_CHANGE_MODE
| REGULATOR_CHANGE_STATUS, | REGULATOR_CHANGE_STATUS,
}, },
.num_consumer_supplies = 1, .num_consumer_supplies = ARRAY_SIZE(beagle_vsim_supply),
.consumer_supplies = &beagle_vsim_supply, .consumer_supplies = beagle_vsim_supply,
};
/* VDAC for DSS driving S-Video (8 mA unloaded, max 65 mA) */
static struct regulator_init_data beagle_vdac = {
.constraints = {
.min_uV = 1800000,
.max_uV = 1800000,
.valid_modes_mask = REGULATOR_MODE_NORMAL
| REGULATOR_MODE_STANDBY,
.valid_ops_mask = REGULATOR_CHANGE_MODE
| REGULATOR_CHANGE_STATUS,
},
.num_consumer_supplies = 1,
.consumer_supplies = &beagle_vdac_supply,
};
/* VPLL2 for digital video outputs */
static struct regulator_init_data beagle_vpll2 = {
.constraints = {
.name = "VDVI",
.min_uV = 1800000,
.max_uV = 1800000,
.valid_modes_mask = REGULATOR_MODE_NORMAL
| REGULATOR_MODE_STANDBY,
.valid_ops_mask = REGULATOR_CHANGE_MODE
| REGULATOR_CHANGE_STATUS,
},
.num_consumer_supplies = ARRAY_SIZE(beagle_vdvi_supplies),
.consumer_supplies = beagle_vdvi_supplies,
};
static struct twl4030_usb_data beagle_usb_data = {
.usb_mode = T2_USB_MODE_ULPI,
};
static struct twl4030_codec_audio_data beagle_audio_data;
static struct twl4030_codec_data beagle_codec_data = {
.audio_mclk = 26000000,
.audio = &beagle_audio_data,
}; };
static struct twl4030_platform_data beagle_twldata = { static struct twl4030_platform_data beagle_twldata = {
.irq_base = TWL4030_IRQ_BASE,
.irq_end = TWL4030_IRQ_END,
/* platform_data for children goes here */ /* platform_data for children goes here */
.usb = &beagle_usb_data,
.gpio = &beagle_gpio_data, .gpio = &beagle_gpio_data,
.codec = &beagle_codec_data,
.vmmc1 = &beagle_vmmc1, .vmmc1 = &beagle_vmmc1,
.vsim = &beagle_vsim, .vsim = &beagle_vsim,
.vdac = &beagle_vdac,
.vpll2 = &beagle_vpll2,
}; };
static struct i2c_board_info __initdata beagle_i2c_eeprom[] = { static struct i2c_board_info __initdata beagle_i2c_eeprom[] = {
...@@ -417,6 +357,12 @@ static struct i2c_board_info __initdata beagle_i2c_eeprom[] = { ...@@ -417,6 +357,12 @@ static struct i2c_board_info __initdata beagle_i2c_eeprom[] = {
static int __init omap3_beagle_i2c_init(void) static int __init omap3_beagle_i2c_init(void)
{ {
omap3_pmic_get_config(&beagle_twldata,
TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_AUDIO,
TWL_COMMON_REGULATOR_VDAC | TWL_COMMON_REGULATOR_VPLL2);
beagle_twldata.vpll2->constraints.name = "VDVI";
omap3_pmic_init("twl4030", &beagle_twldata); omap3_pmic_init("twl4030", &beagle_twldata);
/* Bus 3 is attached to the DVI port where devices like the pico DLP /* Bus 3 is attached to the DVI port where devices like the pico DLP
* projector don't work reliably with 400kHz */ * projector don't work reliably with 400kHz */
...@@ -486,10 +432,7 @@ static void __init omap3_beagle_init_early(void) ...@@ -486,10 +432,7 @@ static void __init omap3_beagle_init_early(void)
static void __init omap3_beagle_init_irq(void) static void __init omap3_beagle_init_irq(void)
{ {
omap_init_irq(); omap3_init_irq();
#ifdef CONFIG_OMAP_32K_TIMER
omap2_gp_clockevent_set_gptimer(12);
#endif
} }
static struct platform_device *omap3_beagle_devices[] __initdata = { static struct platform_device *omap3_beagle_devices[] __initdata = {
...@@ -599,5 +542,5 @@ MACHINE_START(OMAP3_BEAGLE, "OMAP3 Beagle Board") ...@@ -599,5 +542,5 @@ MACHINE_START(OMAP3_BEAGLE, "OMAP3 Beagle Board")
.init_early = omap3_beagle_init_early, .init_early = omap3_beagle_init_early,
.init_irq = omap3_beagle_init_irq, .init_irq = omap3_beagle_init_irq,
.init_machine = omap3_beagle_init, .init_machine = omap3_beagle_init,
.timer = &omap_timer, .timer = &omap3_secure_timer,
MACHINE_END MACHINE_END
...@@ -273,12 +273,12 @@ static struct omap_dss_board_info omap3_evm_dss_data = { ...@@ -273,12 +273,12 @@ static struct omap_dss_board_info omap3_evm_dss_data = {
.default_device = &omap3_evm_lcd_device, .default_device = &omap3_evm_lcd_device,
}; };
static struct regulator_consumer_supply omap3evm_vmmc1_supply = { static struct regulator_consumer_supply omap3evm_vmmc1_supply[] = {
.supply = "vmmc", REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"),
}; };
static struct regulator_consumer_supply omap3evm_vsim_supply = { static struct regulator_consumer_supply omap3evm_vsim_supply[] = {
.supply = "vmmc_aux", REGULATOR_SUPPLY("vmmc_aux", "omap_hsmmc.0"),
}; };
/* VMMC1 for MMC1 pins CMD, CLK, DAT0..DAT3 (20 mA, plus card == max 220 mA) */ /* VMMC1 for MMC1 pins CMD, CLK, DAT0..DAT3 (20 mA, plus card == max 220 mA) */
...@@ -292,8 +292,8 @@ static struct regulator_init_data omap3evm_vmmc1 = { ...@@ -292,8 +292,8 @@ static struct regulator_init_data omap3evm_vmmc1 = {
| REGULATOR_CHANGE_MODE | REGULATOR_CHANGE_MODE
| REGULATOR_CHANGE_STATUS, | REGULATOR_CHANGE_STATUS,
}, },
.num_consumer_supplies = 1, .num_consumer_supplies = ARRAY_SIZE(omap3evm_vmmc1_supply),
.consumer_supplies = &omap3evm_vmmc1_supply, .consumer_supplies = omap3evm_vmmc1_supply,
}; };
/* VSIM for MMC1 pins DAT4..DAT7 (2 mA, plus card == max 50 mA) */ /* VSIM for MMC1 pins DAT4..DAT7 (2 mA, plus card == max 50 mA) */
...@@ -307,8 +307,8 @@ static struct regulator_init_data omap3evm_vsim = { ...@@ -307,8 +307,8 @@ static struct regulator_init_data omap3evm_vsim = {
| REGULATOR_CHANGE_MODE | REGULATOR_CHANGE_MODE
| REGULATOR_CHANGE_STATUS, | REGULATOR_CHANGE_STATUS,
}, },
.num_consumer_supplies = 1, .num_consumer_supplies = ARRAY_SIZE(omap3evm_vsim_supply),
.consumer_supplies = &omap3evm_vsim_supply, .consumer_supplies = omap3evm_vsim_supply,
}; };
static struct omap2_hsmmc_info mmc[] = { static struct omap2_hsmmc_info mmc[] = {
...@@ -365,10 +365,6 @@ static int omap3evm_twl_gpio_setup(struct device *dev, ...@@ -365,10 +365,6 @@ static int omap3evm_twl_gpio_setup(struct device *dev,
mmc[0].gpio_cd = gpio + 0; mmc[0].gpio_cd = gpio + 0;
omap2_hsmmc_init(mmc); omap2_hsmmc_init(mmc);
/* link regulators to MMC adapters */
omap3evm_vmmc1_supply.dev = mmc[0].dev;
omap3evm_vsim_supply.dev = mmc[0].dev;
/* /*
* Most GPIOs are for USB OTG. Some are mostly sent to * Most GPIOs are for USB OTG. Some are mostly sent to
* the P2 connector; notably LEDA for the LCD backlight. * the P2 connector; notably LEDA for the LCD backlight.
...@@ -400,10 +396,6 @@ static struct twl4030_gpio_platform_data omap3evm_gpio_data = { ...@@ -400,10 +396,6 @@ static struct twl4030_gpio_platform_data omap3evm_gpio_data = {
.setup = omap3evm_twl_gpio_setup, .setup = omap3evm_twl_gpio_setup,
}; };
static struct twl4030_usb_data omap3evm_usb_data = {
.usb_mode = T2_USB_MODE_ULPI,
};
static uint32_t board_keymap[] = { static uint32_t board_keymap[] = {
KEY(0, 0, KEY_LEFT), KEY(0, 0, KEY_LEFT),
KEY(0, 1, KEY_DOWN), KEY(0, 1, KEY_DOWN),
...@@ -438,58 +430,10 @@ static struct twl4030_keypad_data omap3evm_kp_data = { ...@@ -438,58 +430,10 @@ static struct twl4030_keypad_data omap3evm_kp_data = {
.rep = 1, .rep = 1,
}; };
static struct twl4030_madc_platform_data omap3evm_madc_data = {
.irq_line = 1,
};
static struct twl4030_codec_audio_data omap3evm_audio_data;
static struct twl4030_codec_data omap3evm_codec_data = {
.audio_mclk = 26000000,
.audio = &omap3evm_audio_data,
};
static struct regulator_consumer_supply omap3_evm_vdda_dac_supply =
REGULATOR_SUPPLY("vdda_dac", "omapdss_venc");
/* VDAC for DSS driving S-Video */
static struct regulator_init_data omap3_evm_vdac = {
.constraints = {
.min_uV = 1800000,
.max_uV = 1800000,
.apply_uV = true,
.valid_modes_mask = REGULATOR_MODE_NORMAL
| REGULATOR_MODE_STANDBY,
.valid_ops_mask = REGULATOR_CHANGE_MODE
| REGULATOR_CHANGE_STATUS,
},
.num_consumer_supplies = 1,
.consumer_supplies = &omap3_evm_vdda_dac_supply,
};
/* VPLL2 for digital video outputs */
static struct regulator_consumer_supply omap3_evm_vpll2_supplies[] = {
REGULATOR_SUPPLY("vdds_dsi", "omapdss"),
REGULATOR_SUPPLY("vdds_dsi", "omapdss_dsi1"),
};
static struct regulator_init_data omap3_evm_vpll2 = {
.constraints = {
.min_uV = 1800000,
.max_uV = 1800000,
.apply_uV = true,
.valid_modes_mask = REGULATOR_MODE_NORMAL
| REGULATOR_MODE_STANDBY,
.valid_ops_mask = REGULATOR_CHANGE_MODE
| REGULATOR_CHANGE_STATUS,
},
.num_consumer_supplies = ARRAY_SIZE(omap3_evm_vpll2_supplies),
.consumer_supplies = omap3_evm_vpll2_supplies,
};
/* ads7846 on SPI */ /* ads7846 on SPI */
static struct regulator_consumer_supply omap3evm_vio_supply = static struct regulator_consumer_supply omap3evm_vio_supply[] = {
REGULATOR_SUPPLY("vcc", "spi1.0"); REGULATOR_SUPPLY("vcc", "spi1.0"),
};
/* VIO for ads7846 */ /* VIO for ads7846 */
static struct regulator_init_data omap3evm_vio = { static struct regulator_init_data omap3evm_vio = {
...@@ -502,8 +446,8 @@ static struct regulator_init_data omap3evm_vio = { ...@@ -502,8 +446,8 @@ static struct regulator_init_data omap3evm_vio = {
.valid_ops_mask = REGULATOR_CHANGE_MODE .valid_ops_mask = REGULATOR_CHANGE_MODE
| REGULATOR_CHANGE_STATUS, | REGULATOR_CHANGE_STATUS,
}, },
.num_consumer_supplies = 1, .num_consumer_supplies = ARRAY_SIZE(omap3evm_vio_supply),
.consumer_supplies = &omap3evm_vio_supply, .consumer_supplies = omap3evm_vio_supply,
}; };
#ifdef CONFIG_WL12XX_PLATFORM_DATA #ifdef CONFIG_WL12XX_PLATFORM_DATA
...@@ -511,16 +455,17 @@ static struct regulator_init_data omap3evm_vio = { ...@@ -511,16 +455,17 @@ static struct regulator_init_data omap3evm_vio = {
#define OMAP3EVM_WLAN_PMENA_GPIO (150) #define OMAP3EVM_WLAN_PMENA_GPIO (150)
#define OMAP3EVM_WLAN_IRQ_GPIO (149) #define OMAP3EVM_WLAN_IRQ_GPIO (149)
static struct regulator_consumer_supply omap3evm_vmmc2_supply = static struct regulator_consumer_supply omap3evm_vmmc2_supply[] = {
REGULATOR_SUPPLY("vmmc", "omap_hsmmc.1"); REGULATOR_SUPPLY("vmmc", "omap_hsmmc.1"),
};
/* VMMC2 for driving the WL12xx module */ /* VMMC2 for driving the WL12xx module */
static struct regulator_init_data omap3evm_vmmc2 = { static struct regulator_init_data omap3evm_vmmc2 = {
.constraints = { .constraints = {
.valid_ops_mask = REGULATOR_CHANGE_STATUS, .valid_ops_mask = REGULATOR_CHANGE_STATUS,
}, },
.num_consumer_supplies = 1, .num_consumer_supplies = ARRAY_SIZE(omap3evm_vmmc2_supply),
.consumer_supplies = &omap3evm_vmmc2_supply, .consumer_supplies = omap3evm_vmmc2_supply,
}; };
static struct fixed_voltage_config omap3evm_vwlan = { static struct fixed_voltage_config omap3evm_vwlan = {
...@@ -548,17 +493,9 @@ struct wl12xx_platform_data omap3evm_wlan_data __initdata = { ...@@ -548,17 +493,9 @@ struct wl12xx_platform_data omap3evm_wlan_data __initdata = {
#endif #endif
static struct twl4030_platform_data omap3evm_twldata = { static struct twl4030_platform_data omap3evm_twldata = {
.irq_base = TWL4030_IRQ_BASE,
.irq_end = TWL4030_IRQ_END,
/* platform_data for children goes here */ /* platform_data for children goes here */
.keypad = &omap3evm_kp_data, .keypad = &omap3evm_kp_data,
.madc = &omap3evm_madc_data,
.usb = &omap3evm_usb_data,
.gpio = &omap3evm_gpio_data, .gpio = &omap3evm_gpio_data,
.codec = &omap3evm_codec_data,
.vdac = &omap3_evm_vdac,
.vpll2 = &omap3_evm_vpll2,
.vio = &omap3evm_vio, .vio = &omap3evm_vio,
.vmmc1 = &omap3evm_vmmc1, .vmmc1 = &omap3evm_vmmc1,
.vsim = &omap3evm_vsim, .vsim = &omap3evm_vsim,
...@@ -566,6 +503,14 @@ static struct twl4030_platform_data omap3evm_twldata = { ...@@ -566,6 +503,14 @@ static struct twl4030_platform_data omap3evm_twldata = {
static int __init omap3_evm_i2c_init(void) static int __init omap3_evm_i2c_init(void)
{ {
omap3_pmic_get_config(&omap3evm_twldata,
TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_MADC |
TWL_COMMON_PDATA_AUDIO,
TWL_COMMON_REGULATOR_VDAC | TWL_COMMON_REGULATOR_VPLL2);
omap3evm_twldata.vdac->constraints.apply_uV = true;
omap3evm_twldata.vpll2->constraints.apply_uV = true;
omap3_pmic_init("twl4030", &omap3evm_twldata); omap3_pmic_init("twl4030", &omap3evm_twldata);
omap_register_i2c_bus(2, 400, NULL, 0); omap_register_i2c_bus(2, 400, NULL, 0);
omap_register_i2c_bus(3, 400, NULL, 0); omap_register_i2c_bus(3, 400, NULL, 0);
...@@ -740,7 +685,7 @@ MACHINE_START(OMAP3EVM, "OMAP3 EVM") ...@@ -740,7 +685,7 @@ MACHINE_START(OMAP3EVM, "OMAP3 EVM")
.reserve = omap_reserve, .reserve = omap_reserve,
.map_io = omap3_map_io, .map_io = omap3_map_io,
.init_early = omap3_evm_init_early, .init_early = omap3_evm_init_early,
.init_irq = omap_init_irq, .init_irq = omap3_init_irq,
.init_machine = omap3_evm_init, .init_machine = omap3_evm_init,
.timer = &omap_timer, .timer = &omap3_timer,
MACHINE_END MACHINE_END
...@@ -35,7 +35,6 @@ ...@@ -35,7 +35,6 @@
#include "mux.h" #include "mux.h"
#include "hsmmc.h" #include "hsmmc.h"
#include "timer-gp.h"
#include "control.h" #include "control.h"
#include "common-board-devices.h" #include "common-board-devices.h"
...@@ -55,8 +54,8 @@ ...@@ -55,8 +54,8 @@
#define OMAP3_TORPEDO_MMC_GPIO_CD 127 #define OMAP3_TORPEDO_MMC_GPIO_CD 127
#define OMAP3_TORPEDO_SMSC911X_GPIO_IRQ 129 #define OMAP3_TORPEDO_SMSC911X_GPIO_IRQ 129
static struct regulator_consumer_supply omap3logic_vmmc1_supply = { static struct regulator_consumer_supply omap3logic_vmmc1_supply[] = {
.supply = "vmmc", REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"),
}; };
/* VMMC1 for MMC1 pins CMD, CLK, DAT0..DAT3 (20 mA, plus card == max 220 mA) */ /* VMMC1 for MMC1 pins CMD, CLK, DAT0..DAT3 (20 mA, plus card == max 220 mA) */
...@@ -71,8 +70,8 @@ static struct regulator_init_data omap3logic_vmmc1 = { ...@@ -71,8 +70,8 @@ static struct regulator_init_data omap3logic_vmmc1 = {
| REGULATOR_CHANGE_MODE | REGULATOR_CHANGE_MODE
| REGULATOR_CHANGE_STATUS, | REGULATOR_CHANGE_STATUS,
}, },
.num_consumer_supplies = 1, .num_consumer_supplies = ARRAY_SIZE(omap3logic_vmmc1_supply),
.consumer_supplies = &omap3logic_vmmc1_supply, .consumer_supplies = omap3logic_vmmc1_supply,
}; };
static struct twl4030_gpio_platform_data omap3logic_gpio_data = { static struct twl4030_gpio_platform_data omap3logic_gpio_data = {
...@@ -130,8 +129,6 @@ static void __init board_mmc_init(void) ...@@ -130,8 +129,6 @@ static void __init board_mmc_init(void)
} }
omap2_hsmmc_init(board_mmc_info); omap2_hsmmc_init(board_mmc_info);
/* link regulators to MMC adapters */
omap3logic_vmmc1_supply.dev = board_mmc_info[0].dev;
} }
static struct omap_smsc911x_platform_data __initdata board_smsc911x_data = { static struct omap_smsc911x_platform_data __initdata board_smsc911x_data = {
...@@ -215,16 +212,16 @@ MACHINE_START(OMAP3_TORPEDO, "Logic OMAP3 Torpedo board") ...@@ -215,16 +212,16 @@ MACHINE_START(OMAP3_TORPEDO, "Logic OMAP3 Torpedo board")
.boot_params = 0x80000100, .boot_params = 0x80000100,
.map_io = omap3_map_io, .map_io = omap3_map_io,
.init_early = omap3logic_init_early, .init_early = omap3logic_init_early,
.init_irq = omap_init_irq, .init_irq = omap3_init_irq,
.init_machine = omap3logic_init, .init_machine = omap3logic_init,
.timer = &omap_timer, .timer = &omap3_timer,
MACHINE_END MACHINE_END
MACHINE_START(OMAP3530_LV_SOM, "OMAP Logic 3530 LV SOM board") MACHINE_START(OMAP3530_LV_SOM, "OMAP Logic 3530 LV SOM board")
.boot_params = 0x80000100, .boot_params = 0x80000100,
.map_io = omap3_map_io, .map_io = omap3_map_io,
.init_early = omap3logic_init_early, .init_early = omap3logic_init_early,
.init_irq = omap_init_irq, .init_irq = omap3_init_irq,
.init_machine = omap3logic_init, .init_machine = omap3logic_init,
.timer = &omap_timer, .timer = &omap3_timer,
MACHINE_END MACHINE_END
...@@ -84,7 +84,8 @@ static struct mtd_partition omap3pandora_nand_partitions[] = { ...@@ -84,7 +84,8 @@ static struct mtd_partition omap3pandora_nand_partitions[] = {
static struct omap_nand_platform_data pandora_nand_data = { static struct omap_nand_platform_data pandora_nand_data = {
.cs = 0, .cs = 0,
.devsize = 1, /* '0' for 8-bit, '1' for 16-bit device */ .devsize = NAND_BUSWIDTH_16,
.xfer_type = NAND_OMAP_PREFETCH_DMA,
.parts = omap3pandora_nand_partitions, .parts = omap3pandora_nand_partitions,
.nr_parts = ARRAY_SIZE(omap3pandora_nand_partitions), .nr_parts = ARRAY_SIZE(omap3pandora_nand_partitions),
}; };
...@@ -319,17 +320,17 @@ static struct twl4030_gpio_platform_data omap3pandora_gpio_data = { ...@@ -319,17 +320,17 @@ static struct twl4030_gpio_platform_data omap3pandora_gpio_data = {
.setup = omap3pandora_twl_gpio_setup, .setup = omap3pandora_twl_gpio_setup,
}; };
static struct regulator_consumer_supply pandora_vmmc1_supply = static struct regulator_consumer_supply pandora_vmmc1_supply[] = {
REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"); REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"),
};
static struct regulator_consumer_supply pandora_vmmc2_supply =
REGULATOR_SUPPLY("vmmc", "omap_hsmmc.1");
static struct regulator_consumer_supply pandora_vmmc3_supply = static struct regulator_consumer_supply pandora_vmmc2_supply[] = {
REGULATOR_SUPPLY("vmmc", "omap_hsmmc.2"); REGULATOR_SUPPLY("vmmc", "omap_hsmmc.1")
};
static struct regulator_consumer_supply pandora_vdda_dac_supply = static struct regulator_consumer_supply pandora_vmmc3_supply[] = {
REGULATOR_SUPPLY("vdda_dac", "omapdss_venc"); REGULATOR_SUPPLY("vmmc", "omap_hsmmc.2"),
};
static struct regulator_consumer_supply pandora_vdds_supplies[] = { static struct regulator_consumer_supply pandora_vdds_supplies[] = {
REGULATOR_SUPPLY("vdds_sdi", "omapdss"), REGULATOR_SUPPLY("vdds_sdi", "omapdss"),
...@@ -337,11 +338,13 @@ static struct regulator_consumer_supply pandora_vdds_supplies[] = { ...@@ -337,11 +338,13 @@ static struct regulator_consumer_supply pandora_vdds_supplies[] = {
REGULATOR_SUPPLY("vdds_dsi", "omapdss_dsi1"), REGULATOR_SUPPLY("vdds_dsi", "omapdss_dsi1"),
}; };
static struct regulator_consumer_supply pandora_vcc_lcd_supply = static struct regulator_consumer_supply pandora_vcc_lcd_supply[] = {
REGULATOR_SUPPLY("vcc", "display0"); REGULATOR_SUPPLY("vcc", "display0"),
};
static struct regulator_consumer_supply pandora_usb_phy_supply = static struct regulator_consumer_supply pandora_usb_phy_supply[] = {
REGULATOR_SUPPLY("hsusb0", "ehci-omap.0"); REGULATOR_SUPPLY("hsusb0", "ehci-omap.0"),
};
/* ads7846 on SPI and 2 nub controllers on I2C */ /* ads7846 on SPI and 2 nub controllers on I2C */
static struct regulator_consumer_supply pandora_vaux4_supplies[] = { static struct regulator_consumer_supply pandora_vaux4_supplies[] = {
...@@ -350,8 +353,9 @@ static struct regulator_consumer_supply pandora_vaux4_supplies[] = { ...@@ -350,8 +353,9 @@ static struct regulator_consumer_supply pandora_vaux4_supplies[] = {
REGULATOR_SUPPLY("vcc", "3-0067"), REGULATOR_SUPPLY("vcc", "3-0067"),
}; };
static struct regulator_consumer_supply pandora_adac_supply = static struct regulator_consumer_supply pandora_adac_supply[] = {
REGULATOR_SUPPLY("vcc", "soc-audio"); REGULATOR_SUPPLY("vcc", "soc-audio"),
};
/* VMMC1 for MMC1 pins CMD, CLK, DAT0..DAT3 (20 mA, plus card == max 220 mA) */ /* VMMC1 for MMC1 pins CMD, CLK, DAT0..DAT3 (20 mA, plus card == max 220 mA) */
static struct regulator_init_data pandora_vmmc1 = { static struct regulator_init_data pandora_vmmc1 = {
...@@ -364,8 +368,8 @@ static struct regulator_init_data pandora_vmmc1 = { ...@@ -364,8 +368,8 @@ static struct regulator_init_data pandora_vmmc1 = {
| REGULATOR_CHANGE_MODE | REGULATOR_CHANGE_MODE
| REGULATOR_CHANGE_STATUS, | REGULATOR_CHANGE_STATUS,
}, },
.num_consumer_supplies = 1, .num_consumer_supplies = ARRAY_SIZE(pandora_vmmc1_supply),
.consumer_supplies = &pandora_vmmc1_supply, .consumer_supplies = pandora_vmmc1_supply,
}; };
/* VMMC2 for MMC2 pins CMD, CLK, DAT0..DAT3 (max 100 mA) */ /* VMMC2 for MMC2 pins CMD, CLK, DAT0..DAT3 (max 100 mA) */
...@@ -379,38 +383,8 @@ static struct regulator_init_data pandora_vmmc2 = { ...@@ -379,38 +383,8 @@ static struct regulator_init_data pandora_vmmc2 = {
| REGULATOR_CHANGE_MODE | REGULATOR_CHANGE_MODE
| REGULATOR_CHANGE_STATUS, | REGULATOR_CHANGE_STATUS,
}, },
.num_consumer_supplies = 1, .num_consumer_supplies = ARRAY_SIZE(pandora_vmmc2_supply),
.consumer_supplies = &pandora_vmmc2_supply, .consumer_supplies = pandora_vmmc2_supply,
};
/* VDAC for DSS driving S-Video */
static struct regulator_init_data pandora_vdac = {
.constraints = {
.min_uV = 1800000,
.max_uV = 1800000,
.apply_uV = true,
.valid_modes_mask = REGULATOR_MODE_NORMAL
| REGULATOR_MODE_STANDBY,
.valid_ops_mask = REGULATOR_CHANGE_MODE
| REGULATOR_CHANGE_STATUS,
},
.num_consumer_supplies = 1,
.consumer_supplies = &pandora_vdda_dac_supply,
};
/* VPLL2 for digital video outputs */
static struct regulator_init_data pandora_vpll2 = {
.constraints = {
.min_uV = 1800000,
.max_uV = 1800000,
.apply_uV = true,
.valid_modes_mask = REGULATOR_MODE_NORMAL
| REGULATOR_MODE_STANDBY,
.valid_ops_mask = REGULATOR_CHANGE_MODE
| REGULATOR_CHANGE_STATUS,
},
.num_consumer_supplies = ARRAY_SIZE(pandora_vdds_supplies),
.consumer_supplies = pandora_vdds_supplies,
}; };
/* VAUX1 for LCD */ /* VAUX1 for LCD */
...@@ -424,8 +398,8 @@ static struct regulator_init_data pandora_vaux1 = { ...@@ -424,8 +398,8 @@ static struct regulator_init_data pandora_vaux1 = {
.valid_ops_mask = REGULATOR_CHANGE_MODE .valid_ops_mask = REGULATOR_CHANGE_MODE
| REGULATOR_CHANGE_STATUS, | REGULATOR_CHANGE_STATUS,
}, },
.num_consumer_supplies = 1, .num_consumer_supplies = ARRAY_SIZE(pandora_vcc_lcd_supply),
.consumer_supplies = &pandora_vcc_lcd_supply, .consumer_supplies = pandora_vcc_lcd_supply,
}; };
/* VAUX2 for USB host PHY */ /* VAUX2 for USB host PHY */
...@@ -439,8 +413,8 @@ static struct regulator_init_data pandora_vaux2 = { ...@@ -439,8 +413,8 @@ static struct regulator_init_data pandora_vaux2 = {
.valid_ops_mask = REGULATOR_CHANGE_MODE .valid_ops_mask = REGULATOR_CHANGE_MODE
| REGULATOR_CHANGE_STATUS, | REGULATOR_CHANGE_STATUS,
}, },
.num_consumer_supplies = 1, .num_consumer_supplies = ARRAY_SIZE(pandora_usb_phy_supply),
.consumer_supplies = &pandora_usb_phy_supply, .consumer_supplies = pandora_usb_phy_supply,
}; };
/* VAUX4 for ads7846 and nubs */ /* VAUX4 for ads7846 and nubs */
...@@ -469,8 +443,8 @@ static struct regulator_init_data pandora_vsim = { ...@@ -469,8 +443,8 @@ static struct regulator_init_data pandora_vsim = {
.valid_ops_mask = REGULATOR_CHANGE_MODE .valid_ops_mask = REGULATOR_CHANGE_MODE
| REGULATOR_CHANGE_STATUS, | REGULATOR_CHANGE_STATUS,
}, },
.num_consumer_supplies = 1, .num_consumer_supplies = ARRAY_SIZE(pandora_adac_supply),
.consumer_supplies = &pandora_adac_supply, .consumer_supplies = pandora_adac_supply,
}; };
/* Fixed regulator internal to Wifi module */ /* Fixed regulator internal to Wifi module */
...@@ -478,8 +452,8 @@ static struct regulator_init_data pandora_vmmc3 = { ...@@ -478,8 +452,8 @@ static struct regulator_init_data pandora_vmmc3 = {
.constraints = { .constraints = {
.valid_ops_mask = REGULATOR_CHANGE_STATUS, .valid_ops_mask = REGULATOR_CHANGE_STATUS,
}, },
.num_consumer_supplies = 1, .num_consumer_supplies = ARRAY_SIZE(pandora_vmmc3_supply),
.consumer_supplies = &pandora_vmmc3_supply, .consumer_supplies = pandora_vmmc3_supply,
}; };
static struct fixed_voltage_config pandora_vwlan = { static struct fixed_voltage_config pandora_vwlan = {
...@@ -500,29 +474,12 @@ static struct platform_device pandora_vwlan_device = { ...@@ -500,29 +474,12 @@ static struct platform_device pandora_vwlan_device = {
}, },
}; };
static struct twl4030_usb_data omap3pandora_usb_data = {
.usb_mode = T2_USB_MODE_ULPI,
};
static struct twl4030_codec_audio_data omap3pandora_audio_data;
static struct twl4030_codec_data omap3pandora_codec_data = {
.audio_mclk = 26000000,
.audio = &omap3pandora_audio_data,
};
static struct twl4030_bci_platform_data pandora_bci_data; static struct twl4030_bci_platform_data pandora_bci_data;
static struct twl4030_platform_data omap3pandora_twldata = { static struct twl4030_platform_data omap3pandora_twldata = {
.irq_base = TWL4030_IRQ_BASE,
.irq_end = TWL4030_IRQ_END,
.gpio = &omap3pandora_gpio_data, .gpio = &omap3pandora_gpio_data,
.usb = &omap3pandora_usb_data,
.codec = &omap3pandora_codec_data,
.vmmc1 = &pandora_vmmc1, .vmmc1 = &pandora_vmmc1,
.vmmc2 = &pandora_vmmc2, .vmmc2 = &pandora_vmmc2,
.vdac = &pandora_vdac,
.vpll2 = &pandora_vpll2,
.vaux1 = &pandora_vaux1, .vaux1 = &pandora_vaux1,
.vaux2 = &pandora_vaux2, .vaux2 = &pandora_vaux2,
.vaux4 = &pandora_vaux4, .vaux4 = &pandora_vaux4,
...@@ -540,6 +497,17 @@ static struct i2c_board_info __initdata omap3pandora_i2c3_boardinfo[] = { ...@@ -540,6 +497,17 @@ static struct i2c_board_info __initdata omap3pandora_i2c3_boardinfo[] = {
static int __init omap3pandora_i2c_init(void) static int __init omap3pandora_i2c_init(void)
{ {
omap3_pmic_get_config(&omap3pandora_twldata,
TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_AUDIO,
TWL_COMMON_REGULATOR_VDAC | TWL_COMMON_REGULATOR_VPLL2);
omap3pandora_twldata.vdac->constraints.apply_uV = true;
omap3pandora_twldata.vpll2->constraints.apply_uV = true;
omap3pandora_twldata.vpll2->num_consumer_supplies =
ARRAY_SIZE(pandora_vdds_supplies);
omap3pandora_twldata.vpll2->consumer_supplies = pandora_vdds_supplies;
omap3_pmic_init("tps65950", &omap3pandora_twldata); omap3_pmic_init("tps65950", &omap3pandora_twldata);
/* i2c2 pins are not connected */ /* i2c2 pins are not connected */
omap_register_i2c_bus(3, 100, omap3pandora_i2c3_boardinfo, omap_register_i2c_bus(3, 100, omap3pandora_i2c3_boardinfo,
...@@ -642,7 +610,7 @@ MACHINE_START(OMAP3_PANDORA, "Pandora Handheld Console") ...@@ -642,7 +610,7 @@ MACHINE_START(OMAP3_PANDORA, "Pandora Handheld Console")
.reserve = omap_reserve, .reserve = omap_reserve,
.map_io = omap3_map_io, .map_io = omap3_map_io,
.init_early = omap3pandora_init_early, .init_early = omap3pandora_init_early,
.init_irq = omap_init_irq, .init_irq = omap3_init_irq,
.init_machine = omap3pandora_init, .init_machine = omap3pandora_init,
.timer = &omap_timer, .timer = &omap3_timer,
MACHINE_END MACHINE_END
...@@ -52,7 +52,6 @@ ...@@ -52,7 +52,6 @@
#include "sdram-micron-mt46h32m32lf-6.h" #include "sdram-micron-mt46h32m32lf-6.h"
#include "mux.h" #include "mux.h"
#include "hsmmc.h" #include "hsmmc.h"
#include "timer-gp.h"
#include "common-board-devices.h" #include "common-board-devices.h"
#if defined(CONFIG_SMSC911X) || defined(CONFIG_SMSC911X_MODULE) #if defined(CONFIG_SMSC911X) || defined(CONFIG_SMSC911X_MODULE)
...@@ -206,12 +205,12 @@ static struct omap_dss_board_info omap3_stalker_dss_data = { ...@@ -206,12 +205,12 @@ static struct omap_dss_board_info omap3_stalker_dss_data = {
.default_device = &omap3_stalker_dvi_device, .default_device = &omap3_stalker_dvi_device,
}; };
static struct regulator_consumer_supply omap3stalker_vmmc1_supply = { static struct regulator_consumer_supply omap3stalker_vmmc1_supply[] = {
.supply = "vmmc", REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"),
}; };
static struct regulator_consumer_supply omap3stalker_vsim_supply = { static struct regulator_consumer_supply omap3stalker_vsim_supply[] = {
.supply = "vmmc_aux", REGULATOR_SUPPLY("vmmc_aux", "omap_hsmmc.0"),
}; };
/* VMMC1 for MMC1 pins CMD, CLK, DAT0..DAT3 (20 mA, plus card == max 220 mA) */ /* VMMC1 for MMC1 pins CMD, CLK, DAT0..DAT3 (20 mA, plus card == max 220 mA) */
...@@ -224,8 +223,8 @@ static struct regulator_init_data omap3stalker_vmmc1 = { ...@@ -224,8 +223,8 @@ static struct regulator_init_data omap3stalker_vmmc1 = {
.valid_ops_mask = REGULATOR_CHANGE_VOLTAGE .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
| REGULATOR_CHANGE_MODE | REGULATOR_CHANGE_STATUS, | REGULATOR_CHANGE_MODE | REGULATOR_CHANGE_STATUS,
}, },
.num_consumer_supplies = 1, .num_consumer_supplies = ARRAY_SIZE(omap3stalker_vmmc1_supply),
.consumer_supplies = &omap3stalker_vmmc1_supply, .consumer_supplies = omap3stalker_vmmc1_supply,
}; };
/* VSIM for MMC1 pins DAT4..DAT7 (2 mA, plus card == max 50 mA) */ /* VSIM for MMC1 pins DAT4..DAT7 (2 mA, plus card == max 50 mA) */
...@@ -238,8 +237,8 @@ static struct regulator_init_data omap3stalker_vsim = { ...@@ -238,8 +237,8 @@ static struct regulator_init_data omap3stalker_vsim = {
.valid_ops_mask = REGULATOR_CHANGE_VOLTAGE .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
| REGULATOR_CHANGE_MODE | REGULATOR_CHANGE_STATUS, | REGULATOR_CHANGE_MODE | REGULATOR_CHANGE_STATUS,
}, },
.num_consumer_supplies = 1, .num_consumer_supplies = ARRAY_SIZE(omap3stalker_vsim_supply),
.consumer_supplies = &omap3stalker_vsim_supply, .consumer_supplies = omap3stalker_vsim_supply,
}; };
static struct omap2_hsmmc_info mmc[] = { static struct omap2_hsmmc_info mmc[] = {
...@@ -321,10 +320,6 @@ omap3stalker_twl_gpio_setup(struct device *dev, ...@@ -321,10 +320,6 @@ omap3stalker_twl_gpio_setup(struct device *dev,
mmc[0].gpio_cd = gpio + 0; mmc[0].gpio_cd = gpio + 0;
omap2_hsmmc_init(mmc); omap2_hsmmc_init(mmc);
/* link regulators to MMC adapters */
omap3stalker_vmmc1_supply.dev = mmc[0].dev;
omap3stalker_vsim_supply.dev = mmc[0].dev;
/* /*
* Most GPIOs are for USB OTG. Some are mostly sent to * Most GPIOs are for USB OTG. Some are mostly sent to
* the P2 connector; notably LEDA for the LCD backlight. * the P2 connector; notably LEDA for the LCD backlight.
...@@ -354,10 +349,6 @@ static struct twl4030_gpio_platform_data omap3stalker_gpio_data = { ...@@ -354,10 +349,6 @@ static struct twl4030_gpio_platform_data omap3stalker_gpio_data = {
.setup = omap3stalker_twl_gpio_setup, .setup = omap3stalker_twl_gpio_setup,
}; };
static struct twl4030_usb_data omap3stalker_usb_data = {
.usb_mode = T2_USB_MODE_ULPI,
};
static uint32_t board_keymap[] = { static uint32_t board_keymap[] = {
KEY(0, 0, KEY_LEFT), KEY(0, 0, KEY_LEFT),
KEY(0, 1, KEY_DOWN), KEY(0, 1, KEY_DOWN),
...@@ -392,68 +383,10 @@ static struct twl4030_keypad_data omap3stalker_kp_data = { ...@@ -392,68 +383,10 @@ static struct twl4030_keypad_data omap3stalker_kp_data = {
.rep = 1, .rep = 1,
}; };
static struct twl4030_madc_platform_data omap3stalker_madc_data = {
.irq_line = 1,
};
static struct twl4030_codec_audio_data omap3stalker_audio_data;
static struct twl4030_codec_data omap3stalker_codec_data = {
.audio_mclk = 26000000,
.audio = &omap3stalker_audio_data,
};
static struct regulator_consumer_supply omap3_stalker_vdda_dac_supply =
REGULATOR_SUPPLY("vdda_dac", "omapdss_venc");
/* VDAC for DSS driving S-Video */
static struct regulator_init_data omap3_stalker_vdac = {
.constraints = {
.min_uV = 1800000,
.max_uV = 1800000,
.apply_uV = true,
.valid_modes_mask = REGULATOR_MODE_NORMAL
| REGULATOR_MODE_STANDBY,
.valid_ops_mask = REGULATOR_CHANGE_MODE
| REGULATOR_CHANGE_STATUS,
},
.num_consumer_supplies = 1,
.consumer_supplies = &omap3_stalker_vdda_dac_supply,
};
/* VPLL2 for digital video outputs */
static struct regulator_consumer_supply omap3_stalker_vpll2_supplies[] = {
REGULATOR_SUPPLY("vdds_dsi", "omapdss"),
REGULATOR_SUPPLY("vdds_dsi", "omapdss_dsi1"),
};
static struct regulator_init_data omap3_stalker_vpll2 = {
.constraints = {
.name = "VDVI",
.min_uV = 1800000,
.max_uV = 1800000,
.apply_uV = true,
.valid_modes_mask = REGULATOR_MODE_NORMAL
| REGULATOR_MODE_STANDBY,
.valid_ops_mask = REGULATOR_CHANGE_MODE
| REGULATOR_CHANGE_STATUS,
},
.num_consumer_supplies = ARRAY_SIZE(omap3_stalker_vpll2_supplies),
.consumer_supplies = omap3_stalker_vpll2_supplies,
};
static struct twl4030_platform_data omap3stalker_twldata = { static struct twl4030_platform_data omap3stalker_twldata = {
.irq_base = TWL4030_IRQ_BASE,
.irq_end = TWL4030_IRQ_END,
/* platform_data for children goes here */ /* platform_data for children goes here */
.keypad = &omap3stalker_kp_data, .keypad = &omap3stalker_kp_data,
.madc = &omap3stalker_madc_data,
.usb = &omap3stalker_usb_data,
.gpio = &omap3stalker_gpio_data, .gpio = &omap3stalker_gpio_data,
.codec = &omap3stalker_codec_data,
.vdac = &omap3_stalker_vdac,
.vpll2 = &omap3_stalker_vpll2,
.vmmc1 = &omap3stalker_vmmc1, .vmmc1 = &omap3stalker_vmmc1,
.vsim = &omap3stalker_vsim, .vsim = &omap3stalker_vsim,
}; };
...@@ -474,6 +407,15 @@ static struct i2c_board_info __initdata omap3stalker_i2c_boardinfo3[] = { ...@@ -474,6 +407,15 @@ static struct i2c_board_info __initdata omap3stalker_i2c_boardinfo3[] = {
static int __init omap3_stalker_i2c_init(void) static int __init omap3_stalker_i2c_init(void)
{ {
omap3_pmic_get_config(&omap3stalker_twldata,
TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_MADC |
TWL_COMMON_PDATA_AUDIO,
TWL_COMMON_REGULATOR_VDAC | TWL_COMMON_REGULATOR_VPLL2);
omap3stalker_twldata.vdac->constraints.apply_uV = true;
omap3stalker_twldata.vpll2->constraints.apply_uV = true;
omap3stalker_twldata.vpll2->constraints.name = "VDVI";
omap3_pmic_init("twl4030", &omap3stalker_twldata); omap3_pmic_init("twl4030", &omap3stalker_twldata);
omap_register_i2c_bus(2, 400, NULL, 0); omap_register_i2c_bus(2, 400, NULL, 0);
omap_register_i2c_bus(3, 400, omap3stalker_i2c_boardinfo3, omap_register_i2c_bus(3, 400, omap3stalker_i2c_boardinfo3,
...@@ -494,10 +436,7 @@ static void __init omap3_stalker_init_early(void) ...@@ -494,10 +436,7 @@ static void __init omap3_stalker_init_early(void)
static void __init omap3_stalker_init_irq(void) static void __init omap3_stalker_init_irq(void)
{ {
omap_init_irq(); omap3_init_irq();
#ifdef CONFIG_OMAP_32K_TIMER
omap2_gp_clockevent_set_gptimer(12);
#endif
} }
static struct platform_device *omap3_stalker_devices[] __initdata = { static struct platform_device *omap3_stalker_devices[] __initdata = {
...@@ -560,5 +499,5 @@ MACHINE_START(SBC3530, "OMAP3 STALKER") ...@@ -560,5 +499,5 @@ MACHINE_START(SBC3530, "OMAP3 STALKER")
.init_early = omap3_stalker_init_early, .init_early = omap3_stalker_init_early,
.init_irq = omap3_stalker_init_irq, .init_irq = omap3_stalker_init_irq,
.init_machine = omap3_stalker_init, .init_machine = omap3_stalker_init,
.timer = &omap_timer, .timer = &omap3_secure_timer,
MACHINE_END MACHINE_END
...@@ -51,7 +51,6 @@ ...@@ -51,7 +51,6 @@
#include "mux.h" #include "mux.h"
#include "hsmmc.h" #include "hsmmc.h"
#include "timer-gp.h"
#include "common-board-devices.h" #include "common-board-devices.h"
#include <asm/setup.h> #include <asm/setup.h>
...@@ -114,12 +113,12 @@ static struct omap_lcd_config omap3_touchbook_lcd_config __initdata = { ...@@ -114,12 +113,12 @@ static struct omap_lcd_config omap3_touchbook_lcd_config __initdata = {
.ctrl_name = "internal", .ctrl_name = "internal",
}; };
static struct regulator_consumer_supply touchbook_vmmc1_supply = { static struct regulator_consumer_supply touchbook_vmmc1_supply[] = {
.supply = "vmmc", REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"),
}; };
static struct regulator_consumer_supply touchbook_vsim_supply = { static struct regulator_consumer_supply touchbook_vsim_supply[] = {
.supply = "vmmc_aux", REGULATOR_SUPPLY("vmmc_aux", "omap_hsmmc.0"),
}; };
static struct gpio_led gpio_leds[]; static struct gpio_led gpio_leds[];
...@@ -137,10 +136,6 @@ static int touchbook_twl_gpio_setup(struct device *dev, ...@@ -137,10 +136,6 @@ static int touchbook_twl_gpio_setup(struct device *dev,
mmc[0].gpio_cd = gpio + 0; mmc[0].gpio_cd = gpio + 0;
omap2_hsmmc_init(mmc); omap2_hsmmc_init(mmc);
/* link regulators to MMC adapters */
touchbook_vmmc1_supply.dev = mmc[0].dev;
touchbook_vsim_supply.dev = mmc[0].dev;
/* REVISIT: need ehci-omap hooks for external VBUS /* REVISIT: need ehci-omap hooks for external VBUS
* power switch and overcurrent detect * power switch and overcurrent detect
*/ */
...@@ -167,14 +162,18 @@ static struct twl4030_gpio_platform_data touchbook_gpio_data = { ...@@ -167,14 +162,18 @@ static struct twl4030_gpio_platform_data touchbook_gpio_data = {
.setup = touchbook_twl_gpio_setup, .setup = touchbook_twl_gpio_setup,
}; };
static struct regulator_consumer_supply touchbook_vdac_supply = { static struct regulator_consumer_supply touchbook_vdac_supply[] = {
{
.supply = "vdac", .supply = "vdac",
.dev = &omap3_touchbook_lcd_device.dev, .dev = &omap3_touchbook_lcd_device.dev,
},
}; };
static struct regulator_consumer_supply touchbook_vdvi_supply = { static struct regulator_consumer_supply touchbook_vdvi_supply[] = {
{
.supply = "vdvi", .supply = "vdvi",
.dev = &omap3_touchbook_lcd_device.dev, .dev = &omap3_touchbook_lcd_device.dev,
},
}; };
/* VMMC1 for MMC1 pins CMD, CLK, DAT0..DAT3 (20 mA, plus card == max 220 mA) */ /* VMMC1 for MMC1 pins CMD, CLK, DAT0..DAT3 (20 mA, plus card == max 220 mA) */
...@@ -188,8 +187,8 @@ static struct regulator_init_data touchbook_vmmc1 = { ...@@ -188,8 +187,8 @@ static struct regulator_init_data touchbook_vmmc1 = {
| REGULATOR_CHANGE_MODE | REGULATOR_CHANGE_MODE
| REGULATOR_CHANGE_STATUS, | REGULATOR_CHANGE_STATUS,
}, },
.num_consumer_supplies = 1, .num_consumer_supplies = ARRAY_SIZE(touchbook_vmmc1_supply),
.consumer_supplies = &touchbook_vmmc1_supply, .consumer_supplies = touchbook_vmmc1_supply,
}; };
/* VSIM for MMC1 pins DAT4..DAT7 (2 mA, plus card == max 50 mA) */ /* VSIM for MMC1 pins DAT4..DAT7 (2 mA, plus card == max 50 mA) */
...@@ -203,62 +202,15 @@ static struct regulator_init_data touchbook_vsim = { ...@@ -203,62 +202,15 @@ static struct regulator_init_data touchbook_vsim = {
| REGULATOR_CHANGE_MODE | REGULATOR_CHANGE_MODE
| REGULATOR_CHANGE_STATUS, | REGULATOR_CHANGE_STATUS,
}, },
.num_consumer_supplies = 1, .num_consumer_supplies = ARRAY_SIZE(touchbook_vsim_supply),
.consumer_supplies = &touchbook_vsim_supply, .consumer_supplies = touchbook_vsim_supply,
};
/* VDAC for DSS driving S-Video (8 mA unloaded, max 65 mA) */
static struct regulator_init_data touchbook_vdac = {
.constraints = {
.min_uV = 1800000,
.max_uV = 1800000,
.valid_modes_mask = REGULATOR_MODE_NORMAL
| REGULATOR_MODE_STANDBY,
.valid_ops_mask = REGULATOR_CHANGE_MODE
| REGULATOR_CHANGE_STATUS,
},
.num_consumer_supplies = 1,
.consumer_supplies = &touchbook_vdac_supply,
};
/* VPLL2 for digital video outputs */
static struct regulator_init_data touchbook_vpll2 = {
.constraints = {
.name = "VDVI",
.min_uV = 1800000,
.max_uV = 1800000,
.valid_modes_mask = REGULATOR_MODE_NORMAL
| REGULATOR_MODE_STANDBY,
.valid_ops_mask = REGULATOR_CHANGE_MODE
| REGULATOR_CHANGE_STATUS,
},
.num_consumer_supplies = 1,
.consumer_supplies = &touchbook_vdvi_supply,
};
static struct twl4030_usb_data touchbook_usb_data = {
.usb_mode = T2_USB_MODE_ULPI,
};
static struct twl4030_codec_audio_data touchbook_audio_data;
static struct twl4030_codec_data touchbook_codec_data = {
.audio_mclk = 26000000,
.audio = &touchbook_audio_data,
}; };
static struct twl4030_platform_data touchbook_twldata = { static struct twl4030_platform_data touchbook_twldata = {
.irq_base = TWL4030_IRQ_BASE,
.irq_end = TWL4030_IRQ_END,
/* platform_data for children goes here */ /* platform_data for children goes here */
.usb = &touchbook_usb_data,
.gpio = &touchbook_gpio_data, .gpio = &touchbook_gpio_data,
.codec = &touchbook_codec_data,
.vmmc1 = &touchbook_vmmc1, .vmmc1 = &touchbook_vmmc1,
.vsim = &touchbook_vsim, .vsim = &touchbook_vsim,
.vdac = &touchbook_vdac,
.vpll2 = &touchbook_vpll2,
}; };
static struct i2c_board_info __initdata touchBook_i2c_boardinfo[] = { static struct i2c_board_info __initdata touchBook_i2c_boardinfo[] = {
...@@ -270,8 +222,20 @@ static struct i2c_board_info __initdata touchBook_i2c_boardinfo[] = { ...@@ -270,8 +222,20 @@ static struct i2c_board_info __initdata touchBook_i2c_boardinfo[] = {
static int __init omap3_touchbook_i2c_init(void) static int __init omap3_touchbook_i2c_init(void)
{ {
/* Standard TouchBook bus */ /* Standard TouchBook bus */
omap3_pmic_init("twl4030", &touchbook_twldata); omap3_pmic_get_config(&touchbook_twldata,
TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_AUDIO,
TWL_COMMON_REGULATOR_VDAC | TWL_COMMON_REGULATOR_VPLL2);
touchbook_twldata.vdac->num_consumer_supplies =
ARRAY_SIZE(touchbook_vdac_supply);
touchbook_twldata.vdac->consumer_supplies = touchbook_vdac_supply;
touchbook_twldata.vpll2->constraints.name = "VDVI";
touchbook_twldata.vpll2->num_consumer_supplies =
ARRAY_SIZE(touchbook_vdvi_supply);
touchbook_twldata.vpll2->consumer_supplies = touchbook_vdvi_supply;
omap3_pmic_init("twl4030", &touchbook_twldata);
/* Additional TouchBook bus */ /* Additional TouchBook bus */
omap_register_i2c_bus(3, 100, touchBook_i2c_boardinfo, omap_register_i2c_bus(3, 100, touchBook_i2c_boardinfo,
ARRAY_SIZE(touchBook_i2c_boardinfo)); ARRAY_SIZE(touchBook_i2c_boardinfo));
...@@ -371,10 +335,7 @@ static void __init omap3_touchbook_init_early(void) ...@@ -371,10 +335,7 @@ static void __init omap3_touchbook_init_early(void)
static void __init omap3_touchbook_init_irq(void) static void __init omap3_touchbook_init_irq(void)
{ {
omap_init_irq(); omap3_init_irq();
#ifdef CONFIG_OMAP_32K_TIMER
omap2_gp_clockevent_set_gptimer(12);
#endif
} }
static struct platform_device *omap3_touchbook_devices[] __initdata = { static struct platform_device *omap3_touchbook_devices[] __initdata = {
...@@ -449,5 +410,5 @@ MACHINE_START(TOUCHBOOK, "OMAP3 touchbook Board") ...@@ -449,5 +410,5 @@ MACHINE_START(TOUCHBOOK, "OMAP3 touchbook Board")
.init_early = omap3_touchbook_init_early, .init_early = omap3_touchbook_init_early,
.init_irq = omap3_touchbook_init_irq, .init_irq = omap3_touchbook_init_irq,
.init_machine = omap3_touchbook_init, .init_machine = omap3_touchbook_init,
.timer = &omap_timer, .timer = &omap3_secure_timer,
MACHINE_END MACHINE_END
...@@ -41,7 +41,6 @@ ...@@ -41,7 +41,6 @@
#include <plat/usb.h> #include <plat/usb.h>
#include <plat/mmc.h> #include <plat/mmc.h>
#include <video/omap-panel-generic-dpi.h> #include <video/omap-panel-generic-dpi.h>
#include "timer-gp.h"
#include "hsmmc.h" #include "hsmmc.h"
#include "control.h" #include "control.h"
...@@ -155,14 +154,6 @@ static struct omap_musb_board_data musb_board_data = { ...@@ -155,14 +154,6 @@ static struct omap_musb_board_data musb_board_data = {
.power = 100, .power = 100,
}; };
static struct twl4030_usb_data omap4_usbphy_data = {
.phy_init = omap4430_phy_init,
.phy_exit = omap4430_phy_exit,
.phy_power = omap4430_phy_power,
.phy_set_clock = omap4430_phy_set_clk,
.phy_suspend = omap4430_phy_suspend,
};
static struct omap2_hsmmc_info mmc[] = { static struct omap2_hsmmc_info mmc[] = {
{ {
.mmc = 1, .mmc = 1,
...@@ -182,24 +173,16 @@ static struct omap2_hsmmc_info mmc[] = { ...@@ -182,24 +173,16 @@ static struct omap2_hsmmc_info mmc[] = {
{} /* Terminator */ {} /* Terminator */
}; };
static struct regulator_consumer_supply omap4_panda_vmmc_supply[] = { static struct regulator_consumer_supply omap4_panda_vmmc5_supply[] = {
{ REGULATOR_SUPPLY("vmmc", "omap_hsmmc.4"),
.supply = "vmmc",
.dev_name = "omap_hsmmc.0",
},
};
static struct regulator_consumer_supply omap4_panda_vmmc5_supply = {
.supply = "vmmc",
.dev_name = "omap_hsmmc.4",
}; };
static struct regulator_init_data panda_vmmc5 = { static struct regulator_init_data panda_vmmc5 = {
.constraints = { .constraints = {
.valid_ops_mask = REGULATOR_CHANGE_STATUS, .valid_ops_mask = REGULATOR_CHANGE_STATUS,
}, },
.num_consumer_supplies = 1, .num_consumer_supplies = ARRAY_SIZE(omap4_panda_vmmc5_supply),
.consumer_supplies = &omap4_panda_vmmc5_supply, .consumer_supplies = omap4_panda_vmmc5_supply,
}; };
static struct fixed_voltage_config panda_vwlan = { static struct fixed_voltage_config panda_vwlan = {
...@@ -274,128 +257,8 @@ static int __init omap4_twl6030_hsmmc_init(struct omap2_hsmmc_info *controllers) ...@@ -274,128 +257,8 @@ static int __init omap4_twl6030_hsmmc_init(struct omap2_hsmmc_info *controllers)
return 0; return 0;
} }
static struct regulator_init_data omap4_panda_vaux2 = { /* Panda board uses the common PMIC configuration */
.constraints = { static struct twl4030_platform_data omap4_panda_twldata;
.min_uV = 1200000,
.max_uV = 2800000,
.apply_uV = true,
.valid_modes_mask = REGULATOR_MODE_NORMAL
| REGULATOR_MODE_STANDBY,
.valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
| REGULATOR_CHANGE_MODE
| REGULATOR_CHANGE_STATUS,
},
};
static struct regulator_init_data omap4_panda_vaux3 = {
.constraints = {
.min_uV = 1000000,
.max_uV = 3000000,
.apply_uV = true,
.valid_modes_mask = REGULATOR_MODE_NORMAL
| REGULATOR_MODE_STANDBY,
.valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
| REGULATOR_CHANGE_MODE
| REGULATOR_CHANGE_STATUS,
},
};
/* VMMC1 for MMC1 card */
static struct regulator_init_data omap4_panda_vmmc = {
.constraints = {
.min_uV = 1200000,
.max_uV = 3000000,
.apply_uV = true,
.valid_modes_mask = REGULATOR_MODE_NORMAL
| REGULATOR_MODE_STANDBY,
.valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
| REGULATOR_CHANGE_MODE
| REGULATOR_CHANGE_STATUS,
},
.num_consumer_supplies = 1,
.consumer_supplies = omap4_panda_vmmc_supply,
};
static struct regulator_init_data omap4_panda_vpp = {
.constraints = {
.min_uV = 1800000,
.max_uV = 2500000,
.apply_uV = true,
.valid_modes_mask = REGULATOR_MODE_NORMAL
| REGULATOR_MODE_STANDBY,
.valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
| REGULATOR_CHANGE_MODE
| REGULATOR_CHANGE_STATUS,
},
};
static struct regulator_init_data omap4_panda_vana = {
.constraints = {
.min_uV = 2100000,
.max_uV = 2100000,
.valid_modes_mask = REGULATOR_MODE_NORMAL
| REGULATOR_MODE_STANDBY,
.valid_ops_mask = REGULATOR_CHANGE_MODE
| REGULATOR_CHANGE_STATUS,
},
};
static struct regulator_init_data omap4_panda_vcxio = {
.constraints = {
.min_uV = 1800000,
.max_uV = 1800000,
.valid_modes_mask = REGULATOR_MODE_NORMAL
| REGULATOR_MODE_STANDBY,
.valid_ops_mask = REGULATOR_CHANGE_MODE
| REGULATOR_CHANGE_STATUS,
},
};
static struct regulator_init_data omap4_panda_vdac = {
.constraints = {
.min_uV = 1800000,
.max_uV = 1800000,
.valid_modes_mask = REGULATOR_MODE_NORMAL
| REGULATOR_MODE_STANDBY,
.valid_ops_mask = REGULATOR_CHANGE_MODE
| REGULATOR_CHANGE_STATUS,
},
};
static struct regulator_init_data omap4_panda_vusb = {
.constraints = {
.min_uV = 3300000,
.max_uV = 3300000,
.apply_uV = true,
.valid_modes_mask = REGULATOR_MODE_NORMAL
| REGULATOR_MODE_STANDBY,
.valid_ops_mask = REGULATOR_CHANGE_MODE
| REGULATOR_CHANGE_STATUS,
},
};
static struct regulator_init_data omap4_panda_clk32kg = {
.constraints = {
.valid_ops_mask = REGULATOR_CHANGE_STATUS,
},
};
static struct twl4030_platform_data omap4_panda_twldata = {
.irq_base = TWL6030_IRQ_BASE,
.irq_end = TWL6030_IRQ_END,
/* Regulators */
.vmmc = &omap4_panda_vmmc,
.vpp = &omap4_panda_vpp,
.vana = &omap4_panda_vana,
.vcxio = &omap4_panda_vcxio,
.vdac = &omap4_panda_vdac,
.vusb = &omap4_panda_vusb,
.vaux2 = &omap4_panda_vaux2,
.vaux3 = &omap4_panda_vaux3,
.clk32kg = &omap4_panda_clk32kg,
.usb = &omap4_usbphy_data,
};
/* /*
* Display monitor features are burnt in their EEPROM as EDID data. The EEPROM * Display monitor features are burnt in their EEPROM as EDID data. The EEPROM
...@@ -409,6 +272,16 @@ static struct i2c_board_info __initdata panda_i2c_eeprom[] = { ...@@ -409,6 +272,16 @@ static struct i2c_board_info __initdata panda_i2c_eeprom[] = {
static int __init omap4_panda_i2c_init(void) static int __init omap4_panda_i2c_init(void)
{ {
omap4_pmic_get_config(&omap4_panda_twldata, TWL_COMMON_PDATA_USB,
TWL_COMMON_REGULATOR_VDAC |
TWL_COMMON_REGULATOR_VAUX2 |
TWL_COMMON_REGULATOR_VAUX3 |
TWL_COMMON_REGULATOR_VMMC |
TWL_COMMON_REGULATOR_VPP |
TWL_COMMON_REGULATOR_VANA |
TWL_COMMON_REGULATOR_VCXIO |
TWL_COMMON_REGULATOR_VUSB |
TWL_COMMON_REGULATOR_CLK32KG);
omap4_pmic_init("twl6030", &omap4_panda_twldata); omap4_pmic_init("twl6030", &omap4_panda_twldata);
omap_register_i2c_bus(2, 400, NULL, 0); omap_register_i2c_bus(2, 400, NULL, 0);
/* /*
...@@ -716,5 +589,5 @@ MACHINE_START(OMAP4_PANDA, "OMAP4 Panda board") ...@@ -716,5 +589,5 @@ MACHINE_START(OMAP4_PANDA, "OMAP4 Panda board")
.init_early = omap4_panda_init_early, .init_early = omap4_panda_init_early,
.init_irq = gic_init_irq, .init_irq = gic_init_irq,
.init_machine = omap4_panda_init, .init_machine = omap4_panda_init,
.timer = &omap_timer, .timer = &omap4_timer,
MACHINE_END MACHINE_END
...@@ -74,15 +74,16 @@ ...@@ -74,15 +74,16 @@
defined(CONFIG_TOUCHSCREEN_ADS7846_MODULE) defined(CONFIG_TOUCHSCREEN_ADS7846_MODULE)
/* fixed regulator for ads7846 */ /* fixed regulator for ads7846 */
static struct regulator_consumer_supply ads7846_supply = static struct regulator_consumer_supply ads7846_supply[] = {
REGULATOR_SUPPLY("vcc", "spi1.0"); REGULATOR_SUPPLY("vcc", "spi1.0"),
};
static struct regulator_init_data vads7846_regulator = { static struct regulator_init_data vads7846_regulator = {
.constraints = { .constraints = {
.valid_ops_mask = REGULATOR_CHANGE_STATUS, .valid_ops_mask = REGULATOR_CHANGE_STATUS,
}, },
.num_consumer_supplies = 1, .num_consumer_supplies = ARRAY_SIZE(ads7846_supply),
.consumer_supplies = &ads7846_supply, .consumer_supplies = ads7846_supply,
}; };
static struct fixed_voltage_config vads7846 = { static struct fixed_voltage_config vads7846 = {
...@@ -264,14 +265,6 @@ static struct omap_dss_board_info overo_dss_data = { ...@@ -264,14 +265,6 @@ static struct omap_dss_board_info overo_dss_data = {
.default_device = &overo_dvi_device, .default_device = &overo_dvi_device,
}; };
static struct regulator_consumer_supply overo_vdda_dac_supply =
REGULATOR_SUPPLY("vdda_dac", "omapdss_venc");
static struct regulator_consumer_supply overo_vdds_dsi_supply[] = {
REGULATOR_SUPPLY("vdds_dsi", "omapdss"),
REGULATOR_SUPPLY("vdds_dsi", "omapdss_dsi1"),
};
static struct mtd_partition overo_nand_partitions[] = { static struct mtd_partition overo_nand_partitions[] = {
{ {
.name = "xloader", .name = "xloader",
...@@ -319,8 +312,8 @@ static struct omap2_hsmmc_info mmc[] = { ...@@ -319,8 +312,8 @@ static struct omap2_hsmmc_info mmc[] = {
{} /* Terminator */ {} /* Terminator */
}; };
static struct regulator_consumer_supply overo_vmmc1_supply = { static struct regulator_consumer_supply overo_vmmc1_supply[] = {
.supply = "vmmc", REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"),
}; };
#if defined(CONFIG_LEDS_GPIO) || defined(CONFIG_LEDS_GPIO_MODULE) #if defined(CONFIG_LEDS_GPIO) || defined(CONFIG_LEDS_GPIO_MODULE)
...@@ -415,8 +408,6 @@ static int overo_twl_gpio_setup(struct device *dev, ...@@ -415,8 +408,6 @@ static int overo_twl_gpio_setup(struct device *dev,
{ {
omap2_hsmmc_init(mmc); omap2_hsmmc_init(mmc);
overo_vmmc1_supply.dev = mmc[0].dev;
#if defined(CONFIG_LEDS_GPIO) || defined(CONFIG_LEDS_GPIO_MODULE) #if defined(CONFIG_LEDS_GPIO) || defined(CONFIG_LEDS_GPIO_MODULE)
/* TWL4030_GPIO_MAX + 1 == ledB, PMU_STAT (out, active low LED) */ /* TWL4030_GPIO_MAX + 1 == ledB, PMU_STAT (out, active low LED) */
gpio_leds[2].gpio = gpio + TWL4030_GPIO_MAX + 1; gpio_leds[2].gpio = gpio + TWL4030_GPIO_MAX + 1;
...@@ -433,10 +424,6 @@ static struct twl4030_gpio_platform_data overo_gpio_data = { ...@@ -433,10 +424,6 @@ static struct twl4030_gpio_platform_data overo_gpio_data = {
.setup = overo_twl_gpio_setup, .setup = overo_twl_gpio_setup,
}; };
static struct twl4030_usb_data overo_usb_data = {
.usb_mode = T2_USB_MODE_ULPI,
};
static struct regulator_init_data overo_vmmc1 = { static struct regulator_init_data overo_vmmc1 = {
.constraints = { .constraints = {
.min_uV = 1850000, .min_uV = 1850000,
...@@ -447,59 +434,23 @@ static struct regulator_init_data overo_vmmc1 = { ...@@ -447,59 +434,23 @@ static struct regulator_init_data overo_vmmc1 = {
| REGULATOR_CHANGE_MODE | REGULATOR_CHANGE_MODE
| REGULATOR_CHANGE_STATUS, | REGULATOR_CHANGE_STATUS,
}, },
.num_consumer_supplies = 1, .num_consumer_supplies = ARRAY_SIZE(overo_vmmc1_supply),
.consumer_supplies = &overo_vmmc1_supply, .consumer_supplies = overo_vmmc1_supply,
};
/* VDAC for DSS driving S-Video (8 mA unloaded, max 65 mA) */
static struct regulator_init_data overo_vdac = {
.constraints = {
.min_uV = 1800000,
.max_uV = 1800000,
.valid_modes_mask = REGULATOR_MODE_NORMAL
| REGULATOR_MODE_STANDBY,
.valid_ops_mask = REGULATOR_CHANGE_MODE
| REGULATOR_CHANGE_STATUS,
},
.num_consumer_supplies = 1,
.consumer_supplies = &overo_vdda_dac_supply,
};
/* VPLL2 for digital video outputs */
static struct regulator_init_data overo_vpll2 = {
.constraints = {
.name = "VDVI",
.min_uV = 1800000,
.max_uV = 1800000,
.valid_modes_mask = REGULATOR_MODE_NORMAL
| REGULATOR_MODE_STANDBY,
.valid_ops_mask = REGULATOR_CHANGE_MODE
| REGULATOR_CHANGE_STATUS,
},
.num_consumer_supplies = ARRAY_SIZE(overo_vdds_dsi_supply),
.consumer_supplies = overo_vdds_dsi_supply,
};
static struct twl4030_codec_audio_data overo_audio_data;
static struct twl4030_codec_data overo_codec_data = {
.audio_mclk = 26000000,
.audio = &overo_audio_data,
}; };
static struct twl4030_platform_data overo_twldata = { static struct twl4030_platform_data overo_twldata = {
.irq_base = TWL4030_IRQ_BASE,
.irq_end = TWL4030_IRQ_END,
.gpio = &overo_gpio_data, .gpio = &overo_gpio_data,
.usb = &overo_usb_data,
.codec = &overo_codec_data,
.vmmc1 = &overo_vmmc1, .vmmc1 = &overo_vmmc1,
.vdac = &overo_vdac,
.vpll2 = &overo_vpll2,
}; };
static int __init overo_i2c_init(void) static int __init overo_i2c_init(void)
{ {
omap3_pmic_get_config(&overo_twldata,
TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_AUDIO,
TWL_COMMON_REGULATOR_VDAC | TWL_COMMON_REGULATOR_VPLL2);
overo_twldata.vpll2->constraints.name = "VDVI";
omap3_pmic_init("tps65950", &overo_twldata); omap3_pmic_init("tps65950", &overo_twldata);
/* i2c2 pins are used for gpio */ /* i2c2 pins are used for gpio */
omap_register_i2c_bus(3, 400, NULL, 0); omap_register_i2c_bus(3, 400, NULL, 0);
...@@ -615,7 +566,7 @@ MACHINE_START(OVERO, "Gumstix Overo") ...@@ -615,7 +566,7 @@ MACHINE_START(OVERO, "Gumstix Overo")
.reserve = omap_reserve, .reserve = omap_reserve,
.map_io = omap3_map_io, .map_io = omap3_map_io,
.init_early = overo_init_early, .init_early = overo_init_early,
.init_irq = omap_init_irq, .init_irq = omap3_init_irq,
.init_machine = overo_init, .init_machine = overo_init,
.timer = &omap_timer, .timer = &omap3_timer,
MACHINE_END MACHINE_END
...@@ -79,20 +79,14 @@ static struct twl4030_gpio_platform_data rm680_gpio_data = { ...@@ -79,20 +79,14 @@ static struct twl4030_gpio_platform_data rm680_gpio_data = {
.pulldowns = BIT(1) | BIT(2) | BIT(8) | BIT(15), .pulldowns = BIT(1) | BIT(2) | BIT(8) | BIT(15),
}; };
static struct twl4030_usb_data rm680_usb_data = {
.usb_mode = T2_USB_MODE_ULPI,
};
static struct twl4030_platform_data rm680_twl_data = { static struct twl4030_platform_data rm680_twl_data = {
.irq_base = TWL4030_IRQ_BASE,
.irq_end = TWL4030_IRQ_END,
.gpio = &rm680_gpio_data, .gpio = &rm680_gpio_data,
.usb = &rm680_usb_data,
/* add rest of the children here */ /* add rest of the children here */
}; };
static void __init rm680_i2c_init(void) static void __init rm680_i2c_init(void)
{ {
omap3_pmic_get_config(&rm680_twl_data, TWL_COMMON_PDATA_USB, 0);
omap_pmic_init(1, 2900, "twl5031", INT_34XX_SYS_NIRQ, &rm680_twl_data); omap_pmic_init(1, 2900, "twl5031", INT_34XX_SYS_NIRQ, &rm680_twl_data);
omap_register_i2c_bus(2, 400, NULL, 0); omap_register_i2c_bus(2, 400, NULL, 0);
omap_register_i2c_bus(3, 400, NULL, 0); omap_register_i2c_bus(3, 400, NULL, 0);
...@@ -163,7 +157,7 @@ MACHINE_START(NOKIA_RM680, "Nokia RM-680 board") ...@@ -163,7 +157,7 @@ MACHINE_START(NOKIA_RM680, "Nokia RM-680 board")
.reserve = omap_reserve, .reserve = omap_reserve,
.map_io = rm680_map_io, .map_io = rm680_map_io,
.init_early = rm680_init_early, .init_early = rm680_init_early,
.init_irq = omap_init_irq, .init_irq = omap3_init_irq,
.init_machine = rm680_init, .init_machine = rm680_init,
.timer = &omap_timer, .timer = &omap3_timer,
MACHINE_END MACHINE_END
...@@ -288,10 +288,6 @@ static struct twl4030_keypad_data rx51_kp_data = { ...@@ -288,10 +288,6 @@ static struct twl4030_keypad_data rx51_kp_data = {
.rep = 1, .rep = 1,
}; };
static struct twl4030_madc_platform_data rx51_madc_data = {
.irq_line = 1,
};
/* Enable input logic and pull all lines up when eMMC is on. */ /* Enable input logic and pull all lines up when eMMC is on. */
static struct omap_board_mux rx51_mmc2_on_mux[] = { static struct omap_board_mux rx51_mmc2_on_mux[] = {
OMAP3_MUX(SDMMC2_CMD, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0), OMAP3_MUX(SDMMC2_CMD, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0),
...@@ -358,14 +354,17 @@ static struct omap2_hsmmc_info mmc[] __initdata = { ...@@ -358,14 +354,17 @@ static struct omap2_hsmmc_info mmc[] __initdata = {
{} /* Terminator */ {} /* Terminator */
}; };
static struct regulator_consumer_supply rx51_vmmc1_supply = static struct regulator_consumer_supply rx51_vmmc1_supply[] = {
REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"); REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"),
};
static struct regulator_consumer_supply rx51_vaux3_supply = static struct regulator_consumer_supply rx51_vaux3_supply[] = {
REGULATOR_SUPPLY("vmmc", "omap_hsmmc.1"); REGULATOR_SUPPLY("vmmc", "omap_hsmmc.1"),
};
static struct regulator_consumer_supply rx51_vsim_supply = static struct regulator_consumer_supply rx51_vsim_supply[] = {
REGULATOR_SUPPLY("vmmc_aux", "omap_hsmmc.1"); REGULATOR_SUPPLY("vmmc_aux", "omap_hsmmc.1"),
};
static struct regulator_consumer_supply rx51_vmmc2_supplies[] = { static struct regulator_consumer_supply rx51_vmmc2_supplies[] = {
/* tlv320aic3x analog supplies */ /* tlv320aic3x analog supplies */
...@@ -395,10 +394,6 @@ static struct regulator_consumer_supply rx51_vaux1_consumers[] = { ...@@ -395,10 +394,6 @@ static struct regulator_consumer_supply rx51_vaux1_consumers[] = {
REGULATOR_SUPPLY("vdd", "2-0063"), REGULATOR_SUPPLY("vdd", "2-0063"),
}; };
static struct regulator_consumer_supply rx51_vdac_supply[] = {
REGULATOR_SUPPLY("vdda_dac", "omapdss_venc"),
};
static struct regulator_init_data rx51_vaux1 = { static struct regulator_init_data rx51_vaux1 = {
.constraints = { .constraints = {
.name = "V28", .name = "V28",
...@@ -452,8 +447,8 @@ static struct regulator_init_data rx51_vaux3_mmc = { ...@@ -452,8 +447,8 @@ static struct regulator_init_data rx51_vaux3_mmc = {
| REGULATOR_CHANGE_MODE | REGULATOR_CHANGE_MODE
| REGULATOR_CHANGE_STATUS, | REGULATOR_CHANGE_STATUS,
}, },
.num_consumer_supplies = 1, .num_consumer_supplies = ARRAY_SIZE(rx51_vaux3_supply),
.consumer_supplies = &rx51_vaux3_supply, .consumer_supplies = rx51_vaux3_supply,
}; };
static struct regulator_init_data rx51_vaux4 = { static struct regulator_init_data rx51_vaux4 = {
...@@ -479,8 +474,8 @@ static struct regulator_init_data rx51_vmmc1 = { ...@@ -479,8 +474,8 @@ static struct regulator_init_data rx51_vmmc1 = {
| REGULATOR_CHANGE_MODE | REGULATOR_CHANGE_MODE
| REGULATOR_CHANGE_STATUS, | REGULATOR_CHANGE_STATUS,
}, },
.num_consumer_supplies = 1, .num_consumer_supplies = ARRAY_SIZE(rx51_vmmc1_supply),
.consumer_supplies = &rx51_vmmc1_supply, .consumer_supplies = rx51_vmmc1_supply,
}; };
static struct regulator_init_data rx51_vmmc2 = { static struct regulator_init_data rx51_vmmc2 = {
...@@ -511,23 +506,8 @@ static struct regulator_init_data rx51_vsim = { ...@@ -511,23 +506,8 @@ static struct regulator_init_data rx51_vsim = {
.valid_ops_mask = REGULATOR_CHANGE_MODE .valid_ops_mask = REGULATOR_CHANGE_MODE
| REGULATOR_CHANGE_STATUS, | REGULATOR_CHANGE_STATUS,
}, },
.num_consumer_supplies = 1, .num_consumer_supplies = ARRAY_SIZE(rx51_vsim_supply),
.consumer_supplies = &rx51_vsim_supply, .consumer_supplies = rx51_vsim_supply,
};
static struct regulator_init_data rx51_vdac = {
.constraints = {
.name = "VDAC",
.min_uV = 1800000,
.max_uV = 1800000,
.apply_uV = true,
.valid_modes_mask = REGULATOR_MODE_NORMAL
| REGULATOR_MODE_STANDBY,
.valid_ops_mask = REGULATOR_CHANGE_MODE
| REGULATOR_CHANGE_STATUS,
},
.num_consumer_supplies = 1,
.consumer_supplies = rx51_vdac_supply,
}; };
static struct regulator_init_data rx51_vio = { static struct regulator_init_data rx51_vio = {
...@@ -600,10 +580,6 @@ static struct twl4030_gpio_platform_data rx51_gpio_data = { ...@@ -600,10 +580,6 @@ static struct twl4030_gpio_platform_data rx51_gpio_data = {
.setup = rx51_twlgpio_setup, .setup = rx51_twlgpio_setup,
}; };
static struct twl4030_usb_data rx51_usb_data = {
.usb_mode = T2_USB_MODE_ULPI,
};
static struct twl4030_ins sleep_on_seq[] __initdata = { static struct twl4030_ins sleep_on_seq[] __initdata = {
/* /*
* Turn off everything * Turn off everything
...@@ -775,14 +751,9 @@ struct twl4030_codec_data rx51_codec_data __initdata = { ...@@ -775,14 +751,9 @@ struct twl4030_codec_data rx51_codec_data __initdata = {
}; };
static struct twl4030_platform_data rx51_twldata __initdata = { static struct twl4030_platform_data rx51_twldata __initdata = {
.irq_base = TWL4030_IRQ_BASE,
.irq_end = TWL4030_IRQ_END,
/* platform_data for children goes here */ /* platform_data for children goes here */
.gpio = &rx51_gpio_data, .gpio = &rx51_gpio_data,
.keypad = &rx51_kp_data, .keypad = &rx51_kp_data,
.madc = &rx51_madc_data,
.usb = &rx51_usb_data,
.power = &rx51_t2scripts_data, .power = &rx51_t2scripts_data,
.codec = &rx51_codec_data, .codec = &rx51_codec_data,
...@@ -791,7 +762,6 @@ static struct twl4030_platform_data rx51_twldata __initdata = { ...@@ -791,7 +762,6 @@ static struct twl4030_platform_data rx51_twldata __initdata = {
.vaux4 = &rx51_vaux4, .vaux4 = &rx51_vaux4,
.vmmc1 = &rx51_vmmc1, .vmmc1 = &rx51_vmmc1,
.vsim = &rx51_vsim, .vsim = &rx51_vsim,
.vdac = &rx51_vdac,
.vio = &rx51_vio, .vio = &rx51_vio,
}; };
...@@ -847,6 +817,13 @@ static int __init rx51_i2c_init(void) ...@@ -847,6 +817,13 @@ static int __init rx51_i2c_init(void)
rx51_twldata.vaux3 = &rx51_vaux3_cam; rx51_twldata.vaux3 = &rx51_vaux3_cam;
} }
rx51_twldata.vmmc2 = &rx51_vmmc2; rx51_twldata.vmmc2 = &rx51_vmmc2;
omap3_pmic_get_config(&rx51_twldata,
TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_MADC,
TWL_COMMON_REGULATOR_VDAC);
rx51_twldata.vdac->constraints.apply_uV = true;
rx51_twldata.vdac->constraints.name = "VDAC";
omap_pmic_init(1, 2200, "twl5030", INT_34XX_SYS_NIRQ, &rx51_twldata); omap_pmic_init(1, 2200, "twl5030", INT_34XX_SYS_NIRQ, &rx51_twldata);
omap_register_i2c_bus(2, 100, rx51_peripherals_i2c_board_info_2, omap_register_i2c_bus(2, 100, rx51_peripherals_i2c_board_info_2,
ARRAY_SIZE(rx51_peripherals_i2c_board_info_2)); ARRAY_SIZE(rx51_peripherals_i2c_board_info_2));
......
...@@ -160,7 +160,7 @@ MACHINE_START(NOKIA_RX51, "Nokia RX-51 board") ...@@ -160,7 +160,7 @@ MACHINE_START(NOKIA_RX51, "Nokia RX-51 board")
.reserve = rx51_reserve, .reserve = rx51_reserve,
.map_io = rx51_map_io, .map_io = rx51_map_io,
.init_early = rx51_init_early, .init_early = rx51_init_early,
.init_irq = omap_init_irq, .init_irq = omap3_init_irq,
.init_machine = rx51_init, .init_machine = rx51_init,
.timer = &omap_timer, .timer = &omap3_timer,
MACHINE_END MACHINE_END
...@@ -33,11 +33,6 @@ static void __init ti8168_init_early(void) ...@@ -33,11 +33,6 @@ static void __init ti8168_init_early(void)
omap2_init_common_devices(NULL, NULL); omap2_init_common_devices(NULL, NULL);
} }
static void __init ti8168_evm_init_irq(void)
{
omap_init_irq();
}
static void __init ti8168_evm_init(void) static void __init ti8168_evm_init(void)
{ {
omap_serial_init(); omap_serial_init();
...@@ -56,7 +51,7 @@ MACHINE_START(TI8168EVM, "ti8168evm") ...@@ -56,7 +51,7 @@ MACHINE_START(TI8168EVM, "ti8168evm")
.boot_params = 0x80000100, .boot_params = 0x80000100,
.map_io = ti8168_evm_map_io, .map_io = ti8168_evm_map_io,
.init_early = ti8168_init_early, .init_early = ti8168_init_early,
.init_irq = ti8168_evm_init_irq, .init_irq = ti816x_init_irq,
.timer = &omap_timer, .timer = &omap3_timer,
.init_machine = ti8168_evm_init, .init_machine = ti8168_evm_init,
MACHINE_END MACHINE_END
...@@ -105,21 +105,20 @@ static struct twl4030_keypad_data zoom_kp_twl4030_data = { ...@@ -105,21 +105,20 @@ static struct twl4030_keypad_data zoom_kp_twl4030_data = {
.rep = 1, .rep = 1,
}; };
static struct regulator_consumer_supply zoom_vmmc1_supply = { static struct regulator_consumer_supply zoom_vmmc1_supply[] = {
.supply = "vmmc", REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"),
}; };
static struct regulator_consumer_supply zoom_vsim_supply = { static struct regulator_consumer_supply zoom_vsim_supply[] = {
.supply = "vmmc_aux", REGULATOR_SUPPLY("vmmc_aux", "omap_hsmmc.0"),
}; };
static struct regulator_consumer_supply zoom_vmmc2_supply = { static struct regulator_consumer_supply zoom_vmmc2_supply[] = {
.supply = "vmmc", REGULATOR_SUPPLY("vmmc", "omap_hsmmc.1"),
}; };
static struct regulator_consumer_supply zoom_vmmc3_supply = { static struct regulator_consumer_supply zoom_vmmc3_supply[] = {
.supply = "vmmc", REGULATOR_SUPPLY("vmmc", "omap_hsmmc.2"),
.dev_name = "omap_hsmmc.2",
}; };
/* VMMC1 for OMAP VDD_MMC1 (i/o) and MMC1 card */ /* VMMC1 for OMAP VDD_MMC1 (i/o) and MMC1 card */
...@@ -133,8 +132,8 @@ static struct regulator_init_data zoom_vmmc1 = { ...@@ -133,8 +132,8 @@ static struct regulator_init_data zoom_vmmc1 = {
| REGULATOR_CHANGE_MODE | REGULATOR_CHANGE_MODE
| REGULATOR_CHANGE_STATUS, | REGULATOR_CHANGE_STATUS,
}, },
.num_consumer_supplies = 1, .num_consumer_supplies = ARRAY_SIZE(zoom_vmmc1_supply),
.consumer_supplies = &zoom_vmmc1_supply, .consumer_supplies = zoom_vmmc1_supply,
}; };
/* VMMC2 for MMC2 card */ /* VMMC2 for MMC2 card */
...@@ -148,8 +147,8 @@ static struct regulator_init_data zoom_vmmc2 = { ...@@ -148,8 +147,8 @@ static struct regulator_init_data zoom_vmmc2 = {
.valid_ops_mask = REGULATOR_CHANGE_MODE .valid_ops_mask = REGULATOR_CHANGE_MODE
| REGULATOR_CHANGE_STATUS, | REGULATOR_CHANGE_STATUS,
}, },
.num_consumer_supplies = 1, .num_consumer_supplies = ARRAY_SIZE(zoom_vmmc2_supply),
.consumer_supplies = &zoom_vmmc2_supply, .consumer_supplies = zoom_vmmc2_supply,
}; };
/* VSIM for OMAP VDD_MMC1A (i/o for DAT4..DAT7) */ /* VSIM for OMAP VDD_MMC1A (i/o for DAT4..DAT7) */
...@@ -163,16 +162,16 @@ static struct regulator_init_data zoom_vsim = { ...@@ -163,16 +162,16 @@ static struct regulator_init_data zoom_vsim = {
| REGULATOR_CHANGE_MODE | REGULATOR_CHANGE_MODE
| REGULATOR_CHANGE_STATUS, | REGULATOR_CHANGE_STATUS,
}, },
.num_consumer_supplies = 1, .num_consumer_supplies = ARRAY_SIZE(zoom_vsim_supply),
.consumer_supplies = &zoom_vsim_supply, .consumer_supplies = zoom_vsim_supply,
}; };
static struct regulator_init_data zoom_vmmc3 = { static struct regulator_init_data zoom_vmmc3 = {
.constraints = { .constraints = {
.valid_ops_mask = REGULATOR_CHANGE_STATUS, .valid_ops_mask = REGULATOR_CHANGE_STATUS,
}, },
.num_consumer_supplies = 1, .num_consumer_supplies = ARRAY_SIZE(zoom_vmmc3_supply),
.consumer_supplies = &zoom_vmmc3_supply, .consumer_supplies = zoom_vmmc3_supply,
}; };
static struct fixed_voltage_config zoom_vwlan = { static struct fixed_voltage_config zoom_vwlan = {
...@@ -227,40 +226,6 @@ static struct omap2_hsmmc_info mmc[] = { ...@@ -227,40 +226,6 @@ static struct omap2_hsmmc_info mmc[] = {
{} /* Terminator */ {} /* Terminator */
}; };
static struct regulator_consumer_supply zoom_vpll2_supplies[] = {
REGULATOR_SUPPLY("vdds_dsi", "omapdss"),
REGULATOR_SUPPLY("vdds_dsi", "omapdss_dsi1"),
};
static struct regulator_consumer_supply zoom_vdda_dac_supply =
REGULATOR_SUPPLY("vdda_dac", "omapdss_venc");
static struct regulator_init_data zoom_vpll2 = {
.constraints = {
.min_uV = 1800000,
.max_uV = 1800000,
.valid_modes_mask = REGULATOR_MODE_NORMAL
| REGULATOR_MODE_STANDBY,
.valid_ops_mask = REGULATOR_CHANGE_MODE
| REGULATOR_CHANGE_STATUS,
},
.num_consumer_supplies = ARRAY_SIZE(zoom_vpll2_supplies),
.consumer_supplies = zoom_vpll2_supplies,
};
static struct regulator_init_data zoom_vdac = {
.constraints = {
.min_uV = 1800000,
.max_uV = 1800000,
.valid_modes_mask = REGULATOR_MODE_NORMAL
| REGULATOR_MODE_STANDBY,
.valid_ops_mask = REGULATOR_CHANGE_MODE
| REGULATOR_CHANGE_STATUS,
},
.num_consumer_supplies = 1,
.consumer_supplies = &zoom_vdda_dac_supply,
};
static int zoom_twl_gpio_setup(struct device *dev, static int zoom_twl_gpio_setup(struct device *dev,
unsigned gpio, unsigned ngpio) unsigned gpio, unsigned ngpio)
{ {
...@@ -270,13 +235,6 @@ static int zoom_twl_gpio_setup(struct device *dev, ...@@ -270,13 +235,6 @@ static int zoom_twl_gpio_setup(struct device *dev,
mmc[0].gpio_cd = gpio + 0; mmc[0].gpio_cd = gpio + 0;
omap2_hsmmc_init(mmc); omap2_hsmmc_init(mmc);
/* link regulators to MMC adapters ... we "know" the
* regulators will be set up only *after* we return.
*/
zoom_vmmc1_supply.dev = mmc[0].dev;
zoom_vsim_supply.dev = mmc[0].dev;
zoom_vmmc2_supply.dev = mmc[1].dev;
ret = gpio_request_one(LCD_PANEL_ENABLE_GPIO, GPIOF_OUT_INIT_LOW, ret = gpio_request_one(LCD_PANEL_ENABLE_GPIO, GPIOF_OUT_INIT_LOW,
"lcd enable"); "lcd enable");
if (ret) if (ret)
...@@ -292,26 +250,6 @@ static void zoom2_set_hs_extmute(int mute) ...@@ -292,26 +250,6 @@ static void zoom2_set_hs_extmute(int mute)
gpio_set_value(ZOOM2_HEADSET_EXTMUTE_GPIO, mute); gpio_set_value(ZOOM2_HEADSET_EXTMUTE_GPIO, mute);
} }
static int zoom_batt_table[] = {
/* 0 C*/
30800, 29500, 28300, 27100,
26000, 24900, 23900, 22900, 22000, 21100, 20300, 19400, 18700, 17900,
17200, 16500, 15900, 15300, 14700, 14100, 13600, 13100, 12600, 12100,
11600, 11200, 10800, 10400, 10000, 9630, 9280, 8950, 8620, 8310,
8020, 7730, 7460, 7200, 6950, 6710, 6470, 6250, 6040, 5830,
5640, 5450, 5260, 5090, 4920, 4760, 4600, 4450, 4310, 4170,
4040, 3910, 3790, 3670, 3550
};
static struct twl4030_bci_platform_data zoom_bci_data = {
.battery_tmp_tbl = zoom_batt_table,
.tblsize = ARRAY_SIZE(zoom_batt_table),
};
static struct twl4030_usb_data zoom_usb_data = {
.usb_mode = T2_USB_MODE_ULPI,
};
static struct twl4030_gpio_platform_data zoom_gpio_data = { static struct twl4030_gpio_platform_data zoom_gpio_data = {
.gpio_base = OMAP_MAX_GPIO_LINES, .gpio_base = OMAP_MAX_GPIO_LINES,
.irq_base = TWL4030_GPIO_IRQ_BASE, .irq_base = TWL4030_GPIO_IRQ_BASE,
...@@ -319,41 +257,29 @@ static struct twl4030_gpio_platform_data zoom_gpio_data = { ...@@ -319,41 +257,29 @@ static struct twl4030_gpio_platform_data zoom_gpio_data = {
.setup = zoom_twl_gpio_setup, .setup = zoom_twl_gpio_setup,
}; };
static struct twl4030_madc_platform_data zoom_madc_data = {
.irq_line = 1,
};
static struct twl4030_codec_audio_data zoom_audio_data;
static struct twl4030_codec_data zoom_codec_data = {
.audio_mclk = 26000000,
.audio = &zoom_audio_data,
};
static struct twl4030_platform_data zoom_twldata = { static struct twl4030_platform_data zoom_twldata = {
.irq_base = TWL4030_IRQ_BASE,
.irq_end = TWL4030_IRQ_END,
/* platform_data for children goes here */ /* platform_data for children goes here */
.bci = &zoom_bci_data,
.madc = &zoom_madc_data,
.usb = &zoom_usb_data,
.gpio = &zoom_gpio_data, .gpio = &zoom_gpio_data,
.keypad = &zoom_kp_twl4030_data, .keypad = &zoom_kp_twl4030_data,
.codec = &zoom_codec_data,
.vmmc1 = &zoom_vmmc1, .vmmc1 = &zoom_vmmc1,
.vmmc2 = &zoom_vmmc2, .vmmc2 = &zoom_vmmc2,
.vsim = &zoom_vsim, .vsim = &zoom_vsim,
.vpll2 = &zoom_vpll2,
.vdac = &zoom_vdac,
}; };
static int __init omap_i2c_init(void) static int __init omap_i2c_init(void)
{ {
omap3_pmic_get_config(&zoom_twldata,
TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_BCI |
TWL_COMMON_PDATA_MADC | TWL_COMMON_PDATA_AUDIO,
TWL_COMMON_REGULATOR_VDAC | TWL_COMMON_REGULATOR_VPLL2);
if (machine_is_omap_zoom2()) { if (machine_is_omap_zoom2()) {
zoom_audio_data.ramp_delay_value = 3; /* 161 ms */ struct twl4030_codec_audio_data *audio_data;
zoom_audio_data.hs_extmute = 1; audio_data = zoom_twldata.codec->audio;
zoom_audio_data.set_hs_extmute = zoom2_set_hs_extmute;
audio_data->ramp_delay_value = 3; /* 161 ms */
audio_data->hs_extmute = 1;
audio_data->set_hs_extmute = zoom2_set_hs_extmute;
} }
omap_pmic_init(1, 2400, "twl5030", INT_34XX_SYS_NIRQ, &zoom_twldata); omap_pmic_init(1, 2400, "twl5030", INT_34XX_SYS_NIRQ, &zoom_twldata);
omap_register_i2c_bus(2, 400, NULL, 0); omap_register_i2c_bus(2, 400, NULL, 0);
......
...@@ -137,9 +137,9 @@ MACHINE_START(OMAP_ZOOM2, "OMAP Zoom2 board") ...@@ -137,9 +137,9 @@ MACHINE_START(OMAP_ZOOM2, "OMAP Zoom2 board")
.reserve = omap_reserve, .reserve = omap_reserve,
.map_io = omap3_map_io, .map_io = omap3_map_io,
.init_early = omap_zoom_init_early, .init_early = omap_zoom_init_early,
.init_irq = omap_init_irq, .init_irq = omap3_init_irq,
.init_machine = omap_zoom_init, .init_machine = omap_zoom_init,
.timer = &omap_timer, .timer = &omap3_timer,
MACHINE_END MACHINE_END
MACHINE_START(OMAP_ZOOM3, "OMAP Zoom3 board") MACHINE_START(OMAP_ZOOM3, "OMAP Zoom3 board")
...@@ -147,7 +147,7 @@ MACHINE_START(OMAP_ZOOM3, "OMAP Zoom3 board") ...@@ -147,7 +147,7 @@ MACHINE_START(OMAP_ZOOM3, "OMAP Zoom3 board")
.reserve = omap_reserve, .reserve = omap_reserve,
.map_io = omap3_map_io, .map_io = omap3_map_io,
.init_early = omap_zoom_init_early, .init_early = omap_zoom_init_early,
.init_irq = omap_init_irq, .init_irq = omap3_init_irq,
.init_machine = omap_zoom_init, .init_machine = omap_zoom_init,
.timer = &omap_timer, .timer = &omap3_timer,
MACHINE_END MACHINE_END
...@@ -8,13 +8,6 @@ ...@@ -8,13 +8,6 @@
#ifndef __ARCH_ARM_MACH_OMAP2_CLOCK44XX_H #ifndef __ARCH_ARM_MACH_OMAP2_CLOCK44XX_H
#define __ARCH_ARM_MACH_OMAP2_CLOCK44XX_H #define __ARCH_ARM_MACH_OMAP2_CLOCK44XX_H
/*
* XXX Missing values for the OMAP4 DPLL_USB
* XXX Missing min_multiplier values for all OMAP4 DPLLs
*/
#define OMAP4430_MAX_DPLL_MULT 2047
#define OMAP4430_MAX_DPLL_DIV 128
int omap4xxx_clk_init(void); int omap4xxx_clk_init(void);
#endif #endif
...@@ -258,8 +258,8 @@ static struct dpll_data dpll_abe_dd = { ...@@ -258,8 +258,8 @@ static struct dpll_data dpll_abe_dd = {
.enable_mask = OMAP4430_DPLL_EN_MASK, .enable_mask = OMAP4430_DPLL_EN_MASK,
.autoidle_mask = OMAP4430_AUTO_DPLL_MODE_MASK, .autoidle_mask = OMAP4430_AUTO_DPLL_MODE_MASK,
.idlest_mask = OMAP4430_ST_DPLL_CLK_MASK, .idlest_mask = OMAP4430_ST_DPLL_CLK_MASK,
.max_multiplier = OMAP4430_MAX_DPLL_MULT, .max_multiplier = 2047,
.max_divider = OMAP4430_MAX_DPLL_DIV, .max_divider = 128,
.min_divider = 1, .min_divider = 1,
}; };
...@@ -278,10 +278,10 @@ static struct clk dpll_abe_ck = { ...@@ -278,10 +278,10 @@ static struct clk dpll_abe_ck = {
static struct clk dpll_abe_x2_ck = { static struct clk dpll_abe_x2_ck = {
.name = "dpll_abe_x2_ck", .name = "dpll_abe_x2_ck",
.parent = &dpll_abe_ck, .parent = &dpll_abe_ck,
.clksel_reg = OMAP4430_CM_DIV_M2_DPLL_ABE,
.flags = CLOCK_CLKOUTX2, .flags = CLOCK_CLKOUTX2,
.ops = &clkops_omap4_dpllmx_ops, .ops = &clkops_omap4_dpllmx_ops,
.recalc = &omap3_clkoutx2_recalc, .recalc = &omap3_clkoutx2_recalc,
.clksel_reg = OMAP4430_CM_DIV_M2_DPLL_ABE,
}; };
static const struct clksel_rate div31_1to31_rates[] = { static const struct clksel_rate div31_1to31_rates[] = {
...@@ -434,8 +434,8 @@ static struct dpll_data dpll_core_dd = { ...@@ -434,8 +434,8 @@ static struct dpll_data dpll_core_dd = {
.enable_mask = OMAP4430_DPLL_EN_MASK, .enable_mask = OMAP4430_DPLL_EN_MASK,
.autoidle_mask = OMAP4430_AUTO_DPLL_MODE_MASK, .autoidle_mask = OMAP4430_AUTO_DPLL_MODE_MASK,
.idlest_mask = OMAP4430_ST_DPLL_CLK_MASK, .idlest_mask = OMAP4430_ST_DPLL_CLK_MASK,
.max_multiplier = OMAP4430_MAX_DPLL_MULT, .max_multiplier = 2047,
.max_divider = OMAP4430_MAX_DPLL_DIV, .max_divider = 128,
.min_divider = 1, .min_divider = 1,
}; };
...@@ -622,11 +622,11 @@ static struct clk dpll_core_m3x2_ck = { ...@@ -622,11 +622,11 @@ static struct clk dpll_core_m3x2_ck = {
.clksel_reg = OMAP4430_CM_DIV_M3_DPLL_CORE, .clksel_reg = OMAP4430_CM_DIV_M3_DPLL_CORE,
.clksel_mask = OMAP4430_DPLL_CLKOUTHIF_DIV_MASK, .clksel_mask = OMAP4430_DPLL_CLKOUTHIF_DIV_MASK,
.ops = &clkops_omap2_dflt, .ops = &clkops_omap2_dflt,
.enable_reg = OMAP4430_CM_DIV_M3_DPLL_CORE,
.enable_bit = OMAP4430_DPLL_CLKOUTHIF_GATE_CTRL_SHIFT,
.recalc = &omap2_clksel_recalc, .recalc = &omap2_clksel_recalc,
.round_rate = &omap2_clksel_round_rate, .round_rate = &omap2_clksel_round_rate,
.set_rate = &omap2_clksel_set_rate, .set_rate = &omap2_clksel_set_rate,
.enable_reg = OMAP4430_CM_DIV_M3_DPLL_CORE,
.enable_bit = OMAP4430_DPLL_CLKOUTHIF_GATE_CTRL_SHIFT,
}; };
static struct clk dpll_core_m7x2_ck = { static struct clk dpll_core_m7x2_ck = {
...@@ -672,8 +672,8 @@ static struct dpll_data dpll_iva_dd = { ...@@ -672,8 +672,8 @@ static struct dpll_data dpll_iva_dd = {
.enable_mask = OMAP4430_DPLL_EN_MASK, .enable_mask = OMAP4430_DPLL_EN_MASK,
.autoidle_mask = OMAP4430_AUTO_DPLL_MODE_MASK, .autoidle_mask = OMAP4430_AUTO_DPLL_MODE_MASK,
.idlest_mask = OMAP4430_ST_DPLL_CLK_MASK, .idlest_mask = OMAP4430_ST_DPLL_CLK_MASK,
.max_multiplier = OMAP4430_MAX_DPLL_MULT, .max_multiplier = 2047,
.max_divider = OMAP4430_MAX_DPLL_DIV, .max_divider = 128,
.min_divider = 1, .min_divider = 1,
}; };
...@@ -740,8 +740,8 @@ static struct dpll_data dpll_mpu_dd = { ...@@ -740,8 +740,8 @@ static struct dpll_data dpll_mpu_dd = {
.enable_mask = OMAP4430_DPLL_EN_MASK, .enable_mask = OMAP4430_DPLL_EN_MASK,
.autoidle_mask = OMAP4430_AUTO_DPLL_MODE_MASK, .autoidle_mask = OMAP4430_AUTO_DPLL_MODE_MASK,
.idlest_mask = OMAP4430_ST_DPLL_CLK_MASK, .idlest_mask = OMAP4430_ST_DPLL_CLK_MASK,
.max_multiplier = OMAP4430_MAX_DPLL_MULT, .max_multiplier = 2047,
.max_divider = OMAP4430_MAX_DPLL_DIV, .max_divider = 128,
.min_divider = 1, .min_divider = 1,
}; };
...@@ -813,8 +813,8 @@ static struct dpll_data dpll_per_dd = { ...@@ -813,8 +813,8 @@ static struct dpll_data dpll_per_dd = {
.enable_mask = OMAP4430_DPLL_EN_MASK, .enable_mask = OMAP4430_DPLL_EN_MASK,
.autoidle_mask = OMAP4430_AUTO_DPLL_MODE_MASK, .autoidle_mask = OMAP4430_AUTO_DPLL_MODE_MASK,
.idlest_mask = OMAP4430_ST_DPLL_CLK_MASK, .idlest_mask = OMAP4430_ST_DPLL_CLK_MASK,
.max_multiplier = OMAP4430_MAX_DPLL_MULT, .max_multiplier = 2047,
.max_divider = OMAP4430_MAX_DPLL_DIV, .max_divider = 128,
.min_divider = 1, .min_divider = 1,
}; };
...@@ -850,10 +850,10 @@ static struct clk dpll_per_m2_ck = { ...@@ -850,10 +850,10 @@ static struct clk dpll_per_m2_ck = {
static struct clk dpll_per_x2_ck = { static struct clk dpll_per_x2_ck = {
.name = "dpll_per_x2_ck", .name = "dpll_per_x2_ck",
.parent = &dpll_per_ck, .parent = &dpll_per_ck,
.clksel_reg = OMAP4430_CM_DIV_M2_DPLL_PER,
.flags = CLOCK_CLKOUTX2, .flags = CLOCK_CLKOUTX2,
.ops = &clkops_omap4_dpllmx_ops, .ops = &clkops_omap4_dpllmx_ops,
.recalc = &omap3_clkoutx2_recalc, .recalc = &omap3_clkoutx2_recalc,
.clksel_reg = OMAP4430_CM_DIV_M2_DPLL_PER,
}; };
static const struct clksel dpll_per_m2x2_div[] = { static const struct clksel dpll_per_m2x2_div[] = {
...@@ -880,11 +880,11 @@ static struct clk dpll_per_m3x2_ck = { ...@@ -880,11 +880,11 @@ static struct clk dpll_per_m3x2_ck = {
.clksel_reg = OMAP4430_CM_DIV_M3_DPLL_PER, .clksel_reg = OMAP4430_CM_DIV_M3_DPLL_PER,
.clksel_mask = OMAP4430_DPLL_CLKOUTHIF_DIV_MASK, .clksel_mask = OMAP4430_DPLL_CLKOUTHIF_DIV_MASK,
.ops = &clkops_omap2_dflt, .ops = &clkops_omap2_dflt,
.enable_reg = OMAP4430_CM_DIV_M3_DPLL_PER,
.enable_bit = OMAP4430_DPLL_CLKOUTHIF_GATE_CTRL_SHIFT,
.recalc = &omap2_clksel_recalc, .recalc = &omap2_clksel_recalc,
.round_rate = &omap2_clksel_round_rate, .round_rate = &omap2_clksel_round_rate,
.set_rate = &omap2_clksel_set_rate, .set_rate = &omap2_clksel_set_rate,
.enable_reg = OMAP4430_CM_DIV_M3_DPLL_PER,
.enable_bit = OMAP4430_DPLL_CLKOUTHIF_GATE_CTRL_SHIFT,
}; };
static struct clk dpll_per_m4x2_ck = { static struct clk dpll_per_m4x2_ck = {
...@@ -935,63 +935,6 @@ static struct clk dpll_per_m7x2_ck = { ...@@ -935,63 +935,6 @@ static struct clk dpll_per_m7x2_ck = {
.set_rate = &omap2_clksel_set_rate, .set_rate = &omap2_clksel_set_rate,
}; };
/* DPLL_UNIPRO */
static struct dpll_data dpll_unipro_dd = {
.mult_div1_reg = OMAP4430_CM_CLKSEL_DPLL_UNIPRO,
.clk_bypass = &sys_clkin_ck,
.clk_ref = &sys_clkin_ck,
.control_reg = OMAP4430_CM_CLKMODE_DPLL_UNIPRO,
.modes = (1 << DPLL_LOW_POWER_BYPASS) | (1 << DPLL_LOCKED),
.autoidle_reg = OMAP4430_CM_AUTOIDLE_DPLL_UNIPRO,
.idlest_reg = OMAP4430_CM_IDLEST_DPLL_UNIPRO,
.mult_mask = OMAP4430_DPLL_MULT_MASK,
.div1_mask = OMAP4430_DPLL_DIV_MASK,
.enable_mask = OMAP4430_DPLL_EN_MASK,
.autoidle_mask = OMAP4430_AUTO_DPLL_MODE_MASK,
.idlest_mask = OMAP4430_ST_DPLL_CLK_MASK,
.sddiv_mask = OMAP4430_DPLL_SD_DIV_MASK,
.max_multiplier = OMAP4430_MAX_DPLL_MULT,
.max_divider = OMAP4430_MAX_DPLL_DIV,
.min_divider = 1,
};
static struct clk dpll_unipro_ck = {
.name = "dpll_unipro_ck",
.parent = &sys_clkin_ck,
.dpll_data = &dpll_unipro_dd,
.init = &omap2_init_dpll_parent,
.ops = &clkops_omap3_noncore_dpll_ops,
.recalc = &omap3_dpll_recalc,
.round_rate = &omap2_dpll_round_rate,
.set_rate = &omap3_noncore_dpll_set_rate,
};
static struct clk dpll_unipro_x2_ck = {
.name = "dpll_unipro_x2_ck",
.parent = &dpll_unipro_ck,
.flags = CLOCK_CLKOUTX2,
.ops = &clkops_null,
.recalc = &omap3_clkoutx2_recalc,
};
static const struct clksel dpll_unipro_m2x2_div[] = {
{ .parent = &dpll_unipro_x2_ck, .rates = div31_1to31_rates },
{ .parent = NULL },
};
static struct clk dpll_unipro_m2x2_ck = {
.name = "dpll_unipro_m2x2_ck",
.parent = &dpll_unipro_x2_ck,
.clksel = dpll_unipro_m2x2_div,
.clksel_reg = OMAP4430_CM_DIV_M2_DPLL_UNIPRO,
.clksel_mask = OMAP4430_DPLL_CLKOUT_DIV_MASK,
.ops = &clkops_omap4_dpllmx_ops,
.recalc = &omap2_clksel_recalc,
.round_rate = &omap2_clksel_round_rate,
.set_rate = &omap2_clksel_set_rate,
};
static struct clk usb_hs_clk_div_ck = { static struct clk usb_hs_clk_div_ck = {
.name = "usb_hs_clk_div_ck", .name = "usb_hs_clk_div_ck",
.parent = &dpll_abe_m3x2_ck, .parent = &dpll_abe_m3x2_ck,
...@@ -1015,8 +958,9 @@ static struct dpll_data dpll_usb_dd = { ...@@ -1015,8 +958,9 @@ static struct dpll_data dpll_usb_dd = {
.enable_mask = OMAP4430_DPLL_EN_MASK, .enable_mask = OMAP4430_DPLL_EN_MASK,
.autoidle_mask = OMAP4430_AUTO_DPLL_MODE_MASK, .autoidle_mask = OMAP4430_AUTO_DPLL_MODE_MASK,
.idlest_mask = OMAP4430_ST_DPLL_CLK_MASK, .idlest_mask = OMAP4430_ST_DPLL_CLK_MASK,
.max_multiplier = OMAP4430_MAX_DPLL_MULT, .sddiv_mask = OMAP4430_DPLL_SD_DIV_MASK,
.max_divider = OMAP4430_MAX_DPLL_DIV, .max_multiplier = 4095,
.max_divider = 256,
.min_divider = 1, .min_divider = 1,
}; };
...@@ -1035,8 +979,8 @@ static struct clk dpll_usb_ck = { ...@@ -1035,8 +979,8 @@ static struct clk dpll_usb_ck = {
static struct clk dpll_usb_clkdcoldo_ck = { static struct clk dpll_usb_clkdcoldo_ck = {
.name = "dpll_usb_clkdcoldo_ck", .name = "dpll_usb_clkdcoldo_ck",
.parent = &dpll_usb_ck, .parent = &dpll_usb_ck,
.ops = &clkops_omap4_dpllmx_ops,
.clksel_reg = OMAP4430_CM_CLKDCOLDO_DPLL_USB, .clksel_reg = OMAP4430_CM_CLKDCOLDO_DPLL_USB,
.ops = &clkops_omap4_dpllmx_ops,
.recalc = &followparent_recalc, .recalc = &followparent_recalc,
}; };
...@@ -1169,19 +1113,6 @@ static struct clk func_96m_fclk = { ...@@ -1169,19 +1113,6 @@ static struct clk func_96m_fclk = {
.set_rate = &omap2_clksel_set_rate, .set_rate = &omap2_clksel_set_rate,
}; };
static const struct clksel hsmmc6_fclk_sel[] = {
{ .parent = &func_64m_fclk, .rates = div_1_0_rates },
{ .parent = &func_96m_fclk, .rates = div_1_1_rates },
{ .parent = NULL },
};
static struct clk hsmmc6_fclk = {
.name = "hsmmc6_fclk",
.parent = &func_64m_fclk,
.ops = &clkops_null,
.recalc = &followparent_recalc,
};
static const struct clksel_rate div2_1to8_rates[] = { static const struct clksel_rate div2_1to8_rates[] = {
{ .div = 1, .val = 0, .flags = RATE_IN_4430 }, { .div = 1, .val = 0, .flags = RATE_IN_4430 },
{ .div = 8, .val = 1, .flags = RATE_IN_4430 }, { .div = 8, .val = 1, .flags = RATE_IN_4430 },
...@@ -1264,6 +1195,21 @@ static struct clk l4_wkup_clk_mux_ck = { ...@@ -1264,6 +1195,21 @@ static struct clk l4_wkup_clk_mux_ck = {
.recalc = &omap2_clksel_recalc, .recalc = &omap2_clksel_recalc,
}; };
static struct clk ocp_abe_iclk = {
.name = "ocp_abe_iclk",
.parent = &aess_fclk,
.ops = &clkops_null,
.recalc = &followparent_recalc,
};
static struct clk per_abe_24m_fclk = {
.name = "per_abe_24m_fclk",
.parent = &dpll_abe_m2_ck,
.ops = &clkops_null,
.fixed_div = 4,
.recalc = &omap_fixed_divisor_recalc,
};
static const struct clksel per_abe_nc_fclk_div[] = { static const struct clksel per_abe_nc_fclk_div[] = {
{ .parent = &dpll_abe_m2_ck, .rates = div2_1to2_rates }, { .parent = &dpll_abe_m2_ck, .rates = div2_1to2_rates },
{ .parent = NULL }, { .parent = NULL },
...@@ -1281,41 +1227,6 @@ static struct clk per_abe_nc_fclk = { ...@@ -1281,41 +1227,6 @@ static struct clk per_abe_nc_fclk = {
.set_rate = &omap2_clksel_set_rate, .set_rate = &omap2_clksel_set_rate,
}; };
static const struct clksel mcasp2_fclk_sel[] = {
{ .parent = &func_96m_fclk, .rates = div_1_0_rates },
{ .parent = &per_abe_nc_fclk, .rates = div_1_1_rates },
{ .parent = NULL },
};
static struct clk mcasp2_fclk = {
.name = "mcasp2_fclk",
.parent = &func_96m_fclk,
.ops = &clkops_null,
.recalc = &followparent_recalc,
};
static struct clk mcasp3_fclk = {
.name = "mcasp3_fclk",
.parent = &func_96m_fclk,
.ops = &clkops_null,
.recalc = &followparent_recalc,
};
static struct clk ocp_abe_iclk = {
.name = "ocp_abe_iclk",
.parent = &aess_fclk,
.ops = &clkops_null,
.recalc = &followparent_recalc,
};
static struct clk per_abe_24m_fclk = {
.name = "per_abe_24m_fclk",
.parent = &dpll_abe_m2_ck,
.ops = &clkops_null,
.fixed_div = 4,
.recalc = &omap_fixed_divisor_recalc,
};
static const struct clksel pmd_stm_clock_mux_sel[] = { static const struct clksel pmd_stm_clock_mux_sel[] = {
{ .parent = &sys_clkin_ck, .rates = div_1_0_rates }, { .parent = &sys_clkin_ck, .rates = div_1_0_rates },
{ .parent = &dpll_core_m6x2_ck, .rates = div_1_1_rates }, { .parent = &dpll_core_m6x2_ck, .rates = div_1_1_rates },
...@@ -1694,6 +1605,7 @@ static struct clk gpmc_ick = { ...@@ -1694,6 +1605,7 @@ static struct clk gpmc_ick = {
.ops = &clkops_omap2_dflt, .ops = &clkops_omap2_dflt,
.enable_reg = OMAP4430_CM_L3_2_GPMC_CLKCTRL, .enable_reg = OMAP4430_CM_L3_2_GPMC_CLKCTRL,
.enable_bit = OMAP4430_MODULEMODE_HWCTRL, .enable_bit = OMAP4430_MODULEMODE_HWCTRL,
.flags = ENABLE_ON_INIT,
.clkdm_name = "l3_2_clkdm", .clkdm_name = "l3_2_clkdm",
.parent = &l3_div_ck, .parent = &l3_div_ck,
.recalc = &followparent_recalc, .recalc = &followparent_recalc,
...@@ -1846,8 +1758,8 @@ static struct clk l3_instr_ick = { ...@@ -1846,8 +1758,8 @@ static struct clk l3_instr_ick = {
.ops = &clkops_omap2_dflt, .ops = &clkops_omap2_dflt,
.enable_reg = OMAP4430_CM_L3INSTR_L3_INSTR_CLKCTRL, .enable_reg = OMAP4430_CM_L3INSTR_L3_INSTR_CLKCTRL,
.enable_bit = OMAP4430_MODULEMODE_HWCTRL, .enable_bit = OMAP4430_MODULEMODE_HWCTRL,
.clkdm_name = "l3_instr_clkdm",
.flags = ENABLE_ON_INIT, .flags = ENABLE_ON_INIT,
.clkdm_name = "l3_instr_clkdm",
.parent = &l3_div_ck, .parent = &l3_div_ck,
.recalc = &followparent_recalc, .recalc = &followparent_recalc,
}; };
...@@ -1857,8 +1769,8 @@ static struct clk l3_main_3_ick = { ...@@ -1857,8 +1769,8 @@ static struct clk l3_main_3_ick = {
.ops = &clkops_omap2_dflt, .ops = &clkops_omap2_dflt,
.enable_reg = OMAP4430_CM_L3INSTR_L3_3_CLKCTRL, .enable_reg = OMAP4430_CM_L3INSTR_L3_3_CLKCTRL,
.enable_bit = OMAP4430_MODULEMODE_HWCTRL, .enable_bit = OMAP4430_MODULEMODE_HWCTRL,
.clkdm_name = "l3_instr_clkdm",
.flags = ENABLE_ON_INIT, .flags = ENABLE_ON_INIT,
.clkdm_name = "l3_instr_clkdm",
.parent = &l3_div_ck, .parent = &l3_div_ck,
.recalc = &followparent_recalc, .recalc = &followparent_recalc,
}; };
...@@ -1995,10 +1907,16 @@ static struct clk mcbsp3_fck = { ...@@ -1995,10 +1907,16 @@ static struct clk mcbsp3_fck = {
.clkdm_name = "abe_clkdm", .clkdm_name = "abe_clkdm",
}; };
static const struct clksel mcbsp4_sync_mux_sel[] = {
{ .parent = &func_96m_fclk, .rates = div_1_0_rates },
{ .parent = &per_abe_nc_fclk, .rates = div_1_1_rates },
{ .parent = NULL },
};
static struct clk mcbsp4_sync_mux_ck = { static struct clk mcbsp4_sync_mux_ck = {
.name = "mcbsp4_sync_mux_ck", .name = "mcbsp4_sync_mux_ck",
.parent = &func_96m_fclk, .parent = &func_96m_fclk,
.clksel = mcasp2_fclk_sel, .clksel = mcbsp4_sync_mux_sel,
.init = &omap2_init_clksel_parent, .init = &omap2_init_clksel_parent,
.clksel_reg = OMAP4430_CM_L4PER_MCBSP4_CLKCTRL, .clksel_reg = OMAP4430_CM_L4PER_MCBSP4_CLKCTRL,
.clksel_mask = OMAP4430_CLKSEL_INTERNAL_SOURCE_MASK, .clksel_mask = OMAP4430_CLKSEL_INTERNAL_SOURCE_MASK,
...@@ -2077,11 +1995,17 @@ static struct clk mcspi4_fck = { ...@@ -2077,11 +1995,17 @@ static struct clk mcspi4_fck = {
.recalc = &followparent_recalc, .recalc = &followparent_recalc,
}; };
static const struct clksel hsmmc1_fclk_sel[] = {
{ .parent = &func_64m_fclk, .rates = div_1_0_rates },
{ .parent = &func_96m_fclk, .rates = div_1_1_rates },
{ .parent = NULL },
};
/* Merged hsmmc1_fclk into mmc1 */ /* Merged hsmmc1_fclk into mmc1 */
static struct clk mmc1_fck = { static struct clk mmc1_fck = {
.name = "mmc1_fck", .name = "mmc1_fck",
.parent = &func_64m_fclk, .parent = &func_64m_fclk,
.clksel = hsmmc6_fclk_sel, .clksel = hsmmc1_fclk_sel,
.init = &omap2_init_clksel_parent, .init = &omap2_init_clksel_parent,
.clksel_reg = OMAP4430_CM_L3INIT_MMC1_CLKCTRL, .clksel_reg = OMAP4430_CM_L3INIT_MMC1_CLKCTRL,
.clksel_mask = OMAP4430_CLKSEL_MASK, .clksel_mask = OMAP4430_CLKSEL_MASK,
...@@ -2096,7 +2020,7 @@ static struct clk mmc1_fck = { ...@@ -2096,7 +2020,7 @@ static struct clk mmc1_fck = {
static struct clk mmc2_fck = { static struct clk mmc2_fck = {
.name = "mmc2_fck", .name = "mmc2_fck",
.parent = &func_64m_fclk, .parent = &func_64m_fclk,
.clksel = hsmmc6_fclk_sel, .clksel = hsmmc1_fclk_sel,
.init = &omap2_init_clksel_parent, .init = &omap2_init_clksel_parent,
.clksel_reg = OMAP4430_CM_L3INIT_MMC2_CLKCTRL, .clksel_reg = OMAP4430_CM_L3INIT_MMC2_CLKCTRL,
.clksel_mask = OMAP4430_CLKSEL_MASK, .clksel_mask = OMAP4430_CLKSEL_MASK,
...@@ -2162,8 +2086,8 @@ static struct clk ocp_wp_noc_ick = { ...@@ -2162,8 +2086,8 @@ static struct clk ocp_wp_noc_ick = {
.ops = &clkops_omap2_dflt, .ops = &clkops_omap2_dflt,
.enable_reg = OMAP4430_CM_L3INSTR_OCP_WP1_CLKCTRL, .enable_reg = OMAP4430_CM_L3INSTR_OCP_WP1_CLKCTRL,
.enable_bit = OMAP4430_MODULEMODE_HWCTRL, .enable_bit = OMAP4430_MODULEMODE_HWCTRL,
.clkdm_name = "l3_instr_clkdm",
.flags = ENABLE_ON_INIT, .flags = ENABLE_ON_INIT,
.clkdm_name = "l3_instr_clkdm",
.parent = &l3_div_ck, .parent = &l3_div_ck,
.recalc = &followparent_recalc, .recalc = &followparent_recalc,
}; };
...@@ -2895,6 +2819,7 @@ static struct clk auxclk2_ck = { ...@@ -2895,6 +2819,7 @@ static struct clk auxclk2_ck = {
.enable_reg = OMAP4_SCRM_AUXCLK2, .enable_reg = OMAP4_SCRM_AUXCLK2,
.enable_bit = OMAP4_ENABLE_SHIFT, .enable_bit = OMAP4_ENABLE_SHIFT,
}; };
static struct clk auxclk3_ck = { static struct clk auxclk3_ck = {
.name = "auxclk3_ck", .name = "auxclk3_ck",
.parent = &sys_clkin_ck, .parent = &sys_clkin_ck,
...@@ -3077,9 +3002,6 @@ static struct omap_clk omap44xx_clks[] = { ...@@ -3077,9 +3002,6 @@ static struct omap_clk omap44xx_clks[] = {
CLK(NULL, "dpll_per_m5x2_ck", &dpll_per_m5x2_ck, CK_443X), CLK(NULL, "dpll_per_m5x2_ck", &dpll_per_m5x2_ck, CK_443X),
CLK(NULL, "dpll_per_m6x2_ck", &dpll_per_m6x2_ck, CK_443X), CLK(NULL, "dpll_per_m6x2_ck", &dpll_per_m6x2_ck, CK_443X),
CLK(NULL, "dpll_per_m7x2_ck", &dpll_per_m7x2_ck, CK_443X), CLK(NULL, "dpll_per_m7x2_ck", &dpll_per_m7x2_ck, CK_443X),
CLK(NULL, "dpll_unipro_ck", &dpll_unipro_ck, CK_443X),
CLK(NULL, "dpll_unipro_x2_ck", &dpll_unipro_x2_ck, CK_443X),
CLK(NULL, "dpll_unipro_m2x2_ck", &dpll_unipro_m2x2_ck, CK_443X),
CLK(NULL, "usb_hs_clk_div_ck", &usb_hs_clk_div_ck, CK_443X), CLK(NULL, "usb_hs_clk_div_ck", &usb_hs_clk_div_ck, CK_443X),
CLK(NULL, "dpll_usb_ck", &dpll_usb_ck, CK_443X), CLK(NULL, "dpll_usb_ck", &dpll_usb_ck, CK_443X),
CLK(NULL, "dpll_usb_clkdcoldo_ck", &dpll_usb_clkdcoldo_ck, CK_443X), CLK(NULL, "dpll_usb_clkdcoldo_ck", &dpll_usb_clkdcoldo_ck, CK_443X),
...@@ -3092,17 +3014,14 @@ static struct omap_clk omap44xx_clks[] = { ...@@ -3092,17 +3014,14 @@ static struct omap_clk omap44xx_clks[] = {
CLK(NULL, "func_48mc_fclk", &func_48mc_fclk, CK_443X), CLK(NULL, "func_48mc_fclk", &func_48mc_fclk, CK_443X),
CLK(NULL, "func_64m_fclk", &func_64m_fclk, CK_443X), CLK(NULL, "func_64m_fclk", &func_64m_fclk, CK_443X),
CLK(NULL, "func_96m_fclk", &func_96m_fclk, CK_443X), CLK(NULL, "func_96m_fclk", &func_96m_fclk, CK_443X),
CLK(NULL, "hsmmc6_fclk", &hsmmc6_fclk, CK_443X),
CLK(NULL, "init_60m_fclk", &init_60m_fclk, CK_443X), CLK(NULL, "init_60m_fclk", &init_60m_fclk, CK_443X),
CLK(NULL, "l3_div_ck", &l3_div_ck, CK_443X), CLK(NULL, "l3_div_ck", &l3_div_ck, CK_443X),
CLK(NULL, "l4_div_ck", &l4_div_ck, CK_443X), CLK(NULL, "l4_div_ck", &l4_div_ck, CK_443X),
CLK(NULL, "lp_clk_div_ck", &lp_clk_div_ck, CK_443X), CLK(NULL, "lp_clk_div_ck", &lp_clk_div_ck, CK_443X),
CLK(NULL, "l4_wkup_clk_mux_ck", &l4_wkup_clk_mux_ck, CK_443X), CLK(NULL, "l4_wkup_clk_mux_ck", &l4_wkup_clk_mux_ck, CK_443X),
CLK(NULL, "per_abe_nc_fclk", &per_abe_nc_fclk, CK_443X),
CLK(NULL, "mcasp2_fclk", &mcasp2_fclk, CK_443X),
CLK(NULL, "mcasp3_fclk", &mcasp3_fclk, CK_443X),
CLK(NULL, "ocp_abe_iclk", &ocp_abe_iclk, CK_443X), CLK(NULL, "ocp_abe_iclk", &ocp_abe_iclk, CK_443X),
CLK(NULL, "per_abe_24m_fclk", &per_abe_24m_fclk, CK_443X), CLK(NULL, "per_abe_24m_fclk", &per_abe_24m_fclk, CK_443X),
CLK(NULL, "per_abe_nc_fclk", &per_abe_nc_fclk, CK_443X),
CLK(NULL, "pmd_stm_clock_mux_ck", &pmd_stm_clock_mux_ck, CK_443X), CLK(NULL, "pmd_stm_clock_mux_ck", &pmd_stm_clock_mux_ck, CK_443X),
CLK(NULL, "pmd_trace_clk_mux_ck", &pmd_trace_clk_mux_ck, CK_443X), CLK(NULL, "pmd_trace_clk_mux_ck", &pmd_trace_clk_mux_ck, CK_443X),
CLK(NULL, "syc_clk_div_ck", &syc_clk_div_ck, CK_443X), CLK(NULL, "syc_clk_div_ck", &syc_clk_div_ck, CK_443X),
...@@ -3114,10 +3033,10 @@ static struct omap_clk omap44xx_clks[] = { ...@@ -3114,10 +3033,10 @@ static struct omap_clk omap44xx_clks[] = {
CLK(NULL, "dmic_sync_mux_ck", &dmic_sync_mux_ck, CK_443X), CLK(NULL, "dmic_sync_mux_ck", &dmic_sync_mux_ck, CK_443X),
CLK(NULL, "dmic_fck", &dmic_fck, CK_443X), CLK(NULL, "dmic_fck", &dmic_fck, CK_443X),
CLK(NULL, "dsp_fck", &dsp_fck, CK_443X), CLK(NULL, "dsp_fck", &dsp_fck, CK_443X),
CLK("omapdss_dss", "sys_clk", &dss_sys_clk, CK_443X), CLK(NULL, "dss_sys_clk", &dss_sys_clk, CK_443X),
CLK("omapdss_dss", "tv_clk", &dss_tv_clk, CK_443X), CLK(NULL, "dss_tv_clk", &dss_tv_clk, CK_443X),
CLK("omapdss_dss", "video_clk", &dss_48mhz_clk, CK_443X), CLK(NULL, "dss_48mhz_clk", &dss_48mhz_clk, CK_443X),
CLK("omapdss_dss", "fck", &dss_dss_clk, CK_443X), CLK(NULL, "dss_dss_clk", &dss_dss_clk, CK_443X),
CLK("omapdss_dss", "ick", &dss_fck, CK_443X), CLK("omapdss_dss", "ick", &dss_fck, CK_443X),
CLK(NULL, "efuse_ctrl_cust_fck", &efuse_ctrl_cust_fck, CK_443X), CLK(NULL, "efuse_ctrl_cust_fck", &efuse_ctrl_cust_fck, CK_443X),
CLK(NULL, "emif1_fck", &emif1_fck, CK_443X), CLK(NULL, "emif1_fck", &emif1_fck, CK_443X),
...@@ -3204,7 +3123,6 @@ static struct omap_clk omap44xx_clks[] = { ...@@ -3204,7 +3123,6 @@ static struct omap_clk omap44xx_clks[] = {
CLK(NULL, "uart2_fck", &uart2_fck, CK_443X), CLK(NULL, "uart2_fck", &uart2_fck, CK_443X),
CLK(NULL, "uart3_fck", &uart3_fck, CK_443X), CLK(NULL, "uart3_fck", &uart3_fck, CK_443X),
CLK(NULL, "uart4_fck", &uart4_fck, CK_443X), CLK(NULL, "uart4_fck", &uart4_fck, CK_443X),
CLK(NULL, "usb_host_fs_fck", &usb_host_fs_fck, CK_443X),
CLK("usbhs-omap.0", "fs_fck", &usb_host_fs_fck, CK_443X), CLK("usbhs-omap.0", "fs_fck", &usb_host_fs_fck, CK_443X),
CLK(NULL, "utmi_p1_gfclk", &utmi_p1_gfclk, CK_443X), CLK(NULL, "utmi_p1_gfclk", &utmi_p1_gfclk, CK_443X),
CLK(NULL, "usb_host_hs_utmi_p1_clk", &usb_host_hs_utmi_p1_clk, CK_443X), CLK(NULL, "usb_host_hs_utmi_p1_clk", &usb_host_hs_utmi_p1_clk, CK_443X),
...@@ -3216,9 +3134,7 @@ static struct omap_clk omap44xx_clks[] = { ...@@ -3216,9 +3134,7 @@ static struct omap_clk omap44xx_clks[] = {
CLK(NULL, "usb_host_hs_hsic60m_p2_clk", &usb_host_hs_hsic60m_p2_clk, CK_443X), CLK(NULL, "usb_host_hs_hsic60m_p2_clk", &usb_host_hs_hsic60m_p2_clk, CK_443X),
CLK(NULL, "usb_host_hs_hsic480m_p2_clk", &usb_host_hs_hsic480m_p2_clk, CK_443X), CLK(NULL, "usb_host_hs_hsic480m_p2_clk", &usb_host_hs_hsic480m_p2_clk, CK_443X),
CLK(NULL, "usb_host_hs_func48mclk", &usb_host_hs_func48mclk, CK_443X), CLK(NULL, "usb_host_hs_func48mclk", &usb_host_hs_func48mclk, CK_443X),
CLK(NULL, "usb_host_hs_fck", &usb_host_hs_fck, CK_443X),
CLK("usbhs-omap.0", "hs_fck", &usb_host_hs_fck, CK_443X), CLK("usbhs-omap.0", "hs_fck", &usb_host_hs_fck, CK_443X),
CLK("usbhs-omap.0", "usbhost_ick", &dummy_ck, CK_443X),
CLK(NULL, "otg_60m_gfclk", &otg_60m_gfclk, CK_443X), CLK(NULL, "otg_60m_gfclk", &otg_60m_gfclk, CK_443X),
CLK(NULL, "usb_otg_hs_xclk", &usb_otg_hs_xclk, CK_443X), CLK(NULL, "usb_otg_hs_xclk", &usb_otg_hs_xclk, CK_443X),
CLK("musb-omap2430", "ick", &usb_otg_hs_ick, CK_443X), CLK("musb-omap2430", "ick", &usb_otg_hs_ick, CK_443X),
...@@ -3226,17 +3142,26 @@ static struct omap_clk omap44xx_clks[] = { ...@@ -3226,17 +3142,26 @@ static struct omap_clk omap44xx_clks[] = {
CLK(NULL, "usb_tll_hs_usb_ch2_clk", &usb_tll_hs_usb_ch2_clk, CK_443X), CLK(NULL, "usb_tll_hs_usb_ch2_clk", &usb_tll_hs_usb_ch2_clk, CK_443X),
CLK(NULL, "usb_tll_hs_usb_ch0_clk", &usb_tll_hs_usb_ch0_clk, CK_443X), CLK(NULL, "usb_tll_hs_usb_ch0_clk", &usb_tll_hs_usb_ch0_clk, CK_443X),
CLK(NULL, "usb_tll_hs_usb_ch1_clk", &usb_tll_hs_usb_ch1_clk, CK_443X), CLK(NULL, "usb_tll_hs_usb_ch1_clk", &usb_tll_hs_usb_ch1_clk, CK_443X),
CLK(NULL, "usb_tll_hs_ick", &usb_tll_hs_ick, CK_443X),
CLK("usbhs-omap.0", "usbtll_ick", &usb_tll_hs_ick, CK_443X), CLK("usbhs-omap.0", "usbtll_ick", &usb_tll_hs_ick, CK_443X),
CLK("usbhs-omap.0", "usbtll_fck", &dummy_ck, CK_443X),
CLK(NULL, "usim_ck", &usim_ck, CK_443X), CLK(NULL, "usim_ck", &usim_ck, CK_443X),
CLK(NULL, "usim_fclk", &usim_fclk, CK_443X), CLK(NULL, "usim_fclk", &usim_fclk, CK_443X),
CLK(NULL, "usim_fck", &usim_fck, CK_443X), CLK(NULL, "usim_fck", &usim_fck, CK_443X),
CLK("omap_wdt", "fck", &wd_timer2_fck, CK_443X), CLK("omap_wdt", "fck", &wd_timer2_fck, CK_443X),
CLK(NULL, "mailboxes_ick", &dummy_ck, CK_443X),
CLK(NULL, "wd_timer3_fck", &wd_timer3_fck, CK_443X), CLK(NULL, "wd_timer3_fck", &wd_timer3_fck, CK_443X),
CLK(NULL, "stm_clk_div_ck", &stm_clk_div_ck, CK_443X), CLK(NULL, "stm_clk_div_ck", &stm_clk_div_ck, CK_443X),
CLK(NULL, "trace_clk_div_ck", &trace_clk_div_ck, CK_443X), CLK(NULL, "trace_clk_div_ck", &trace_clk_div_ck, CK_443X),
CLK(NULL, "auxclk0_ck", &auxclk0_ck, CK_443X),
CLK(NULL, "auxclk1_ck", &auxclk1_ck, CK_443X),
CLK(NULL, "auxclk2_ck", &auxclk2_ck, CK_443X),
CLK(NULL, "auxclk3_ck", &auxclk3_ck, CK_443X),
CLK(NULL, "auxclk4_ck", &auxclk4_ck, CK_443X),
CLK(NULL, "auxclk5_ck", &auxclk5_ck, CK_443X),
CLK(NULL, "auxclkreq0_ck", &auxclkreq0_ck, CK_443X),
CLK(NULL, "auxclkreq1_ck", &auxclkreq1_ck, CK_443X),
CLK(NULL, "auxclkreq2_ck", &auxclkreq2_ck, CK_443X),
CLK(NULL, "auxclkreq3_ck", &auxclkreq3_ck, CK_443X),
CLK(NULL, "auxclkreq4_ck", &auxclkreq4_ck, CK_443X),
CLK(NULL, "auxclkreq5_ck", &auxclkreq5_ck, CK_443X),
CLK(NULL, "gpmc_ck", &dummy_ck, CK_443X), CLK(NULL, "gpmc_ck", &dummy_ck, CK_443X),
CLK(NULL, "gpt1_ick", &dummy_ck, CK_443X), CLK(NULL, "gpt1_ick", &dummy_ck, CK_443X),
CLK(NULL, "gpt2_ick", &dummy_ck, CK_443X), CLK(NULL, "gpt2_ick", &dummy_ck, CK_443X),
...@@ -3253,6 +3178,7 @@ static struct omap_clk omap44xx_clks[] = { ...@@ -3253,6 +3178,7 @@ static struct omap_clk omap44xx_clks[] = {
CLK("omap_i2c.2", "ick", &dummy_ck, CK_443X), CLK("omap_i2c.2", "ick", &dummy_ck, CK_443X),
CLK("omap_i2c.3", "ick", &dummy_ck, CK_443X), CLK("omap_i2c.3", "ick", &dummy_ck, CK_443X),
CLK("omap_i2c.4", "ick", &dummy_ck, CK_443X), CLK("omap_i2c.4", "ick", &dummy_ck, CK_443X),
CLK(NULL, "mailboxes_ick", &dummy_ck, CK_443X),
CLK("omap_hsmmc.0", "ick", &dummy_ck, CK_443X), CLK("omap_hsmmc.0", "ick", &dummy_ck, CK_443X),
CLK("omap_hsmmc.1", "ick", &dummy_ck, CK_443X), CLK("omap_hsmmc.1", "ick", &dummy_ck, CK_443X),
CLK("omap_hsmmc.2", "ick", &dummy_ck, CK_443X), CLK("omap_hsmmc.2", "ick", &dummy_ck, CK_443X),
...@@ -3270,19 +3196,9 @@ static struct omap_clk omap44xx_clks[] = { ...@@ -3270,19 +3196,9 @@ static struct omap_clk omap44xx_clks[] = {
CLK(NULL, "uart2_ick", &dummy_ck, CK_443X), CLK(NULL, "uart2_ick", &dummy_ck, CK_443X),
CLK(NULL, "uart3_ick", &dummy_ck, CK_443X), CLK(NULL, "uart3_ick", &dummy_ck, CK_443X),
CLK(NULL, "uart4_ick", &dummy_ck, CK_443X), CLK(NULL, "uart4_ick", &dummy_ck, CK_443X),
CLK("usbhs-omap.0", "usbhost_ick", &dummy_ck, CK_443X),
CLK("usbhs-omap.0", "usbtll_fck", &dummy_ck, CK_443X),
CLK("omap_wdt", "ick", &dummy_ck, CK_443X), CLK("omap_wdt", "ick", &dummy_ck, CK_443X),
CLK(NULL, "auxclk0_ck", &auxclk0_ck, CK_443X),
CLK(NULL, "auxclk1_ck", &auxclk1_ck, CK_443X),
CLK(NULL, "auxclk2_ck", &auxclk2_ck, CK_443X),
CLK(NULL, "auxclk3_ck", &auxclk3_ck, CK_443X),
CLK(NULL, "auxclk4_ck", &auxclk4_ck, CK_443X),
CLK(NULL, "auxclk5_ck", &auxclk5_ck, CK_443X),
CLK(NULL, "auxclkreq0_ck", &auxclkreq0_ck, CK_443X),
CLK(NULL, "auxclkreq1_ck", &auxclkreq1_ck, CK_443X),
CLK(NULL, "auxclkreq2_ck", &auxclkreq2_ck, CK_443X),
CLK(NULL, "auxclkreq3_ck", &auxclkreq3_ck, CK_443X),
CLK(NULL, "auxclkreq4_ck", &auxclkreq4_ck, CK_443X),
CLK(NULL, "auxclkreq5_ck", &auxclkreq5_ck, CK_443X),
}; };
int __init omap4xxx_clk_init(void) int __init omap4xxx_clk_init(void)
......
/* /*
* OMAP4 Clock domains framework * OMAP4 Clock domains framework
* *
* Copyright (C) 2009 Texas Instruments, Inc. * Copyright (C) 2009-2011 Texas Instruments, Inc.
* Copyright (C) 2009 Nokia Corporation * Copyright (C) 2009-2011 Nokia Corporation
* *
* Abhijit Pagare (abhijitpagare@ti.com) * Abhijit Pagare (abhijitpagare@ti.com)
* Benoit Cousson (b-cousson@ti.com) * Benoit Cousson (b-cousson@ti.com)
* Paul Walmsley (paul@pwsan.com)
* *
* This file is automatically generated from the OMAP hardware databases. * This file is automatically generated from the OMAP hardware databases.
* We respectfully ask that any modifications to this file be coordinated * We respectfully ask that any modifications to this file be coordinated
...@@ -32,7 +33,7 @@ ...@@ -32,7 +33,7 @@
/* Static Dependencies for OMAP4 Clock Domains */ /* Static Dependencies for OMAP4 Clock Domains */
static struct clkdm_dep ducati_wkup_sleep_deps[] = { static struct clkdm_dep d2d_wkup_sleep_deps[] = {
{ {
.clkdm_name = "abe_clkdm", .clkdm_name = "abe_clkdm",
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
...@@ -50,103 +51,103 @@ static struct clkdm_dep ducati_wkup_sleep_deps[] = { ...@@ -50,103 +51,103 @@ static struct clkdm_dep ducati_wkup_sleep_deps[] = {
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
}, },
{ {
.clkdm_name = "l3_dss_clkdm", .clkdm_name = "l3_emif_clkdm",
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
}, },
{ {
.clkdm_name = "l3_emif_clkdm", .clkdm_name = "l3_init_clkdm",
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
}, },
{ {
.clkdm_name = "l3_gfx_clkdm", .clkdm_name = "l4_cfg_clkdm",
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
}, },
{ {
.clkdm_name = "l3_init_clkdm", .clkdm_name = "l4_per_clkdm",
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
}, },
{ NULL },
};
static struct clkdm_dep ducati_wkup_sleep_deps[] = {
{ {
.clkdm_name = "l4_cfg_clkdm", .clkdm_name = "abe_clkdm",
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
}, },
{ {
.clkdm_name = "l4_per_clkdm", .clkdm_name = "ivahd_clkdm",
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
}, },
{ {
.clkdm_name = "l4_secure_clkdm", .clkdm_name = "l3_1_clkdm",
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
}, },
{ {
.clkdm_name = "l4_wkup_clkdm", .clkdm_name = "l3_2_clkdm",
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
}, },
{ {
.clkdm_name = "tesla_clkdm", .clkdm_name = "l3_dss_clkdm",
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
}, },
{ NULL },
};
static struct clkdm_dep iss_wkup_sleep_deps[] = {
{ {
.clkdm_name = "ivahd_clkdm", .clkdm_name = "l3_emif_clkdm",
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
}, },
{ {
.clkdm_name = "l3_1_clkdm", .clkdm_name = "l3_gfx_clkdm",
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
}, },
{ {
.clkdm_name = "l3_emif_clkdm", .clkdm_name = "l3_init_clkdm",
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
}, },
{ NULL },
};
static struct clkdm_dep ivahd_wkup_sleep_deps[] = {
{ {
.clkdm_name = "l3_1_clkdm", .clkdm_name = "l4_cfg_clkdm",
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
}, },
{ {
.clkdm_name = "l3_emif_clkdm", .clkdm_name = "l4_per_clkdm",
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
}, },
{ NULL },
};
static struct clkdm_dep l3_d2d_wkup_sleep_deps[] = {
{ {
.clkdm_name = "abe_clkdm", .clkdm_name = "l4_secure_clkdm",
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
}, },
{ {
.clkdm_name = "ivahd_clkdm", .clkdm_name = "l4_wkup_clkdm",
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
}, },
{ {
.clkdm_name = "l3_1_clkdm", .clkdm_name = "tesla_clkdm",
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
}, },
{ NULL },
};
static struct clkdm_dep iss_wkup_sleep_deps[] = {
{ {
.clkdm_name = "l3_2_clkdm", .clkdm_name = "ivahd_clkdm",
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
}, },
{ {
.clkdm_name = "l3_emif_clkdm", .clkdm_name = "l3_1_clkdm",
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
}, },
{ {
.clkdm_name = "l3_init_clkdm", .clkdm_name = "l3_emif_clkdm",
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
}, },
{ NULL },
};
static struct clkdm_dep ivahd_wkup_sleep_deps[] = {
{ {
.clkdm_name = "l4_cfg_clkdm", .clkdm_name = "l3_1_clkdm",
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
}, },
{ {
.clkdm_name = "l4_per_clkdm", .clkdm_name = "l3_emif_clkdm",
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
}, },
{ NULL }, { NULL },
...@@ -280,7 +281,7 @@ static struct clkdm_dep l4_secure_wkup_sleep_deps[] = { ...@@ -280,7 +281,7 @@ static struct clkdm_dep l4_secure_wkup_sleep_deps[] = {
{ NULL }, { NULL },
}; };
static struct clkdm_dep mpuss_wkup_sleep_deps[] = { static struct clkdm_dep mpu_wkup_sleep_deps[] = {
{ {
.clkdm_name = "abe_clkdm", .clkdm_name = "abe_clkdm",
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
...@@ -497,14 +498,14 @@ static struct clockdomain l3_init_44xx_clkdm = { ...@@ -497,14 +498,14 @@ static struct clockdomain l3_init_44xx_clkdm = {
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
}; };
static struct clockdomain mpuss_44xx_clkdm = { static struct clockdomain d2d_44xx_clkdm = {
.name = "mpuss_clkdm", .name = "d2d_clkdm",
.pwrdm = { .name = "mpu_pwrdm" }, .pwrdm = { .name = "core_pwrdm" },
.prcm_partition = OMAP4430_CM1_PARTITION, .prcm_partition = OMAP4430_CM2_PARTITION,
.cm_inst = OMAP4430_CM1_MPU_INST, .cm_inst = OMAP4430_CM2_CORE_INST,
.clkdm_offs = OMAP4430_CM1_MPU_MPU_CDOFFS, .clkdm_offs = OMAP4430_CM2_CORE_D2D_CDOFFS,
.wkdep_srcs = mpuss_wkup_sleep_deps, .wkdep_srcs = d2d_wkup_sleep_deps,
.sleepdep_srcs = mpuss_wkup_sleep_deps, .sleepdep_srcs = d2d_wkup_sleep_deps,
.flags = CLKDM_CAN_FORCE_WAKEUP | CLKDM_CAN_HWSUP, .flags = CLKDM_CAN_FORCE_WAKEUP | CLKDM_CAN_HWSUP,
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
}; };
...@@ -563,6 +564,18 @@ static struct clockdomain ducati_44xx_clkdm = { ...@@ -563,6 +564,18 @@ static struct clockdomain ducati_44xx_clkdm = {
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
}; };
static struct clockdomain mpu_44xx_clkdm = {
.name = "mpu_clkdm",
.pwrdm = { .name = "mpu_pwrdm" },
.prcm_partition = OMAP4430_CM1_PARTITION,
.cm_inst = OMAP4430_CM1_MPU_INST,
.clkdm_offs = OMAP4430_CM1_MPU_MPU_CDOFFS,
.wkdep_srcs = mpu_wkup_sleep_deps,
.sleepdep_srcs = mpu_wkup_sleep_deps,
.flags = CLKDM_CAN_FORCE_WAKEUP | CLKDM_CAN_HWSUP,
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
};
static struct clockdomain l3_2_44xx_clkdm = { static struct clockdomain l3_2_44xx_clkdm = {
.name = "l3_2_clkdm", .name = "l3_2_clkdm",
.pwrdm = { .name = "core_pwrdm" }, .pwrdm = { .name = "core_pwrdm" },
...@@ -585,18 +598,6 @@ static struct clockdomain l3_1_44xx_clkdm = { ...@@ -585,18 +598,6 @@ static struct clockdomain l3_1_44xx_clkdm = {
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
}; };
static struct clockdomain l3_d2d_44xx_clkdm = {
.name = "l3_d2d_clkdm",
.pwrdm = { .name = "core_pwrdm" },
.prcm_partition = OMAP4430_CM2_PARTITION,
.cm_inst = OMAP4430_CM2_CORE_INST,
.clkdm_offs = OMAP4430_CM2_CORE_D2D_CDOFFS,
.wkdep_srcs = l3_d2d_wkup_sleep_deps,
.sleepdep_srcs = l3_d2d_wkup_sleep_deps,
.flags = CLKDM_CAN_FORCE_WAKEUP | CLKDM_CAN_HWSUP,
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
};
static struct clockdomain iss_44xx_clkdm = { static struct clockdomain iss_44xx_clkdm = {
.name = "iss_clkdm", .name = "iss_clkdm",
.pwrdm = { .name = "cam_pwrdm" }, .pwrdm = { .name = "cam_pwrdm" },
...@@ -655,6 +656,7 @@ static struct clockdomain l3_dma_44xx_clkdm = { ...@@ -655,6 +656,7 @@ static struct clockdomain l3_dma_44xx_clkdm = {
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
}; };
/* As clockdomains are added or removed above, this list must also be changed */
static struct clockdomain *clockdomains_omap44xx[] __initdata = { static struct clockdomain *clockdomains_omap44xx[] __initdata = {
&l4_cefuse_44xx_clkdm, &l4_cefuse_44xx_clkdm,
&l4_cfg_44xx_clkdm, &l4_cfg_44xx_clkdm,
...@@ -666,21 +668,21 @@ static struct clockdomain *clockdomains_omap44xx[] __initdata = { ...@@ -666,21 +668,21 @@ static struct clockdomain *clockdomains_omap44xx[] __initdata = {
&abe_44xx_clkdm, &abe_44xx_clkdm,
&l3_instr_44xx_clkdm, &l3_instr_44xx_clkdm,
&l3_init_44xx_clkdm, &l3_init_44xx_clkdm,
&mpuss_44xx_clkdm, &d2d_44xx_clkdm,
&mpu0_44xx_clkdm, &mpu0_44xx_clkdm,
&mpu1_44xx_clkdm, &mpu1_44xx_clkdm,
&l3_emif_44xx_clkdm, &l3_emif_44xx_clkdm,
&l4_ao_44xx_clkdm, &l4_ao_44xx_clkdm,
&ducati_44xx_clkdm, &ducati_44xx_clkdm,
&mpu_44xx_clkdm,
&l3_2_44xx_clkdm, &l3_2_44xx_clkdm,
&l3_1_44xx_clkdm, &l3_1_44xx_clkdm,
&l3_d2d_44xx_clkdm,
&iss_44xx_clkdm, &iss_44xx_clkdm,
&l3_dss_44xx_clkdm, &l3_dss_44xx_clkdm,
&l4_wkup_44xx_clkdm, &l4_wkup_44xx_clkdm,
&emu_sys_44xx_clkdm, &emu_sys_44xx_clkdm,
&l3_dma_44xx_clkdm, &l3_dma_44xx_clkdm,
NULL, NULL
}; };
void __init omap44xx_clockdomains_init(void) void __init omap44xx_clockdomains_init(void)
......
/* /*
* OMAP44xx CM1 instance offset macros * OMAP44xx CM1 instance offset macros
* *
* Copyright (C) 2009-2010 Texas Instruments, Inc. * Copyright (C) 2009-2011 Texas Instruments, Inc.
* Copyright (C) 2009-2010 Nokia Corporation * Copyright (C) 2009-2010 Nokia Corporation
* *
* Paul Walmsley (paul@pwsan.com) * Paul Walmsley (paul@pwsan.com)
...@@ -41,9 +41,9 @@ ...@@ -41,9 +41,9 @@
#define OMAP4430_CM1_INSTR_INST 0x0f00 #define OMAP4430_CM1_INSTR_INST 0x0f00
/* CM1 clockdomain register offsets (from instance start) */ /* CM1 clockdomain register offsets (from instance start) */
#define OMAP4430_CM1_ABE_ABE_CDOFFS 0x0000
#define OMAP4430_CM1_MPU_MPU_CDOFFS 0x0000 #define OMAP4430_CM1_MPU_MPU_CDOFFS 0x0000
#define OMAP4430_CM1_TESLA_TESLA_CDOFFS 0x0000 #define OMAP4430_CM1_TESLA_TESLA_CDOFFS 0x0000
#define OMAP4430_CM1_ABE_ABE_CDOFFS 0x0000
/* CM1 */ /* CM1 */
...@@ -82,8 +82,8 @@ ...@@ -82,8 +82,8 @@
#define OMAP4430_CM_DIV_M7_DPLL_CORE OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x0044) #define OMAP4430_CM_DIV_M7_DPLL_CORE OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x0044)
#define OMAP4_CM_SSC_DELTAMSTEP_DPLL_CORE_OFFSET 0x0048 #define OMAP4_CM_SSC_DELTAMSTEP_DPLL_CORE_OFFSET 0x0048
#define OMAP4430_CM_SSC_DELTAMSTEP_DPLL_CORE OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x0048) #define OMAP4430_CM_SSC_DELTAMSTEP_DPLL_CORE OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x0048)
#define OMAP4_CM_SSC_INSTFREQDIV_DPLL_CORE_OFFSET 0x004c #define OMAP4_CM_SSC_MODFREQDIV_DPLL_CORE_OFFSET 0x004c
#define OMAP4430_CM_SSC_INSTFREQDIV_DPLL_CORE OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x004c) #define OMAP4430_CM_SSC_MODFREQDIV_DPLL_CORE OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x004c)
#define OMAP4_CM_EMU_OVERRIDE_DPLL_CORE_OFFSET 0x0050 #define OMAP4_CM_EMU_OVERRIDE_DPLL_CORE_OFFSET 0x0050
#define OMAP4430_CM_EMU_OVERRIDE_DPLL_CORE OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x0050) #define OMAP4430_CM_EMU_OVERRIDE_DPLL_CORE OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x0050)
#define OMAP4_CM_CLKMODE_DPLL_MPU_OFFSET 0x0060 #define OMAP4_CM_CLKMODE_DPLL_MPU_OFFSET 0x0060
...@@ -98,8 +98,8 @@ ...@@ -98,8 +98,8 @@
#define OMAP4430_CM_DIV_M2_DPLL_MPU OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x0070) #define OMAP4430_CM_DIV_M2_DPLL_MPU OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x0070)
#define OMAP4_CM_SSC_DELTAMSTEP_DPLL_MPU_OFFSET 0x0088 #define OMAP4_CM_SSC_DELTAMSTEP_DPLL_MPU_OFFSET 0x0088
#define OMAP4430_CM_SSC_DELTAMSTEP_DPLL_MPU OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x0088) #define OMAP4430_CM_SSC_DELTAMSTEP_DPLL_MPU OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x0088)
#define OMAP4_CM_SSC_INSTFREQDIV_DPLL_MPU_OFFSET 0x008c #define OMAP4_CM_SSC_MODFREQDIV_DPLL_MPU_OFFSET 0x008c
#define OMAP4430_CM_SSC_INSTFREQDIV_DPLL_MPU OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x008c) #define OMAP4430_CM_SSC_MODFREQDIV_DPLL_MPU OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x008c)
#define OMAP4_CM_BYPCLK_DPLL_MPU_OFFSET 0x009c #define OMAP4_CM_BYPCLK_DPLL_MPU_OFFSET 0x009c
#define OMAP4430_CM_BYPCLK_DPLL_MPU OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x009c) #define OMAP4430_CM_BYPCLK_DPLL_MPU OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x009c)
#define OMAP4_CM_CLKMODE_DPLL_IVA_OFFSET 0x00a0 #define OMAP4_CM_CLKMODE_DPLL_IVA_OFFSET 0x00a0
...@@ -116,8 +116,8 @@ ...@@ -116,8 +116,8 @@
#define OMAP4430_CM_DIV_M5_DPLL_IVA OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x00bc) #define OMAP4430_CM_DIV_M5_DPLL_IVA OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x00bc)
#define OMAP4_CM_SSC_DELTAMSTEP_DPLL_IVA_OFFSET 0x00c8 #define OMAP4_CM_SSC_DELTAMSTEP_DPLL_IVA_OFFSET 0x00c8
#define OMAP4430_CM_SSC_DELTAMSTEP_DPLL_IVA OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x00c8) #define OMAP4430_CM_SSC_DELTAMSTEP_DPLL_IVA OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x00c8)
#define OMAP4_CM_SSC_INSTFREQDIV_DPLL_IVA_OFFSET 0x00cc #define OMAP4_CM_SSC_MODFREQDIV_DPLL_IVA_OFFSET 0x00cc
#define OMAP4430_CM_SSC_INSTFREQDIV_DPLL_IVA OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x00cc) #define OMAP4430_CM_SSC_MODFREQDIV_DPLL_IVA OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x00cc)
#define OMAP4_CM_BYPCLK_DPLL_IVA_OFFSET 0x00dc #define OMAP4_CM_BYPCLK_DPLL_IVA_OFFSET 0x00dc
#define OMAP4430_CM_BYPCLK_DPLL_IVA OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x00dc) #define OMAP4430_CM_BYPCLK_DPLL_IVA OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x00dc)
#define OMAP4_CM_CLKMODE_DPLL_ABE_OFFSET 0x00e0 #define OMAP4_CM_CLKMODE_DPLL_ABE_OFFSET 0x00e0
...@@ -134,8 +134,8 @@ ...@@ -134,8 +134,8 @@
#define OMAP4430_CM_DIV_M3_DPLL_ABE OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x00f4) #define OMAP4430_CM_DIV_M3_DPLL_ABE OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x00f4)
#define OMAP4_CM_SSC_DELTAMSTEP_DPLL_ABE_OFFSET 0x0108 #define OMAP4_CM_SSC_DELTAMSTEP_DPLL_ABE_OFFSET 0x0108
#define OMAP4430_CM_SSC_DELTAMSTEP_DPLL_ABE OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x0108) #define OMAP4430_CM_SSC_DELTAMSTEP_DPLL_ABE OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x0108)
#define OMAP4_CM_SSC_INSTFREQDIV_DPLL_ABE_OFFSET 0x010c #define OMAP4_CM_SSC_MODFREQDIV_DPLL_ABE_OFFSET 0x010c
#define OMAP4430_CM_SSC_INSTFREQDIV_DPLL_ABE OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x010c) #define OMAP4430_CM_SSC_MODFREQDIV_DPLL_ABE OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x010c)
#define OMAP4_CM_CLKMODE_DPLL_DDRPHY_OFFSET 0x0120 #define OMAP4_CM_CLKMODE_DPLL_DDRPHY_OFFSET 0x0120
#define OMAP4430_CM_CLKMODE_DPLL_DDRPHY OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x0120) #define OMAP4430_CM_CLKMODE_DPLL_DDRPHY OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x0120)
#define OMAP4_CM_IDLEST_DPLL_DDRPHY_OFFSET 0x0124 #define OMAP4_CM_IDLEST_DPLL_DDRPHY_OFFSET 0x0124
...@@ -154,8 +154,8 @@ ...@@ -154,8 +154,8 @@
#define OMAP4430_CM_DIV_M6_DPLL_DDRPHY OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x0140) #define OMAP4430_CM_DIV_M6_DPLL_DDRPHY OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x0140)
#define OMAP4_CM_SSC_DELTAMSTEP_DPLL_DDRPHY_OFFSET 0x0148 #define OMAP4_CM_SSC_DELTAMSTEP_DPLL_DDRPHY_OFFSET 0x0148
#define OMAP4430_CM_SSC_DELTAMSTEP_DPLL_DDRPHY OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x0148) #define OMAP4430_CM_SSC_DELTAMSTEP_DPLL_DDRPHY OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x0148)
#define OMAP4_CM_SSC_INSTFREQDIV_DPLL_DDRPHY_OFFSET 0x014c #define OMAP4_CM_SSC_MODFREQDIV_DPLL_DDRPHY_OFFSET 0x014c
#define OMAP4430_CM_SSC_INSTFREQDIV_DPLL_DDRPHY OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x014c) #define OMAP4430_CM_SSC_MODFREQDIV_DPLL_DDRPHY OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x014c)
#define OMAP4_CM_SHADOW_FREQ_CONFIG1_OFFSET 0x0160 #define OMAP4_CM_SHADOW_FREQ_CONFIG1_OFFSET 0x0160
#define OMAP4430_CM_SHADOW_FREQ_CONFIG1 OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x0160) #define OMAP4430_CM_SHADOW_FREQ_CONFIG1 OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x0160)
#define OMAP4_CM_SHADOW_FREQ_CONFIG2_OFFSET 0x0164 #define OMAP4_CM_SHADOW_FREQ_CONFIG2_OFFSET 0x0164
...@@ -217,42 +217,6 @@ ...@@ -217,42 +217,6 @@
#define OMAP4_CM1_ABE_WDT3_CLKCTRL_OFFSET 0x0088 #define OMAP4_CM1_ABE_WDT3_CLKCTRL_OFFSET 0x0088
#define OMAP4430_CM1_ABE_WDT3_CLKCTRL OMAP44XX_CM1_REGADDR(OMAP4430_CM1_ABE_INST, 0x0088) #define OMAP4430_CM1_ABE_WDT3_CLKCTRL OMAP44XX_CM1_REGADDR(OMAP4430_CM1_ABE_INST, 0x0088)
/* CM1.RESTORE_CM1 register offsets */
#define OMAP4_CM_CLKSEL_CORE_RESTORE_OFFSET 0x0000
#define OMAP4430_CM_CLKSEL_CORE_RESTORE OMAP44XX_CM1_REGADDR(OMAP4430_CM1_RESTORE_INST, 0x0000)
#define OMAP4_CM_DIV_M2_DPLL_CORE_RESTORE_OFFSET 0x0004
#define OMAP4430_CM_DIV_M2_DPLL_CORE_RESTORE OMAP44XX_CM1_REGADDR(OMAP4430_CM1_RESTORE_INST, 0x0004)
#define OMAP4_CM_DIV_M3_DPLL_CORE_RESTORE_OFFSET 0x0008
#define OMAP4430_CM_DIV_M3_DPLL_CORE_RESTORE OMAP44XX_CM1_REGADDR(OMAP4430_CM1_RESTORE_INST, 0x0008)
#define OMAP4_CM_DIV_M4_DPLL_CORE_RESTORE_OFFSET 0x000c
#define OMAP4430_CM_DIV_M4_DPLL_CORE_RESTORE OMAP44XX_CM1_REGADDR(OMAP4430_CM1_RESTORE_INST, 0x000c)
#define OMAP4_CM_DIV_M5_DPLL_CORE_RESTORE_OFFSET 0x0010
#define OMAP4430_CM_DIV_M5_DPLL_CORE_RESTORE OMAP44XX_CM1_REGADDR(OMAP4430_CM1_RESTORE_INST, 0x0010)
#define OMAP4_CM_DIV_M6_DPLL_CORE_RESTORE_OFFSET 0x0014
#define OMAP4430_CM_DIV_M6_DPLL_CORE_RESTORE OMAP44XX_CM1_REGADDR(OMAP4430_CM1_RESTORE_INST, 0x0014)
#define OMAP4_CM_DIV_M7_DPLL_CORE_RESTORE_OFFSET 0x0018
#define OMAP4430_CM_DIV_M7_DPLL_CORE_RESTORE OMAP44XX_CM1_REGADDR(OMAP4430_CM1_RESTORE_INST, 0x0018)
#define OMAP4_CM_CLKSEL_DPLL_CORE_RESTORE_OFFSET 0x001c
#define OMAP4430_CM_CLKSEL_DPLL_CORE_RESTORE OMAP44XX_CM1_REGADDR(OMAP4430_CM1_RESTORE_INST, 0x001c)
#define OMAP4_CM_SSC_DELTAMSTEP_DPLL_CORE_RESTORE_OFFSET 0x0020
#define OMAP4430_CM_SSC_DELTAMSTEP_DPLL_CORE_RESTORE OMAP44XX_CM1_REGADDR(OMAP4430_CM1_RESTORE_INST, 0x0020)
#define OMAP4_CM_SSC_INSTFREQDIV_DPLL_CORE_RESTORE_OFFSET 0x0024
#define OMAP4430_CM_SSC_INSTFREQDIV_DPLL_CORE_RESTORE OMAP44XX_CM1_REGADDR(OMAP4430_CM1_RESTORE_INST, 0x0024)
#define OMAP4_CM_CLKMODE_DPLL_CORE_RESTORE_OFFSET 0x0028
#define OMAP4430_CM_CLKMODE_DPLL_CORE_RESTORE OMAP44XX_CM1_REGADDR(OMAP4430_CM1_RESTORE_INST, 0x0028)
#define OMAP4_CM_SHADOW_FREQ_CONFIG2_RESTORE_OFFSET 0x002c
#define OMAP4430_CM_SHADOW_FREQ_CONFIG2_RESTORE OMAP44XX_CM1_REGADDR(OMAP4430_CM1_RESTORE_INST, 0x002c)
#define OMAP4_CM_SHADOW_FREQ_CONFIG1_RESTORE_OFFSET 0x0030
#define OMAP4430_CM_SHADOW_FREQ_CONFIG1_RESTORE OMAP44XX_CM1_REGADDR(OMAP4430_CM1_RESTORE_INST, 0x0030)
#define OMAP4_CM_AUTOIDLE_DPLL_CORE_RESTORE_OFFSET 0x0034
#define OMAP4430_CM_AUTOIDLE_DPLL_CORE_RESTORE OMAP44XX_CM1_REGADDR(OMAP4430_CM1_RESTORE_INST, 0x0034)
#define OMAP4_CM_MPU_CLKSTCTRL_RESTORE_OFFSET 0x0038
#define OMAP4430_CM_MPU_CLKSTCTRL_RESTORE OMAP44XX_CM1_REGADDR(OMAP4430_CM1_RESTORE_INST, 0x0038)
#define OMAP4_CM_CM1_PROFILING_CLKCTRL_RESTORE_OFFSET 0x003c
#define OMAP4430_CM_CM1_PROFILING_CLKCTRL_RESTORE OMAP44XX_CM1_REGADDR(OMAP4430_CM1_RESTORE_INST, 0x003c)
#define OMAP4_CM_DYN_DEP_PRESCAL_RESTORE_OFFSET 0x0040
#define OMAP4430_CM_DYN_DEP_PRESCAL_RESTORE OMAP44XX_CM1_REGADDR(OMAP4430_CM1_RESTORE_INST, 0x0040)
/* Function prototypes */ /* Function prototypes */
extern u32 omap4_cm1_read_inst_reg(s16 inst, u16 idx); extern u32 omap4_cm1_read_inst_reg(s16 inst, u16 idx);
extern void omap4_cm1_write_inst_reg(u32 val, s16 inst, u16 idx); extern void omap4_cm1_write_inst_reg(u32 val, s16 inst, u16 idx);
......
/* /*
* OMAP44xx CM2 instance offset macros * OMAP44xx CM2 instance offset macros
* *
* Copyright (C) 2009-2010 Texas Instruments, Inc. * Copyright (C) 2009-2011 Texas Instruments, Inc.
* Copyright (C) 2009-2010 Nokia Corporation * Copyright (C) 2009-2010 Nokia Corporation
* *
* Paul Walmsley (paul@pwsan.com) * Paul Walmsley (paul@pwsan.com)
...@@ -65,7 +65,6 @@ ...@@ -65,7 +65,6 @@
#define OMAP4430_CM2_L4PER_L4SEC_CDOFFS 0x0180 #define OMAP4430_CM2_L4PER_L4SEC_CDOFFS 0x0180
#define OMAP4430_CM2_CEFUSE_CEFUSE_CDOFFS 0x0000 #define OMAP4430_CM2_CEFUSE_CEFUSE_CDOFFS 0x0000
/* CM2 */ /* CM2 */
/* CM2.OCP_SOCKET_CM2 register offsets */ /* CM2.OCP_SOCKET_CM2 register offsets */
...@@ -121,8 +120,8 @@ ...@@ -121,8 +120,8 @@
#define OMAP4430_CM_DIV_M7_DPLL_PER OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x0064) #define OMAP4430_CM_DIV_M7_DPLL_PER OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x0064)
#define OMAP4_CM_SSC_DELTAMSTEP_DPLL_PER_OFFSET 0x0068 #define OMAP4_CM_SSC_DELTAMSTEP_DPLL_PER_OFFSET 0x0068
#define OMAP4430_CM_SSC_DELTAMSTEP_DPLL_PER OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x0068) #define OMAP4430_CM_SSC_DELTAMSTEP_DPLL_PER OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x0068)
#define OMAP4_CM_SSC_INSTFREQDIV_DPLL_PER_OFFSET 0x006c #define OMAP4_CM_SSC_MODFREQDIV_DPLL_PER_OFFSET 0x006c
#define OMAP4430_CM_SSC_INSTFREQDIV_DPLL_PER OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x006c) #define OMAP4430_CM_SSC_MODFREQDIV_DPLL_PER OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x006c)
#define OMAP4_CM_CLKMODE_DPLL_USB_OFFSET 0x0080 #define OMAP4_CM_CLKMODE_DPLL_USB_OFFSET 0x0080
#define OMAP4430_CM_CLKMODE_DPLL_USB OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x0080) #define OMAP4430_CM_CLKMODE_DPLL_USB OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x0080)
#define OMAP4_CM_IDLEST_DPLL_USB_OFFSET 0x0084 #define OMAP4_CM_IDLEST_DPLL_USB_OFFSET 0x0084
...@@ -135,8 +134,8 @@ ...@@ -135,8 +134,8 @@
#define OMAP4430_CM_DIV_M2_DPLL_USB OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x0090) #define OMAP4430_CM_DIV_M2_DPLL_USB OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x0090)
#define OMAP4_CM_SSC_DELTAMSTEP_DPLL_USB_OFFSET 0x00a8 #define OMAP4_CM_SSC_DELTAMSTEP_DPLL_USB_OFFSET 0x00a8
#define OMAP4430_CM_SSC_DELTAMSTEP_DPLL_USB OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x00a8) #define OMAP4430_CM_SSC_DELTAMSTEP_DPLL_USB OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x00a8)
#define OMAP4_CM_SSC_INSTFREQDIV_DPLL_USB_OFFSET 0x00ac #define OMAP4_CM_SSC_MODFREQDIV_DPLL_USB_OFFSET 0x00ac
#define OMAP4430_CM_SSC_INSTFREQDIV_DPLL_USB OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x00ac) #define OMAP4430_CM_SSC_MODFREQDIV_DPLL_USB OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x00ac)
#define OMAP4_CM_CLKDCOLDO_DPLL_USB_OFFSET 0x00b4 #define OMAP4_CM_CLKDCOLDO_DPLL_USB_OFFSET 0x00b4
#define OMAP4430_CM_CLKDCOLDO_DPLL_USB OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x00b4) #define OMAP4430_CM_CLKDCOLDO_DPLL_USB OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x00b4)
#define OMAP4_CM_CLKMODE_DPLL_UNIPRO_OFFSET 0x00c0 #define OMAP4_CM_CLKMODE_DPLL_UNIPRO_OFFSET 0x00c0
...@@ -151,8 +150,8 @@ ...@@ -151,8 +150,8 @@
#define OMAP4430_CM_DIV_M2_DPLL_UNIPRO OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x00d0) #define OMAP4430_CM_DIV_M2_DPLL_UNIPRO OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x00d0)
#define OMAP4_CM_SSC_DELTAMSTEP_DPLL_UNIPRO_OFFSET 0x00e8 #define OMAP4_CM_SSC_DELTAMSTEP_DPLL_UNIPRO_OFFSET 0x00e8
#define OMAP4430_CM_SSC_DELTAMSTEP_DPLL_UNIPRO OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x00e8) #define OMAP4430_CM_SSC_DELTAMSTEP_DPLL_UNIPRO OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x00e8)
#define OMAP4_CM_SSC_INSTFREQDIV_DPLL_UNIPRO_OFFSET 0x00ec #define OMAP4_CM_SSC_MODFREQDIV_DPLL_UNIPRO_OFFSET 0x00ec
#define OMAP4430_CM_SSC_INSTFREQDIV_DPLL_UNIPRO OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x00ec) #define OMAP4430_CM_SSC_MODFREQDIV_DPLL_UNIPRO OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x00ec)
/* CM2.ALWAYS_ON_CM2 register offsets */ /* CM2.ALWAYS_ON_CM2 register offsets */
#define OMAP4_CM_ALWON_CLKSTCTRL_OFFSET 0x0000 #define OMAP4_CM_ALWON_CLKSTCTRL_OFFSET 0x0000
...@@ -227,8 +226,8 @@ ...@@ -227,8 +226,8 @@
#define OMAP4430_CM_D2D_DYNAMICDEP OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CORE_INST, 0x0508) #define OMAP4430_CM_D2D_DYNAMICDEP OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CORE_INST, 0x0508)
#define OMAP4_CM_D2D_SAD2D_CLKCTRL_OFFSET 0x0520 #define OMAP4_CM_D2D_SAD2D_CLKCTRL_OFFSET 0x0520
#define OMAP4430_CM_D2D_SAD2D_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CORE_INST, 0x0520) #define OMAP4430_CM_D2D_SAD2D_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CORE_INST, 0x0520)
#define OMAP4_CM_D2D_INSTEM_ICR_CLKCTRL_OFFSET 0x0528 #define OMAP4_CM_D2D_MODEM_ICR_CLKCTRL_OFFSET 0x0528
#define OMAP4430_CM_D2D_INSTEM_ICR_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CORE_INST, 0x0528) #define OMAP4430_CM_D2D_MODEM_ICR_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CORE_INST, 0x0528)
#define OMAP4_CM_D2D_SAD2D_FW_CLKCTRL_OFFSET 0x0530 #define OMAP4_CM_D2D_SAD2D_FW_CLKCTRL_OFFSET 0x0530
#define OMAP4430_CM_D2D_SAD2D_FW_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CORE_INST, 0x0530) #define OMAP4430_CM_D2D_SAD2D_FW_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CORE_INST, 0x0530)
#define OMAP4_CM_L4CFG_CLKSTCTRL_OFFSET 0x0600 #define OMAP4_CM_L4CFG_CLKSTCTRL_OFFSET 0x0600
...@@ -450,56 +449,6 @@ ...@@ -450,56 +449,6 @@
#define OMAP4_CM_CEFUSE_CEFUSE_CLKCTRL_OFFSET 0x0020 #define OMAP4_CM_CEFUSE_CEFUSE_CLKCTRL_OFFSET 0x0020
#define OMAP4430_CM_CEFUSE_CEFUSE_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CEFUSE_INST, 0x0020) #define OMAP4430_CM_CEFUSE_CEFUSE_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CEFUSE_INST, 0x0020)
/* CM2.RESTORE_CM2 register offsets */
#define OMAP4_CM_L3_1_CLKSTCTRL_RESTORE_OFFSET 0x0000
#define OMAP4430_CM_L3_1_CLKSTCTRL_RESTORE OMAP44XX_CM2_REGADDR(OMAP4430_CM2_RESTORE_INST, 0x0000)
#define OMAP4_CM_L3_2_CLKSTCTRL_RESTORE_OFFSET 0x0004
#define OMAP4430_CM_L3_2_CLKSTCTRL_RESTORE OMAP44XX_CM2_REGADDR(OMAP4430_CM2_RESTORE_INST, 0x0004)
#define OMAP4_CM_L4CFG_CLKSTCTRL_RESTORE_OFFSET 0x0008
#define OMAP4430_CM_L4CFG_CLKSTCTRL_RESTORE OMAP44XX_CM2_REGADDR(OMAP4430_CM2_RESTORE_INST, 0x0008)
#define OMAP4_CM_MEMIF_CLKSTCTRL_RESTORE_OFFSET 0x000c
#define OMAP4430_CM_MEMIF_CLKSTCTRL_RESTORE OMAP44XX_CM2_REGADDR(OMAP4430_CM2_RESTORE_INST, 0x000c)
#define OMAP4_CM_L4PER_CLKSTCTRL_RESTORE_OFFSET 0x0010
#define OMAP4430_CM_L4PER_CLKSTCTRL_RESTORE OMAP44XX_CM2_REGADDR(OMAP4430_CM2_RESTORE_INST, 0x0010)
#define OMAP4_CM_L3INIT_CLKSTCTRL_RESTORE_OFFSET 0x0014
#define OMAP4430_CM_L3INIT_CLKSTCTRL_RESTORE OMAP44XX_CM2_REGADDR(OMAP4430_CM2_RESTORE_INST, 0x0014)
#define OMAP4_CM_L3INSTR_L3_3_CLKCTRL_RESTORE_OFFSET 0x0018
#define OMAP4430_CM_L3INSTR_L3_3_CLKCTRL_RESTORE OMAP44XX_CM2_REGADDR(OMAP4430_CM2_RESTORE_INST, 0x0018)
#define OMAP4_CM_L3INSTR_L3_INSTR_CLKCTRL_RESTORE_OFFSET 0x001c
#define OMAP4430_CM_L3INSTR_L3_INSTR_CLKCTRL_RESTORE OMAP44XX_CM2_REGADDR(OMAP4430_CM2_RESTORE_INST, 0x001c)
#define OMAP4_CM_L3INSTR_OCP_WP1_CLKCTRL_RESTORE_OFFSET 0x0020
#define OMAP4430_CM_L3INSTR_OCP_WP1_CLKCTRL_RESTORE OMAP44XX_CM2_REGADDR(OMAP4430_CM2_RESTORE_INST, 0x0020)
#define OMAP4_CM_CM2_PROFILING_CLKCTRL_RESTORE_OFFSET 0x0024
#define OMAP4430_CM_CM2_PROFILING_CLKCTRL_RESTORE OMAP44XX_CM2_REGADDR(OMAP4430_CM2_RESTORE_INST, 0x0024)
#define OMAP4_CM_D2D_STATICDEP_RESTORE_OFFSET 0x0028
#define OMAP4430_CM_D2D_STATICDEP_RESTORE OMAP44XX_CM2_REGADDR(OMAP4430_CM2_RESTORE_INST, 0x0028)
#define OMAP4_CM_L3_1_DYNAMICDEP_RESTORE_OFFSET 0x002c
#define OMAP4430_CM_L3_1_DYNAMICDEP_RESTORE OMAP44XX_CM2_REGADDR(OMAP4430_CM2_RESTORE_INST, 0x002c)
#define OMAP4_CM_L3_2_DYNAMICDEP_RESTORE_OFFSET 0x0030
#define OMAP4430_CM_L3_2_DYNAMICDEP_RESTORE OMAP44XX_CM2_REGADDR(OMAP4430_CM2_RESTORE_INST, 0x0030)
#define OMAP4_CM_D2D_DYNAMICDEP_RESTORE_OFFSET 0x0034
#define OMAP4430_CM_D2D_DYNAMICDEP_RESTORE OMAP44XX_CM2_REGADDR(OMAP4430_CM2_RESTORE_INST, 0x0034)
#define OMAP4_CM_L4CFG_DYNAMICDEP_RESTORE_OFFSET 0x0038
#define OMAP4430_CM_L4CFG_DYNAMICDEP_RESTORE OMAP44XX_CM2_REGADDR(OMAP4430_CM2_RESTORE_INST, 0x0038)
#define OMAP4_CM_L4PER_DYNAMICDEP_RESTORE_OFFSET 0x003c
#define OMAP4430_CM_L4PER_DYNAMICDEP_RESTORE OMAP44XX_CM2_REGADDR(OMAP4430_CM2_RESTORE_INST, 0x003c)
#define OMAP4_CM_L4PER_GPIO2_CLKCTRL_RESTORE_OFFSET 0x0040
#define OMAP4430_CM_L4PER_GPIO2_CLKCTRL_RESTORE OMAP44XX_CM2_REGADDR(OMAP4430_CM2_RESTORE_INST, 0x0040)
#define OMAP4_CM_L4PER_GPIO3_CLKCTRL_RESTORE_OFFSET 0x0044
#define OMAP4430_CM_L4PER_GPIO3_CLKCTRL_RESTORE OMAP44XX_CM2_REGADDR(OMAP4430_CM2_RESTORE_INST, 0x0044)
#define OMAP4_CM_L4PER_GPIO4_CLKCTRL_RESTORE_OFFSET 0x0048
#define OMAP4430_CM_L4PER_GPIO4_CLKCTRL_RESTORE OMAP44XX_CM2_REGADDR(OMAP4430_CM2_RESTORE_INST, 0x0048)
#define OMAP4_CM_L4PER_GPIO5_CLKCTRL_RESTORE_OFFSET 0x004c
#define OMAP4430_CM_L4PER_GPIO5_CLKCTRL_RESTORE OMAP44XX_CM2_REGADDR(OMAP4430_CM2_RESTORE_INST, 0x004c)
#define OMAP4_CM_L4PER_GPIO6_CLKCTRL_RESTORE_OFFSET 0x0050
#define OMAP4430_CM_L4PER_GPIO6_CLKCTRL_RESTORE OMAP44XX_CM2_REGADDR(OMAP4430_CM2_RESTORE_INST, 0x0050)
#define OMAP4_CM_L3INIT_USB_HOST_CLKCTRL_RESTORE_OFFSET 0x0054
#define OMAP4430_CM_L3INIT_USB_HOST_CLKCTRL_RESTORE OMAP44XX_CM2_REGADDR(OMAP4430_CM2_RESTORE_INST, 0x0054)
#define OMAP4_CM_L3INIT_USB_TLL_CLKCTRL_RESTORE_OFFSET 0x0058
#define OMAP4430_CM_L3INIT_USB_TLL_CLKCTRL_RESTORE OMAP44XX_CM2_REGADDR(OMAP4430_CM2_RESTORE_INST, 0x0058)
#define OMAP4_CM_SDMA_STATICDEP_RESTORE_OFFSET 0x005c
#define OMAP4430_CM_SDMA_STATICDEP_RESTORE OMAP44XX_CM2_REGADDR(OMAP4430_CM2_RESTORE_INST, 0x005c)
/* Function prototypes */ /* Function prototypes */
extern u32 omap4_cm2_read_inst_reg(s16 inst, u16 idx); extern u32 omap4_cm2_read_inst_reg(s16 inst, u16 idx);
extern void omap4_cm2_write_inst_reg(u32 val, s16 inst, u16 idx); extern void omap4_cm2_write_inst_reg(u32 val, s16 inst, u16 idx);
......
...@@ -20,36 +20,15 @@ ...@@ -20,36 +20,15 @@
* *
*/ */
#include <linux/i2c.h>
#include <linux/i2c/twl.h>
#include <linux/gpio.h> #include <linux/gpio.h>
#include <linux/spi/spi.h> #include <linux/spi/spi.h>
#include <linux/spi/ads7846.h> #include <linux/spi/ads7846.h>
#include <plat/i2c.h>
#include <plat/mcspi.h> #include <plat/mcspi.h>
#include <plat/nand.h> #include <plat/nand.h>
#include "common-board-devices.h" #include "common-board-devices.h"
static struct i2c_board_info __initdata pmic_i2c_board_info = {
.addr = 0x48,
.flags = I2C_CLIENT_WAKE,
};
void __init omap_pmic_init(int bus, u32 clkrate,
const char *pmic_type, int pmic_irq,
struct twl4030_platform_data *pmic_data)
{
strncpy(pmic_i2c_board_info.type, pmic_type,
sizeof(pmic_i2c_board_info.type));
pmic_i2c_board_info.irq = pmic_irq;
pmic_i2c_board_info.platform_data = pmic_data;
omap_register_i2c_bus(bus, clkrate, &pmic_i2c_board_info, 1);
}
#if defined(CONFIG_TOUCHSCREEN_ADS7846) || \ #if defined(CONFIG_TOUCHSCREEN_ADS7846) || \
defined(CONFIG_TOUCHSCREEN_ADS7846_MODULE) defined(CONFIG_TOUCHSCREEN_ADS7846_MODULE)
static struct omap2_mcspi_device_config ads7846_mcspi_config = { static struct omap2_mcspi_device_config ads7846_mcspi_config = {
...@@ -115,9 +94,7 @@ void __init omap_ads7846_init(int bus_num, int gpio_pendown, int gpio_debounce, ...@@ -115,9 +94,7 @@ void __init omap_ads7846_init(int bus_num, int gpio_pendown, int gpio_debounce,
#endif #endif
#if defined(CONFIG_MTD_NAND_OMAP2) || defined(CONFIG_MTD_NAND_OMAP2_MODULE) #if defined(CONFIG_MTD_NAND_OMAP2) || defined(CONFIG_MTD_NAND_OMAP2_MODULE)
static struct omap_nand_platform_data nand_data = { static struct omap_nand_platform_data nand_data;
.dma_channel = -1, /* disable DMA in OMAP NAND driver */
};
void __init omap_nand_flash_init(int options, struct mtd_partition *parts, void __init omap_nand_flash_init(int options, struct mtd_partition *parts,
int nr_parts) int nr_parts)
...@@ -148,7 +125,7 @@ void __init omap_nand_flash_init(int options, struct mtd_partition *parts, ...@@ -148,7 +125,7 @@ void __init omap_nand_flash_init(int options, struct mtd_partition *parts,
nand_data.cs = nandcs; nand_data.cs = nandcs;
nand_data.parts = parts; nand_data.parts = parts;
nand_data.nr_parts = nr_parts; nand_data.nr_parts = nr_parts;
nand_data.options = options; nand_data.devsize = options;
printk(KERN_INFO "Registering NAND on CS%d\n", nandcs); printk(KERN_INFO "Registering NAND on CS%d\n", nandcs);
if (gpmc_nand_init(&nand_data) < 0) if (gpmc_nand_init(&nand_data) < 0)
......
#ifndef __OMAP_COMMON_BOARD_DEVICES__ #ifndef __OMAP_COMMON_BOARD_DEVICES__
#define __OMAP_COMMON_BOARD_DEVICES__ #define __OMAP_COMMON_BOARD_DEVICES__
#include "twl-common.h"
#define NAND_BLOCK_SIZE SZ_128K #define NAND_BLOCK_SIZE SZ_128K
struct twl4030_platform_data;
struct mtd_partition; struct mtd_partition;
void omap_pmic_init(int bus, u32 clkrate, const char *pmic_type, int pmic_irq,
struct twl4030_platform_data *pmic_data);
static inline void omap2_pmic_init(const char *pmic_type,
struct twl4030_platform_data *pmic_data)
{
omap_pmic_init(2, 2600, pmic_type, INT_24XX_SYS_NIRQ, pmic_data);
}
static inline void omap3_pmic_init(const char *pmic_type,
struct twl4030_platform_data *pmic_data)
{
omap_pmic_init(1, 2600, pmic_type, INT_34XX_SYS_NIRQ, pmic_data);
}
static inline void omap4_pmic_init(const char *pmic_type,
struct twl4030_platform_data *pmic_data)
{
/* Phoenix Audio IC needs I2C1 to start with 400 KHz or less */
omap_pmic_init(1, 400, pmic_type, OMAP44XX_IRQ_SYS_1N, pmic_data);
}
struct ads7846_platform_data; struct ads7846_platform_data;
void omap_ads7846_init(int bus_num, int gpio_pendown, int gpio_debounce, void omap_ads7846_init(int bus_num, int gpio_pendown, int gpio_debounce,
......
...@@ -20,8 +20,6 @@ ...@@ -20,8 +20,6 @@
#include <plat/board.h> #include <plat/board.h>
#include <plat/gpmc.h> #include <plat/gpmc.h>
static struct omap_nand_platform_data *gpmc_nand_data;
static struct resource gpmc_nand_resource = { static struct resource gpmc_nand_resource = {
.flags = IORESOURCE_MEM, .flags = IORESOURCE_MEM,
}; };
...@@ -33,7 +31,7 @@ static struct platform_device gpmc_nand_device = { ...@@ -33,7 +31,7 @@ static struct platform_device gpmc_nand_device = {
.resource = &gpmc_nand_resource, .resource = &gpmc_nand_resource,
}; };
static int omap2_nand_gpmc_retime(void) static int omap2_nand_gpmc_retime(struct omap_nand_platform_data *gpmc_nand_data)
{ {
struct gpmc_timings t; struct gpmc_timings t;
int err; int err;
...@@ -83,13 +81,11 @@ static int omap2_nand_gpmc_retime(void) ...@@ -83,13 +81,11 @@ static int omap2_nand_gpmc_retime(void)
return 0; return 0;
} }
int __init gpmc_nand_init(struct omap_nand_platform_data *_nand_data) int __init gpmc_nand_init(struct omap_nand_platform_data *gpmc_nand_data)
{ {
int err = 0; int err = 0;
struct device *dev = &gpmc_nand_device.dev; struct device *dev = &gpmc_nand_device.dev;
gpmc_nand_data = _nand_data;
gpmc_nand_data->nand_setup = omap2_nand_gpmc_retime;
gpmc_nand_device.dev.platform_data = gpmc_nand_data; gpmc_nand_device.dev.platform_data = gpmc_nand_data;
err = gpmc_cs_request(gpmc_nand_data->cs, NAND_IO_SIZE, err = gpmc_cs_request(gpmc_nand_data->cs, NAND_IO_SIZE,
...@@ -100,7 +96,7 @@ int __init gpmc_nand_init(struct omap_nand_platform_data *_nand_data) ...@@ -100,7 +96,7 @@ int __init gpmc_nand_init(struct omap_nand_platform_data *_nand_data)
} }
/* Set timings in GPMC */ /* Set timings in GPMC */
err = omap2_nand_gpmc_retime(); err = omap2_nand_gpmc_retime(gpmc_nand_data);
if (err < 0) { if (err < 0) {
dev_err(dev, "Unable to set gpmc timings: %d\n", err); dev_err(dev, "Unable to set gpmc timings: %d\n", err);
return err; return err;
......
...@@ -21,9 +21,19 @@ ...@@ -21,9 +21,19 @@
#include <plat/cpu.h> #include <plat/cpu.h>
#include <plat/i2c.h> #include <plat/i2c.h>
#include <plat/common.h>
#include <plat/omap_hwmod.h>
#include "mux.h" #include "mux.h"
/* In register I2C_CON, Bit 15 is the I2C enable bit */
#define I2C_EN BIT(15)
#define OMAP2_I2C_CON_OFFSET 0x24
#define OMAP4_I2C_CON_OFFSET 0xA4
/* Maximum microseconds to wait for OMAP module to softreset */
#define MAX_MODULE_SOFTRESET_WAIT 10000
void __init omap2_i2c_mux_pins(int bus_id) void __init omap2_i2c_mux_pins(int bus_id)
{ {
char mux_name[sizeof("i2c2_scl.i2c2_scl")]; char mux_name[sizeof("i2c2_scl.i2c2_scl")];
...@@ -37,3 +47,61 @@ void __init omap2_i2c_mux_pins(int bus_id) ...@@ -37,3 +47,61 @@ void __init omap2_i2c_mux_pins(int bus_id)
sprintf(mux_name, "i2c%i_sda.i2c%i_sda", bus_id, bus_id); sprintf(mux_name, "i2c%i_sda.i2c%i_sda", bus_id, bus_id);
omap_mux_init_signal(mux_name, OMAP_PIN_INPUT); omap_mux_init_signal(mux_name, OMAP_PIN_INPUT);
} }
/**
* omap_i2c_reset - reset the omap i2c module.
* @oh: struct omap_hwmod *
*
* The i2c moudle in omap2, omap3 had a special sequence to reset. The
* sequence is:
* - Disable the I2C.
* - Write to SOFTRESET bit.
* - Enable the I2C.
* - Poll on the RESETDONE bit.
* The sequence is implemented in below function. This is called for 2420,
* 2430 and omap3.
*/
int omap_i2c_reset(struct omap_hwmod *oh)
{
u32 v;
u16 i2c_con;
int c = 0;
if (oh->class->rev == OMAP_I2C_IP_VERSION_2) {
i2c_con = OMAP4_I2C_CON_OFFSET;
} else if (oh->class->rev == OMAP_I2C_IP_VERSION_1) {
i2c_con = OMAP2_I2C_CON_OFFSET;
} else {
WARN(1, "Cannot reset I2C block %s: unsupported revision\n",
oh->name);
return -EINVAL;
}
/* Disable I2C */
v = omap_hwmod_read(oh, i2c_con);
v &= ~I2C_EN;
omap_hwmod_write(v, oh, i2c_con);
/* Write to the SOFTRESET bit */
omap_hwmod_softreset(oh);
/* Enable I2C */
v = omap_hwmod_read(oh, i2c_con);
v |= I2C_EN;
omap_hwmod_write(v, oh, i2c_con);
/* Poll on RESETDONE bit */
omap_test_timeout((omap_hwmod_read(oh,
oh->class->sysc->syss_offs)
& SYSS_RESETDONE_MASK),
MAX_MODULE_SOFTRESET_WAIT, c);
if (c == MAX_MODULE_SOFTRESET_WAIT)
pr_warning("%s: %s: softreset failed (waited %d usec)\n",
__func__, oh->name, MAX_MODULE_SOFTRESET_WAIT);
else
pr_debug("%s: %s: softreset in %d usec\n", __func__,
oh->name, c);
return 0;
}
...@@ -333,23 +333,9 @@ static int _set_hwmod_postsetup_state(struct omap_hwmod *oh, void *data) ...@@ -333,23 +333,9 @@ static int _set_hwmod_postsetup_state(struct omap_hwmod *oh, void *data)
return omap_hwmod_set_postsetup_state(oh, *(u8 *)data); return omap_hwmod_set_postsetup_state(oh, *(u8 *)data);
} }
/* See irq.c, omap4-common.c and entry-macro.S */
void __iomem *omap_irq_base; void __iomem *omap_irq_base;
/*
* Initialize asm_irq_base for entry-macro.S
*/
static inline void omap_irq_base_init(void)
{
if (cpu_is_omap24xx())
omap_irq_base = OMAP2_L4_IO_ADDRESS(OMAP24XX_IC_BASE);
else if (cpu_is_omap34xx())
omap_irq_base = OMAP2_L4_IO_ADDRESS(OMAP34XX_IC_BASE);
else if (cpu_is_omap44xx())
omap_irq_base = OMAP2_L4_IO_ADDRESS(OMAP44XX_GIC_CPU_BASE);
else
pr_err("Could not initialize omap_irq_base\n");
}
void __init omap2_init_common_infrastructure(void) void __init omap2_init_common_infrastructure(void)
{ {
u8 postsetup_state; u8 postsetup_state;
...@@ -422,7 +408,6 @@ void __init omap2_init_common_devices(struct omap_sdrc_params *sdrc_cs0, ...@@ -422,7 +408,6 @@ void __init omap2_init_common_devices(struct omap_sdrc_params *sdrc_cs0,
_omap2_init_reprogram_sdrc(); _omap2_init_reprogram_sdrc();
} }
omap_irq_base_init();
} }
/* /*
......
...@@ -141,25 +141,20 @@ omap_alloc_gc(void __iomem *base, unsigned int irq_start, unsigned int num) ...@@ -141,25 +141,20 @@ omap_alloc_gc(void __iomem *base, unsigned int irq_start, unsigned int num)
IRQ_NOREQUEST | IRQ_NOPROBE, 0); IRQ_NOREQUEST | IRQ_NOPROBE, 0);
} }
void __init omap_init_irq(void) static void __init omap_init_irq(u32 base, int nr_irqs)
{ {
unsigned long nr_of_irqs = 0; unsigned long nr_of_irqs = 0;
unsigned int nr_banks = 0; unsigned int nr_banks = 0;
int i, j; int i, j;
omap_irq_base = ioremap(base, SZ_4K);
if (WARN_ON(!omap_irq_base))
return;
for (i = 0; i < ARRAY_SIZE(irq_banks); i++) { for (i = 0; i < ARRAY_SIZE(irq_banks); i++) {
unsigned long base = 0;
struct omap_irq_bank *bank = irq_banks + i; struct omap_irq_bank *bank = irq_banks + i;
if (cpu_is_omap24xx()) bank->nr_irqs = nr_irqs;
base = OMAP24XX_IC_BASE;
else if (cpu_is_omap34xx())
base = OMAP34XX_IC_BASE;
BUG_ON(!base);
if (cpu_is_ti816x())
bank->nr_irqs = 128;
/* Static mapping, never released */ /* Static mapping, never released */
bank->base_reg = ioremap(base, SZ_4K); bank->base_reg = ioremap(base, SZ_4K);
...@@ -181,6 +176,21 @@ void __init omap_init_irq(void) ...@@ -181,6 +176,21 @@ void __init omap_init_irq(void)
nr_of_irqs, nr_banks, nr_banks > 1 ? "s" : ""); nr_of_irqs, nr_banks, nr_banks > 1 ? "s" : "");
} }
void __init omap2_init_irq(void)
{
omap_init_irq(OMAP24XX_IC_BASE, 96);
}
void __init omap3_init_irq(void)
{
omap_init_irq(OMAP34XX_IC_BASE, 96);
}
void __init ti816x_init_irq(void)
{
omap_init_irq(OMAP34XX_IC_BASE, 128);
}
#ifdef CONFIG_ARCH_OMAP3 #ifdef CONFIG_ARCH_OMAP3
static struct omap3_intc_regs intc_context[ARRAY_SIZE(irq_banks)]; static struct omap3_intc_regs intc_context[ARRAY_SIZE(irq_banks)];
......
...@@ -19,6 +19,8 @@ ...@@ -19,6 +19,8 @@
#include <asm/hardware/gic.h> #include <asm/hardware/gic.h>
#include <asm/hardware/cache-l2x0.h> #include <asm/hardware/cache-l2x0.h>
#include <plat/irqs.h>
#include <mach/hardware.h> #include <mach/hardware.h>
#include <mach/omap4-common.h> #include <mach/omap4-common.h>
...@@ -31,17 +33,15 @@ void __iomem *gic_dist_base_addr; ...@@ -31,17 +33,15 @@ void __iomem *gic_dist_base_addr;
void __init gic_init_irq(void) void __init gic_init_irq(void)
{ {
void __iomem *gic_cpu_base;
/* Static mapping, never released */ /* Static mapping, never released */
gic_dist_base_addr = ioremap(OMAP44XX_GIC_DIST_BASE, SZ_4K); gic_dist_base_addr = ioremap(OMAP44XX_GIC_DIST_BASE, SZ_4K);
BUG_ON(!gic_dist_base_addr); BUG_ON(!gic_dist_base_addr);
/* Static mapping, never released */ /* Static mapping, never released */
gic_cpu_base = ioremap(OMAP44XX_GIC_CPU_BASE, SZ_512); omap_irq_base = ioremap(OMAP44XX_GIC_CPU_BASE, SZ_512);
BUG_ON(!gic_cpu_base); BUG_ON(!omap_irq_base);
gic_init(0, 29, gic_dist_base_addr, gic_cpu_base); gic_init(0, 29, gic_dist_base_addr, omap_irq_base);
} }
#ifdef CONFIG_CACHE_L2X0 #ifdef CONFIG_CACHE_L2X0
......
...@@ -2,6 +2,7 @@ ...@@ -2,6 +2,7 @@
* omap_hwmod implementation for OMAP2/3/4 * omap_hwmod implementation for OMAP2/3/4
* *
* Copyright (C) 2009-2011 Nokia Corporation * Copyright (C) 2009-2011 Nokia Corporation
* Copyright (C) 2011 Texas Instruments, Inc.
* *
* Paul Walmsley, Benoît Cousson, Kevin Hilman * Paul Walmsley, Benoît Cousson, Kevin Hilman
* *
...@@ -387,11 +388,10 @@ static int _set_module_autoidle(struct omap_hwmod *oh, u8 autoidle, ...@@ -387,11 +388,10 @@ static int _set_module_autoidle(struct omap_hwmod *oh, u8 autoidle,
*/ */
static int _enable_wakeup(struct omap_hwmod *oh, u32 *v) static int _enable_wakeup(struct omap_hwmod *oh, u32 *v)
{ {
u32 wakeup_mask;
if (!oh->class->sysc || if (!oh->class->sysc ||
!((oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) || !((oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) ||
(oh->class->sysc->idlemodes & SIDLE_SMART_WKUP))) (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) ||
(oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)))
return -EINVAL; return -EINVAL;
if (!oh->class->sysc->sysc_fields) { if (!oh->class->sysc->sysc_fields) {
...@@ -399,12 +399,13 @@ static int _enable_wakeup(struct omap_hwmod *oh, u32 *v) ...@@ -399,12 +399,13 @@ static int _enable_wakeup(struct omap_hwmod *oh, u32 *v)
return -EINVAL; return -EINVAL;
} }
wakeup_mask = (0x1 << oh->class->sysc->sysc_fields->enwkup_shift); if (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)
*v |= 0x1 << oh->class->sysc->sysc_fields->enwkup_shift;
*v |= wakeup_mask;
if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
_set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART_WKUP, v); _set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART_WKUP, v);
if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
_set_master_standbymode(oh, HWMOD_IDLEMODE_SMART_WKUP, v);
/* XXX test pwrdm_get_wken for this hwmod's subsystem */ /* XXX test pwrdm_get_wken for this hwmod's subsystem */
...@@ -422,11 +423,10 @@ static int _enable_wakeup(struct omap_hwmod *oh, u32 *v) ...@@ -422,11 +423,10 @@ static int _enable_wakeup(struct omap_hwmod *oh, u32 *v)
*/ */
static int _disable_wakeup(struct omap_hwmod *oh, u32 *v) static int _disable_wakeup(struct omap_hwmod *oh, u32 *v)
{ {
u32 wakeup_mask;
if (!oh->class->sysc || if (!oh->class->sysc ||
!((oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) || !((oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) ||
(oh->class->sysc->idlemodes & SIDLE_SMART_WKUP))) (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) ||
(oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)))
return -EINVAL; return -EINVAL;
if (!oh->class->sysc->sysc_fields) { if (!oh->class->sysc->sysc_fields) {
...@@ -434,12 +434,13 @@ static int _disable_wakeup(struct omap_hwmod *oh, u32 *v) ...@@ -434,12 +434,13 @@ static int _disable_wakeup(struct omap_hwmod *oh, u32 *v)
return -EINVAL; return -EINVAL;
} }
wakeup_mask = (0x1 << oh->class->sysc->sysc_fields->enwkup_shift); if (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)
*v &= ~(0x1 << oh->class->sysc->sysc_fields->enwkup_shift);
*v &= ~wakeup_mask;
if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
_set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART, v); _set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART, v);
if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
_set_master_standbymode(oh, HWMOD_IDLEMODE_SMART_WKUP, v);
/* XXX test pwrdm_get_wken for this hwmod's subsystem */ /* XXX test pwrdm_get_wken for this hwmod's subsystem */
...@@ -677,6 +678,75 @@ static void _disable_optional_clocks(struct omap_hwmod *oh) ...@@ -677,6 +678,75 @@ static void _disable_optional_clocks(struct omap_hwmod *oh)
} }
} }
/**
* _count_mpu_irqs - count the number of MPU IRQ lines associated with @oh
* @oh: struct omap_hwmod *oh
*
* Count and return the number of MPU IRQs associated with the hwmod
* @oh. Used to allocate struct resource data. Returns 0 if @oh is
* NULL.
*/
static int _count_mpu_irqs(struct omap_hwmod *oh)
{
struct omap_hwmod_irq_info *ohii;
int i = 0;
if (!oh || !oh->mpu_irqs)
return 0;
do {
ohii = &oh->mpu_irqs[i++];
} while (ohii->irq != -1);
return i;
}
/**
* _count_sdma_reqs - count the number of SDMA request lines associated with @oh
* @oh: struct omap_hwmod *oh
*
* Count and return the number of SDMA request lines associated with
* the hwmod @oh. Used to allocate struct resource data. Returns 0
* if @oh is NULL.
*/
static int _count_sdma_reqs(struct omap_hwmod *oh)
{
struct omap_hwmod_dma_info *ohdi;
int i = 0;
if (!oh || !oh->sdma_reqs)
return 0;
do {
ohdi = &oh->sdma_reqs[i++];
} while (ohdi->dma_req != -1);
return i;
}
/**
* _count_ocp_if_addr_spaces - count the number of address space entries for @oh
* @oh: struct omap_hwmod *oh
*
* Count and return the number of address space ranges associated with
* the hwmod @oh. Used to allocate struct resource data. Returns 0
* if @oh is NULL.
*/
static int _count_ocp_if_addr_spaces(struct omap_hwmod_ocp_if *os)
{
struct omap_hwmod_addr_space *mem;
int i = 0;
if (!os || !os->addr)
return 0;
do {
mem = &os->addr[i++];
} while (mem->pa_start != mem->pa_end);
return i;
}
/** /**
* _find_mpu_port_index - find hwmod OCP slave port ID intended for MPU use * _find_mpu_port_index - find hwmod OCP slave port ID intended for MPU use
* @oh: struct omap_hwmod * * @oh: struct omap_hwmod *
...@@ -722,8 +792,7 @@ static void __iomem * __init _find_mpu_rt_base(struct omap_hwmod *oh, u8 index) ...@@ -722,8 +792,7 @@ static void __iomem * __init _find_mpu_rt_base(struct omap_hwmod *oh, u8 index)
{ {
struct omap_hwmod_ocp_if *os; struct omap_hwmod_ocp_if *os;
struct omap_hwmod_addr_space *mem; struct omap_hwmod_addr_space *mem;
int i; int i = 0, found = 0;
int found = 0;
void __iomem *va_start; void __iomem *va_start;
if (!oh || oh->slaves_cnt == 0) if (!oh || oh->slaves_cnt == 0)
...@@ -731,12 +800,14 @@ static void __iomem * __init _find_mpu_rt_base(struct omap_hwmod *oh, u8 index) ...@@ -731,12 +800,14 @@ static void __iomem * __init _find_mpu_rt_base(struct omap_hwmod *oh, u8 index)
os = oh->slaves[index]; os = oh->slaves[index];
for (i = 0, mem = os->addr; i < os->addr_cnt; i++, mem++) { if (!os->addr)
if (mem->flags & ADDR_TYPE_RT) { return NULL;
do {
mem = &os->addr[i++];
if (mem->flags & ADDR_TYPE_RT)
found = 1; found = 1;
break; } while (!found && mem->pa_start != mem->pa_end);
}
}
if (found) { if (found) {
va_start = ioremap(mem->pa_start, mem->pa_end - mem->pa_start); va_start = ioremap(mem->pa_start, mem->pa_end - mem->pa_start);
...@@ -781,8 +852,16 @@ static void _enable_sysc(struct omap_hwmod *oh) ...@@ -781,8 +852,16 @@ static void _enable_sysc(struct omap_hwmod *oh)
} }
if (sf & SYSC_HAS_MIDLEMODE) { if (sf & SYSC_HAS_MIDLEMODE) {
idlemode = (oh->flags & HWMOD_SWSUP_MSTANDBY) ? if (oh->flags & HWMOD_SWSUP_MSTANDBY) {
HWMOD_IDLEMODE_NO : HWMOD_IDLEMODE_SMART; idlemode = HWMOD_IDLEMODE_NO;
} else {
if (sf & SYSC_HAS_ENAWAKEUP)
_enable_wakeup(oh, &v);
if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
idlemode = HWMOD_IDLEMODE_SMART_WKUP;
else
idlemode = HWMOD_IDLEMODE_SMART;
}
_set_master_standbymode(oh, idlemode, &v); _set_master_standbymode(oh, idlemode, &v);
} }
...@@ -840,8 +919,16 @@ static void _idle_sysc(struct omap_hwmod *oh) ...@@ -840,8 +919,16 @@ static void _idle_sysc(struct omap_hwmod *oh)
} }
if (sf & SYSC_HAS_MIDLEMODE) { if (sf & SYSC_HAS_MIDLEMODE) {
idlemode = (oh->flags & HWMOD_SWSUP_MSTANDBY) ? if (oh->flags & HWMOD_SWSUP_MSTANDBY) {
HWMOD_IDLEMODE_FORCE : HWMOD_IDLEMODE_SMART; idlemode = HWMOD_IDLEMODE_FORCE;
} else {
if (sf & SYSC_HAS_ENAWAKEUP)
_enable_wakeup(oh, &v);
if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
idlemode = HWMOD_IDLEMODE_SMART_WKUP;
else
idlemode = HWMOD_IDLEMODE_SMART;
}
_set_master_standbymode(oh, idlemode, &v); _set_master_standbymode(oh, idlemode, &v);
} }
...@@ -928,6 +1015,8 @@ static int _init_clocks(struct omap_hwmod *oh, void *data) ...@@ -928,6 +1015,8 @@ static int _init_clocks(struct omap_hwmod *oh, void *data)
if (!ret) if (!ret)
oh->_state = _HWMOD_STATE_CLKS_INITED; oh->_state = _HWMOD_STATE_CLKS_INITED;
else
pr_warning("omap_hwmod: %s: cannot _init_clocks\n", oh->name);
return ret; return ret;
} }
...@@ -1224,6 +1313,8 @@ static int _enable(struct omap_hwmod *oh) ...@@ -1224,6 +1313,8 @@ static int _enable(struct omap_hwmod *oh)
{ {
int r; int r;
pr_debug("omap_hwmod: %s: enabling\n", oh->name);
if (oh->_state != _HWMOD_STATE_INITIALIZED && if (oh->_state != _HWMOD_STATE_INITIALIZED &&
oh->_state != _HWMOD_STATE_IDLE && oh->_state != _HWMOD_STATE_IDLE &&
oh->_state != _HWMOD_STATE_DISABLED) { oh->_state != _HWMOD_STATE_DISABLED) {
...@@ -1232,28 +1323,33 @@ static int _enable(struct omap_hwmod *oh) ...@@ -1232,28 +1323,33 @@ static int _enable(struct omap_hwmod *oh)
return -EINVAL; return -EINVAL;
} }
pr_debug("omap_hwmod: %s: enabling\n", oh->name); /* Mux pins for device runtime if populated */
if (oh->mux && (!oh->mux->enabled ||
((oh->_state == _HWMOD_STATE_IDLE) &&
oh->mux->pads_dynamic)))
omap_hwmod_mux(oh->mux, _HWMOD_STATE_ENABLED);
_add_initiator_dep(oh, mpu_oh);
_enable_clocks(oh);
/* /*
* If an IP contains only one HW reset line, then de-assert it in order * If an IP contains only one HW reset line, then de-assert it in order
* to allow to enable the clocks. Otherwise the PRCM will return * to allow the module state transition. Otherwise the PRCM will return
* Intransition status, and the init will failed. * Intransition status, and the init will failed.
*/ */
if ((oh->_state == _HWMOD_STATE_INITIALIZED || if ((oh->_state == _HWMOD_STATE_INITIALIZED ||
oh->_state == _HWMOD_STATE_DISABLED) && oh->rst_lines_cnt == 1) oh->_state == _HWMOD_STATE_DISABLED) && oh->rst_lines_cnt == 1)
_deassert_hardreset(oh, oh->rst_lines[0].name); _deassert_hardreset(oh, oh->rst_lines[0].name);
/* Mux pins for device runtime if populated */ r = _wait_target_ready(oh);
if (oh->mux && (!oh->mux->enabled || if (r) {
((oh->_state == _HWMOD_STATE_IDLE) && pr_debug("omap_hwmod: %s: _wait_target_ready: %d\n",
oh->mux->pads_dynamic))) oh->name, r);
omap_hwmod_mux(oh->mux, _HWMOD_STATE_ENABLED); _disable_clocks(oh);
_add_initiator_dep(oh, mpu_oh); return r;
_enable_clocks(oh); }
r = _wait_target_ready(oh);
if (!r) {
oh->_state = _HWMOD_STATE_ENABLED; oh->_state = _HWMOD_STATE_ENABLED;
/* Access the sysconfig only if the target is ready */ /* Access the sysconfig only if the target is ready */
...@@ -1262,11 +1358,6 @@ static int _enable(struct omap_hwmod *oh) ...@@ -1262,11 +1358,6 @@ static int _enable(struct omap_hwmod *oh)
_update_sysc_cache(oh); _update_sysc_cache(oh);
_enable_sysc(oh); _enable_sysc(oh);
} }
} else {
_disable_clocks(oh);
pr_debug("omap_hwmod: %s: _wait_target_ready: %d\n",
oh->name, r);
}
return r; return r;
} }
...@@ -1281,14 +1372,14 @@ static int _enable(struct omap_hwmod *oh) ...@@ -1281,14 +1372,14 @@ static int _enable(struct omap_hwmod *oh)
*/ */
static int _idle(struct omap_hwmod *oh) static int _idle(struct omap_hwmod *oh)
{ {
pr_debug("omap_hwmod: %s: idling\n", oh->name);
if (oh->_state != _HWMOD_STATE_ENABLED) { if (oh->_state != _HWMOD_STATE_ENABLED) {
WARN(1, "omap_hwmod: %s: idle state can only be entered from " WARN(1, "omap_hwmod: %s: idle state can only be entered from "
"enabled state\n", oh->name); "enabled state\n", oh->name);
return -EINVAL; return -EINVAL;
} }
pr_debug("omap_hwmod: %s: idling\n", oh->name);
if (oh->class->sysc) if (oh->class->sysc)
_idle_sysc(oh); _idle_sysc(oh);
_del_initiator_dep(oh, mpu_oh); _del_initiator_dep(oh, mpu_oh);
...@@ -1374,15 +1465,11 @@ static int _shutdown(struct omap_hwmod *oh) ...@@ -1374,15 +1465,11 @@ static int _shutdown(struct omap_hwmod *oh)
} }
} }
if (oh->class->sysc) if (oh->class->sysc) {
if (oh->_state == _HWMOD_STATE_IDLE)
_enable(oh);
_shutdown_sysc(oh); _shutdown_sysc(oh);
}
/*
* If an IP contains only one HW reset line, then assert it
* before disabling the clocks and shutting down the IP.
*/
if (oh->rst_lines_cnt == 1)
_assert_hardreset(oh, oh->rst_lines[0].name);
/* clocks and deps are already disabled in idle */ /* clocks and deps are already disabled in idle */
if (oh->_state == _HWMOD_STATE_ENABLED) { if (oh->_state == _HWMOD_STATE_ENABLED) {
...@@ -1392,6 +1479,13 @@ static int _shutdown(struct omap_hwmod *oh) ...@@ -1392,6 +1479,13 @@ static int _shutdown(struct omap_hwmod *oh)
} }
/* XXX Should this code also force-disable the optional clocks? */ /* XXX Should this code also force-disable the optional clocks? */
/*
* If an IP contains only one HW reset line, then assert it
* after disabling the clocks and before shutting down the IP.
*/
if (oh->rst_lines_cnt == 1)
_assert_hardreset(oh, oh->rst_lines[0].name);
/* Mux pins to safe mode or use populated off mode values */ /* Mux pins to safe mode or use populated off mode values */
if (oh->mux) if (oh->mux)
omap_hwmod_mux(oh->mux, _HWMOD_STATE_DISABLED); omap_hwmod_mux(oh->mux, _HWMOD_STATE_DISABLED);
...@@ -1561,6 +1655,33 @@ void omap_hwmod_write(u32 v, struct omap_hwmod *oh, u16 reg_offs) ...@@ -1561,6 +1655,33 @@ void omap_hwmod_write(u32 v, struct omap_hwmod *oh, u16 reg_offs)
__raw_writel(v, oh->_mpu_rt_va + reg_offs); __raw_writel(v, oh->_mpu_rt_va + reg_offs);
} }
/**
* omap_hwmod_softreset - reset a module via SYSCONFIG.SOFTRESET bit
* @oh: struct omap_hwmod *
*
* This is a public function exposed to drivers. Some drivers may need to do
* some settings before and after resetting the device. Those drivers after
* doing the necessary settings could use this function to start a reset by
* setting the SYSCONFIG.SOFTRESET bit.
*/
int omap_hwmod_softreset(struct omap_hwmod *oh)
{
u32 v;
int ret;
if (!oh || !(oh->_sysc_cache))
return -EINVAL;
v = oh->_sysc_cache;
ret = _set_softreset(oh, &v);
if (ret)
goto error;
_write_sysconfig(v, oh);
error:
return ret;
}
/** /**
* omap_hwmod_set_slave_idlemode - set the hwmod's OCP slave idlemode * omap_hwmod_set_slave_idlemode - set the hwmod's OCP slave idlemode
* @oh: struct omap_hwmod * * @oh: struct omap_hwmod *
...@@ -1685,9 +1806,6 @@ static int __init _populate_mpu_rt_base(struct omap_hwmod *oh, void *data) ...@@ -1685,9 +1806,6 @@ static int __init _populate_mpu_rt_base(struct omap_hwmod *oh, void *data)
return 0; return 0;
oh->_mpu_rt_va = _find_mpu_rt_base(oh, oh->_mpu_port_index); oh->_mpu_rt_va = _find_mpu_rt_base(oh, oh->_mpu_port_index);
if (!oh->_mpu_rt_va)
pr_warning("omap_hwmod: %s found no _mpu_rt_va for %s\n",
__func__, oh->name);
return 0; return 0;
} }
...@@ -1939,10 +2057,10 @@ int omap_hwmod_count_resources(struct omap_hwmod *oh) ...@@ -1939,10 +2057,10 @@ int omap_hwmod_count_resources(struct omap_hwmod *oh)
{ {
int ret, i; int ret, i;
ret = oh->mpu_irqs_cnt + oh->sdma_reqs_cnt; ret = _count_mpu_irqs(oh) + _count_sdma_reqs(oh);
for (i = 0; i < oh->slaves_cnt; i++) for (i = 0; i < oh->slaves_cnt; i++)
ret += oh->slaves[i]->addr_cnt; ret += _count_ocp_if_addr_spaces(oh->slaves[i]);
return ret; return ret;
} }
...@@ -1959,12 +2077,13 @@ int omap_hwmod_count_resources(struct omap_hwmod *oh) ...@@ -1959,12 +2077,13 @@ int omap_hwmod_count_resources(struct omap_hwmod *oh)
*/ */
int omap_hwmod_fill_resources(struct omap_hwmod *oh, struct resource *res) int omap_hwmod_fill_resources(struct omap_hwmod *oh, struct resource *res)
{ {
int i, j; int i, j, mpu_irqs_cnt, sdma_reqs_cnt;
int r = 0; int r = 0;
/* For each IRQ, DMA, memory area, fill in array.*/ /* For each IRQ, DMA, memory area, fill in array.*/
for (i = 0; i < oh->mpu_irqs_cnt; i++) { mpu_irqs_cnt = _count_mpu_irqs(oh);
for (i = 0; i < mpu_irqs_cnt; i++) {
(res + r)->name = (oh->mpu_irqs + i)->name; (res + r)->name = (oh->mpu_irqs + i)->name;
(res + r)->start = (oh->mpu_irqs + i)->irq; (res + r)->start = (oh->mpu_irqs + i)->irq;
(res + r)->end = (oh->mpu_irqs + i)->irq; (res + r)->end = (oh->mpu_irqs + i)->irq;
...@@ -1972,7 +2091,8 @@ int omap_hwmod_fill_resources(struct omap_hwmod *oh, struct resource *res) ...@@ -1972,7 +2091,8 @@ int omap_hwmod_fill_resources(struct omap_hwmod *oh, struct resource *res)
r++; r++;
} }
for (i = 0; i < oh->sdma_reqs_cnt; i++) { sdma_reqs_cnt = _count_sdma_reqs(oh);
for (i = 0; i < sdma_reqs_cnt; i++) {
(res + r)->name = (oh->sdma_reqs + i)->name; (res + r)->name = (oh->sdma_reqs + i)->name;
(res + r)->start = (oh->sdma_reqs + i)->dma_req; (res + r)->start = (oh->sdma_reqs + i)->dma_req;
(res + r)->end = (oh->sdma_reqs + i)->dma_req; (res + r)->end = (oh->sdma_reqs + i)->dma_req;
...@@ -1982,10 +2102,12 @@ int omap_hwmod_fill_resources(struct omap_hwmod *oh, struct resource *res) ...@@ -1982,10 +2102,12 @@ int omap_hwmod_fill_resources(struct omap_hwmod *oh, struct resource *res)
for (i = 0; i < oh->slaves_cnt; i++) { for (i = 0; i < oh->slaves_cnt; i++) {
struct omap_hwmod_ocp_if *os; struct omap_hwmod_ocp_if *os;
int addr_cnt;
os = oh->slaves[i]; os = oh->slaves[i];
addr_cnt = _count_ocp_if_addr_spaces(os);
for (j = 0; j < os->addr_cnt; j++) { for (j = 0; j < addr_cnt; j++) {
(res + r)->name = (os->addr + j)->name; (res + r)->name = (os->addr + j)->name;
(res + r)->start = (os->addr + j)->pa_start; (res + r)->start = (os->addr + j)->pa_start;
(res + r)->end = (os->addr + j)->pa_end; (res + r)->end = (os->addr + j)->pa_end;
......
/*
* omap_hwmod_2xxx_3xxx_interconnect_data.c - common interconnect data, OMAP2/3
*
* Copyright (C) 2009-2011 Nokia Corporation
* Paul Walmsley
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
* XXX handle crossbar/shared link difference for L3?
* XXX these should be marked initdata for multi-OMAP kernels
*/
#include <asm/sizes.h>
#include <plat/omap_hwmod.h>
#include <plat/serial.h>
#include "omap_hwmod_common_data.h"
struct omap_hwmod_addr_space omap2430_mmc1_addr_space[] = {
{
.pa_start = 0x4809c000,
.pa_end = 0x4809c1ff,
.flags = ADDR_TYPE_RT,
},
{ }
};
struct omap_hwmod_addr_space omap2430_mmc2_addr_space[] = {
{
.pa_start = 0x480b4000,
.pa_end = 0x480b41ff,
.flags = ADDR_TYPE_RT,
},
{ }
};
struct omap_hwmod_addr_space omap2_i2c1_addr_space[] = {
{
.pa_start = 0x48070000,
.pa_end = 0x48070000 + SZ_128 - 1,
.flags = ADDR_TYPE_RT,
},
{ }
};
struct omap_hwmod_addr_space omap2_i2c2_addr_space[] = {
{
.pa_start = 0x48072000,
.pa_end = 0x48072000 + SZ_128 - 1,
.flags = ADDR_TYPE_RT,
},
{ }
};
struct omap_hwmod_addr_space omap2_dss_addrs[] = {
{
.pa_start = 0x48050000,
.pa_end = 0x48050000 + SZ_1K - 1,
.flags = ADDR_TYPE_RT
},
{ }
};
struct omap_hwmod_addr_space omap2_dss_dispc_addrs[] = {
{
.pa_start = 0x48050400,
.pa_end = 0x48050400 + SZ_1K - 1,
.flags = ADDR_TYPE_RT
},
{ }
};
struct omap_hwmod_addr_space omap2_dss_rfbi_addrs[] = {
{
.pa_start = 0x48050800,
.pa_end = 0x48050800 + SZ_1K - 1,
.flags = ADDR_TYPE_RT
},
{ }
};
struct omap_hwmod_addr_space omap2_dss_venc_addrs[] = {
{
.pa_start = 0x48050C00,
.pa_end = 0x48050C00 + SZ_1K - 1,
.flags = ADDR_TYPE_RT
},
{ }
};
struct omap_hwmod_addr_space omap2_timer10_addrs[] = {
{
.pa_start = 0x48086000,
.pa_end = 0x48086000 + SZ_1K - 1,
.flags = ADDR_TYPE_RT
},
{ }
};
struct omap_hwmod_addr_space omap2_timer11_addrs[] = {
{
.pa_start = 0x48088000,
.pa_end = 0x48088000 + SZ_1K - 1,
.flags = ADDR_TYPE_RT
},
{ }
};
struct omap_hwmod_addr_space omap2xxx_timer12_addrs[] = {
{
.pa_start = 0x4808a000,
.pa_end = 0x4808a000 + SZ_1K - 1,
.flags = ADDR_TYPE_RT
},
{ }
};
struct omap_hwmod_addr_space omap2_mcspi1_addr_space[] = {
{
.pa_start = 0x48098000,
.pa_end = 0x48098000 + SZ_256 - 1,
.flags = ADDR_TYPE_RT,
},
{ }
};
struct omap_hwmod_addr_space omap2_mcspi2_addr_space[] = {
{
.pa_start = 0x4809a000,
.pa_end = 0x4809a000 + SZ_256 - 1,
.flags = ADDR_TYPE_RT,
},
{ }
};
struct omap_hwmod_addr_space omap2430_mcspi3_addr_space[] = {
{
.pa_start = 0x480b8000,
.pa_end = 0x480b8000 + SZ_256 - 1,
.flags = ADDR_TYPE_RT,
},
{ }
};
struct omap_hwmod_addr_space omap2_dma_system_addrs[] = {
{
.pa_start = 0x48056000,
.pa_end = 0x48056000 + SZ_4K - 1,
.flags = ADDR_TYPE_RT
},
{ }
};
struct omap_hwmod_addr_space omap2_mailbox_addrs[] = {
{
.pa_start = 0x48094000,
.pa_end = 0x48094000 + SZ_512 - 1,
.flags = ADDR_TYPE_RT,
},
{ }
};
struct omap_hwmod_addr_space omap2_mcbsp1_addrs[] = {
{
.name = "mpu",
.pa_start = 0x48074000,
.pa_end = 0x480740ff,
.flags = ADDR_TYPE_RT
},
{ }
};
此差异已折叠。
/*
* omap_hwmod_2xxx_interconnect_data.c - common interconnect data for OMAP2xxx
*
* Copyright (C) 2009-2011 Nokia Corporation
* Paul Walmsley
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
* XXX handle crossbar/shared link difference for L3?
* XXX these should be marked initdata for multi-OMAP kernels
*/
#include <asm/sizes.h>
#include <plat/omap_hwmod.h>
#include <plat/serial.h>
#include "omap_hwmod_common_data.h"
struct omap_hwmod_addr_space omap2xxx_uart1_addr_space[] = {
{
.pa_start = OMAP2_UART1_BASE,
.pa_end = OMAP2_UART1_BASE + SZ_8K - 1,
.flags = ADDR_MAP_ON_INIT | ADDR_TYPE_RT,
},
{ }
};
struct omap_hwmod_addr_space omap2xxx_uart2_addr_space[] = {
{
.pa_start = OMAP2_UART2_BASE,
.pa_end = OMAP2_UART2_BASE + SZ_1K - 1,
.flags = ADDR_MAP_ON_INIT | ADDR_TYPE_RT,
},
{ }
};
struct omap_hwmod_addr_space omap2xxx_uart3_addr_space[] = {
{
.pa_start = OMAP2_UART3_BASE,
.pa_end = OMAP2_UART3_BASE + SZ_1K - 1,
.flags = ADDR_MAP_ON_INIT | ADDR_TYPE_RT,
},
{ }
};
struct omap_hwmod_addr_space omap2xxx_timer2_addrs[] = {
{
.pa_start = 0x4802a000,
.pa_end = 0x4802a000 + SZ_1K - 1,
.flags = ADDR_TYPE_RT
},
{ }
};
struct omap_hwmod_addr_space omap2xxx_timer3_addrs[] = {
{
.pa_start = 0x48078000,
.pa_end = 0x48078000 + SZ_1K - 1,
.flags = ADDR_TYPE_RT
},
{ }
};
struct omap_hwmod_addr_space omap2xxx_timer4_addrs[] = {
{
.pa_start = 0x4807a000,
.pa_end = 0x4807a000 + SZ_1K - 1,
.flags = ADDR_TYPE_RT
},
{ }
};
struct omap_hwmod_addr_space omap2xxx_timer5_addrs[] = {
{
.pa_start = 0x4807c000,
.pa_end = 0x4807c000 + SZ_1K - 1,
.flags = ADDR_TYPE_RT
},
{ }
};
struct omap_hwmod_addr_space omap2xxx_timer6_addrs[] = {
{
.pa_start = 0x4807e000,
.pa_end = 0x4807e000 + SZ_1K - 1,
.flags = ADDR_TYPE_RT
},
{ }
};
struct omap_hwmod_addr_space omap2xxx_timer7_addrs[] = {
{
.pa_start = 0x48080000,
.pa_end = 0x48080000 + SZ_1K - 1,
.flags = ADDR_TYPE_RT
},
{ }
};
struct omap_hwmod_addr_space omap2xxx_timer8_addrs[] = {
{
.pa_start = 0x48082000,
.pa_end = 0x48082000 + SZ_1K - 1,
.flags = ADDR_TYPE_RT
},
{ }
};
struct omap_hwmod_addr_space omap2xxx_timer9_addrs[] = {
{
.pa_start = 0x48084000,
.pa_end = 0x48084000 + SZ_1K - 1,
.flags = ADDR_TYPE_RT
},
{ }
};
struct omap_hwmod_addr_space omap2xxx_mcbsp2_addrs[] = {
{
.name = "mpu",
.pa_start = 0x48076000,
.pa_end = 0x480760ff,
.flags = ADDR_TYPE_RT
},
{ }
};
此差异已折叠。
...@@ -49,23 +49,3 @@ struct omap_hwmod_sysc_fields omap_hwmod_sysc_type2 = { ...@@ -49,23 +49,3 @@ struct omap_hwmod_sysc_fields omap_hwmod_sysc_type2 = {
.srst_shift = SYSC_TYPE2_SOFTRESET_SHIFT, .srst_shift = SYSC_TYPE2_SOFTRESET_SHIFT,
}; };
/*
* omap_hwmod class data
*/
struct omap_hwmod_class l3_hwmod_class = {
.name = "l3"
};
struct omap_hwmod_class l4_hwmod_class = {
.name = "l4"
};
struct omap_hwmod_class mpu_hwmod_class = {
.name = "mpu"
};
struct omap_hwmod_class iva_hwmod_class = {
.name = "iva"
};
此差异已折叠。
此差异已折叠。
此差异已折叠。
...@@ -497,8 +497,6 @@ void omap_sram_idle(void) ...@@ -497,8 +497,6 @@ void omap_sram_idle(void)
int omap3_can_sleep(void) int omap3_can_sleep(void)
{ {
if (!sleep_while_idle)
return 0;
if (!omap_uart_can_sleep()) if (!omap_uart_can_sleep())
return 0; return 0;
return 1; return 1;
...@@ -534,10 +532,6 @@ static int omap3_pm_suspend(void) ...@@ -534,10 +532,6 @@ static int omap3_pm_suspend(void)
struct power_state *pwrst; struct power_state *pwrst;
int state, ret = 0; int state, ret = 0;
if (wakeup_timer_seconds || wakeup_timer_milliseconds)
omap2_pm_wakeup_on_timer(wakeup_timer_seconds,
wakeup_timer_milliseconds);
/* Read current next_pwrsts */ /* Read current next_pwrsts */
list_for_each_entry(pwrst, &pwrst_list, node) list_for_each_entry(pwrst, &pwrst_list, node)
pwrst->saved_state = pwrdm_read_next_pwrst(pwrst->pwrdm); pwrst->saved_state = pwrdm_read_next_pwrst(pwrst->pwrdm);
......
...@@ -205,7 +205,7 @@ static struct powerdomain mpu_44xx_pwrdm = { ...@@ -205,7 +205,7 @@ static struct powerdomain mpu_44xx_pwrdm = {
.prcm_offs = OMAP4430_PRM_MPU_INST, .prcm_offs = OMAP4430_PRM_MPU_INST,
.prcm_partition = OMAP4430_PRM_PARTITION, .prcm_partition = OMAP4430_PRM_PARTITION,
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
.pwrsts = PWRSTS_OFF_RET_ON, .pwrsts = PWRSTS_RET_ON,
.pwrsts_logic_ret = PWRSTS_OFF_RET, .pwrsts_logic_ret = PWRSTS_OFF_RET,
.banks = 3, .banks = 3,
.pwrsts_mem_ret = { .pwrsts_mem_ret = {
......
此差异已折叠。
此差异已折叠。
此差异已折叠。
此差异已折叠。
此差异已折叠。
此差异已折叠。
此差异已折叠。
此差异已折叠。
此差异已折叠。
此差异已折叠。
此差异已折叠。
此差异已折叠。
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