diff --git a/Documentation/powerpc/booting-without-of.txt b/Documentation/powerpc/booting-without-of.txt index 4cc780024e6c81b02cb3ccc6720655da85e33064..cf89e8cfd5bfe1ce59632dad01f374a78c9d6c88 100644 --- a/Documentation/powerpc/booting-without-of.txt +++ b/Documentation/powerpc/booting-without-of.txt @@ -2601,6 +2601,17 @@ platforms are moved over to use the flattened-device-tree model. differ between different families. May be 'virtex2p', 'virtex4', or 'virtex5'. + vi) Xilinx Uart 16550 + + Xilinx UART 16550 devices are very similar to the NS16550 but with + different register spacing and an offset from the base address. + + Requred properties: + - clock-frequency : Frequency of the clock input + - reg-offset : A value of 3 is required + - reg-shift : A value of 2 is required + + p) Freescale Synchronous Serial Interface The SSI is a serial device that communicates with audio codecs. It can diff --git a/drivers/serial/of_serial.c b/drivers/serial/of_serial.c index 8aacfb78deabe03e08ca8d8b4df0e6235eff35ee..25029c7570b65428c4b29f9e2f26c97fff5bc41b 100644 --- a/drivers/serial/of_serial.c +++ b/drivers/serial/of_serial.c @@ -31,7 +31,8 @@ static int __devinit of_platform_serial_setup(struct of_device *ofdev, struct resource resource; struct device_node *np = ofdev->node; const unsigned int *clk, *spd; - int ret; + const u32 *prop; + int ret, prop_size; memset(port, 0, sizeof *port); spd = of_get_property(np, "current-speed", NULL); @@ -49,6 +50,17 @@ static int __devinit of_platform_serial_setup(struct of_device *ofdev, spin_lock_init(&port->lock); port->mapbase = resource.start; + + /* Check for shifted address mapping */ + prop = of_get_property(np, "reg-offset", &prop_size); + if (prop && (prop_size == sizeof(u32))) + port->mapbase += *prop; + + /* Check for registers offset within the devices address range */ + prop = of_get_property(np, "reg-shift", &prop_size); + if (prop && (prop_size == sizeof(u32))) + port->regshift = *prop; + port->irq = irq_of_parse_and_map(np, 0); port->iotype = UPIO_MEM; port->type = type;