提交 b6378cb3 编写于 作者: N Niklas Söderlund 提交者: Mauro Carvalho Chehab

edac: i5100 fix erroneous define for M1Err

According to [1] the define for M1Err in the FERR_NF_MEM register is
wrong. It should be at position 1 not 0.

[1] Intel 5100 Memory Controller Hub Chipset Doc.Nr: 318378
    http://www.intel.com/content/dam/doc/datasheet/5100-
    memory-controller-hub-chipset-datasheet.pdf
Reported-by: NBa Thang Nguyen <thang.b.nguyen@dektech.com.au>
Signed-off-by: NNiklas Söderlund <niklas.soderlund@ericsson.com>
Signed-off-by: NMauro Carvalho Chehab <mchehab@redhat.com>
上级 7fae0db4
...@@ -49,7 +49,7 @@ ...@@ -49,7 +49,7 @@
#define I5100_FERR_NF_MEM_M6ERR_MASK (1 << 6) #define I5100_FERR_NF_MEM_M6ERR_MASK (1 << 6)
#define I5100_FERR_NF_MEM_M5ERR_MASK (1 << 5) #define I5100_FERR_NF_MEM_M5ERR_MASK (1 << 5)
#define I5100_FERR_NF_MEM_M4ERR_MASK (1 << 4) #define I5100_FERR_NF_MEM_M4ERR_MASK (1 << 4)
#define I5100_FERR_NF_MEM_M1ERR_MASK 1 #define I5100_FERR_NF_MEM_M1ERR_MASK (1 << 1)
#define I5100_FERR_NF_MEM_ANY_MASK \ #define I5100_FERR_NF_MEM_ANY_MASK \
(I5100_FERR_NF_MEM_M16ERR_MASK | \ (I5100_FERR_NF_MEM_M16ERR_MASK | \
I5100_FERR_NF_MEM_M15ERR_MASK | \ I5100_FERR_NF_MEM_M15ERR_MASK | \
......
Markdown is supported
0% .
You are about to add 0 people to the discussion. Proceed with caution.
先完成此消息的编辑!
想要评论请 注册