From b40af3aa7712e8f1b73e00e781cd93181483f649 Mon Sep 17 00:00:00 2001 From: James Hogan Date: Fri, 24 Jun 2011 13:54:06 +0100 Subject: [PATCH] mmc: dw_mmc: clear TXDR/RXDR ints before enabling DMA is only used for transactions exceeding a certain length, otherwise PIO is used. The TXDR and RXDR interrupts are masked when in DMA mode but still fire. When switching to PIO mode (e.g. to get SCR field when an SD card is inserted) these interrupts are not cleared and so they trigger the ISR as soon as they are unmasked. If the previous DMA did a write, then the ISR will handle the TXDR interrupt even if the transaction is a read, completing the transaction without modifying the read buffer. This is fixed primarily by clearing these two interrupts before unmasking them when setting up PIO mode, and also by making the ISR more robust by only handling TXDR/RXDR in the correct read/write direction. Signed-off-by: James Hogan Acked-by: Will Newton Signed-off-by: Chris Ball --- drivers/mmc/host/dw_mmc.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/drivers/mmc/host/dw_mmc.c b/drivers/mmc/host/dw_mmc.c index 22be372cae7d..08c0592ed9bc 100644 --- a/drivers/mmc/host/dw_mmc.c +++ b/drivers/mmc/host/dw_mmc.c @@ -497,6 +497,7 @@ static void dw_mci_submit_data(struct dw_mci *host, struct mmc_data *data) else host->dir_status = DW_MCI_SEND_STATUS; + mci_writel(host, RINTSTS, SDMMC_INT_TXDR | SDMMC_INT_RXDR); temp = mci_readl(host, INTMASK); temp |= SDMMC_INT_TXDR | SDMMC_INT_RXDR; mci_writel(host, INTMASK, temp); @@ -1230,13 +1231,13 @@ static irqreturn_t dw_mci_interrupt(int irq, void *dev_id) if (pending & SDMMC_INT_RXDR) { mci_writel(host, RINTSTS, SDMMC_INT_RXDR); - if (host->sg) + if (host->dir_status == DW_MCI_RECV_STATUS && host->sg) dw_mci_read_data_pio(host); } if (pending & SDMMC_INT_TXDR) { mci_writel(host, RINTSTS, SDMMC_INT_TXDR); - if (host->sg) + if (host->dir_status == DW_MCI_SEND_STATUS && host->sg) dw_mci_write_data_pio(host); } -- GitLab