diff --git a/drivers/gpu/drm/nouveau/nouveau_mem.c b/drivers/gpu/drm/nouveau/nouveau_mem.c index 3d43098de25be300505debe9c69942100524de6c..f0e2a439f26a7162344fdaf2b59c6d23188edfca 100644 --- a/drivers/gpu/drm/nouveau/nouveau_mem.c +++ b/drivers/gpu/drm/nouveau/nouveau_mem.c @@ -735,6 +735,8 @@ nouveau_mem_gddr3_mr(struct drm_device *dev, u32 freq, struct nouveau_pm_memtiming *boot, struct nouveau_pm_memtiming *t) { + u8 rver, rlen, *ramcfg = nouveau_perf_ramcfg(dev, freq, &rver, &rlen); + if (len < 15) { t->drive_strength = boot->drive_strength; t->odt = boot->odt; @@ -763,9 +765,17 @@ nouveau_mem_gddr3_mr(struct drm_device *dev, u32 freq, /* CAS */ ((nv_mem_cl_lut_gddr3[e->tCL] & 0x7) << 4) | ((nv_mem_cl_lut_gddr3[e->tCL] & 0x8) >> 2); + t->mr[1] = (boot->mr[1] & 0x100f40) | t->drive_strength | (t->odt << 2) | (nv_mem_wr_lut_gddr3[e->tWR] & 0xf) << 4; + if (ramcfg && rver == 0x00) { + /* DLL enable/disable */ + t->mr[1] &= ~0x00000040; + if (ramcfg[3] & 0x08) + t->mr[1] |= 0x00000040; + } + t->mr[2] = boot->mr[2]; NV_DEBUG(dev, "(%u) MR: %08x %08x %08x", t->id, diff --git a/drivers/gpu/drm/nouveau/nouveau_perf.c b/drivers/gpu/drm/nouveau/nouveau_perf.c index bd6071f10008ab5dc2e4e5294b8573df285d2fb6..cc8beb8e2f06bf9f3225714e86ea8a1e9c7a1174 100644 --- a/drivers/gpu/drm/nouveau/nouveau_perf.c +++ b/drivers/gpu/drm/nouveau/nouveau_perf.c @@ -139,7 +139,7 @@ nouveau_perf_rammap(struct drm_device *dev, u32 freq, return NULL; } -static u8 * +u8 * nouveau_perf_ramcfg(struct drm_device *dev, u32 freq, u8 *ver, u8 *len) { struct drm_nouveau_private *dev_priv = dev->dev_private; diff --git a/drivers/gpu/drm/nouveau/nouveau_pm.h b/drivers/gpu/drm/nouveau/nouveau_pm.h index 5a61f05f49da5f2d6086ed58f1c3d25b8d444d50..1a8ae15803a0f61c8658be9c7293855a88afb340 100644 --- a/drivers/gpu/drm/nouveau/nouveau_pm.h +++ b/drivers/gpu/drm/nouveau/nouveau_pm.h @@ -60,6 +60,7 @@ int nouveau_voltage_gpio_set(struct drm_device *, int voltage); void nouveau_perf_init(struct drm_device *); void nouveau_perf_fini(struct drm_device *); u8 *nouveau_perf_timing(struct drm_device *, u32 freq, u8 *ver, u8 *len); +u8 *nouveau_perf_ramcfg(struct drm_device *, u32 freq, u8 *ver, u8 *len); /* nouveau_mem.c */ void nouveau_mem_timing_init(struct drm_device *);