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提交 a9ba6151 编写于 作者: M Mark Brown
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ASoC: Rename WM8915 to WM8996 

For marketing reasons the part will be called WM8996. In order to avoid
user confusion rename the driver to reflect this.
Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
Acked-by: NKukjin Kim <kgene.kim@samsung.com>
Acked-by: NLiam Girdwood <lrg@ti.com>
上级 322a8b03
隐藏空白更改
内联 并排
Showing with 6758 addition and 3763 deletion
arch/arm/mach-s3c64xx/mach-crag6410.c
浏览文件 @ a9ba6151
......@@ -65,7 +65,7 @@
#include <plat/iic.h>
#include <plat/pm.h>
#include <sound/wm8915.h>
#include <sound/wm8996.h>
#include <sound/wm8962.h>
#include <sound/wm9081.h>
......@@ -614,7 +614,7 @@ static struct wm831x_pdata glenfarclas_pmic_pdata __initdata = {
.disable_touch = true,
};
static struct wm8915_retune_mobile_config wm8915_retune[] = {
static struct wm8996_retune_mobile_config wm8996_retune[] = {
{
.name = "Sub LPF",
.rate = 48000,
......@@ -635,12 +635,12 @@ static struct wm8915_retune_mobile_config wm8915_retune[] = {
},
};
static struct wm8915_pdata wm8915_pdata __initdata = {
static struct wm8996_pdata wm8996_pdata __initdata = {
.ldo_ena = S3C64XX_GPN(7),
.gpio_base = CODEC_GPIO_BASE,
.micdet_def = 1,
.inl_mode = WM8915_DIFFERRENTIAL_1,
.inr_mode = WM8915_DIFFERRENTIAL_1,
.inl_mode = WM8996_DIFFERRENTIAL_1,
.inr_mode = WM8996_DIFFERRENTIAL_1,
.irq_flags = IRQF_TRIGGER_RISING,
......@@ -652,8 +652,8 @@ static struct wm8915_pdata wm8915_pdata __initdata = {
0x020e, /* GPIO5 == CLKOUT */
},
.retune_mobile_cfgs = wm8915_retune,
.num_retune_mobile_cfgs = ARRAY_SIZE(wm8915_retune),
.retune_mobile_cfgs = wm8996_retune,
.num_retune_mobile_cfgs = ARRAY_SIZE(wm8996_retune),
};
static struct wm8962_pdata wm8962_pdata __initdata = {
......@@ -679,8 +679,8 @@ static struct i2c_board_info i2c_devs1[] __initdata = {
.platform_data = &glenfarclas_pmic_pdata },
{ I2C_BOARD_INFO("wm1250-ev1", 0x27) },
{ I2C_BOARD_INFO("wm8915", 0x1a),
.platform_data = &wm8915_pdata,
{ I2C_BOARD_INFO("wm8996", 0x1a),
.platform_data = &wm8996_pdata,
.irq = GLENFARCLAS_PMIC_IRQ_BASE + WM831X_IRQ_GPIO_2,
},
{ I2C_BOARD_INFO("wm9081", 0x6c),
......
include/sound/wm8915.h → include/sound/wm8996.h
浏览文件 @ a9ba6151
/*
* linux/sound/wm8915.h -- Platform data for WM8915
* linux/sound/wm8996.h -- Platform data for WM8996
*
* Copyright 2011 Wolfson Microelectronics. PLC.
*
......@@ -8,14 +8,14 @@
* published by the Free Software Foundation.
*/
#ifndef __LINUX_SND_WM8903_H
#define __LINUX_SND_WM8903_H
#ifndef __LINUX_SND_WM8996_H
#define __LINUX_SND_WM8996_H
enum wm8915_inmode {
WM8915_DIFFERRENTIAL_1 = 0, /* IN1xP - IN1xN */
WM8915_INVERTING = 1, /* IN1xN */
WM8915_NON_INVERTING = 2, /* IN1xP */
WM8915_DIFFERENTIAL_2 = 3, /* IN2xP - IN2xP */
enum wm8996_inmode {
WM8996_DIFFERRENTIAL_1 = 0, /* IN1xP - IN1xN */
WM8996_INVERTING = 1, /* IN1xN */
WM8996_NON_INVERTING = 2, /* IN1xP */
WM8996_DIFFERENTIAL_2 = 3, /* IN2xP - IN2xP */
};
/**
......@@ -25,23 +25,23 @@ enum wm8915_inmode {
* Configurations are expected to be generated using the ReTune Mobile
* control panel in WISCE - see http://www.wolfsonmicro.com/wisce/
*/
struct wm8915_retune_mobile_config {
struct wm8996_retune_mobile_config {
const char *name;
int rate;
u16 regs[20];
};
#define WM8915_SET_DEFAULT 0x10000
#define WM8996_SET_DEFAULT 0x10000
struct wm8915_pdata {
struct wm8996_pdata {
int irq_flags; /** Set IRQ trigger flags; default active low */
int ldo_ena; /** GPIO for LDO1; -1 for none */
int micdet_def; /** Default MICDET_SRC/HP1FB_SRC/MICD_BIAS */
enum wm8915_inmode inl_mode;
enum wm8915_inmode inr_mode;
enum wm8996_inmode inl_mode;
enum wm8996_inmode inr_mode;
u32 spkmute_seq; /** Value for register 0x802 */
......@@ -49,7 +49,7 @@ struct wm8915_pdata {
u32 gpio_default[5];
int num_retune_mobile_cfgs;
struct wm8915_retune_mobile_config *retune_mobile_cfgs;
struct wm8996_retune_mobile_config *retune_mobile_cfgs;
};
#endif
sound/soc/codecs/Kconfig
浏览文件 @ a9ba6151
......@@ -78,7 +78,6 @@ config SND_SOC_ALL_CODECS
select SND_SOC_WM8900 if I2C
select SND_SOC_WM8903 if I2C
select SND_SOC_WM8904 if I2C
select SND_SOC_WM8915 if I2C
select SND_SOC_WM8940 if I2C
select SND_SOC_WM8955 if I2C
select SND_SOC_WM8960 if I2C
......@@ -95,6 +94,7 @@ config SND_SOC_ALL_CODECS
select SND_SOC_WM8993 if I2C
select SND_SOC_WM8994 if MFD_WM8994
select SND_SOC_WM8995 if SND_SOC_I2C_AND_SPI
select SND_SOC_WM8996 if I2C
select SND_SOC_WM9081 if I2C
select SND_SOC_WM9090 if I2C
select SND_SOC_WM9705 if SND_SOC_AC97_BUS
......@@ -329,9 +329,6 @@ config SND_SOC_WM8903
config SND_SOC_WM8904
tristate
config SND_SOC_WM8915
tristate
config SND_SOC_WM8940
tristate
......@@ -380,6 +377,9 @@ config SND_SOC_WM8994
config SND_SOC_WM8995
tristate
config SND_SOC_WM8996
tristate
config SND_SOC_WM9081
tristate
......
sound/soc/codecs/Makefile
浏览文件 @ a9ba6151
......@@ -63,7 +63,7 @@ snd-soc-wm8804-objs := wm8804.o
snd-soc-wm8900-objs := wm8900.o
snd-soc-wm8903-objs := wm8903.o
snd-soc-wm8904-objs := wm8904.o
snd-soc-wm8915-objs := wm8915.o
snd-soc-wm8996-objs := wm8996.o
snd-soc-wm8940-objs := wm8940.o
snd-soc-wm8955-objs := wm8955.o
snd-soc-wm8960-objs := wm8960.o
......@@ -160,7 +160,7 @@ obj-$(CONFIG_SND_SOC_WM8804) += snd-soc-wm8804.o
obj-$(CONFIG_SND_SOC_WM8900) += snd-soc-wm8900.o
obj-$(CONFIG_SND_SOC_WM8903) += snd-soc-wm8903.o
obj-$(CONFIG_SND_SOC_WM8904) += snd-soc-wm8904.o
obj-$(CONFIG_SND_SOC_WM8915) += snd-soc-wm8915.o
obj-$(CONFIG_SND_SOC_WM8996) += snd-soc-wm8996.o
obj-$(CONFIG_SND_SOC_WM8940) += snd-soc-wm8940.o
obj-$(CONFIG_SND_SOC_WM8955) += snd-soc-wm8955.o
obj-$(CONFIG_SND_SOC_WM8960) += snd-soc-wm8960.o
......
sound/soc/codecs/wm8915.h 已删除 100644 → 0
浏览文件 @ 322a8b03
因为 它太大了无法显示 source diff 。你可以改为 查看blob。
sound/soc/codecs/wm8915.c → sound/soc/codecs/wm8996.c
浏览文件 @ a9ba6151
/*
* wm8915.c - WM8915 audio codec interface
* wm8996.c - WM8996 audio codec interface
*
* Copyright 2011 Wolfson Microelectronics PLC.
* Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
......@@ -31,25 +31,25 @@
#include <sound/tlv.h>
#include <trace/events/asoc.h>
#include <sound/wm8915.h>
#include "wm8915.h"
#include <sound/wm8996.h>
#include "wm8996.h"
#define WM8915_AIFS 2
#define WM8996_AIFS 2
#define HPOUT1L 1
#define HPOUT1R 2
#define HPOUT2L 4
#define HPOUT2R 8
#define WM8915_NUM_SUPPLIES 4
static const char *wm8915_supply_names[WM8915_NUM_SUPPLIES] = {
#define WM8996_NUM_SUPPLIES 4
static const char *wm8996_supply_names[WM8996_NUM_SUPPLIES] = {
"DBVDD",
"AVDD1",
"AVDD2",
"CPVDD",
};
struct wm8915_priv {
struct wm8996_priv {
struct snd_soc_codec *codec;
int ldo1ena;
......@@ -69,13 +69,13 @@ struct wm8915_priv {
u16 hpout_ena;
u16 hpout_pending;
struct regulator_bulk_data supplies[WM8915_NUM_SUPPLIES];
struct notifier_block disable_nb[WM8915_NUM_SUPPLIES];
struct regulator_bulk_data supplies[WM8996_NUM_SUPPLIES];
struct notifier_block disable_nb[WM8996_NUM_SUPPLIES];
struct wm8915_pdata pdata;
struct wm8996_pdata pdata;
int rx_rate[WM8915_AIFS];
int bclk_rate[WM8915_AIFS];
int rx_rate[WM8996_AIFS];
int bclk_rate[WM8996_AIFS];
/* Platform dependant ReTune mobile configuration */
int num_retune_mobile_texts;
......@@ -86,7 +86,7 @@ struct wm8915_priv {
struct snd_soc_jack *jack;
bool detecting;
bool jack_mic;
wm8915_polarity_fn polarity_cb;
wm8996_polarity_fn polarity_cb;
#ifdef CONFIG_GPIOLIB
struct gpio_chip gpio_chip;
......@@ -97,314 +97,314 @@ struct wm8915_priv {
* there's no way I can see to get from a callback to the caller
* except container_of().
*/
#define WM8915_REGULATOR_EVENT(n) \
static int wm8915_regulator_event_##n(struct notifier_block *nb, \
#define WM8996_REGULATOR_EVENT(n) \
static int wm8996_regulator_event_##n(struct notifier_block *nb, \
unsigned long event, void *data) \
{ \
struct wm8915_priv *wm8915 = container_of(nb, struct wm8915_priv, \
struct wm8996_priv *wm8996 = container_of(nb, struct wm8996_priv, \
disable_nb[n]); \
if (event & REGULATOR_EVENT_DISABLE) { \
wm8915->codec->cache_sync = 1; \
wm8996->codec->cache_sync = 1; \
} \
return 0; \
}
WM8915_REGULATOR_EVENT(0)
WM8915_REGULATOR_EVENT(1)
WM8915_REGULATOR_EVENT(2)
WM8915_REGULATOR_EVENT(3)
static const u16 wm8915_reg[WM8915_MAX_REGISTER] = {
[WM8915_SOFTWARE_RESET] = 0x8915,
[WM8915_POWER_MANAGEMENT_7] = 0x10,
[WM8915_DAC1_HPOUT1_VOLUME] = 0x88,
[WM8915_DAC2_HPOUT2_VOLUME] = 0x88,
[WM8915_DAC1_LEFT_VOLUME] = 0x2c0,
[WM8915_DAC1_RIGHT_VOLUME] = 0x2c0,
[WM8915_DAC2_LEFT_VOLUME] = 0x2c0,
[WM8915_DAC2_RIGHT_VOLUME] = 0x2c0,
[WM8915_OUTPUT1_LEFT_VOLUME] = 0x80,
[WM8915_OUTPUT1_RIGHT_VOLUME] = 0x80,
[WM8915_OUTPUT2_LEFT_VOLUME] = 0x80,
[WM8915_OUTPUT2_RIGHT_VOLUME] = 0x80,
[WM8915_MICBIAS_1] = 0x39,
[WM8915_MICBIAS_2] = 0x39,
[WM8915_LDO_1] = 0x3,
[WM8915_LDO_2] = 0x13,
[WM8915_ACCESSORY_DETECT_MODE_1] = 0x4,
[WM8915_HEADPHONE_DETECT_1] = 0x20,
[WM8915_MIC_DETECT_1] = 0x7600,
[WM8915_MIC_DETECT_2] = 0xbf,
[WM8915_CHARGE_PUMP_1] = 0x1f25,
[WM8915_CHARGE_PUMP_2] = 0xab19,
[WM8915_DC_SERVO_5] = 0x2a2a,
[WM8915_CONTROL_INTERFACE_1] = 0x8004,
[WM8915_CLOCKING_1] = 0x10,
[WM8915_AIF_RATE] = 0x83,
[WM8915_FLL_CONTROL_4] = 0x5dc0,
[WM8915_FLL_CONTROL_5] = 0xc84,
[WM8915_FLL_EFS_2] = 0x2,
[WM8915_AIF1_TX_LRCLK_1] = 0x80,
[WM8915_AIF1_TX_LRCLK_2] = 0x8,
[WM8915_AIF1_RX_LRCLK_1] = 0x80,
[WM8915_AIF1TX_DATA_CONFIGURATION_1] = 0x1818,
[WM8915_AIF1RX_DATA_CONFIGURATION] = 0x1818,
[WM8915_AIF1TX_TEST] = 0x7,
[WM8915_AIF2_TX_LRCLK_1] = 0x80,
[WM8915_AIF2_TX_LRCLK_2] = 0x8,
[WM8915_AIF2_RX_LRCLK_1] = 0x80,
[WM8915_AIF2TX_DATA_CONFIGURATION_1] = 0x1818,
[WM8915_AIF2RX_DATA_CONFIGURATION] = 0x1818,
[WM8915_AIF2TX_TEST] = 0x1,
[WM8915_DSP1_TX_LEFT_VOLUME] = 0xc0,
[WM8915_DSP1_TX_RIGHT_VOLUME] = 0xc0,
[WM8915_DSP1_RX_LEFT_VOLUME] = 0xc0,
[WM8915_DSP1_RX_RIGHT_VOLUME] = 0xc0,
[WM8915_DSP1_TX_FILTERS] = 0x2000,
[WM8915_DSP1_RX_FILTERS_1] = 0x200,
[WM8915_DSP1_RX_FILTERS_2] = 0x10,
[WM8915_DSP1_DRC_1] = 0x98,
[WM8915_DSP1_DRC_2] = 0x845,
[WM8915_DSP1_RX_EQ_GAINS_1] = 0x6318,
[WM8915_DSP1_RX_EQ_GAINS_2] = 0x6300,
[WM8915_DSP1_RX_EQ_BAND_1_A] = 0xfca,
[WM8915_DSP1_RX_EQ_BAND_1_B] = 0x400,
[WM8915_DSP1_RX_EQ_BAND_1_PG] = 0xd8,
[WM8915_DSP1_RX_EQ_BAND_2_A] = 0x1eb5,
[WM8915_DSP1_RX_EQ_BAND_2_B] = 0xf145,
[WM8915_DSP1_RX_EQ_BAND_2_C] = 0xb75,
[WM8915_DSP1_RX_EQ_BAND_2_PG] = 0x1c5,
[WM8915_DSP1_RX_EQ_BAND_3_A] = 0x1c58,
[WM8915_DSP1_RX_EQ_BAND_3_B] = 0xf373,
[WM8915_DSP1_RX_EQ_BAND_3_C] = 0xa54,
[WM8915_DSP1_RX_EQ_BAND_3_PG] = 0x558,
[WM8915_DSP1_RX_EQ_BAND_4_A] = 0x168e,
[WM8915_DSP1_RX_EQ_BAND_4_B] = 0xf829,
[WM8915_DSP1_RX_EQ_BAND_4_C] = 0x7ad,
[WM8915_DSP1_RX_EQ_BAND_4_PG] = 0x1103,
[WM8915_DSP1_RX_EQ_BAND_5_A] = 0x564,
[WM8915_DSP1_RX_EQ_BAND_5_B] = 0x559,
[WM8915_DSP1_RX_EQ_BAND_5_PG] = 0x4000,
[WM8915_DSP2_TX_LEFT_VOLUME] = 0xc0,
[WM8915_DSP2_TX_RIGHT_VOLUME] = 0xc0,
[WM8915_DSP2_RX_LEFT_VOLUME] = 0xc0,
[WM8915_DSP2_RX_RIGHT_VOLUME] = 0xc0,
[WM8915_DSP2_TX_FILTERS] = 0x2000,
[WM8915_DSP2_RX_FILTERS_1] = 0x200,
[WM8915_DSP2_RX_FILTERS_2] = 0x10,
[WM8915_DSP2_DRC_1] = 0x98,
[WM8915_DSP2_DRC_2] = 0x845,
[WM8915_DSP2_RX_EQ_GAINS_1] = 0x6318,
[WM8915_DSP2_RX_EQ_GAINS_2] = 0x6300,
[WM8915_DSP2_RX_EQ_BAND_1_A] = 0xfca,
[WM8915_DSP2_RX_EQ_BAND_1_B] = 0x400,
[WM8915_DSP2_RX_EQ_BAND_1_PG] = 0xd8,
[WM8915_DSP2_RX_EQ_BAND_2_A] = 0x1eb5,
[WM8915_DSP2_RX_EQ_BAND_2_B] = 0xf145,
[WM8915_DSP2_RX_EQ_BAND_2_C] = 0xb75,
[WM8915_DSP2_RX_EQ_BAND_2_PG] = 0x1c5,
[WM8915_DSP2_RX_EQ_BAND_3_A] = 0x1c58,
[WM8915_DSP2_RX_EQ_BAND_3_B] = 0xf373,
[WM8915_DSP2_RX_EQ_BAND_3_C] = 0xa54,
[WM8915_DSP2_RX_EQ_BAND_3_PG] = 0x558,
[WM8915_DSP2_RX_EQ_BAND_4_A] = 0x168e,
[WM8915_DSP2_RX_EQ_BAND_4_B] = 0xf829,
[WM8915_DSP2_RX_EQ_BAND_4_C] = 0x7ad,
[WM8915_DSP2_RX_EQ_BAND_4_PG] = 0x1103,
[WM8915_DSP2_RX_EQ_BAND_5_A] = 0x564,
[WM8915_DSP2_RX_EQ_BAND_5_B] = 0x559,
[WM8915_DSP2_RX_EQ_BAND_5_PG] = 0x4000,
[WM8915_OVERSAMPLING] = 0xd,
[WM8915_SIDETONE] = 0x1040,
[WM8915_GPIO_1] = 0xa101,
[WM8915_GPIO_2] = 0xa101,
[WM8915_GPIO_3] = 0xa101,
[WM8915_GPIO_4] = 0xa101,
[WM8915_GPIO_5] = 0xa101,
[WM8915_PULL_CONTROL_2] = 0x140,
[WM8915_INTERRUPT_STATUS_1_MASK] = 0x1f,
[WM8915_INTERRUPT_STATUS_2_MASK] = 0x1ecf,
[WM8915_RIGHT_PDM_SPEAKER] = 0x1,
[WM8915_PDM_SPEAKER_MUTE_SEQUENCE] = 0x69,
[WM8915_PDM_SPEAKER_VOLUME] = 0x66,
[WM8915_WRITE_SEQUENCER_0] = 0x1,
[WM8915_WRITE_SEQUENCER_1] = 0x1,
[WM8915_WRITE_SEQUENCER_3] = 0x6,
[WM8915_WRITE_SEQUENCER_4] = 0x40,
[WM8915_WRITE_SEQUENCER_5] = 0x1,
[WM8915_WRITE_SEQUENCER_6] = 0xf,
[WM8915_WRITE_SEQUENCER_7] = 0x6,
[WM8915_WRITE_SEQUENCER_8] = 0x1,
[WM8915_WRITE_SEQUENCER_9] = 0x3,
[WM8915_WRITE_SEQUENCER_10] = 0x104,
[WM8915_WRITE_SEQUENCER_12] = 0x60,
[WM8915_WRITE_SEQUENCER_13] = 0x11,
[WM8915_WRITE_SEQUENCER_14] = 0x401,
[WM8915_WRITE_SEQUENCER_16] = 0x50,
[WM8915_WRITE_SEQUENCER_17] = 0x3,
[WM8915_WRITE_SEQUENCER_18] = 0x100,
[WM8915_WRITE_SEQUENCER_20] = 0x51,
[WM8915_WRITE_SEQUENCER_21] = 0x3,
[WM8915_WRITE_SEQUENCER_22] = 0x104,
[WM8915_WRITE_SEQUENCER_23] = 0xa,
[WM8915_WRITE_SEQUENCER_24] = 0x60,
[WM8915_WRITE_SEQUENCER_25] = 0x3b,
[WM8915_WRITE_SEQUENCER_26] = 0x502,
[WM8915_WRITE_SEQUENCER_27] = 0x100,
[WM8915_WRITE_SEQUENCER_28] = 0x2fff,
[WM8915_WRITE_SEQUENCER_32] = 0x2fff,
[WM8915_WRITE_SEQUENCER_36] = 0x2fff,
[WM8915_WRITE_SEQUENCER_40] = 0x2fff,
[WM8915_WRITE_SEQUENCER_44] = 0x2fff,
[WM8915_WRITE_SEQUENCER_48] = 0x2fff,
[WM8915_WRITE_SEQUENCER_52] = 0x2fff,
[WM8915_WRITE_SEQUENCER_56] = 0x2fff,
[WM8915_WRITE_SEQUENCER_60] = 0x2fff,
[WM8915_WRITE_SEQUENCER_64] = 0x1,
[WM8915_WRITE_SEQUENCER_65] = 0x1,
[WM8915_WRITE_SEQUENCER_67] = 0x6,
[WM8915_WRITE_SEQUENCER_68] = 0x40,
[WM8915_WRITE_SEQUENCER_69] = 0x1,
[WM8915_WRITE_SEQUENCER_70] = 0xf,
[WM8915_WRITE_SEQUENCER_71] = 0x6,
[WM8915_WRITE_SEQUENCER_72] = 0x1,
[WM8915_WRITE_SEQUENCER_73] = 0x3,
[WM8915_WRITE_SEQUENCER_74] = 0x104,
[WM8915_WRITE_SEQUENCER_76] = 0x60,
[WM8915_WRITE_SEQUENCER_77] = 0x11,
[WM8915_WRITE_SEQUENCER_78] = 0x401,
[WM8915_WRITE_SEQUENCER_80] = 0x50,
[WM8915_WRITE_SEQUENCER_81] = 0x3,
[WM8915_WRITE_SEQUENCER_82] = 0x100,
[WM8915_WRITE_SEQUENCER_84] = 0x60,
[WM8915_WRITE_SEQUENCER_85] = 0x3b,
[WM8915_WRITE_SEQUENCER_86] = 0x502,
[WM8915_WRITE_SEQUENCER_87] = 0x100,
[WM8915_WRITE_SEQUENCER_88] = 0x2fff,
[WM8915_WRITE_SEQUENCER_92] = 0x2fff,
[WM8915_WRITE_SEQUENCER_96] = 0x2fff,
[WM8915_WRITE_SEQUENCER_100] = 0x2fff,
[WM8915_WRITE_SEQUENCER_104] = 0x2fff,
[WM8915_WRITE_SEQUENCER_108] = 0x2fff,
[WM8915_WRITE_SEQUENCER_112] = 0x2fff,
[WM8915_WRITE_SEQUENCER_116] = 0x2fff,
[WM8915_WRITE_SEQUENCER_120] = 0x2fff,
[WM8915_WRITE_SEQUENCER_124] = 0x2fff,
[WM8915_WRITE_SEQUENCER_128] = 0x1,
[WM8915_WRITE_SEQUENCER_129] = 0x1,
[WM8915_WRITE_SEQUENCER_131] = 0x6,
[WM8915_WRITE_SEQUENCER_132] = 0x40,
[WM8915_WRITE_SEQUENCER_133] = 0x1,
[WM8915_WRITE_SEQUENCER_134] = 0xf,
[WM8915_WRITE_SEQUENCER_135] = 0x6,
[WM8915_WRITE_SEQUENCER_136] = 0x1,
[WM8915_WRITE_SEQUENCER_137] = 0x3,
[WM8915_WRITE_SEQUENCER_138] = 0x106,
[WM8915_WRITE_SEQUENCER_140] = 0x61,
[WM8915_WRITE_SEQUENCER_141] = 0x11,
[WM8915_WRITE_SEQUENCER_142] = 0x401,
[WM8915_WRITE_SEQUENCER_144] = 0x50,
[WM8915_WRITE_SEQUENCER_145] = 0x3,
[WM8915_WRITE_SEQUENCER_146] = 0x102,
[WM8915_WRITE_SEQUENCER_148] = 0x51,
[WM8915_WRITE_SEQUENCER_149] = 0x3,
[WM8915_WRITE_SEQUENCER_150] = 0x106,
[WM8915_WRITE_SEQUENCER_151] = 0xa,
[WM8915_WRITE_SEQUENCER_152] = 0x61,
[WM8915_WRITE_SEQUENCER_153] = 0x3b,
[WM8915_WRITE_SEQUENCER_154] = 0x502,
[WM8915_WRITE_SEQUENCER_155] = 0x100,
[WM8915_WRITE_SEQUENCER_156] = 0x2fff,
[WM8915_WRITE_SEQUENCER_160] = 0x2fff,
[WM8915_WRITE_SEQUENCER_164] = 0x2fff,
[WM8915_WRITE_SEQUENCER_168] = 0x2fff,
[WM8915_WRITE_SEQUENCER_172] = 0x2fff,
[WM8915_WRITE_SEQUENCER_176] = 0x2fff,
[WM8915_WRITE_SEQUENCER_180] = 0x2fff,
[WM8915_WRITE_SEQUENCER_184] = 0x2fff,
[WM8915_WRITE_SEQUENCER_188] = 0x2fff,
[WM8915_WRITE_SEQUENCER_192] = 0x1,
[WM8915_WRITE_SEQUENCER_193] = 0x1,
[WM8915_WRITE_SEQUENCER_195] = 0x6,
[WM8915_WRITE_SEQUENCER_196] = 0x40,
[WM8915_WRITE_SEQUENCER_197] = 0x1,
[WM8915_WRITE_SEQUENCER_198] = 0xf,
[WM8915_WRITE_SEQUENCER_199] = 0x6,
[WM8915_WRITE_SEQUENCER_200] = 0x1,
[WM8915_WRITE_SEQUENCER_201] = 0x3,
[WM8915_WRITE_SEQUENCER_202] = 0x106,
[WM8915_WRITE_SEQUENCER_204] = 0x61,
[WM8915_WRITE_SEQUENCER_205] = 0x11,
[WM8915_WRITE_SEQUENCER_206] = 0x401,
[WM8915_WRITE_SEQUENCER_208] = 0x50,
[WM8915_WRITE_SEQUENCER_209] = 0x3,
[WM8915_WRITE_SEQUENCER_210] = 0x102,
[WM8915_WRITE_SEQUENCER_212] = 0x61,
[WM8915_WRITE_SEQUENCER_213] = 0x3b,
[WM8915_WRITE_SEQUENCER_214] = 0x502,
[WM8915_WRITE_SEQUENCER_215] = 0x100,
[WM8915_WRITE_SEQUENCER_216] = 0x2fff,
[WM8915_WRITE_SEQUENCER_220] = 0x2fff,
[WM8915_WRITE_SEQUENCER_224] = 0x2fff,
[WM8915_WRITE_SEQUENCER_228] = 0x2fff,
[WM8915_WRITE_SEQUENCER_232] = 0x2fff,
[WM8915_WRITE_SEQUENCER_236] = 0x2fff,
[WM8915_WRITE_SEQUENCER_240] = 0x2fff,
[WM8915_WRITE_SEQUENCER_244] = 0x2fff,
[WM8915_WRITE_SEQUENCER_248] = 0x2fff,
[WM8915_WRITE_SEQUENCER_252] = 0x2fff,
[WM8915_WRITE_SEQUENCER_256] = 0x60,
[WM8915_WRITE_SEQUENCER_258] = 0x601,
[WM8915_WRITE_SEQUENCER_260] = 0x50,
[WM8915_WRITE_SEQUENCER_262] = 0x100,
[WM8915_WRITE_SEQUENCER_264] = 0x1,
[WM8915_WRITE_SEQUENCER_266] = 0x104,
[WM8915_WRITE_SEQUENCER_267] = 0x100,
[WM8915_WRITE_SEQUENCER_268] = 0x2fff,
[WM8915_WRITE_SEQUENCER_272] = 0x2fff,
[WM8915_WRITE_SEQUENCER_276] = 0x2fff,
[WM8915_WRITE_SEQUENCER_280] = 0x2fff,
[WM8915_WRITE_SEQUENCER_284] = 0x2fff,
[WM8915_WRITE_SEQUENCER_288] = 0x2fff,
[WM8915_WRITE_SEQUENCER_292] = 0x2fff,
[WM8915_WRITE_SEQUENCER_296] = 0x2fff,
[WM8915_WRITE_SEQUENCER_300] = 0x2fff,
[WM8915_WRITE_SEQUENCER_304] = 0x2fff,
[WM8915_WRITE_SEQUENCER_308] = 0x2fff,
[WM8915_WRITE_SEQUENCER_312] = 0x2fff,
[WM8915_WRITE_SEQUENCER_316] = 0x2fff,
[WM8915_WRITE_SEQUENCER_320] = 0x61,
[WM8915_WRITE_SEQUENCER_322] = 0x601,
[WM8915_WRITE_SEQUENCER_324] = 0x50,
[WM8915_WRITE_SEQUENCER_326] = 0x102,
[WM8915_WRITE_SEQUENCER_328] = 0x1,
[WM8915_WRITE_SEQUENCER_330] = 0x106,
[WM8915_WRITE_SEQUENCER_331] = 0x100,
[WM8915_WRITE_SEQUENCER_332] = 0x2fff,
[WM8915_WRITE_SEQUENCER_336] = 0x2fff,
[WM8915_WRITE_SEQUENCER_340] = 0x2fff,
[WM8915_WRITE_SEQUENCER_344] = 0x2fff,
[WM8915_WRITE_SEQUENCER_348] = 0x2fff,
[WM8915_WRITE_SEQUENCER_352] = 0x2fff,
[WM8915_WRITE_SEQUENCER_356] = 0x2fff,
[WM8915_WRITE_SEQUENCER_360] = 0x2fff,
[WM8915_WRITE_SEQUENCER_364] = 0x2fff,
[WM8915_WRITE_SEQUENCER_368] = 0x2fff,
[WM8915_WRITE_SEQUENCER_372] = 0x2fff,
[WM8915_WRITE_SEQUENCER_376] = 0x2fff,
[WM8915_WRITE_SEQUENCER_380] = 0x2fff,
[WM8915_WRITE_SEQUENCER_384] = 0x60,
[WM8915_WRITE_SEQUENCER_386] = 0x601,
[WM8915_WRITE_SEQUENCER_388] = 0x61,
[WM8915_WRITE_SEQUENCER_390] = 0x601,
[WM8915_WRITE_SEQUENCER_392] = 0x50,
[WM8915_WRITE_SEQUENCER_394] = 0x300,
[WM8915_WRITE_SEQUENCER_396] = 0x1,
[WM8915_WRITE_SEQUENCER_398] = 0x304,
[WM8915_WRITE_SEQUENCER_400] = 0x40,
[WM8915_WRITE_SEQUENCER_402] = 0xf,
[WM8915_WRITE_SEQUENCER_404] = 0x1,
[WM8915_WRITE_SEQUENCER_407] = 0x100,
WM8996_REGULATOR_EVENT(0)
WM8996_REGULATOR_EVENT(1)
WM8996_REGULATOR_EVENT(2)
WM8996_REGULATOR_EVENT(3)
static const u16 wm8996_reg[WM8996_MAX_REGISTER] = {
[WM8996_SOFTWARE_RESET] = 0x8996,
[WM8996_POWER_MANAGEMENT_7] = 0x10,
[WM8996_DAC1_HPOUT1_VOLUME] = 0x88,
[WM8996_DAC2_HPOUT2_VOLUME] = 0x88,
[WM8996_DAC1_LEFT_VOLUME] = 0x2c0,
[WM8996_DAC1_RIGHT_VOLUME] = 0x2c0,
[WM8996_DAC2_LEFT_VOLUME] = 0x2c0,
[WM8996_DAC2_RIGHT_VOLUME] = 0x2c0,
[WM8996_OUTPUT1_LEFT_VOLUME] = 0x80,
[WM8996_OUTPUT1_RIGHT_VOLUME] = 0x80,
[WM8996_OUTPUT2_LEFT_VOLUME] = 0x80,
[WM8996_OUTPUT2_RIGHT_VOLUME] = 0x80,
[WM8996_MICBIAS_1] = 0x39,
[WM8996_MICBIAS_2] = 0x39,
[WM8996_LDO_1] = 0x3,
[WM8996_LDO_2] = 0x13,
[WM8996_ACCESSORY_DETECT_MODE_1] = 0x4,
[WM8996_HEADPHONE_DETECT_1] = 0x20,
[WM8996_MIC_DETECT_1] = 0x7600,
[WM8996_MIC_DETECT_2] = 0xbf,
[WM8996_CHARGE_PUMP_1] = 0x1f25,
[WM8996_CHARGE_PUMP_2] = 0xab19,
[WM8996_DC_SERVO_5] = 0x2a2a,
[WM8996_CONTROL_INTERFACE_1] = 0x8004,
[WM8996_CLOCKING_1] = 0x10,
[WM8996_AIF_RATE] = 0x83,
[WM8996_FLL_CONTROL_4] = 0x5dc0,
[WM8996_FLL_CONTROL_5] = 0xc84,
[WM8996_FLL_EFS_2] = 0x2,
[WM8996_AIF1_TX_LRCLK_1] = 0x80,
[WM8996_AIF1_TX_LRCLK_2] = 0x8,
[WM8996_AIF1_RX_LRCLK_1] = 0x80,
[WM8996_AIF1TX_DATA_CONFIGURATION_1] = 0x1818,
[WM8996_AIF1RX_DATA_CONFIGURATION] = 0x1818,
[WM8996_AIF1TX_TEST] = 0x7,
[WM8996_AIF2_TX_LRCLK_1] = 0x80,
[WM8996_AIF2_TX_LRCLK_2] = 0x8,
[WM8996_AIF2_RX_LRCLK_1] = 0x80,
[WM8996_AIF2TX_DATA_CONFIGURATION_1] = 0x1818,
[WM8996_AIF2RX_DATA_CONFIGURATION] = 0x1818,
[WM8996_AIF2TX_TEST] = 0x1,
[WM8996_DSP1_TX_LEFT_VOLUME] = 0xc0,
[WM8996_DSP1_TX_RIGHT_VOLUME] = 0xc0,
[WM8996_DSP1_RX_LEFT_VOLUME] = 0xc0,
[WM8996_DSP1_RX_RIGHT_VOLUME] = 0xc0,
[WM8996_DSP1_TX_FILTERS] = 0x2000,
[WM8996_DSP1_RX_FILTERS_1] = 0x200,
[WM8996_DSP1_RX_FILTERS_2] = 0x10,
[WM8996_DSP1_DRC_1] = 0x98,
[WM8996_DSP1_DRC_2] = 0x845,
[WM8996_DSP1_RX_EQ_GAINS_1] = 0x6318,
[WM8996_DSP1_RX_EQ_GAINS_2] = 0x6300,
[WM8996_DSP1_RX_EQ_BAND_1_A] = 0xfca,
[WM8996_DSP1_RX_EQ_BAND_1_B] = 0x400,
[WM8996_DSP1_RX_EQ_BAND_1_PG] = 0xd8,
[WM8996_DSP1_RX_EQ_BAND_2_A] = 0x1eb5,
[WM8996_DSP1_RX_EQ_BAND_2_B] = 0xf145,
[WM8996_DSP1_RX_EQ_BAND_2_C] = 0xb75,
[WM8996_DSP1_RX_EQ_BAND_2_PG] = 0x1c5,
[WM8996_DSP1_RX_EQ_BAND_3_A] = 0x1c58,
[WM8996_DSP1_RX_EQ_BAND_3_B] = 0xf373,
[WM8996_DSP1_RX_EQ_BAND_3_C] = 0xa54,
[WM8996_DSP1_RX_EQ_BAND_3_PG] = 0x558,
[WM8996_DSP1_RX_EQ_BAND_4_A] = 0x168e,
[WM8996_DSP1_RX_EQ_BAND_4_B] = 0xf829,
[WM8996_DSP1_RX_EQ_BAND_4_C] = 0x7ad,
[WM8996_DSP1_RX_EQ_BAND_4_PG] = 0x1103,
[WM8996_DSP1_RX_EQ_BAND_5_A] = 0x564,
[WM8996_DSP1_RX_EQ_BAND_5_B] = 0x559,
[WM8996_DSP1_RX_EQ_BAND_5_PG] = 0x4000,
[WM8996_DSP2_TX_LEFT_VOLUME] = 0xc0,
[WM8996_DSP2_TX_RIGHT_VOLUME] = 0xc0,
[WM8996_DSP2_RX_LEFT_VOLUME] = 0xc0,
[WM8996_DSP2_RX_RIGHT_VOLUME] = 0xc0,
[WM8996_DSP2_TX_FILTERS] = 0x2000,
[WM8996_DSP2_RX_FILTERS_1] = 0x200,
[WM8996_DSP2_RX_FILTERS_2] = 0x10,
[WM8996_DSP2_DRC_1] = 0x98,
[WM8996_DSP2_DRC_2] = 0x845,
[WM8996_DSP2_RX_EQ_GAINS_1] = 0x6318,
[WM8996_DSP2_RX_EQ_GAINS_2] = 0x6300,
[WM8996_DSP2_RX_EQ_BAND_1_A] = 0xfca,
[WM8996_DSP2_RX_EQ_BAND_1_B] = 0x400,
[WM8996_DSP2_RX_EQ_BAND_1_PG] = 0xd8,
[WM8996_DSP2_RX_EQ_BAND_2_A] = 0x1eb5,
[WM8996_DSP2_RX_EQ_BAND_2_B] = 0xf145,
[WM8996_DSP2_RX_EQ_BAND_2_C] = 0xb75,
[WM8996_DSP2_RX_EQ_BAND_2_PG] = 0x1c5,
[WM8996_DSP2_RX_EQ_BAND_3_A] = 0x1c58,
[WM8996_DSP2_RX_EQ_BAND_3_B] = 0xf373,
[WM8996_DSP2_RX_EQ_BAND_3_C] = 0xa54,
[WM8996_DSP2_RX_EQ_BAND_3_PG] = 0x558,
[WM8996_DSP2_RX_EQ_BAND_4_A] = 0x168e,
[WM8996_DSP2_RX_EQ_BAND_4_B] = 0xf829,
[WM8996_DSP2_RX_EQ_BAND_4_C] = 0x7ad,
[WM8996_DSP2_RX_EQ_BAND_4_PG] = 0x1103,
[WM8996_DSP2_RX_EQ_BAND_5_A] = 0x564,
[WM8996_DSP2_RX_EQ_BAND_5_B] = 0x559,
[WM8996_DSP2_RX_EQ_BAND_5_PG] = 0x4000,
[WM8996_OVERSAMPLING] = 0xd,
[WM8996_SIDETONE] = 0x1040,
[WM8996_GPIO_1] = 0xa101,
[WM8996_GPIO_2] = 0xa101,
[WM8996_GPIO_3] = 0xa101,
[WM8996_GPIO_4] = 0xa101,
[WM8996_GPIO_5] = 0xa101,
[WM8996_PULL_CONTROL_2] = 0x140,
[WM8996_INTERRUPT_STATUS_1_MASK] = 0x1f,
[WM8996_INTERRUPT_STATUS_2_MASK] = 0x1ecf,
[WM8996_RIGHT_PDM_SPEAKER] = 0x1,
[WM8996_PDM_SPEAKER_MUTE_SEQUENCE] = 0x69,
[WM8996_PDM_SPEAKER_VOLUME] = 0x66,
[WM8996_WRITE_SEQUENCER_0] = 0x1,
[WM8996_WRITE_SEQUENCER_1] = 0x1,
[WM8996_WRITE_SEQUENCER_3] = 0x6,
[WM8996_WRITE_SEQUENCER_4] = 0x40,
[WM8996_WRITE_SEQUENCER_5] = 0x1,
[WM8996_WRITE_SEQUENCER_6] = 0xf,
[WM8996_WRITE_SEQUENCER_7] = 0x6,
[WM8996_WRITE_SEQUENCER_8] = 0x1,
[WM8996_WRITE_SEQUENCER_9] = 0x3,
[WM8996_WRITE_SEQUENCER_10] = 0x104,
[WM8996_WRITE_SEQUENCER_12] = 0x60,
[WM8996_WRITE_SEQUENCER_13] = 0x11,
[WM8996_WRITE_SEQUENCER_14] = 0x401,
[WM8996_WRITE_SEQUENCER_16] = 0x50,
[WM8996_WRITE_SEQUENCER_17] = 0x3,
[WM8996_WRITE_SEQUENCER_18] = 0x100,
[WM8996_WRITE_SEQUENCER_20] = 0x51,
[WM8996_WRITE_SEQUENCER_21] = 0x3,
[WM8996_WRITE_SEQUENCER_22] = 0x104,
[WM8996_WRITE_SEQUENCER_23] = 0xa,
[WM8996_WRITE_SEQUENCER_24] = 0x60,
[WM8996_WRITE_SEQUENCER_25] = 0x3b,
[WM8996_WRITE_SEQUENCER_26] = 0x502,
[WM8996_WRITE_SEQUENCER_27] = 0x100,
[WM8996_WRITE_SEQUENCER_28] = 0x2fff,
[WM8996_WRITE_SEQUENCER_32] = 0x2fff,
[WM8996_WRITE_SEQUENCER_36] = 0x2fff,
[WM8996_WRITE_SEQUENCER_40] = 0x2fff,
[WM8996_WRITE_SEQUENCER_44] = 0x2fff,
[WM8996_WRITE_SEQUENCER_48] = 0x2fff,
[WM8996_WRITE_SEQUENCER_52] = 0x2fff,
[WM8996_WRITE_SEQUENCER_56] = 0x2fff,
[WM8996_WRITE_SEQUENCER_60] = 0x2fff,
[WM8996_WRITE_SEQUENCER_64] = 0x1,
[WM8996_WRITE_SEQUENCER_65] = 0x1,
[WM8996_WRITE_SEQUENCER_67] = 0x6,
[WM8996_WRITE_SEQUENCER_68] = 0x40,
[WM8996_WRITE_SEQUENCER_69] = 0x1,
[WM8996_WRITE_SEQUENCER_70] = 0xf,
[WM8996_WRITE_SEQUENCER_71] = 0x6,
[WM8996_WRITE_SEQUENCER_72] = 0x1,
[WM8996_WRITE_SEQUENCER_73] = 0x3,
[WM8996_WRITE_SEQUENCER_74] = 0x104,
[WM8996_WRITE_SEQUENCER_76] = 0x60,
[WM8996_WRITE_SEQUENCER_77] = 0x11,
[WM8996_WRITE_SEQUENCER_78] = 0x401,
[WM8996_WRITE_SEQUENCER_80] = 0x50,
[WM8996_WRITE_SEQUENCER_81] = 0x3,
[WM8996_WRITE_SEQUENCER_82] = 0x100,
[WM8996_WRITE_SEQUENCER_84] = 0x60,
[WM8996_WRITE_SEQUENCER_85] = 0x3b,
[WM8996_WRITE_SEQUENCER_86] = 0x502,
[WM8996_WRITE_SEQUENCER_87] = 0x100,
[WM8996_WRITE_SEQUENCER_88] = 0x2fff,
[WM8996_WRITE_SEQUENCER_92] = 0x2fff,
[WM8996_WRITE_SEQUENCER_96] = 0x2fff,
[WM8996_WRITE_SEQUENCER_100] = 0x2fff,
[WM8996_WRITE_SEQUENCER_104] = 0x2fff,
[WM8996_WRITE_SEQUENCER_108] = 0x2fff,
[WM8996_WRITE_SEQUENCER_112] = 0x2fff,
[WM8996_WRITE_SEQUENCER_116] = 0x2fff,
[WM8996_WRITE_SEQUENCER_120] = 0x2fff,
[WM8996_WRITE_SEQUENCER_124] = 0x2fff,
[WM8996_WRITE_SEQUENCER_128] = 0x1,
[WM8996_WRITE_SEQUENCER_129] = 0x1,
[WM8996_WRITE_SEQUENCER_131] = 0x6,
[WM8996_WRITE_SEQUENCER_132] = 0x40,
[WM8996_WRITE_SEQUENCER_133] = 0x1,
[WM8996_WRITE_SEQUENCER_134] = 0xf,
[WM8996_WRITE_SEQUENCER_135] = 0x6,
[WM8996_WRITE_SEQUENCER_136] = 0x1,
[WM8996_WRITE_SEQUENCER_137] = 0x3,
[WM8996_WRITE_SEQUENCER_138] = 0x106,
[WM8996_WRITE_SEQUENCER_140] = 0x61,
[WM8996_WRITE_SEQUENCER_141] = 0x11,
[WM8996_WRITE_SEQUENCER_142] = 0x401,
[WM8996_WRITE_SEQUENCER_144] = 0x50,
[WM8996_WRITE_SEQUENCER_145] = 0x3,
[WM8996_WRITE_SEQUENCER_146] = 0x102,
[WM8996_WRITE_SEQUENCER_148] = 0x51,
[WM8996_WRITE_SEQUENCER_149] = 0x3,
[WM8996_WRITE_SEQUENCER_150] = 0x106,
[WM8996_WRITE_SEQUENCER_151] = 0xa,
[WM8996_WRITE_SEQUENCER_152] = 0x61,
[WM8996_WRITE_SEQUENCER_153] = 0x3b,
[WM8996_WRITE_SEQUENCER_154] = 0x502,
[WM8996_WRITE_SEQUENCER_155] = 0x100,
[WM8996_WRITE_SEQUENCER_156] = 0x2fff,
[WM8996_WRITE_SEQUENCER_160] = 0x2fff,
[WM8996_WRITE_SEQUENCER_164] = 0x2fff,
[WM8996_WRITE_SEQUENCER_168] = 0x2fff,
[WM8996_WRITE_SEQUENCER_172] = 0x2fff,
[WM8996_WRITE_SEQUENCER_176] = 0x2fff,
[WM8996_WRITE_SEQUENCER_180] = 0x2fff,
[WM8996_WRITE_SEQUENCER_184] = 0x2fff,
[WM8996_WRITE_SEQUENCER_188] = 0x2fff,
[WM8996_WRITE_SEQUENCER_192] = 0x1,
[WM8996_WRITE_SEQUENCER_193] = 0x1,
[WM8996_WRITE_SEQUENCER_195] = 0x6,
[WM8996_WRITE_SEQUENCER_196] = 0x40,
[WM8996_WRITE_SEQUENCER_197] = 0x1,
[WM8996_WRITE_SEQUENCER_198] = 0xf,
[WM8996_WRITE_SEQUENCER_199] = 0x6,
[WM8996_WRITE_SEQUENCER_200] = 0x1,
[WM8996_WRITE_SEQUENCER_201] = 0x3,
[WM8996_WRITE_SEQUENCER_202] = 0x106,
[WM8996_WRITE_SEQUENCER_204] = 0x61,
[WM8996_WRITE_SEQUENCER_205] = 0x11,
[WM8996_WRITE_SEQUENCER_206] = 0x401,
[WM8996_WRITE_SEQUENCER_208] = 0x50,
[WM8996_WRITE_SEQUENCER_209] = 0x3,
[WM8996_WRITE_SEQUENCER_210] = 0x102,
[WM8996_WRITE_SEQUENCER_212] = 0x61,
[WM8996_WRITE_SEQUENCER_213] = 0x3b,
[WM8996_WRITE_SEQUENCER_214] = 0x502,
[WM8996_WRITE_SEQUENCER_215] = 0x100,
[WM8996_WRITE_SEQUENCER_216] = 0x2fff,
[WM8996_WRITE_SEQUENCER_220] = 0x2fff,
[WM8996_WRITE_SEQUENCER_224] = 0x2fff,
[WM8996_WRITE_SEQUENCER_228] = 0x2fff,
[WM8996_WRITE_SEQUENCER_232] = 0x2fff,
[WM8996_WRITE_SEQUENCER_236] = 0x2fff,
[WM8996_WRITE_SEQUENCER_240] = 0x2fff,
[WM8996_WRITE_SEQUENCER_244] = 0x2fff,
[WM8996_WRITE_SEQUENCER_248] = 0x2fff,
[WM8996_WRITE_SEQUENCER_252] = 0x2fff,
[WM8996_WRITE_SEQUENCER_256] = 0x60,
[WM8996_WRITE_SEQUENCER_258] = 0x601,
[WM8996_WRITE_SEQUENCER_260] = 0x50,
[WM8996_WRITE_SEQUENCER_262] = 0x100,
[WM8996_WRITE_SEQUENCER_264] = 0x1,
[WM8996_WRITE_SEQUENCER_266] = 0x104,
[WM8996_WRITE_SEQUENCER_267] = 0x100,
[WM8996_WRITE_SEQUENCER_268] = 0x2fff,
[WM8996_WRITE_SEQUENCER_272] = 0x2fff,
[WM8996_WRITE_SEQUENCER_276] = 0x2fff,
[WM8996_WRITE_SEQUENCER_280] = 0x2fff,
[WM8996_WRITE_SEQUENCER_284] = 0x2fff,
[WM8996_WRITE_SEQUENCER_288] = 0x2fff,
[WM8996_WRITE_SEQUENCER_292] = 0x2fff,
[WM8996_WRITE_SEQUENCER_296] = 0x2fff,
[WM8996_WRITE_SEQUENCER_300] = 0x2fff,
[WM8996_WRITE_SEQUENCER_304] = 0x2fff,
[WM8996_WRITE_SEQUENCER_308] = 0x2fff,
[WM8996_WRITE_SEQUENCER_312] = 0x2fff,
[WM8996_WRITE_SEQUENCER_316] = 0x2fff,
[WM8996_WRITE_SEQUENCER_320] = 0x61,
[WM8996_WRITE_SEQUENCER_322] = 0x601,
[WM8996_WRITE_SEQUENCER_324] = 0x50,
[WM8996_WRITE_SEQUENCER_326] = 0x102,
[WM8996_WRITE_SEQUENCER_328] = 0x1,
[WM8996_WRITE_SEQUENCER_330] = 0x106,
[WM8996_WRITE_SEQUENCER_331] = 0x100,
[WM8996_WRITE_SEQUENCER_332] = 0x2fff,
[WM8996_WRITE_SEQUENCER_336] = 0x2fff,
[WM8996_WRITE_SEQUENCER_340] = 0x2fff,
[WM8996_WRITE_SEQUENCER_344] = 0x2fff,
[WM8996_WRITE_SEQUENCER_348] = 0x2fff,
[WM8996_WRITE_SEQUENCER_352] = 0x2fff,
[WM8996_WRITE_SEQUENCER_356] = 0x2fff,
[WM8996_WRITE_SEQUENCER_360] = 0x2fff,
[WM8996_WRITE_SEQUENCER_364] = 0x2fff,
[WM8996_WRITE_SEQUENCER_368] = 0x2fff,
[WM8996_WRITE_SEQUENCER_372] = 0x2fff,
[WM8996_WRITE_SEQUENCER_376] = 0x2fff,
[WM8996_WRITE_SEQUENCER_380] = 0x2fff,
[WM8996_WRITE_SEQUENCER_384] = 0x60,
[WM8996_WRITE_SEQUENCER_386] = 0x601,
[WM8996_WRITE_SEQUENCER_388] = 0x61,
[WM8996_WRITE_SEQUENCER_390] = 0x601,
[WM8996_WRITE_SEQUENCER_392] = 0x50,
[WM8996_WRITE_SEQUENCER_394] = 0x300,
[WM8996_WRITE_SEQUENCER_396] = 0x1,
[WM8996_WRITE_SEQUENCER_398] = 0x304,
[WM8996_WRITE_SEQUENCER_400] = 0x40,
[WM8996_WRITE_SEQUENCER_402] = 0xf,
[WM8996_WRITE_SEQUENCER_404] = 0x1,
[WM8996_WRITE_SEQUENCER_407] = 0x100,
};
static const DECLARE_TLV_DB_SCALE(inpga_tlv, 0, 100, 0);
......@@ -420,50 +420,50 @@ static const char *sidetone_hpf_text[] = {
};
static const struct soc_enum sidetone_hpf =
SOC_ENUM_SINGLE(WM8915_SIDETONE, 7, 6, sidetone_hpf_text);
SOC_ENUM_SINGLE(WM8996_SIDETONE, 7, 6, sidetone_hpf_text);
static const char *hpf_mode_text[] = {
"HiFi", "Custom", "Voice"
};
static const struct soc_enum dsp1tx_hpf_mode =
SOC_ENUM_SINGLE(WM8915_DSP1_TX_FILTERS, 3, 3, hpf_mode_text);
SOC_ENUM_SINGLE(WM8996_DSP1_TX_FILTERS, 3, 3, hpf_mode_text);
static const struct soc_enum dsp2tx_hpf_mode =
SOC_ENUM_SINGLE(WM8915_DSP2_TX_FILTERS, 3, 3, hpf_mode_text);
SOC_ENUM_SINGLE(WM8996_DSP2_TX_FILTERS, 3, 3, hpf_mode_text);
static const char *hpf_cutoff_text[] = {
"50Hz", "75Hz", "100Hz", "150Hz", "200Hz", "300Hz", "400Hz"
};
static const struct soc_enum dsp1tx_hpf_cutoff =
SOC_ENUM_SINGLE(WM8915_DSP1_TX_FILTERS, 0, 7, hpf_cutoff_text);
SOC_ENUM_SINGLE(WM8996_DSP1_TX_FILTERS, 0, 7, hpf_cutoff_text);
static const struct soc_enum dsp2tx_hpf_cutoff =
SOC_ENUM_SINGLE(WM8915_DSP2_TX_FILTERS, 0, 7, hpf_cutoff_text);
SOC_ENUM_SINGLE(WM8996_DSP2_TX_FILTERS, 0, 7, hpf_cutoff_text);
static void wm8915_set_retune_mobile(struct snd_soc_codec *codec, int block)
static void wm8996_set_retune_mobile(struct snd_soc_codec *codec, int block)
{
struct wm8915_priv *wm8915 = snd_soc_codec_get_drvdata(codec);
struct wm8915_pdata *pdata = &wm8915->pdata;
struct wm8996_priv *wm8996 = snd_soc_codec_get_drvdata(codec);
struct wm8996_pdata *pdata = &wm8996->pdata;
int base, best, best_val, save, i, cfg, iface;
if (!wm8915->num_retune_mobile_texts)
if (!wm8996->num_retune_mobile_texts)
return;
switch (block) {
case 0:
base = WM8915_DSP1_RX_EQ_GAINS_1;
if (snd_soc_read(codec, WM8915_POWER_MANAGEMENT_8) &
WM8915_DSP1RX_SRC)
base = WM8996_DSP1_RX_EQ_GAINS_1;
if (snd_soc_read(codec, WM8996_POWER_MANAGEMENT_8) &
WM8996_DSP1RX_SRC)
iface = 1;
else
iface = 0;
break;
case 1:
base = WM8915_DSP1_RX_EQ_GAINS_2;
if (snd_soc_read(codec, WM8915_POWER_MANAGEMENT_8) &
WM8915_DSP2RX_SRC)
base = WM8996_DSP1_RX_EQ_GAINS_2;
if (snd_soc_read(codec, WM8996_POWER_MANAGEMENT_8) &
WM8996_DSP2RX_SRC)
iface = 1;
else
iface = 0;
......@@ -474,17 +474,17 @@ static void wm8915_set_retune_mobile(struct snd_soc_codec *codec, int block)
/* Find the version of the currently selected configuration
* with the nearest sample rate. */
cfg = wm8915->retune_mobile_cfg[block];
cfg = wm8996->retune_mobile_cfg[block];
best = 0;
best_val = INT_MAX;
for (i = 0; i < pdata->num_retune_mobile_cfgs; i++) {
if (strcmp(pdata->retune_mobile_cfgs[i].name,
wm8915->retune_mobile_texts[cfg]) == 0 &&
wm8996->retune_mobile_texts[cfg]) == 0 &&
abs(pdata->retune_mobile_cfgs[i].rate
- wm8915->rx_rate[iface]) < best_val) {
- wm8996->rx_rate[iface]) < best_val) {
best = i;
best_val = abs(pdata->retune_mobile_cfgs[i].rate
- wm8915->rx_rate[iface]);
- wm8996->rx_rate[iface]);
}
}
......@@ -492,23 +492,23 @@ static void wm8915_set_retune_mobile(struct snd_soc_codec *codec, int block)
block,
pdata->retune_mobile_cfgs[best].name,
pdata->retune_mobile_cfgs[best].rate,
wm8915->rx_rate[iface]);
wm8996->rx_rate[iface]);
/* The EQ will be disabled while reconfiguring it, remember the
* current configuration.
*/
save = snd_soc_read(codec, base);
save &= WM8915_DSP1RX_EQ_ENA;
save &= WM8996_DSP1RX_EQ_ENA;
for (i = 0; i < ARRAY_SIZE(pdata->retune_mobile_cfgs[best].regs); i++)
snd_soc_update_bits(codec, base + i, 0xffff,
pdata->retune_mobile_cfgs[best].regs[i]);
snd_soc_update_bits(codec, base, WM8915_DSP1RX_EQ_ENA, save);
snd_soc_update_bits(codec, base, WM8996_DSP1RX_EQ_ENA, save);
}
/* Icky as hell but saves code duplication */
static int wm8915_get_retune_mobile_block(const char *name)
static int wm8996_get_retune_mobile_block(const char *name)
{
if (strcmp(name, "DSP1 EQ Mode") == 0)
return 0;
......@@ -517,13 +517,13 @@ static int wm8915_get_retune_mobile_block(const char *name)
return -EINVAL;
}
static int wm8915_put_retune_mobile_enum(struct snd_kcontrol *kcontrol,
static int wm8996_put_retune_mobile_enum(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
struct wm8915_priv *wm8915 = snd_soc_codec_get_drvdata(codec);
struct wm8915_pdata *pdata = &wm8915->pdata;
int block = wm8915_get_retune_mobile_block(kcontrol->id.name);
struct wm8996_priv *wm8996 = snd_soc_codec_get_drvdata(codec);
struct wm8996_pdata *pdata = &wm8996->pdata;
int block = wm8996_get_retune_mobile_block(kcontrol->id.name);
int value = ucontrol->value.integer.value[0];
if (block < 0)
......@@ -532,129 +532,129 @@ static int wm8915_put_retune_mobile_enum(struct snd_kcontrol *kcontrol,
if (value >= pdata->num_retune_mobile_cfgs)
return -EINVAL;
wm8915->retune_mobile_cfg[block] = value;
wm8996->retune_mobile_cfg[block] = value;
wm8915_set_retune_mobile(codec, block);
wm8996_set_retune_mobile(codec, block);
return 0;
}
static int wm8915_get_retune_mobile_enum(struct snd_kcontrol *kcontrol,
static int wm8996_get_retune_mobile_enum(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
struct wm8915_priv *wm8915 = snd_soc_codec_get_drvdata(codec);
int block = wm8915_get_retune_mobile_block(kcontrol->id.name);
struct wm8996_priv *wm8996 = snd_soc_codec_get_drvdata(codec);
int block = wm8996_get_retune_mobile_block(kcontrol->id.name);
ucontrol->value.enumerated.item[0] = wm8915->retune_mobile_cfg[block];
ucontrol->value.enumerated.item[0] = wm8996->retune_mobile_cfg[block];
return 0;
}
static const struct snd_kcontrol_new wm8915_snd_controls[] = {
SOC_DOUBLE_R_TLV("Capture Volume", WM8915_LEFT_LINE_INPUT_VOLUME,
WM8915_RIGHT_LINE_INPUT_VOLUME, 0, 31, 0, inpga_tlv),
SOC_DOUBLE_R("Capture ZC Switch", WM8915_LEFT_LINE_INPUT_VOLUME,
WM8915_RIGHT_LINE_INPUT_VOLUME, 5, 1, 0),
static const struct snd_kcontrol_new wm8996_snd_controls[] = {
SOC_DOUBLE_R_TLV("Capture Volume", WM8996_LEFT_LINE_INPUT_VOLUME,
WM8996_RIGHT_LINE_INPUT_VOLUME, 0, 31, 0, inpga_tlv),
SOC_DOUBLE_R("Capture ZC Switch", WM8996_LEFT_LINE_INPUT_VOLUME,
WM8996_RIGHT_LINE_INPUT_VOLUME, 5, 1, 0),
SOC_DOUBLE_TLV("DAC1 Sidetone Volume", WM8915_DAC1_MIXER_VOLUMES,
SOC_DOUBLE_TLV("DAC1 Sidetone Volume", WM8996_DAC1_MIXER_VOLUMES,
0, 5, 24, 0, sidetone_tlv),
SOC_DOUBLE_TLV("DAC2 Sidetone Volume", WM8915_DAC2_MIXER_VOLUMES,
SOC_DOUBLE_TLV("DAC2 Sidetone Volume", WM8996_DAC2_MIXER_VOLUMES,
0, 5, 24, 0, sidetone_tlv),
SOC_SINGLE("Sidetone LPF Switch", WM8915_SIDETONE, 12, 1, 0),
SOC_SINGLE("Sidetone LPF Switch", WM8996_SIDETONE, 12, 1, 0),
SOC_ENUM("Sidetone HPF Cut-off", sidetone_hpf),
SOC_SINGLE("Sidetone HPF Switch", WM8915_SIDETONE, 6, 1, 0),
SOC_SINGLE("Sidetone HPF Switch", WM8996_SIDETONE, 6, 1, 0),
SOC_DOUBLE_R_TLV("DSP1 Capture Volume", WM8915_DSP1_TX_LEFT_VOLUME,
WM8915_DSP1_TX_RIGHT_VOLUME, 1, 96, 0, digital_tlv),
SOC_DOUBLE_R_TLV("DSP2 Capture Volume", WM8915_DSP2_TX_LEFT_VOLUME,
WM8915_DSP2_TX_RIGHT_VOLUME, 1, 96, 0, digital_tlv),
SOC_DOUBLE_R_TLV("DSP1 Capture Volume", WM8996_DSP1_TX_LEFT_VOLUME,
WM8996_DSP1_TX_RIGHT_VOLUME, 1, 96, 0, digital_tlv),
SOC_DOUBLE_R_TLV("DSP2 Capture Volume", WM8996_DSP2_TX_LEFT_VOLUME,
WM8996_DSP2_TX_RIGHT_VOLUME, 1, 96, 0, digital_tlv),
SOC_SINGLE("DSP1 Capture Notch Filter Switch", WM8915_DSP1_TX_FILTERS,
SOC_SINGLE("DSP1 Capture Notch Filter Switch", WM8996_DSP1_TX_FILTERS,
13, 1, 0),
SOC_DOUBLE("DSP1 Capture HPF Switch", WM8915_DSP1_TX_FILTERS, 12, 11, 1, 0),
SOC_DOUBLE("DSP1 Capture HPF Switch", WM8996_DSP1_TX_FILTERS, 12, 11, 1, 0),
SOC_ENUM("DSP1 Capture HPF Mode", dsp1tx_hpf_mode),
SOC_ENUM("DSP1 Capture HPF Cutoff", dsp1tx_hpf_cutoff),
SOC_SINGLE("DSP2 Capture Notch Filter Switch", WM8915_DSP2_TX_FILTERS,
SOC_SINGLE("DSP2 Capture Notch Filter Switch", WM8996_DSP2_TX_FILTERS,
13, 1, 0),
SOC_DOUBLE("DSP2 Capture HPF Switch", WM8915_DSP2_TX_FILTERS, 12, 11, 1, 0),
SOC_DOUBLE("DSP2 Capture HPF Switch", WM8996_DSP2_TX_FILTERS, 12, 11, 1, 0),
SOC_ENUM("DSP2 Capture HPF Mode", dsp2tx_hpf_mode),
SOC_ENUM("DSP2 Capture HPF Cutoff", dsp2tx_hpf_cutoff),
SOC_DOUBLE_R_TLV("DSP1 Playback Volume", WM8915_DSP1_RX_LEFT_VOLUME,
WM8915_DSP1_RX_RIGHT_VOLUME, 1, 112, 0, digital_tlv),
SOC_SINGLE("DSP1 Playback Switch", WM8915_DSP1_RX_FILTERS_1, 9, 1, 1),
SOC_DOUBLE_R_TLV("DSP1 Playback Volume", WM8996_DSP1_RX_LEFT_VOLUME,
WM8996_DSP1_RX_RIGHT_VOLUME, 1, 112, 0, digital_tlv),
SOC_SINGLE("DSP1 Playback Switch", WM8996_DSP1_RX_FILTERS_1, 9, 1, 1),
SOC_DOUBLE_R_TLV("DSP2 Playback Volume", WM8915_DSP2_RX_LEFT_VOLUME,
WM8915_DSP2_RX_RIGHT_VOLUME, 1, 112, 0, digital_tlv),
SOC_SINGLE("DSP2 Playback Switch", WM8915_DSP2_RX_FILTERS_1, 9, 1, 1),
SOC_DOUBLE_R_TLV("DSP2 Playback Volume", WM8996_DSP2_RX_LEFT_VOLUME,
WM8996_DSP2_RX_RIGHT_VOLUME, 1, 112, 0, digital_tlv),
SOC_SINGLE("DSP2 Playback Switch", WM8996_DSP2_RX_FILTERS_1, 9, 1, 1),
SOC_DOUBLE_R_TLV("DAC1 Volume", WM8915_DAC1_LEFT_VOLUME,
WM8915_DAC1_RIGHT_VOLUME, 1, 112, 0, digital_tlv),
SOC_DOUBLE_R("DAC1 Switch", WM8915_DAC1_LEFT_VOLUME,
WM8915_DAC1_RIGHT_VOLUME, 9, 1, 1),
SOC_DOUBLE_R_TLV("DAC1 Volume", WM8996_DAC1_LEFT_VOLUME,
WM8996_DAC1_RIGHT_VOLUME, 1, 112, 0, digital_tlv),
SOC_DOUBLE_R("DAC1 Switch", WM8996_DAC1_LEFT_VOLUME,
WM8996_DAC1_RIGHT_VOLUME, 9, 1, 1),
SOC_DOUBLE_R_TLV("DAC2 Volume", WM8915_DAC2_LEFT_VOLUME,
WM8915_DAC2_RIGHT_VOLUME, 1, 112, 0, digital_tlv),
SOC_DOUBLE_R("DAC2 Switch", WM8915_DAC2_LEFT_VOLUME,
WM8915_DAC2_RIGHT_VOLUME, 9, 1, 1),
SOC_DOUBLE_R_TLV("DAC2 Volume", WM8996_DAC2_LEFT_VOLUME,
WM8996_DAC2_RIGHT_VOLUME, 1, 112, 0, digital_tlv),
SOC_DOUBLE_R("DAC2 Switch", WM8996_DAC2_LEFT_VOLUME,
WM8996_DAC2_RIGHT_VOLUME, 9, 1, 1),
SOC_SINGLE("Speaker High Performance Switch", WM8915_OVERSAMPLING, 3, 1, 0),
SOC_SINGLE("DMIC High Performance Switch", WM8915_OVERSAMPLING, 2, 1, 0),
SOC_SINGLE("ADC High Performance Switch", WM8915_OVERSAMPLING, 1, 1, 0),
SOC_SINGLE("DAC High Performance Switch", WM8915_OVERSAMPLING, 0, 1, 0),
SOC_SINGLE("Speaker High Performance Switch", WM8996_OVERSAMPLING, 3, 1, 0),
SOC_SINGLE("DMIC High Performance Switch", WM8996_OVERSAMPLING, 2, 1, 0),
SOC_SINGLE("ADC High Performance Switch", WM8996_OVERSAMPLING, 1, 1, 0),
SOC_SINGLE("DAC High Performance Switch", WM8996_OVERSAMPLING, 0, 1, 0),
SOC_SINGLE("DAC Soft Mute Switch", WM8915_DAC_SOFTMUTE, 1, 1, 0),
SOC_SINGLE("DAC Slow Soft Mute Switch", WM8915_DAC_SOFTMUTE, 0, 1, 0),
SOC_SINGLE("DAC Soft Mute Switch", WM8996_DAC_SOFTMUTE, 1, 1, 0),
SOC_SINGLE("DAC Slow Soft Mute Switch", WM8996_DAC_SOFTMUTE, 0, 1, 0),
SOC_DOUBLE_TLV("Digital Output 1 Volume", WM8915_DAC1_HPOUT1_VOLUME, 0, 4,
SOC_DOUBLE_TLV("Digital Output 1 Volume", WM8996_DAC1_HPOUT1_VOLUME, 0, 4,
8, 0, out_digital_tlv),
SOC_DOUBLE_TLV("Digital Output 2 Volume", WM8915_DAC2_HPOUT2_VOLUME, 0, 4,
SOC_DOUBLE_TLV("Digital Output 2 Volume", WM8996_DAC2_HPOUT2_VOLUME, 0, 4,
8, 0, out_digital_tlv),
SOC_DOUBLE_R_TLV("Output 1 Volume", WM8915_OUTPUT1_LEFT_VOLUME,
WM8915_OUTPUT1_RIGHT_VOLUME, 0, 12, 0, out_tlv),
SOC_DOUBLE_R("Output 1 ZC Switch", WM8915_OUTPUT1_LEFT_VOLUME,
WM8915_OUTPUT1_RIGHT_VOLUME, 7, 1, 0),
SOC_DOUBLE_R_TLV("Output 1 Volume", WM8996_OUTPUT1_LEFT_VOLUME,
WM8996_OUTPUT1_RIGHT_VOLUME, 0, 12, 0, out_tlv),
SOC_DOUBLE_R("Output 1 ZC Switch", WM8996_OUTPUT1_LEFT_VOLUME,
WM8996_OUTPUT1_RIGHT_VOLUME, 7, 1, 0),
SOC_DOUBLE_R_TLV("Output 2 Volume", WM8915_OUTPUT2_LEFT_VOLUME,
WM8915_OUTPUT2_RIGHT_VOLUME, 0, 12, 0, out_tlv),
SOC_DOUBLE_R("Output 2 ZC Switch", WM8915_OUTPUT2_LEFT_VOLUME,
WM8915_OUTPUT2_RIGHT_VOLUME, 7, 1, 0),
SOC_DOUBLE_R_TLV("Output 2 Volume", WM8996_OUTPUT2_LEFT_VOLUME,
WM8996_OUTPUT2_RIGHT_VOLUME, 0, 12, 0, out_tlv),
SOC_DOUBLE_R("Output 2 ZC Switch", WM8996_OUTPUT2_LEFT_VOLUME,
WM8996_OUTPUT2_RIGHT_VOLUME, 7, 1, 0),
SOC_DOUBLE_TLV("Speaker Volume", WM8915_PDM_SPEAKER_VOLUME, 0, 4, 8, 0,
SOC_DOUBLE_TLV("Speaker Volume", WM8996_PDM_SPEAKER_VOLUME, 0, 4, 8, 0,
spk_tlv),
SOC_DOUBLE_R("Speaker Switch", WM8915_LEFT_PDM_SPEAKER,
WM8915_RIGHT_PDM_SPEAKER, 3, 1, 1),
SOC_DOUBLE_R("Speaker ZC Switch", WM8915_LEFT_PDM_SPEAKER,
WM8915_RIGHT_PDM_SPEAKER, 2, 1, 0),
SOC_DOUBLE_R("Speaker Switch", WM8996_LEFT_PDM_SPEAKER,
WM8996_RIGHT_PDM_SPEAKER, 3, 1, 1),
SOC_DOUBLE_R("Speaker ZC Switch", WM8996_LEFT_PDM_SPEAKER,
WM8996_RIGHT_PDM_SPEAKER, 2, 1, 0),
SOC_SINGLE("DSP1 EQ Switch", WM8915_DSP1_RX_EQ_GAINS_1, 0, 1, 0),
SOC_SINGLE("DSP2 EQ Switch", WM8915_DSP2_RX_EQ_GAINS_1, 0, 1, 0),
SOC_SINGLE("DSP1 EQ Switch", WM8996_DSP1_RX_EQ_GAINS_1, 0, 1, 0),
SOC_SINGLE("DSP2 EQ Switch", WM8996_DSP2_RX_EQ_GAINS_1, 0, 1, 0),
};
static const struct snd_kcontrol_new wm8915_eq_controls[] = {
SOC_SINGLE_TLV("DSP1 EQ B1 Volume", WM8915_DSP1_RX_EQ_GAINS_1, 11, 31, 0,
static const struct snd_kcontrol_new wm8996_eq_controls[] = {
SOC_SINGLE_TLV("DSP1 EQ B1 Volume", WM8996_DSP1_RX_EQ_GAINS_1, 11, 31, 0,
eq_tlv),
SOC_SINGLE_TLV("DSP1 EQ B2 Volume", WM8915_DSP1_RX_EQ_GAINS_1, 6, 31, 0,
SOC_SINGLE_TLV("DSP1 EQ B2 Volume", WM8996_DSP1_RX_EQ_GAINS_1, 6, 31, 0,
eq_tlv),
SOC_SINGLE_TLV("DSP1 EQ B3 Volume", WM8915_DSP1_RX_EQ_GAINS_1, 1, 31, 0,
SOC_SINGLE_TLV("DSP1 EQ B3 Volume", WM8996_DSP1_RX_EQ_GAINS_1, 1, 31, 0,
eq_tlv),
SOC_SINGLE_TLV("DSP1 EQ B4 Volume", WM8915_DSP1_RX_EQ_GAINS_2, 11, 31, 0,
SOC_SINGLE_TLV("DSP1 EQ B4 Volume", WM8996_DSP1_RX_EQ_GAINS_2, 11, 31, 0,
eq_tlv),
SOC_SINGLE_TLV("DSP1 EQ B5 Volume", WM8915_DSP1_RX_EQ_GAINS_2, 6, 31, 0,
SOC_SINGLE_TLV("DSP1 EQ B5 Volume", WM8996_DSP1_RX_EQ_GAINS_2, 6, 31, 0,
eq_tlv),
SOC_SINGLE_TLV("DSP2 EQ B1 Volume", WM8915_DSP2_RX_EQ_GAINS_1, 11, 31, 0,
SOC_SINGLE_TLV("DSP2 EQ B1 Volume", WM8996_DSP2_RX_EQ_GAINS_1, 11, 31, 0,
eq_tlv),
SOC_SINGLE_TLV("DSP2 EQ B2 Volume", WM8915_DSP2_RX_EQ_GAINS_1, 6, 31, 0,
SOC_SINGLE_TLV("DSP2 EQ B2 Volume", WM8996_DSP2_RX_EQ_GAINS_1, 6, 31, 0,
eq_tlv),
SOC_SINGLE_TLV("DSP2 EQ B3 Volume", WM8915_DSP2_RX_EQ_GAINS_1, 1, 31, 0,
SOC_SINGLE_TLV("DSP2 EQ B3 Volume", WM8996_DSP2_RX_EQ_GAINS_1, 1, 31, 0,
eq_tlv),
SOC_SINGLE_TLV("DSP2 EQ B4 Volume", WM8915_DSP2_RX_EQ_GAINS_2, 11, 31, 0,
SOC_SINGLE_TLV("DSP2 EQ B4 Volume", WM8996_DSP2_RX_EQ_GAINS_2, 11, 31, 0,
eq_tlv),
SOC_SINGLE_TLV("DSP2 EQ B5 Volume", WM8915_DSP2_RX_EQ_GAINS_2, 6, 31, 0,
SOC_SINGLE_TLV("DSP2 EQ B5 Volume", WM8996_DSP2_RX_EQ_GAINS_2, 6, 31, 0,
eq_tlv),
};
......@@ -676,15 +676,15 @@ static int cp_event(struct snd_soc_dapm_widget *w,
static int rmv_short_event(struct snd_soc_dapm_widget *w,
struct snd_kcontrol *kcontrol, int event)
{
struct wm8915_priv *wm8915 = snd_soc_codec_get_drvdata(w->codec);
struct wm8996_priv *wm8996 = snd_soc_codec_get_drvdata(w->codec);
/* Record which outputs we enabled */
switch (event) {
case SND_SOC_DAPM_PRE_PMD:
wm8915->hpout_pending &= ~w->shift;
wm8996->hpout_pending &= ~w->shift;
break;
case SND_SOC_DAPM_PRE_PMU:
wm8915->hpout_pending |= w->shift;
wm8996->hpout_pending |= w->shift;
break;
default:
BUG();
......@@ -697,16 +697,16 @@ static int rmv_short_event(struct snd_soc_dapm_widget *w,
static void wait_for_dc_servo(struct snd_soc_codec *codec, u16 mask)
{
struct i2c_client *i2c = to_i2c_client(codec->dev);
struct wm8915_priv *wm8915 = snd_soc_codec_get_drvdata(codec);
struct wm8996_priv *wm8996 = snd_soc_codec_get_drvdata(codec);
int i, ret;
unsigned long timeout = 200;
snd_soc_write(codec, WM8915_DC_SERVO_2, mask);
snd_soc_write(codec, WM8996_DC_SERVO_2, mask);
/* Use the interrupt if possible */
do {
if (i2c->irq) {
timeout = wait_for_completion_timeout(&wm8915->dcs_done,
timeout = wait_for_completion_timeout(&wm8996->dcs_done,
msecs_to_jiffies(200));
if (timeout == 0)
dev_err(codec->dev, "DC servo timed out\n");
......@@ -719,7 +719,7 @@ static void wait_for_dc_servo(struct snd_soc_codec *codec, u16 mask)
}
}
ret = snd_soc_read(codec, WM8915_DC_SERVO_2);
ret = snd_soc_read(codec, WM8996_DC_SERVO_2);
dev_dbg(codec->dev, "DC servo state: %x\n", ret);
} while (ret & mask);
......@@ -729,86 +729,86 @@ static void wait_for_dc_servo(struct snd_soc_codec *codec, u16 mask)
dev_dbg(codec->dev, "DC servo complete for %x\n", mask);
}
static void wm8915_seq_notifier(struct snd_soc_dapm_context *dapm,
static void wm8996_seq_notifier(struct snd_soc_dapm_context *dapm,
enum snd_soc_dapm_type event, int subseq)
{
struct snd_soc_codec *codec = container_of(dapm,
struct snd_soc_codec, dapm);
struct wm8915_priv *wm8915 = snd_soc_codec_get_drvdata(codec);
struct wm8996_priv *wm8996 = snd_soc_codec_get_drvdata(codec);
u16 val, mask;
/* Complete any pending DC servo starts */
if (wm8915->dcs_pending) {
if (wm8996->dcs_pending) {
dev_dbg(codec->dev, "Starting DC servo for %x\n",
wm8915->dcs_pending);
wm8996->dcs_pending);
/* Trigger a startup sequence */
wait_for_dc_servo(codec, wm8915->dcs_pending
<< WM8915_DCS_TRIG_STARTUP_0_SHIFT);
wait_for_dc_servo(codec, wm8996->dcs_pending
<< WM8996_DCS_TRIG_STARTUP_0_SHIFT);
wm8915->dcs_pending = 0;
wm8996->dcs_pending = 0;
}
if (wm8915->hpout_pending != wm8915->hpout_ena) {
if (wm8996->hpout_pending != wm8996->hpout_ena) {
dev_dbg(codec->dev, "Applying RMV_SHORTs %x->%x\n",
wm8915->hpout_ena, wm8915->hpout_pending);
wm8996->hpout_ena, wm8996->hpout_pending);
val = 0;
mask = 0;
if (wm8915->hpout_pending & HPOUT1L) {
val |= WM8915_HPOUT1L_RMV_SHORT;
mask |= WM8915_HPOUT1L_RMV_SHORT;
if (wm8996->hpout_pending & HPOUT1L) {
val |= WM8996_HPOUT1L_RMV_SHORT;
mask |= WM8996_HPOUT1L_RMV_SHORT;
} else {
mask |= WM8915_HPOUT1L_RMV_SHORT |
WM8915_HPOUT1L_OUTP |
WM8915_HPOUT1L_DLY;
mask |= WM8996_HPOUT1L_RMV_SHORT |
WM8996_HPOUT1L_OUTP |
WM8996_HPOUT1L_DLY;
}
if (wm8915->hpout_pending & HPOUT1R) {
val |= WM8915_HPOUT1R_RMV_SHORT;
mask |= WM8915_HPOUT1R_RMV_SHORT;
if (wm8996->hpout_pending & HPOUT1R) {
val |= WM8996_HPOUT1R_RMV_SHORT;
mask |= WM8996_HPOUT1R_RMV_SHORT;
} else {
mask |= WM8915_HPOUT1R_RMV_SHORT |
WM8915_HPOUT1R_OUTP |
WM8915_HPOUT1R_DLY;
mask |= WM8996_HPOUT1R_RMV_SHORT |
WM8996_HPOUT1R_OUTP |
WM8996_HPOUT1R_DLY;
}
snd_soc_update_bits(codec, WM8915_ANALOGUE_HP_1, mask, val);
snd_soc_update_bits(codec, WM8996_ANALOGUE_HP_1, mask, val);
val = 0;
mask = 0;
if (wm8915->hpout_pending & HPOUT2L) {
val |= WM8915_HPOUT2L_RMV_SHORT;
mask |= WM8915_HPOUT2L_RMV_SHORT;
if (wm8996->hpout_pending & HPOUT2L) {
val |= WM8996_HPOUT2L_RMV_SHORT;
mask |= WM8996_HPOUT2L_RMV_SHORT;
} else {
mask |= WM8915_HPOUT2L_RMV_SHORT |
WM8915_HPOUT2L_OUTP |
WM8915_HPOUT2L_DLY;
mask |= WM8996_HPOUT2L_RMV_SHORT |
WM8996_HPOUT2L_OUTP |
WM8996_HPOUT2L_DLY;
}
if (wm8915->hpout_pending & HPOUT2R) {
val |= WM8915_HPOUT2R_RMV_SHORT;
mask |= WM8915_HPOUT2R_RMV_SHORT;
if (wm8996->hpout_pending & HPOUT2R) {
val |= WM8996_HPOUT2R_RMV_SHORT;
mask |= WM8996_HPOUT2R_RMV_SHORT;
} else {
mask |= WM8915_HPOUT2R_RMV_SHORT |
WM8915_HPOUT2R_OUTP |
WM8915_HPOUT2R_DLY;
mask |= WM8996_HPOUT2R_RMV_SHORT |
WM8996_HPOUT2R_OUTP |
WM8996_HPOUT2R_DLY;
}
snd_soc_update_bits(codec, WM8915_ANALOGUE_HP_2, mask, val);
snd_soc_update_bits(codec, WM8996_ANALOGUE_HP_2, mask, val);
wm8915->hpout_ena = wm8915->hpout_pending;
wm8996->hpout_ena = wm8996->hpout_pending;
}
}
static int dcs_start(struct snd_soc_dapm_widget *w,
struct snd_kcontrol *kcontrol, int event)
{
struct wm8915_priv *wm8915 = snd_soc_codec_get_drvdata(w->codec);
struct wm8996_priv *wm8996 = snd_soc_codec_get_drvdata(w->codec);
switch (event) {
case SND_SOC_DAPM_POST_PMU:
wm8915->dcs_pending |= 1 << w->shift;
wm8996->dcs_pending |= 1 << w->shift;
break;
default:
BUG();
......@@ -823,13 +823,13 @@ static const char *sidetone_text[] = {
};
static const struct soc_enum left_sidetone_enum =
SOC_ENUM_SINGLE(WM8915_SIDETONE, 0, 2, sidetone_text);
SOC_ENUM_SINGLE(WM8996_SIDETONE, 0, 2, sidetone_text);
static const struct snd_kcontrol_new left_sidetone =
SOC_DAPM_ENUM("Left Sidetone", left_sidetone_enum);
static const struct soc_enum right_sidetone_enum =
SOC_ENUM_SINGLE(WM8915_SIDETONE, 1, 2, sidetone_text);
SOC_ENUM_SINGLE(WM8996_SIDETONE, 1, 2, sidetone_text);
static const struct snd_kcontrol_new right_sidetone =
SOC_DAPM_ENUM("Right Sidetone", right_sidetone_enum);
......@@ -839,13 +839,13 @@ static const char *spk_text[] = {
};
static const struct soc_enum spkl_enum =
SOC_ENUM_SINGLE(WM8915_LEFT_PDM_SPEAKER, 0, 4, spk_text);
SOC_ENUM_SINGLE(WM8996_LEFT_PDM_SPEAKER, 0, 4, spk_text);
static const struct snd_kcontrol_new spkl_mux =
SOC_DAPM_ENUM("SPKL", spkl_enum);
static const struct soc_enum spkr_enum =
SOC_ENUM_SINGLE(WM8915_RIGHT_PDM_SPEAKER, 0, 4, spk_text);
SOC_ENUM_SINGLE(WM8996_RIGHT_PDM_SPEAKER, 0, 4, spk_text);
static const struct snd_kcontrol_new spkr_mux =
SOC_DAPM_ENUM("SPKR", spkr_enum);
......@@ -855,7 +855,7 @@ static const char *dsp1rx_text[] = {
};
static const struct soc_enum dsp1rx_enum =
SOC_ENUM_SINGLE(WM8915_POWER_MANAGEMENT_8, 0, 2, dsp1rx_text);
SOC_ENUM_SINGLE(WM8996_POWER_MANAGEMENT_8, 0, 2, dsp1rx_text);
static const struct snd_kcontrol_new dsp1rx =
SOC_DAPM_ENUM("DSP1RX", dsp1rx_enum);
......@@ -865,7 +865,7 @@ static const char *dsp2rx_text[] = {
};
static const struct soc_enum dsp2rx_enum =
SOC_ENUM_SINGLE(WM8915_POWER_MANAGEMENT_8, 4, 2, dsp2rx_text);
SOC_ENUM_SINGLE(WM8996_POWER_MANAGEMENT_8, 4, 2, dsp2rx_text);
static const struct snd_kcontrol_new dsp2rx =
SOC_DAPM_ENUM("DSP2RX", dsp2rx_enum);
......@@ -875,7 +875,7 @@ static const char *aif2tx_text[] = {
};
static const struct soc_enum aif2tx_enum =
SOC_ENUM_SINGLE(WM8915_POWER_MANAGEMENT_8, 6, 3, aif2tx_text);
SOC_ENUM_SINGLE(WM8996_POWER_MANAGEMENT_8, 6, 3, aif2tx_text);
static const struct snd_kcontrol_new aif2tx =
SOC_DAPM_ENUM("AIF2TX", aif2tx_enum);
......@@ -885,83 +885,83 @@ static const char *inmux_text[] = {
};
static const struct soc_enum in1_enum =
SOC_ENUM_SINGLE(WM8915_POWER_MANAGEMENT_7, 0, 3, inmux_text);
SOC_ENUM_SINGLE(WM8996_POWER_MANAGEMENT_7, 0, 3, inmux_text);
static const struct snd_kcontrol_new in1_mux =
SOC_DAPM_ENUM("IN1 Mux", in1_enum);
static const struct soc_enum in2_enum =
SOC_ENUM_SINGLE(WM8915_POWER_MANAGEMENT_7, 4, 3, inmux_text);
SOC_ENUM_SINGLE(WM8996_POWER_MANAGEMENT_7, 4, 3, inmux_text);
static const struct snd_kcontrol_new in2_mux =
SOC_DAPM_ENUM("IN2 Mux", in2_enum);
static const struct snd_kcontrol_new dac2r_mix[] = {
SOC_DAPM_SINGLE("Right Sidetone Switch", WM8915_DAC2_RIGHT_MIXER_ROUTING,
SOC_DAPM_SINGLE("Right Sidetone Switch", WM8996_DAC2_RIGHT_MIXER_ROUTING,
5, 1, 0),
SOC_DAPM_SINGLE("Left Sidetone Switch", WM8915_DAC2_RIGHT_MIXER_ROUTING,
SOC_DAPM_SINGLE("Left Sidetone Switch", WM8996_DAC2_RIGHT_MIXER_ROUTING,
4, 1, 0),
SOC_DAPM_SINGLE("DSP2 Switch", WM8915_DAC2_RIGHT_MIXER_ROUTING, 1, 1, 0),
SOC_DAPM_SINGLE("DSP1 Switch", WM8915_DAC2_RIGHT_MIXER_ROUTING, 0, 1, 0),
SOC_DAPM_SINGLE("DSP2 Switch", WM8996_DAC2_RIGHT_MIXER_ROUTING, 1, 1, 0),
SOC_DAPM_SINGLE("DSP1 Switch", WM8996_DAC2_RIGHT_MIXER_ROUTING, 0, 1, 0),
};
static const struct snd_kcontrol_new dac2l_mix[] = {
SOC_DAPM_SINGLE("Right Sidetone Switch", WM8915_DAC2_LEFT_MIXER_ROUTING,
SOC_DAPM_SINGLE("Right Sidetone Switch", WM8996_DAC2_LEFT_MIXER_ROUTING,
5, 1, 0),
SOC_DAPM_SINGLE("Left Sidetone Switch", WM8915_DAC2_LEFT_MIXER_ROUTING,
SOC_DAPM_SINGLE("Left Sidetone Switch", WM8996_DAC2_LEFT_MIXER_ROUTING,
4, 1, 0),
SOC_DAPM_SINGLE("DSP2 Switch", WM8915_DAC2_LEFT_MIXER_ROUTING, 1, 1, 0),
SOC_DAPM_SINGLE("DSP1 Switch", WM8915_DAC2_LEFT_MIXER_ROUTING, 0, 1, 0),
SOC_DAPM_SINGLE("DSP2 Switch", WM8996_DAC2_LEFT_MIXER_ROUTING, 1, 1, 0),
SOC_DAPM_SINGLE("DSP1 Switch", WM8996_DAC2_LEFT_MIXER_ROUTING, 0, 1, 0),
};
static const struct snd_kcontrol_new dac1r_mix[] = {
SOC_DAPM_SINGLE("Right Sidetone Switch", WM8915_DAC1_RIGHT_MIXER_ROUTING,
SOC_DAPM_SINGLE("Right Sidetone Switch", WM8996_DAC1_RIGHT_MIXER_ROUTING,
5, 1, 0),
SOC_DAPM_SINGLE("Left Sidetone Switch", WM8915_DAC1_RIGHT_MIXER_ROUTING,
SOC_DAPM_SINGLE("Left Sidetone Switch", WM8996_DAC1_RIGHT_MIXER_ROUTING,
4, 1, 0),
SOC_DAPM_SINGLE("DSP2 Switch", WM8915_DAC1_RIGHT_MIXER_ROUTING, 1, 1, 0),
SOC_DAPM_SINGLE("DSP1 Switch", WM8915_DAC1_RIGHT_MIXER_ROUTING, 0, 1, 0),
SOC_DAPM_SINGLE("DSP2 Switch", WM8996_DAC1_RIGHT_MIXER_ROUTING, 1, 1, 0),
SOC_DAPM_SINGLE("DSP1 Switch", WM8996_DAC1_RIGHT_MIXER_ROUTING, 0, 1, 0),
};
static const struct snd_kcontrol_new dac1l_mix[] = {
SOC_DAPM_SINGLE("Right Sidetone Switch", WM8915_DAC1_LEFT_MIXER_ROUTING,
SOC_DAPM_SINGLE("Right Sidetone Switch", WM8996_DAC1_LEFT_MIXER_ROUTING,
5, 1, 0),
SOC_DAPM_SINGLE("Left Sidetone Switch", WM8915_DAC1_LEFT_MIXER_ROUTING,
SOC_DAPM_SINGLE("Left Sidetone Switch", WM8996_DAC1_LEFT_MIXER_ROUTING,
4, 1, 0),
SOC_DAPM_SINGLE("DSP2 Switch", WM8915_DAC1_LEFT_MIXER_ROUTING, 1, 1, 0),
SOC_DAPM_SINGLE("DSP1 Switch", WM8915_DAC1_LEFT_MIXER_ROUTING, 0, 1, 0),
SOC_DAPM_SINGLE("DSP2 Switch", WM8996_DAC1_LEFT_MIXER_ROUTING, 1, 1, 0),
SOC_DAPM_SINGLE("DSP1 Switch", WM8996_DAC1_LEFT_MIXER_ROUTING, 0, 1, 0),
};
static const struct snd_kcontrol_new dsp1txl[] = {
SOC_DAPM_SINGLE("IN1 Switch", WM8915_DSP1_TX_LEFT_MIXER_ROUTING,
SOC_DAPM_SINGLE("IN1 Switch", WM8996_DSP1_TX_LEFT_MIXER_ROUTING,
1, 1, 0),
SOC_DAPM_SINGLE("DAC Switch", WM8915_DSP1_TX_LEFT_MIXER_ROUTING,
SOC_DAPM_SINGLE("DAC Switch", WM8996_DSP1_TX_LEFT_MIXER_ROUTING,
0, 1, 0),
};
static const struct snd_kcontrol_new dsp1txr[] = {
SOC_DAPM_SINGLE("IN1 Switch", WM8915_DSP1_TX_RIGHT_MIXER_ROUTING,
SOC_DAPM_SINGLE("IN1 Switch", WM8996_DSP1_TX_RIGHT_MIXER_ROUTING,
1, 1, 0),
SOC_DAPM_SINGLE("DAC Switch", WM8915_DSP1_TX_RIGHT_MIXER_ROUTING,
SOC_DAPM_SINGLE("DAC Switch", WM8996_DSP1_TX_RIGHT_MIXER_ROUTING,
0, 1, 0),
};
static const struct snd_kcontrol_new dsp2txl[] = {
SOC_DAPM_SINGLE("IN1 Switch", WM8915_DSP2_TX_LEFT_MIXER_ROUTING,
SOC_DAPM_SINGLE("IN1 Switch", WM8996_DSP2_TX_LEFT_MIXER_ROUTING,
1, 1, 0),
SOC_DAPM_SINGLE("DAC Switch", WM8915_DSP2_TX_LEFT_MIXER_ROUTING,
SOC_DAPM_SINGLE("DAC Switch", WM8996_DSP2_TX_LEFT_MIXER_ROUTING,
0, 1, 0),
};
static const struct snd_kcontrol_new dsp2txr[] = {
SOC_DAPM_SINGLE("IN1 Switch", WM8915_DSP2_TX_RIGHT_MIXER_ROUTING,
SOC_DAPM_SINGLE("IN1 Switch", WM8996_DSP2_TX_RIGHT_MIXER_ROUTING,
1, 1, 0),
SOC_DAPM_SINGLE("DAC Switch", WM8915_DSP2_TX_RIGHT_MIXER_ROUTING,
SOC_DAPM_SINGLE("DAC Switch", WM8996_DSP2_TX_RIGHT_MIXER_ROUTING,
0, 1, 0),
};
static const struct snd_soc_dapm_widget wm8915_dapm_widgets[] = {
static const struct snd_soc_dapm_widget wm8996_dapm_widgets[] = {
SND_SOC_DAPM_INPUT("IN1LN"),
SND_SOC_DAPM_INPUT("IN1LP"),
SND_SOC_DAPM_INPUT("IN1RN"),
......@@ -975,55 +975,55 @@ SND_SOC_DAPM_INPUT("IN2RP"),
SND_SOC_DAPM_INPUT("DMIC1DAT"),
SND_SOC_DAPM_INPUT("DMIC2DAT"),
SND_SOC_DAPM_SUPPLY_S("SYSCLK", 1, WM8915_AIF_CLOCKING_1, 0, 0, NULL, 0),
SND_SOC_DAPM_SUPPLY_S("SYSDSPCLK", 2, WM8915_CLOCKING_1, 1, 0, NULL, 0),
SND_SOC_DAPM_SUPPLY_S("AIFCLK", 2, WM8915_CLOCKING_1, 2, 0, NULL, 0),
SND_SOC_DAPM_SUPPLY_S("Charge Pump", 2, WM8915_CHARGE_PUMP_1, 15, 0, cp_event,
SND_SOC_DAPM_SUPPLY_S("SYSCLK", 1, WM8996_AIF_CLOCKING_1, 0, 0, NULL, 0),
SND_SOC_DAPM_SUPPLY_S("SYSDSPCLK", 2, WM8996_CLOCKING_1, 1, 0, NULL, 0),
SND_SOC_DAPM_SUPPLY_S("AIFCLK", 2, WM8996_CLOCKING_1, 2, 0, NULL, 0),
SND_SOC_DAPM_SUPPLY_S("Charge Pump", 2, WM8996_CHARGE_PUMP_1, 15, 0, cp_event,
SND_SOC_DAPM_POST_PMU),
SND_SOC_DAPM_SUPPLY("LDO2", WM8915_POWER_MANAGEMENT_2, 1, 0, NULL, 0),
SND_SOC_DAPM_MICBIAS("MICB2", WM8915_POWER_MANAGEMENT_1, 9, 0),
SND_SOC_DAPM_MICBIAS("MICB1", WM8915_POWER_MANAGEMENT_1, 8, 0),
SND_SOC_DAPM_SUPPLY("LDO2", WM8996_POWER_MANAGEMENT_2, 1, 0, NULL, 0),
SND_SOC_DAPM_MICBIAS("MICB2", WM8996_POWER_MANAGEMENT_1, 9, 0),
SND_SOC_DAPM_MICBIAS("MICB1", WM8996_POWER_MANAGEMENT_1, 8, 0),
SND_SOC_DAPM_PGA("IN1L PGA", WM8915_POWER_MANAGEMENT_2, 5, 0, NULL, 0),
SND_SOC_DAPM_PGA("IN1R PGA", WM8915_POWER_MANAGEMENT_2, 4, 0, NULL, 0),
SND_SOC_DAPM_PGA("IN1L PGA", WM8996_POWER_MANAGEMENT_2, 5, 0, NULL, 0),
SND_SOC_DAPM_PGA("IN1R PGA", WM8996_POWER_MANAGEMENT_2, 4, 0, NULL, 0),
SND_SOC_DAPM_MUX("IN1L Mux", SND_SOC_NOPM, 0, 0, &in1_mux),
SND_SOC_DAPM_MUX("IN1R Mux", SND_SOC_NOPM, 0, 0, &in1_mux),
SND_SOC_DAPM_MUX("IN2L Mux", SND_SOC_NOPM, 0, 0, &in2_mux),
SND_SOC_DAPM_MUX("IN2R Mux", SND_SOC_NOPM, 0, 0, &in2_mux),
SND_SOC_DAPM_PGA("IN1L", WM8915_POWER_MANAGEMENT_7, 2, 0, NULL, 0),
SND_SOC_DAPM_PGA("IN1R", WM8915_POWER_MANAGEMENT_7, 3, 0, NULL, 0),
SND_SOC_DAPM_PGA("IN2L", WM8915_POWER_MANAGEMENT_7, 6, 0, NULL, 0),
SND_SOC_DAPM_PGA("IN2R", WM8915_POWER_MANAGEMENT_7, 7, 0, NULL, 0),
SND_SOC_DAPM_PGA("IN1L", WM8996_POWER_MANAGEMENT_7, 2, 0, NULL, 0),
SND_SOC_DAPM_PGA("IN1R", WM8996_POWER_MANAGEMENT_7, 3, 0, NULL, 0),
SND_SOC_DAPM_PGA("IN2L", WM8996_POWER_MANAGEMENT_7, 6, 0, NULL, 0),
SND_SOC_DAPM_PGA("IN2R", WM8996_POWER_MANAGEMENT_7, 7, 0, NULL, 0),
SND_SOC_DAPM_SUPPLY("DMIC2", WM8915_POWER_MANAGEMENT_7, 9, 0, NULL, 0),
SND_SOC_DAPM_SUPPLY("DMIC1", WM8915_POWER_MANAGEMENT_7, 8, 0, NULL, 0),
SND_SOC_DAPM_SUPPLY("DMIC2", WM8996_POWER_MANAGEMENT_7, 9, 0, NULL, 0),
SND_SOC_DAPM_SUPPLY("DMIC1", WM8996_POWER_MANAGEMENT_7, 8, 0, NULL, 0),
SND_SOC_DAPM_ADC("DMIC2L", NULL, WM8915_POWER_MANAGEMENT_3, 5, 0),
SND_SOC_DAPM_ADC("DMIC2R", NULL, WM8915_POWER_MANAGEMENT_3, 4, 0),
SND_SOC_DAPM_ADC("DMIC1L", NULL, WM8915_POWER_MANAGEMENT_3, 3, 0),
SND_SOC_DAPM_ADC("DMIC1R", NULL, WM8915_POWER_MANAGEMENT_3, 2, 0),
SND_SOC_DAPM_ADC("DMIC2L", NULL, WM8996_POWER_MANAGEMENT_3, 5, 0),
SND_SOC_DAPM_ADC("DMIC2R", NULL, WM8996_POWER_MANAGEMENT_3, 4, 0),
SND_SOC_DAPM_ADC("DMIC1L", NULL, WM8996_POWER_MANAGEMENT_3, 3, 0),
SND_SOC_DAPM_ADC("DMIC1R", NULL, WM8996_POWER_MANAGEMENT_3, 2, 0),
SND_SOC_DAPM_ADC("ADCL", NULL, WM8915_POWER_MANAGEMENT_3, 1, 0),
SND_SOC_DAPM_ADC("ADCR", NULL, WM8915_POWER_MANAGEMENT_3, 0, 0),
SND_SOC_DAPM_ADC("ADCL", NULL, WM8996_POWER_MANAGEMENT_3, 1, 0),
SND_SOC_DAPM_ADC("ADCR", NULL, WM8996_POWER_MANAGEMENT_3, 0, 0),
SND_SOC_DAPM_MUX("Left Sidetone", SND_SOC_NOPM, 0, 0, &left_sidetone),
SND_SOC_DAPM_MUX("Right Sidetone", SND_SOC_NOPM, 0, 0, &right_sidetone),
SND_SOC_DAPM_AIF_IN("DSP2RXL", NULL, 0, WM8915_POWER_MANAGEMENT_3, 11, 0),
SND_SOC_DAPM_AIF_IN("DSP2RXR", NULL, 1, WM8915_POWER_MANAGEMENT_3, 10, 0),
SND_SOC_DAPM_AIF_IN("DSP1RXL", NULL, 0, WM8915_POWER_MANAGEMENT_3, 9, 0),
SND_SOC_DAPM_AIF_IN("DSP1RXR", NULL, 1, WM8915_POWER_MANAGEMENT_3, 8, 0),
SND_SOC_DAPM_AIF_IN("DSP2RXL", NULL, 0, WM8996_POWER_MANAGEMENT_3, 11, 0),
SND_SOC_DAPM_AIF_IN("DSP2RXR", NULL, 1, WM8996_POWER_MANAGEMENT_3, 10, 0),
SND_SOC_DAPM_AIF_IN("DSP1RXL", NULL, 0, WM8996_POWER_MANAGEMENT_3, 9, 0),
SND_SOC_DAPM_AIF_IN("DSP1RXR", NULL, 1, WM8996_POWER_MANAGEMENT_3, 8, 0),
SND_SOC_DAPM_MIXER("DSP2TXL", WM8915_POWER_MANAGEMENT_5, 11, 0,
SND_SOC_DAPM_MIXER("DSP2TXL", WM8996_POWER_MANAGEMENT_5, 11, 0,
dsp2txl, ARRAY_SIZE(dsp2txl)),
SND_SOC_DAPM_MIXER("DSP2TXR", WM8915_POWER_MANAGEMENT_5, 10, 0,
SND_SOC_DAPM_MIXER("DSP2TXR", WM8996_POWER_MANAGEMENT_5, 10, 0,
dsp2txr, ARRAY_SIZE(dsp2txr)),
SND_SOC_DAPM_MIXER("DSP1TXL", WM8915_POWER_MANAGEMENT_5, 9, 0,
SND_SOC_DAPM_MIXER("DSP1TXL", WM8996_POWER_MANAGEMENT_5, 9, 0,
dsp1txl, ARRAY_SIZE(dsp1txl)),
SND_SOC_DAPM_MIXER("DSP1TXR", WM8915_POWER_MANAGEMENT_5, 8, 0,
SND_SOC_DAPM_MIXER("DSP1TXR", WM8996_POWER_MANAGEMENT_5, 8, 0,
dsp1txr, ARRAY_SIZE(dsp1txr)),
SND_SOC_DAPM_MIXER("DAC2L Mixer", SND_SOC_NOPM, 0, 0,
......@@ -1035,46 +1035,46 @@ SND_SOC_DAPM_MIXER("DAC1L Mixer", SND_SOC_NOPM, 0, 0,
SND_SOC_DAPM_MIXER("DAC1R Mixer", SND_SOC_NOPM, 0, 0,
dac1r_mix, ARRAY_SIZE(dac1r_mix)),
SND_SOC_DAPM_DAC("DAC2L", NULL, WM8915_POWER_MANAGEMENT_5, 3, 0),
SND_SOC_DAPM_DAC("DAC2R", NULL, WM8915_POWER_MANAGEMENT_5, 2, 0),
SND_SOC_DAPM_DAC("DAC1L", NULL, WM8915_POWER_MANAGEMENT_5, 1, 0),
SND_SOC_DAPM_DAC("DAC1R", NULL, WM8915_POWER_MANAGEMENT_5, 0, 0),
SND_SOC_DAPM_DAC("DAC2L", NULL, WM8996_POWER_MANAGEMENT_5, 3, 0),
SND_SOC_DAPM_DAC("DAC2R", NULL, WM8996_POWER_MANAGEMENT_5, 2, 0),
SND_SOC_DAPM_DAC("DAC1L", NULL, WM8996_POWER_MANAGEMENT_5, 1, 0),
SND_SOC_DAPM_DAC("DAC1R", NULL, WM8996_POWER_MANAGEMENT_5, 0, 0),
SND_SOC_DAPM_AIF_IN("AIF2RX1", "AIF2 Playback", 1,
WM8915_POWER_MANAGEMENT_4, 9, 0),
WM8996_POWER_MANAGEMENT_4, 9, 0),
SND_SOC_DAPM_AIF_IN("AIF2RX0", "AIF2 Playback", 2,
WM8915_POWER_MANAGEMENT_4, 8, 0),
WM8996_POWER_MANAGEMENT_4, 8, 0),
SND_SOC_DAPM_AIF_IN("AIF2TX1", "AIF2 Capture", 1,
WM8915_POWER_MANAGEMENT_6, 9, 0),
WM8996_POWER_MANAGEMENT_6, 9, 0),
SND_SOC_DAPM_AIF_IN("AIF2TX0", "AIF2 Capture", 2,
WM8915_POWER_MANAGEMENT_6, 8, 0),
WM8996_POWER_MANAGEMENT_6, 8, 0),
SND_SOC_DAPM_AIF_IN("AIF1RX5", "AIF1 Playback", 5,
WM8915_POWER_MANAGEMENT_4, 5, 0),
WM8996_POWER_MANAGEMENT_4, 5, 0),
SND_SOC_DAPM_AIF_IN("AIF1RX4", "AIF1 Playback", 4,
WM8915_POWER_MANAGEMENT_4, 4, 0),
WM8996_POWER_MANAGEMENT_4, 4, 0),
SND_SOC_DAPM_AIF_IN("AIF1RX3", "AIF1 Playback", 3,
WM8915_POWER_MANAGEMENT_4, 3, 0),
WM8996_POWER_MANAGEMENT_4, 3, 0),
SND_SOC_DAPM_AIF_IN("AIF1RX2", "AIF1 Playback", 2,
WM8915_POWER_MANAGEMENT_4, 2, 0),
WM8996_POWER_MANAGEMENT_4, 2, 0),
SND_SOC_DAPM_AIF_IN("AIF1RX1", "AIF1 Playback", 1,
WM8915_POWER_MANAGEMENT_4, 1, 0),
WM8996_POWER_MANAGEMENT_4, 1, 0),
SND_SOC_DAPM_AIF_IN("AIF1RX0", "AIF1 Playback", 0,
WM8915_POWER_MANAGEMENT_4, 0, 0),
WM8996_POWER_MANAGEMENT_4, 0, 0),
SND_SOC_DAPM_AIF_OUT("AIF1TX5", "AIF1 Capture", 5,
WM8915_POWER_MANAGEMENT_6, 5, 0),
WM8996_POWER_MANAGEMENT_6, 5, 0),
SND_SOC_DAPM_AIF_OUT("AIF1TX4", "AIF1 Capture", 4,
WM8915_POWER_MANAGEMENT_6, 4, 0),
WM8996_POWER_MANAGEMENT_6, 4, 0),
SND_SOC_DAPM_AIF_OUT("AIF1TX3", "AIF1 Capture", 3,
WM8915_POWER_MANAGEMENT_6, 3, 0),
WM8996_POWER_MANAGEMENT_6, 3, 0),
SND_SOC_DAPM_AIF_OUT("AIF1TX2", "AIF1 Capture", 2,
WM8915_POWER_MANAGEMENT_6, 2, 0),
WM8996_POWER_MANAGEMENT_6, 2, 0),
SND_SOC_DAPM_AIF_OUT("AIF1TX1", "AIF1 Capture", 1,
WM8915_POWER_MANAGEMENT_6, 1, 0),
WM8996_POWER_MANAGEMENT_6, 1, 0),
SND_SOC_DAPM_AIF_OUT("AIF1TX0", "AIF1 Capture", 0,
WM8915_POWER_MANAGEMENT_6, 0, 0),
WM8996_POWER_MANAGEMENT_6, 0, 0),
/* We route as stereo pairs so define some dummy widgets to squash
* things down for now. RXA = 0,1, RXB = 2,3 and so on */
......@@ -1090,41 +1090,41 @@ SND_SOC_DAPM_MUX("AIF2TX", SND_SOC_NOPM, 0, 0, &aif2tx),
SND_SOC_DAPM_MUX("SPKL", SND_SOC_NOPM, 0, 0, &spkl_mux),
SND_SOC_DAPM_MUX("SPKR", SND_SOC_NOPM, 0, 0, &spkr_mux),
SND_SOC_DAPM_PGA("SPKL PGA", WM8915_LEFT_PDM_SPEAKER, 4, 0, NULL, 0),
SND_SOC_DAPM_PGA("SPKR PGA", WM8915_RIGHT_PDM_SPEAKER, 4, 0, NULL, 0),
SND_SOC_DAPM_PGA("SPKL PGA", WM8996_LEFT_PDM_SPEAKER, 4, 0, NULL, 0),
SND_SOC_DAPM_PGA("SPKR PGA", WM8996_RIGHT_PDM_SPEAKER, 4, 0, NULL, 0),
SND_SOC_DAPM_PGA_S("HPOUT2L PGA", 0, WM8915_POWER_MANAGEMENT_1, 7, 0, NULL, 0),
SND_SOC_DAPM_PGA_S("HPOUT2L_DLY", 1, WM8915_ANALOGUE_HP_2, 5, 0, NULL, 0),
SND_SOC_DAPM_PGA_S("HPOUT2L_DCS", 2, WM8915_DC_SERVO_1, 2, 0, dcs_start,
SND_SOC_DAPM_PGA_S("HPOUT2L PGA", 0, WM8996_POWER_MANAGEMENT_1, 7, 0, NULL, 0),
SND_SOC_DAPM_PGA_S("HPOUT2L_DLY", 1, WM8996_ANALOGUE_HP_2, 5, 0, NULL, 0),
SND_SOC_DAPM_PGA_S("HPOUT2L_DCS", 2, WM8996_DC_SERVO_1, 2, 0, dcs_start,
SND_SOC_DAPM_POST_PMU),
SND_SOC_DAPM_PGA_S("HPOUT2L_OUTP", 3, WM8915_ANALOGUE_HP_2, 6, 0, NULL, 0),
SND_SOC_DAPM_PGA_S("HPOUT2L_OUTP", 3, WM8996_ANALOGUE_HP_2, 6, 0, NULL, 0),
SND_SOC_DAPM_PGA_S("HPOUT2L_RMV_SHORT", 3, SND_SOC_NOPM, HPOUT2L, 0,
rmv_short_event,
SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_PRE_PMD),
SND_SOC_DAPM_PGA_S("HPOUT2R PGA", 0, WM8915_POWER_MANAGEMENT_1, 6, 0,NULL, 0),
SND_SOC_DAPM_PGA_S("HPOUT2R_DLY", 1, WM8915_ANALOGUE_HP_2, 1, 0, NULL, 0),
SND_SOC_DAPM_PGA_S("HPOUT2R_DCS", 2, WM8915_DC_SERVO_1, 3, 0, dcs_start,
SND_SOC_DAPM_PGA_S("HPOUT2R PGA", 0, WM8996_POWER_MANAGEMENT_1, 6, 0,NULL, 0),
SND_SOC_DAPM_PGA_S("HPOUT2R_DLY", 1, WM8996_ANALOGUE_HP_2, 1, 0, NULL, 0),
SND_SOC_DAPM_PGA_S("HPOUT2R_DCS", 2, WM8996_DC_SERVO_1, 3, 0, dcs_start,
SND_SOC_DAPM_POST_PMU),
SND_SOC_DAPM_PGA_S("HPOUT2R_OUTP", 3, WM8915_ANALOGUE_HP_2, 2, 0, NULL, 0),
SND_SOC_DAPM_PGA_S("HPOUT2R_OUTP", 3, WM8996_ANALOGUE_HP_2, 2, 0, NULL, 0),
SND_SOC_DAPM_PGA_S("HPOUT2R_RMV_SHORT", 3, SND_SOC_NOPM, HPOUT2R, 0,
rmv_short_event,
SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_PRE_PMD),
SND_SOC_DAPM_PGA_S("HPOUT1L PGA", 0, WM8915_POWER_MANAGEMENT_1, 5, 0, NULL, 0),
SND_SOC_DAPM_PGA_S("HPOUT1L_DLY", 1, WM8915_ANALOGUE_HP_1, 5, 0, NULL, 0),
SND_SOC_DAPM_PGA_S("HPOUT1L_DCS", 2, WM8915_DC_SERVO_1, 0, 0, dcs_start,
SND_SOC_DAPM_PGA_S("HPOUT1L PGA", 0, WM8996_POWER_MANAGEMENT_1, 5, 0, NULL, 0),
SND_SOC_DAPM_PGA_S("HPOUT1L_DLY", 1, WM8996_ANALOGUE_HP_1, 5, 0, NULL, 0),
SND_SOC_DAPM_PGA_S("HPOUT1L_DCS", 2, WM8996_DC_SERVO_1, 0, 0, dcs_start,
SND_SOC_DAPM_POST_PMU),
SND_SOC_DAPM_PGA_S("HPOUT1L_OUTP", 3, WM8915_ANALOGUE_HP_1, 6, 0, NULL, 0),
SND_SOC_DAPM_PGA_S("HPOUT1L_OUTP", 3, WM8996_ANALOGUE_HP_1, 6, 0, NULL, 0),
SND_SOC_DAPM_PGA_S("HPOUT1L_RMV_SHORT", 3, SND_SOC_NOPM, HPOUT1L, 0,
rmv_short_event,
SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_PRE_PMD),
SND_SOC_DAPM_PGA_S("HPOUT1R PGA", 0, WM8915_POWER_MANAGEMENT_1, 4, 0, NULL, 0),
SND_SOC_DAPM_PGA_S("HPOUT1R_DLY", 1, WM8915_ANALOGUE_HP_1, 1, 0, NULL, 0),
SND_SOC_DAPM_PGA_S("HPOUT1R_DCS", 2, WM8915_DC_SERVO_1, 1, 0, dcs_start,
SND_SOC_DAPM_PGA_S("HPOUT1R PGA", 0, WM8996_POWER_MANAGEMENT_1, 4, 0, NULL, 0),
SND_SOC_DAPM_PGA_S("HPOUT1R_DLY", 1, WM8996_ANALOGUE_HP_1, 1, 0, NULL, 0),
SND_SOC_DAPM_PGA_S("HPOUT1R_DCS", 2, WM8996_DC_SERVO_1, 1, 0, dcs_start,
SND_SOC_DAPM_POST_PMU),
SND_SOC_DAPM_PGA_S("HPOUT1R_OUTP", 3, WM8915_ANALOGUE_HP_1, 2, 0, NULL, 0),
SND_SOC_DAPM_PGA_S("HPOUT1R_OUTP", 3, WM8996_ANALOGUE_HP_1, 2, 0, NULL, 0),
SND_SOC_DAPM_PGA_S("HPOUT1R_RMV_SHORT", 3, SND_SOC_NOPM, HPOUT1R, 0,
rmv_short_event,
SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_PRE_PMD),
......@@ -1136,7 +1136,7 @@ SND_SOC_DAPM_OUTPUT("HPOUT2R"),
SND_SOC_DAPM_OUTPUT("SPKDAT"),
};
static const struct snd_soc_dapm_route wm8915_dapm_routes[] = {
static const struct snd_soc_dapm_route wm8996_dapm_routes[] = {
{ "AIFCLK", NULL, "SYSCLK" },
{ "SYSDSPCLK", NULL, "SYSCLK" },
{ "Charge Pump", NULL, "SYSCLK" },
......@@ -1325,7 +1325,7 @@ static const struct snd_soc_dapm_route wm8915_dapm_routes[] = {
{ "SPKDAT", NULL, "SPKR PGA" },
};
static int wm8915_readable_register(struct snd_soc_codec *codec,
static int wm8996_readable_register(struct snd_soc_codec *codec,
unsigned int reg)
{
/* Due to the sparseness of the register map the compiler
......@@ -1333,284 +1333,284 @@ static int wm8915_readable_register(struct snd_soc_codec *codec,
* more efficient than a table.
*/
switch (reg) {
case WM8915_SOFTWARE_RESET:
case WM8915_POWER_MANAGEMENT_1:
case WM8915_POWER_MANAGEMENT_2:
case WM8915_POWER_MANAGEMENT_3:
case WM8915_POWER_MANAGEMENT_4:
case WM8915_POWER_MANAGEMENT_5:
case WM8915_POWER_MANAGEMENT_6:
case WM8915_POWER_MANAGEMENT_7:
case WM8915_POWER_MANAGEMENT_8:
case WM8915_LEFT_LINE_INPUT_VOLUME:
case WM8915_RIGHT_LINE_INPUT_VOLUME:
case WM8915_LINE_INPUT_CONTROL:
case WM8915_DAC1_HPOUT1_VOLUME:
case WM8915_DAC2_HPOUT2_VOLUME:
case WM8915_DAC1_LEFT_VOLUME:
case WM8915_DAC1_RIGHT_VOLUME:
case WM8915_DAC2_LEFT_VOLUME:
case WM8915_DAC2_RIGHT_VOLUME:
case WM8915_OUTPUT1_LEFT_VOLUME:
case WM8915_OUTPUT1_RIGHT_VOLUME:
case WM8915_OUTPUT2_LEFT_VOLUME:
case WM8915_OUTPUT2_RIGHT_VOLUME:
case WM8915_MICBIAS_1:
case WM8915_MICBIAS_2:
case WM8915_LDO_1:
case WM8915_LDO_2:
case WM8915_ACCESSORY_DETECT_MODE_1:
case WM8915_ACCESSORY_DETECT_MODE_2:
case WM8915_HEADPHONE_DETECT_1:
case WM8915_HEADPHONE_DETECT_2:
case WM8915_MIC_DETECT_1:
case WM8915_MIC_DETECT_2:
case WM8915_MIC_DETECT_3:
case WM8915_CHARGE_PUMP_1:
case WM8915_CHARGE_PUMP_2:
case WM8915_DC_SERVO_1:
case WM8915_DC_SERVO_2:
case WM8915_DC_SERVO_3:
case WM8915_DC_SERVO_5:
case WM8915_DC_SERVO_6:
case WM8915_DC_SERVO_7:
case WM8915_DC_SERVO_READBACK_0:
case WM8915_ANALOGUE_HP_1:
case WM8915_ANALOGUE_HP_2:
case WM8915_CHIP_REVISION:
case WM8915_CONTROL_INTERFACE_1:
case WM8915_WRITE_SEQUENCER_CTRL_1:
case WM8915_WRITE_SEQUENCER_CTRL_2:
case WM8915_AIF_CLOCKING_1:
case WM8915_AIF_CLOCKING_2:
case WM8915_CLOCKING_1:
case WM8915_CLOCKING_2:
case WM8915_AIF_RATE:
case WM8915_FLL_CONTROL_1:
case WM8915_FLL_CONTROL_2:
case WM8915_FLL_CONTROL_3:
case WM8915_FLL_CONTROL_4:
case WM8915_FLL_CONTROL_5:
case WM8915_FLL_CONTROL_6:
case WM8915_FLL_EFS_1:
case WM8915_FLL_EFS_2:
case WM8915_AIF1_CONTROL:
case WM8915_AIF1_BCLK:
case WM8915_AIF1_TX_LRCLK_1:
case WM8915_AIF1_TX_LRCLK_2:
case WM8915_AIF1_RX_LRCLK_1:
case WM8915_AIF1_RX_LRCLK_2:
case WM8915_AIF1TX_DATA_CONFIGURATION_1:
case WM8915_AIF1TX_DATA_CONFIGURATION_2:
case WM8915_AIF1RX_DATA_CONFIGURATION:
case WM8915_AIF1TX_CHANNEL_0_CONFIGURATION:
case WM8915_AIF1TX_CHANNEL_1_CONFIGURATION:
case WM8915_AIF1TX_CHANNEL_2_CONFIGURATION:
case WM8915_AIF1TX_CHANNEL_3_CONFIGURATION:
case WM8915_AIF1TX_CHANNEL_4_CONFIGURATION:
case WM8915_AIF1TX_CHANNEL_5_CONFIGURATION:
case WM8915_AIF1RX_CHANNEL_0_CONFIGURATION:
case WM8915_AIF1RX_CHANNEL_1_CONFIGURATION:
case WM8915_AIF1RX_CHANNEL_2_CONFIGURATION:
case WM8915_AIF1RX_CHANNEL_3_CONFIGURATION:
case WM8915_AIF1RX_CHANNEL_4_CONFIGURATION:
case WM8915_AIF1RX_CHANNEL_5_CONFIGURATION:
case WM8915_AIF1RX_MONO_CONFIGURATION:
case WM8915_AIF1TX_TEST:
case WM8915_AIF2_CONTROL:
case WM8915_AIF2_BCLK:
case WM8915_AIF2_TX_LRCLK_1:
case WM8915_AIF2_TX_LRCLK_2:
case WM8915_AIF2_RX_LRCLK_1:
case WM8915_AIF2_RX_LRCLK_2:
case WM8915_AIF2TX_DATA_CONFIGURATION_1:
case WM8915_AIF2TX_DATA_CONFIGURATION_2:
case WM8915_AIF2RX_DATA_CONFIGURATION:
case WM8915_AIF2TX_CHANNEL_0_CONFIGURATION:
case WM8915_AIF2TX_CHANNEL_1_CONFIGURATION:
case WM8915_AIF2RX_CHANNEL_0_CONFIGURATION:
case WM8915_AIF2RX_CHANNEL_1_CONFIGURATION:
case WM8915_AIF2RX_MONO_CONFIGURATION:
case WM8915_AIF2TX_TEST:
case WM8915_DSP1_TX_LEFT_VOLUME:
case WM8915_DSP1_TX_RIGHT_VOLUME:
case WM8915_DSP1_RX_LEFT_VOLUME:
case WM8915_DSP1_RX_RIGHT_VOLUME:
case WM8915_DSP1_TX_FILTERS:
case WM8915_DSP1_RX_FILTERS_1:
case WM8915_DSP1_RX_FILTERS_2:
case WM8915_DSP1_DRC_1:
case WM8915_DSP1_DRC_2:
case WM8915_DSP1_DRC_3:
case WM8915_DSP1_DRC_4:
case WM8915_DSP1_DRC_5:
case WM8915_DSP1_RX_EQ_GAINS_1:
case WM8915_DSP1_RX_EQ_GAINS_2:
case WM8915_DSP1_RX_EQ_BAND_1_A:
case WM8915_DSP1_RX_EQ_BAND_1_B:
case WM8915_DSP1_RX_EQ_BAND_1_PG:
case WM8915_DSP1_RX_EQ_BAND_2_A:
case WM8915_DSP1_RX_EQ_BAND_2_B:
case WM8915_DSP1_RX_EQ_BAND_2_C:
case WM8915_DSP1_RX_EQ_BAND_2_PG:
case WM8915_DSP1_RX_EQ_BAND_3_A:
case WM8915_DSP1_RX_EQ_BAND_3_B:
case WM8915_DSP1_RX_EQ_BAND_3_C:
case WM8915_DSP1_RX_EQ_BAND_3_PG:
case WM8915_DSP1_RX_EQ_BAND_4_A:
case WM8915_DSP1_RX_EQ_BAND_4_B:
case WM8915_DSP1_RX_EQ_BAND_4_C:
case WM8915_DSP1_RX_EQ_BAND_4_PG:
case WM8915_DSP1_RX_EQ_BAND_5_A:
case WM8915_DSP1_RX_EQ_BAND_5_B:
case WM8915_DSP1_RX_EQ_BAND_5_PG:
case WM8915_DSP2_TX_LEFT_VOLUME:
case WM8915_DSP2_TX_RIGHT_VOLUME:
case WM8915_DSP2_RX_LEFT_VOLUME:
case WM8915_DSP2_RX_RIGHT_VOLUME:
case WM8915_DSP2_TX_FILTERS:
case WM8915_DSP2_RX_FILTERS_1:
case WM8915_DSP2_RX_FILTERS_2:
case WM8915_DSP2_DRC_1:
case WM8915_DSP2_DRC_2:
case WM8915_DSP2_DRC_3:
case WM8915_DSP2_DRC_4:
case WM8915_DSP2_DRC_5:
case WM8915_DSP2_RX_EQ_GAINS_1:
case WM8915_DSP2_RX_EQ_GAINS_2:
case WM8915_DSP2_RX_EQ_BAND_1_A:
case WM8915_DSP2_RX_EQ_BAND_1_B:
case WM8915_DSP2_RX_EQ_BAND_1_PG:
case WM8915_DSP2_RX_EQ_BAND_2_A:
case WM8915_DSP2_RX_EQ_BAND_2_B:
case WM8915_DSP2_RX_EQ_BAND_2_C:
case WM8915_DSP2_RX_EQ_BAND_2_PG:
case WM8915_DSP2_RX_EQ_BAND_3_A:
case WM8915_DSP2_RX_EQ_BAND_3_B:
case WM8915_DSP2_RX_EQ_BAND_3_C:
case WM8915_DSP2_RX_EQ_BAND_3_PG:
case WM8915_DSP2_RX_EQ_BAND_4_A:
case WM8915_DSP2_RX_EQ_BAND_4_B:
case WM8915_DSP2_RX_EQ_BAND_4_C:
case WM8915_DSP2_RX_EQ_BAND_4_PG:
case WM8915_DSP2_RX_EQ_BAND_5_A:
case WM8915_DSP2_RX_EQ_BAND_5_B:
case WM8915_DSP2_RX_EQ_BAND_5_PG:
case WM8915_DAC1_MIXER_VOLUMES:
case WM8915_DAC1_LEFT_MIXER_ROUTING:
case WM8915_DAC1_RIGHT_MIXER_ROUTING:
case WM8915_DAC2_MIXER_VOLUMES:
case WM8915_DAC2_LEFT_MIXER_ROUTING:
case WM8915_DAC2_RIGHT_MIXER_ROUTING:
case WM8915_DSP1_TX_LEFT_MIXER_ROUTING:
case WM8915_DSP1_TX_RIGHT_MIXER_ROUTING:
case WM8915_DSP2_TX_LEFT_MIXER_ROUTING:
case WM8915_DSP2_TX_RIGHT_MIXER_ROUTING:
case WM8915_DSP_TX_MIXER_SELECT:
case WM8915_DAC_SOFTMUTE:
case WM8915_OVERSAMPLING:
case WM8915_SIDETONE:
case WM8915_GPIO_1:
case WM8915_GPIO_2:
case WM8915_GPIO_3:
case WM8915_GPIO_4:
case WM8915_GPIO_5:
case WM8915_PULL_CONTROL_1:
case WM8915_PULL_CONTROL_2:
case WM8915_INTERRUPT_STATUS_1:
case WM8915_INTERRUPT_STATUS_2:
case WM8915_INTERRUPT_RAW_STATUS_2:
case WM8915_INTERRUPT_STATUS_1_MASK:
case WM8915_INTERRUPT_STATUS_2_MASK:
case WM8915_INTERRUPT_CONTROL:
case WM8915_LEFT_PDM_SPEAKER:
case WM8915_RIGHT_PDM_SPEAKER:
case WM8915_PDM_SPEAKER_MUTE_SEQUENCE:
case WM8915_PDM_SPEAKER_VOLUME:
case WM8996_SOFTWARE_RESET:
case WM8996_POWER_MANAGEMENT_1:
case WM8996_POWER_MANAGEMENT_2:
case WM8996_POWER_MANAGEMENT_3:
case WM8996_POWER_MANAGEMENT_4:
case WM8996_POWER_MANAGEMENT_5:
case WM8996_POWER_MANAGEMENT_6:
case WM8996_POWER_MANAGEMENT_7:
case WM8996_POWER_MANAGEMENT_8:
case WM8996_LEFT_LINE_INPUT_VOLUME:
case WM8996_RIGHT_LINE_INPUT_VOLUME:
case WM8996_LINE_INPUT_CONTROL:
case WM8996_DAC1_HPOUT1_VOLUME:
case WM8996_DAC2_HPOUT2_VOLUME:
case WM8996_DAC1_LEFT_VOLUME:
case WM8996_DAC1_RIGHT_VOLUME:
case WM8996_DAC2_LEFT_VOLUME:
case WM8996_DAC2_RIGHT_VOLUME:
case WM8996_OUTPUT1_LEFT_VOLUME:
case WM8996_OUTPUT1_RIGHT_VOLUME:
case WM8996_OUTPUT2_LEFT_VOLUME:
case WM8996_OUTPUT2_RIGHT_VOLUME:
case WM8996_MICBIAS_1:
case WM8996_MICBIAS_2:
case WM8996_LDO_1:
case WM8996_LDO_2:
case WM8996_ACCESSORY_DETECT_MODE_1:
case WM8996_ACCESSORY_DETECT_MODE_2:
case WM8996_HEADPHONE_DETECT_1:
case WM8996_HEADPHONE_DETECT_2:
case WM8996_MIC_DETECT_1:
case WM8996_MIC_DETECT_2:
case WM8996_MIC_DETECT_3:
case WM8996_CHARGE_PUMP_1:
case WM8996_CHARGE_PUMP_2:
case WM8996_DC_SERVO_1:
case WM8996_DC_SERVO_2:
case WM8996_DC_SERVO_3:
case WM8996_DC_SERVO_5:
case WM8996_DC_SERVO_6:
case WM8996_DC_SERVO_7:
case WM8996_DC_SERVO_READBACK_0:
case WM8996_ANALOGUE_HP_1:
case WM8996_ANALOGUE_HP_2:
case WM8996_CHIP_REVISION:
case WM8996_CONTROL_INTERFACE_1:
case WM8996_WRITE_SEQUENCER_CTRL_1:
case WM8996_WRITE_SEQUENCER_CTRL_2:
case WM8996_AIF_CLOCKING_1:
case WM8996_AIF_CLOCKING_2:
case WM8996_CLOCKING_1:
case WM8996_CLOCKING_2:
case WM8996_AIF_RATE:
case WM8996_FLL_CONTROL_1:
case WM8996_FLL_CONTROL_2:
case WM8996_FLL_CONTROL_3:
case WM8996_FLL_CONTROL_4:
case WM8996_FLL_CONTROL_5:
case WM8996_FLL_CONTROL_6:
case WM8996_FLL_EFS_1:
case WM8996_FLL_EFS_2:
case WM8996_AIF1_CONTROL:
case WM8996_AIF1_BCLK:
case WM8996_AIF1_TX_LRCLK_1:
case WM8996_AIF1_TX_LRCLK_2:
case WM8996_AIF1_RX_LRCLK_1:
case WM8996_AIF1_RX_LRCLK_2:
case WM8996_AIF1TX_DATA_CONFIGURATION_1:
case WM8996_AIF1TX_DATA_CONFIGURATION_2:
case WM8996_AIF1RX_DATA_CONFIGURATION:
case WM8996_AIF1TX_CHANNEL_0_CONFIGURATION:
case WM8996_AIF1TX_CHANNEL_1_CONFIGURATION:
case WM8996_AIF1TX_CHANNEL_2_CONFIGURATION:
case WM8996_AIF1TX_CHANNEL_3_CONFIGURATION:
case WM8996_AIF1TX_CHANNEL_4_CONFIGURATION:
case WM8996_AIF1TX_CHANNEL_5_CONFIGURATION:
case WM8996_AIF1RX_CHANNEL_0_CONFIGURATION:
case WM8996_AIF1RX_CHANNEL_1_CONFIGURATION:
case WM8996_AIF1RX_CHANNEL_2_CONFIGURATION:
case WM8996_AIF1RX_CHANNEL_3_CONFIGURATION:
case WM8996_AIF1RX_CHANNEL_4_CONFIGURATION:
case WM8996_AIF1RX_CHANNEL_5_CONFIGURATION:
case WM8996_AIF1RX_MONO_CONFIGURATION:
case WM8996_AIF1TX_TEST:
case WM8996_AIF2_CONTROL:
case WM8996_AIF2_BCLK:
case WM8996_AIF2_TX_LRCLK_1:
case WM8996_AIF2_TX_LRCLK_2:
case WM8996_AIF2_RX_LRCLK_1:
case WM8996_AIF2_RX_LRCLK_2:
case WM8996_AIF2TX_DATA_CONFIGURATION_1:
case WM8996_AIF2TX_DATA_CONFIGURATION_2:
case WM8996_AIF2RX_DATA_CONFIGURATION:
case WM8996_AIF2TX_CHANNEL_0_CONFIGURATION:
case WM8996_AIF2TX_CHANNEL_1_CONFIGURATION:
case WM8996_AIF2RX_CHANNEL_0_CONFIGURATION:
case WM8996_AIF2RX_CHANNEL_1_CONFIGURATION:
case WM8996_AIF2RX_MONO_CONFIGURATION:
case WM8996_AIF2TX_TEST:
case WM8996_DSP1_TX_LEFT_VOLUME:
case WM8996_DSP1_TX_RIGHT_VOLUME:
case WM8996_DSP1_RX_LEFT_VOLUME:
case WM8996_DSP1_RX_RIGHT_VOLUME:
case WM8996_DSP1_TX_FILTERS:
case WM8996_DSP1_RX_FILTERS_1:
case WM8996_DSP1_RX_FILTERS_2:
case WM8996_DSP1_DRC_1:
case WM8996_DSP1_DRC_2:
case WM8996_DSP1_DRC_3:
case WM8996_DSP1_DRC_4:
case WM8996_DSP1_DRC_5:
case WM8996_DSP1_RX_EQ_GAINS_1:
case WM8996_DSP1_RX_EQ_GAINS_2:
case WM8996_DSP1_RX_EQ_BAND_1_A:
case WM8996_DSP1_RX_EQ_BAND_1_B:
case WM8996_DSP1_RX_EQ_BAND_1_PG:
case WM8996_DSP1_RX_EQ_BAND_2_A:
case WM8996_DSP1_RX_EQ_BAND_2_B:
case WM8996_DSP1_RX_EQ_BAND_2_C:
case WM8996_DSP1_RX_EQ_BAND_2_PG:
case WM8996_DSP1_RX_EQ_BAND_3_A:
case WM8996_DSP1_RX_EQ_BAND_3_B:
case WM8996_DSP1_RX_EQ_BAND_3_C:
case WM8996_DSP1_RX_EQ_BAND_3_PG:
case WM8996_DSP1_RX_EQ_BAND_4_A:
case WM8996_DSP1_RX_EQ_BAND_4_B:
case WM8996_DSP1_RX_EQ_BAND_4_C:
case WM8996_DSP1_RX_EQ_BAND_4_PG:
case WM8996_DSP1_RX_EQ_BAND_5_A:
case WM8996_DSP1_RX_EQ_BAND_5_B:
case WM8996_DSP1_RX_EQ_BAND_5_PG:
case WM8996_DSP2_TX_LEFT_VOLUME:
case WM8996_DSP2_TX_RIGHT_VOLUME:
case WM8996_DSP2_RX_LEFT_VOLUME:
case WM8996_DSP2_RX_RIGHT_VOLUME:
case WM8996_DSP2_TX_FILTERS:
case WM8996_DSP2_RX_FILTERS_1:
case WM8996_DSP2_RX_FILTERS_2:
case WM8996_DSP2_DRC_1:
case WM8996_DSP2_DRC_2:
case WM8996_DSP2_DRC_3:
case WM8996_DSP2_DRC_4:
case WM8996_DSP2_DRC_5:
case WM8996_DSP2_RX_EQ_GAINS_1:
case WM8996_DSP2_RX_EQ_GAINS_2:
case WM8996_DSP2_RX_EQ_BAND_1_A:
case WM8996_DSP2_RX_EQ_BAND_1_B:
case WM8996_DSP2_RX_EQ_BAND_1_PG:
case WM8996_DSP2_RX_EQ_BAND_2_A:
case WM8996_DSP2_RX_EQ_BAND_2_B:
case WM8996_DSP2_RX_EQ_BAND_2_C:
case WM8996_DSP2_RX_EQ_BAND_2_PG:
case WM8996_DSP2_RX_EQ_BAND_3_A:
case WM8996_DSP2_RX_EQ_BAND_3_B:
case WM8996_DSP2_RX_EQ_BAND_3_C:
case WM8996_DSP2_RX_EQ_BAND_3_PG:
case WM8996_DSP2_RX_EQ_BAND_4_A:
case WM8996_DSP2_RX_EQ_BAND_4_B:
case WM8996_DSP2_RX_EQ_BAND_4_C:
case WM8996_DSP2_RX_EQ_BAND_4_PG:
case WM8996_DSP2_RX_EQ_BAND_5_A:
case WM8996_DSP2_RX_EQ_BAND_5_B:
case WM8996_DSP2_RX_EQ_BAND_5_PG:
case WM8996_DAC1_MIXER_VOLUMES:
case WM8996_DAC1_LEFT_MIXER_ROUTING:
case WM8996_DAC1_RIGHT_MIXER_ROUTING:
case WM8996_DAC2_MIXER_VOLUMES:
case WM8996_DAC2_LEFT_MIXER_ROUTING:
case WM8996_DAC2_RIGHT_MIXER_ROUTING:
case WM8996_DSP1_TX_LEFT_MIXER_ROUTING:
case WM8996_DSP1_TX_RIGHT_MIXER_ROUTING:
case WM8996_DSP2_TX_LEFT_MIXER_ROUTING:
case WM8996_DSP2_TX_RIGHT_MIXER_ROUTING:
case WM8996_DSP_TX_MIXER_SELECT:
case WM8996_DAC_SOFTMUTE:
case WM8996_OVERSAMPLING:
case WM8996_SIDETONE:
case WM8996_GPIO_1:
case WM8996_GPIO_2:
case WM8996_GPIO_3:
case WM8996_GPIO_4:
case WM8996_GPIO_5:
case WM8996_PULL_CONTROL_1:
case WM8996_PULL_CONTROL_2:
case WM8996_INTERRUPT_STATUS_1:
case WM8996_INTERRUPT_STATUS_2:
case WM8996_INTERRUPT_RAW_STATUS_2:
case WM8996_INTERRUPT_STATUS_1_MASK:
case WM8996_INTERRUPT_STATUS_2_MASK:
case WM8996_INTERRUPT_CONTROL:
case WM8996_LEFT_PDM_SPEAKER:
case WM8996_RIGHT_PDM_SPEAKER:
case WM8996_PDM_SPEAKER_MUTE_SEQUENCE:
case WM8996_PDM_SPEAKER_VOLUME:
return 1;
default:
return 0;
}
}
static int wm8915_volatile_register(struct snd_soc_codec *codec,
static int wm8996_volatile_register(struct snd_soc_codec *codec,
unsigned int reg)
{
switch (reg) {
case WM8915_SOFTWARE_RESET:
case WM8915_CHIP_REVISION:
case WM8915_LDO_1:
case WM8915_LDO_2:
case WM8915_INTERRUPT_STATUS_1:
case WM8915_INTERRUPT_STATUS_2:
case WM8915_INTERRUPT_RAW_STATUS_2:
case WM8915_DC_SERVO_READBACK_0:
case WM8915_DC_SERVO_2:
case WM8915_DC_SERVO_6:
case WM8915_DC_SERVO_7:
case WM8915_FLL_CONTROL_6:
case WM8915_MIC_DETECT_3:
case WM8915_HEADPHONE_DETECT_1:
case WM8915_HEADPHONE_DETECT_2:
case WM8996_SOFTWARE_RESET:
case WM8996_CHIP_REVISION:
case WM8996_LDO_1:
case WM8996_LDO_2:
case WM8996_INTERRUPT_STATUS_1:
case WM8996_INTERRUPT_STATUS_2:
case WM8996_INTERRUPT_RAW_STATUS_2:
case WM8996_DC_SERVO_READBACK_0:
case WM8996_DC_SERVO_2:
case WM8996_DC_SERVO_6:
case WM8996_DC_SERVO_7:
case WM8996_FLL_CONTROL_6:
case WM8996_MIC_DETECT_3:
case WM8996_HEADPHONE_DETECT_1:
case WM8996_HEADPHONE_DETECT_2:
return 1;
default:
return 0;
}
}
static int wm8915_reset(struct snd_soc_codec *codec)
static int wm8996_reset(struct snd_soc_codec *codec)
{
return snd_soc_write(codec, WM8915_SOFTWARE_RESET, 0x8915);
return snd_soc_write(codec, WM8996_SOFTWARE_RESET, 0x8915);
}
static const int bclk_divs[] = {
1, 2, 3, 4, 6, 8, 12, 16, 24, 32, 48, 64, 96
};
static void wm8915_update_bclk(struct snd_soc_codec *codec)
static void wm8996_update_bclk(struct snd_soc_codec *codec)
{
struct wm8915_priv *wm8915 = snd_soc_codec_get_drvdata(codec);
struct wm8996_priv *wm8996 = snd_soc_codec_get_drvdata(codec);
int aif, best, cur_val, bclk_rate, bclk_reg, i;
/* Don't bother if we're in a low frequency idle mode that
* can't support audio.
*/
if (wm8915->sysclk < 64000)
if (wm8996->sysclk < 64000)
return;
for (aif = 0; aif < WM8915_AIFS; aif++) {
for (aif = 0; aif < WM8996_AIFS; aif++) {
switch (aif) {
case 0:
bclk_reg = WM8915_AIF1_BCLK;
bclk_reg = WM8996_AIF1_BCLK;
break;
case 1:
bclk_reg = WM8915_AIF2_BCLK;
bclk_reg = WM8996_AIF2_BCLK;
break;
}
bclk_rate = wm8915->bclk_rate[aif];
bclk_rate = wm8996->bclk_rate[aif];
/* Pick a divisor for BCLK as close as we can get to ideal */
best = 0;
for (i = 0; i < ARRAY_SIZE(bclk_divs); i++) {
cur_val = (wm8915->sysclk / bclk_divs[i]) - bclk_rate;
cur_val = (wm8996->sysclk / bclk_divs[i]) - bclk_rate;
if (cur_val < 0) /* BCLK table is sorted */
break;
best = i;
}
bclk_rate = wm8915->sysclk / bclk_divs[best];
bclk_rate = wm8996->sysclk / bclk_divs[best];
dev_dbg(codec->dev, "Using BCLK_DIV %d for actual BCLK %dHz\n",
bclk_divs[best], bclk_rate);
snd_soc_update_bits(codec, bclk_reg,
WM8915_AIF1_BCLK_DIV_MASK, best);
WM8996_AIF1_BCLK_DIV_MASK, best);
}
}
static int wm8915_set_bias_level(struct snd_soc_codec *codec,
static int wm8996_set_bias_level(struct snd_soc_codec *codec,
enum snd_soc_bias_level level)
{
struct wm8915_priv *wm8915 = snd_soc_codec_get_drvdata(codec);
struct wm8996_priv *wm8996 = snd_soc_codec_get_drvdata(codec);
int ret;
switch (level) {
......@@ -1619,16 +1619,16 @@ static int wm8915_set_bias_level(struct snd_soc_codec *codec,
case SND_SOC_BIAS_PREPARE:
if (codec->dapm.bias_level == SND_SOC_BIAS_STANDBY) {
snd_soc_update_bits(codec, WM8915_POWER_MANAGEMENT_1,
WM8915_BG_ENA, WM8915_BG_ENA);
snd_soc_update_bits(codec, WM8996_POWER_MANAGEMENT_1,
WM8996_BG_ENA, WM8996_BG_ENA);
msleep(2);
}
break;
case SND_SOC_BIAS_STANDBY:
if (codec->dapm.bias_level == SND_SOC_BIAS_OFF) {
ret = regulator_bulk_enable(ARRAY_SIZE(wm8915->supplies),
wm8915->supplies);
ret = regulator_bulk_enable(ARRAY_SIZE(wm8996->supplies),
wm8996->supplies);
if (ret != 0) {
dev_err(codec->dev,
"Failed to enable supplies: %d\n",
......@@ -1636,8 +1636,8 @@ static int wm8915_set_bias_level(struct snd_soc_codec *codec,
return ret;
}
if (wm8915->pdata.ldo_ena >= 0) {
gpio_set_value_cansleep(wm8915->pdata.ldo_ena,
if (wm8996->pdata.ldo_ena >= 0) {
gpio_set_value_cansleep(wm8996->pdata.ldo_ena,
1);
msleep(5);
}
......@@ -1646,16 +1646,16 @@ static int wm8915_set_bias_level(struct snd_soc_codec *codec,
snd_soc_cache_sync(codec);
}
snd_soc_update_bits(codec, WM8915_POWER_MANAGEMENT_1,
WM8915_BG_ENA, 0);
snd_soc_update_bits(codec, WM8996_POWER_MANAGEMENT_1,
WM8996_BG_ENA, 0);
break;
case SND_SOC_BIAS_OFF:
codec->cache_only = true;
if (wm8915->pdata.ldo_ena >= 0)
gpio_set_value_cansleep(wm8915->pdata.ldo_ena, 0);
regulator_bulk_disable(ARRAY_SIZE(wm8915->supplies),
wm8915->supplies);
if (wm8996->pdata.ldo_ena >= 0)
gpio_set_value_cansleep(wm8996->pdata.ldo_ena, 0);
regulator_bulk_disable(ARRAY_SIZE(wm8996->supplies),
wm8996->supplies);
break;
}
......@@ -1664,7 +1664,7 @@ static int wm8915_set_bias_level(struct snd_soc_codec *codec,
return 0;
}
static int wm8915_set_fmt(struct snd_soc_dai *dai, unsigned int fmt)
static int wm8996_set_fmt(struct snd_soc_dai *dai, unsigned int fmt)
{
struct snd_soc_codec *codec = dai->codec;
int aifctrl = 0;
......@@ -1675,16 +1675,16 @@ static int wm8915_set_fmt(struct snd_soc_dai *dai, unsigned int fmt)
switch (dai->id) {
case 0:
aifctrl_reg = WM8915_AIF1_CONTROL;
bclk_reg = WM8915_AIF1_BCLK;
lrclk_tx_reg = WM8915_AIF1_TX_LRCLK_2;
lrclk_rx_reg = WM8915_AIF1_RX_LRCLK_2;
aifctrl_reg = WM8996_AIF1_CONTROL;
bclk_reg = WM8996_AIF1_BCLK;
lrclk_tx_reg = WM8996_AIF1_TX_LRCLK_2;
lrclk_rx_reg = WM8996_AIF1_RX_LRCLK_2;
break;
case 1:
aifctrl_reg = WM8915_AIF2_CONTROL;
bclk_reg = WM8915_AIF2_BCLK;
lrclk_tx_reg = WM8915_AIF2_TX_LRCLK_2;
lrclk_rx_reg = WM8915_AIF2_RX_LRCLK_2;
aifctrl_reg = WM8996_AIF2_CONTROL;
bclk_reg = WM8996_AIF2_BCLK;
lrclk_tx_reg = WM8996_AIF2_TX_LRCLK_2;
lrclk_rx_reg = WM8996_AIF2_RX_LRCLK_2;
break;
default:
BUG();
......@@ -1695,16 +1695,16 @@ static int wm8915_set_fmt(struct snd_soc_dai *dai, unsigned int fmt)
case SND_SOC_DAIFMT_NB_NF:
break;
case SND_SOC_DAIFMT_IB_NF:
bclk |= WM8915_AIF1_BCLK_INV;
bclk |= WM8996_AIF1_BCLK_INV;
break;
case SND_SOC_DAIFMT_NB_IF:
lrclk_tx |= WM8915_AIF1TX_LRCLK_INV;
lrclk_rx |= WM8915_AIF1RX_LRCLK_INV;
lrclk_tx |= WM8996_AIF1TX_LRCLK_INV;
lrclk_rx |= WM8996_AIF1RX_LRCLK_INV;
break;
case SND_SOC_DAIFMT_IB_IF:
bclk |= WM8915_AIF1_BCLK_INV;
lrclk_tx |= WM8915_AIF1TX_LRCLK_INV;
lrclk_rx |= WM8915_AIF1RX_LRCLK_INV;
bclk |= WM8996_AIF1_BCLK_INV;
lrclk_tx |= WM8996_AIF1TX_LRCLK_INV;
lrclk_rx |= WM8996_AIF1RX_LRCLK_INV;
break;
}
......@@ -1712,16 +1712,16 @@ static int wm8915_set_fmt(struct snd_soc_dai *dai, unsigned int fmt)
case SND_SOC_DAIFMT_CBS_CFS:
break;
case SND_SOC_DAIFMT_CBS_CFM:
lrclk_tx |= WM8915_AIF1TX_LRCLK_MSTR;
lrclk_rx |= WM8915_AIF1RX_LRCLK_MSTR;
lrclk_tx |= WM8996_AIF1TX_LRCLK_MSTR;
lrclk_rx |= WM8996_AIF1RX_LRCLK_MSTR;
break;
case SND_SOC_DAIFMT_CBM_CFS:
bclk |= WM8915_AIF1_BCLK_MSTR;
bclk |= WM8996_AIF1_BCLK_MSTR;
break;
case SND_SOC_DAIFMT_CBM_CFM:
bclk |= WM8915_AIF1_BCLK_MSTR;
lrclk_tx |= WM8915_AIF1TX_LRCLK_MSTR;
lrclk_rx |= WM8915_AIF1RX_LRCLK_MSTR;
bclk |= WM8996_AIF1_BCLK_MSTR;
lrclk_tx |= WM8996_AIF1TX_LRCLK_MSTR;
lrclk_rx |= WM8996_AIF1RX_LRCLK_MSTR;
break;
default:
return -EINVAL;
......@@ -1743,17 +1743,17 @@ static int wm8915_set_fmt(struct snd_soc_dai *dai, unsigned int fmt)
return -EINVAL;
}
snd_soc_update_bits(codec, aifctrl_reg, WM8915_AIF1_FMT_MASK, aifctrl);
snd_soc_update_bits(codec, aifctrl_reg, WM8996_AIF1_FMT_MASK, aifctrl);
snd_soc_update_bits(codec, bclk_reg,
WM8915_AIF1_BCLK_INV | WM8915_AIF1_BCLK_MSTR,
WM8996_AIF1_BCLK_INV | WM8996_AIF1_BCLK_MSTR,
bclk);
snd_soc_update_bits(codec, lrclk_tx_reg,
WM8915_AIF1TX_LRCLK_INV |
WM8915_AIF1TX_LRCLK_MSTR,
WM8996_AIF1TX_LRCLK_INV |
WM8996_AIF1TX_LRCLK_MSTR,
lrclk_tx);
snd_soc_update_bits(codec, lrclk_rx_reg,
WM8915_AIF1RX_LRCLK_INV |
WM8915_AIF1RX_LRCLK_MSTR,
WM8996_AIF1RX_LRCLK_INV |
WM8996_AIF1RX_LRCLK_MSTR,
lrclk_rx);
return 0;
......@@ -1763,12 +1763,12 @@ static const int dsp_divs[] = {
48000, 32000, 16000, 8000
};
static int wm8915_hw_params(struct snd_pcm_substream *substream,
static int wm8996_hw_params(struct snd_pcm_substream *substream,
struct snd_pcm_hw_params *params,
struct snd_soc_dai *dai)
{
struct snd_soc_codec *codec = dai->codec;
struct wm8915_priv *wm8915 = snd_soc_codec_get_drvdata(codec);
struct wm8996_priv *wm8996 = snd_soc_codec_get_drvdata(codec);
int bits, i, bclk_rate;
int aifdata = 0;
int lrclk = 0;
......@@ -1778,25 +1778,25 @@ static int wm8915_hw_params(struct snd_pcm_substream *substream,
switch (dai->id) {
case 0:
if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK ||
(snd_soc_read(codec, WM8915_GPIO_1)) & WM8915_GP1_FN_MASK) {
aifdata_reg = WM8915_AIF1RX_DATA_CONFIGURATION;
lrclk_reg = WM8915_AIF1_RX_LRCLK_1;
(snd_soc_read(codec, WM8996_GPIO_1)) & WM8996_GP1_FN_MASK) {
aifdata_reg = WM8996_AIF1RX_DATA_CONFIGURATION;
lrclk_reg = WM8996_AIF1_RX_LRCLK_1;
} else {
aifdata_reg = WM8915_AIF1TX_DATA_CONFIGURATION_1;
lrclk_reg = WM8915_AIF1_TX_LRCLK_1;
aifdata_reg = WM8996_AIF1TX_DATA_CONFIGURATION_1;
lrclk_reg = WM8996_AIF1_TX_LRCLK_1;
}
dsp_shift = 0;
break;
case 1:
if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK ||
(snd_soc_read(codec, WM8915_GPIO_2)) & WM8915_GP2_FN_MASK) {
aifdata_reg = WM8915_AIF2RX_DATA_CONFIGURATION;
lrclk_reg = WM8915_AIF2_RX_LRCLK_1;
(snd_soc_read(codec, WM8996_GPIO_2)) & WM8996_GP2_FN_MASK) {
aifdata_reg = WM8996_AIF2RX_DATA_CONFIGURATION;
lrclk_reg = WM8996_AIF2_RX_LRCLK_1;
} else {
aifdata_reg = WM8915_AIF2TX_DATA_CONFIGURATION_1;
lrclk_reg = WM8915_AIF2_TX_LRCLK_1;
aifdata_reg = WM8996_AIF2TX_DATA_CONFIGURATION_1;
lrclk_reg = WM8996_AIF2_TX_LRCLK_1;
}
dsp_shift = WM8915_DSP2_DIV_SHIFT;
dsp_shift = WM8996_DSP2_DIV_SHIFT;
break;
default:
BUG();
......@@ -1809,14 +1809,14 @@ static int wm8915_hw_params(struct snd_pcm_substream *substream,
return bclk_rate;
}
wm8915->bclk_rate[dai->id] = bclk_rate;
wm8915->rx_rate[dai->id] = params_rate(params);
wm8996->bclk_rate[dai->id] = bclk_rate;
wm8996->rx_rate[dai->id] = params_rate(params);
/* Needs looking at for TDM */
bits = snd_pcm_format_width(params_format(params));
if (bits < 0)
return bits;
aifdata |= (bits << WM8915_AIF1TX_WL_SHIFT) | bits;
aifdata |= (bits << WM8996_AIF1TX_WL_SHIFT) | bits;
for (i = 0; i < ARRAY_SIZE(dsp_divs); i++) {
if (dsp_divs[i] == params_rate(params))
......@@ -1829,53 +1829,53 @@ static int wm8915_hw_params(struct snd_pcm_substream *substream,
}
dsp |= i << dsp_shift;
wm8915_update_bclk(codec);
wm8996_update_bclk(codec);
lrclk = bclk_rate / params_rate(params);
dev_dbg(dai->dev, "Using LRCLK rate %d for actual LRCLK %dHz\n",
lrclk, bclk_rate / lrclk);
snd_soc_update_bits(codec, aifdata_reg,
WM8915_AIF1TX_WL_MASK |
WM8915_AIF1TX_SLOT_LEN_MASK,
WM8996_AIF1TX_WL_MASK |
WM8996_AIF1TX_SLOT_LEN_MASK,
aifdata);
snd_soc_update_bits(codec, lrclk_reg, WM8915_AIF1RX_RATE_MASK,
snd_soc_update_bits(codec, lrclk_reg, WM8996_AIF1RX_RATE_MASK,
lrclk);
snd_soc_update_bits(codec, WM8915_AIF_CLOCKING_2,
WM8915_DSP1_DIV_SHIFT << dsp_shift, dsp);
snd_soc_update_bits(codec, WM8996_AIF_CLOCKING_2,
WM8996_DSP1_DIV_SHIFT << dsp_shift, dsp);
return 0;
}
static int wm8915_set_sysclk(struct snd_soc_dai *dai,
static int wm8996_set_sysclk(struct snd_soc_dai *dai,
int clk_id, unsigned int freq, int dir)
{
struct snd_soc_codec *codec = dai->codec;
struct wm8915_priv *wm8915 = snd_soc_codec_get_drvdata(codec);
struct wm8996_priv *wm8996 = snd_soc_codec_get_drvdata(codec);
int lfclk = 0;
int ratediv = 0;
int src;
int old;
if (freq == wm8915->sysclk && clk_id == wm8915->sysclk_src)
if (freq == wm8996->sysclk && clk_id == wm8996->sysclk_src)
return 0;
/* Disable SYSCLK while we reconfigure */
old = snd_soc_read(codec, WM8915_AIF_CLOCKING_1) & WM8915_SYSCLK_ENA;
snd_soc_update_bits(codec, WM8915_AIF_CLOCKING_1,
WM8915_SYSCLK_ENA, 0);
old = snd_soc_read(codec, WM8996_AIF_CLOCKING_1) & WM8996_SYSCLK_ENA;
snd_soc_update_bits(codec, WM8996_AIF_CLOCKING_1,
WM8996_SYSCLK_ENA, 0);
switch (clk_id) {
case WM8915_SYSCLK_MCLK1:
wm8915->sysclk = freq;
case WM8996_SYSCLK_MCLK1:
wm8996->sysclk = freq;
src = 0;
break;
case WM8915_SYSCLK_MCLK2:
wm8915->sysclk = freq;
case WM8996_SYSCLK_MCLK2:
wm8996->sysclk = freq;
src = 1;
break;
case WM8915_SYSCLK_FLL:
wm8915->sysclk = freq;
case WM8996_SYSCLK_FLL:
wm8996->sysclk = freq;
src = 2;
break;
default:
......@@ -1883,37 +1883,37 @@ static int wm8915_set_sysclk(struct snd_soc_dai *dai,
return -EINVAL;
}
switch (wm8915->sysclk) {
switch (wm8996->sysclk) {
case 6144000:
snd_soc_update_bits(codec, WM8915_AIF_RATE,
WM8915_SYSCLK_RATE, 0);
snd_soc_update_bits(codec, WM8996_AIF_RATE,
WM8996_SYSCLK_RATE, 0);
break;
case 24576000:
ratediv = WM8915_SYSCLK_DIV;
ratediv = WM8996_SYSCLK_DIV;
case 12288000:
snd_soc_update_bits(codec, WM8915_AIF_RATE,
WM8915_SYSCLK_RATE, WM8915_SYSCLK_RATE);
snd_soc_update_bits(codec, WM8996_AIF_RATE,
WM8996_SYSCLK_RATE, WM8996_SYSCLK_RATE);
break;
case 32000:
case 32768:
lfclk = WM8915_LFCLK_ENA;
lfclk = WM8996_LFCLK_ENA;
break;
default:
dev_warn(codec->dev, "Unsupported clock rate %dHz\n",
wm8915->sysclk);
wm8996->sysclk);
return -EINVAL;
}
wm8915_update_bclk(codec);
wm8996_update_bclk(codec);
snd_soc_update_bits(codec, WM8915_AIF_CLOCKING_1,
WM8915_SYSCLK_SRC_MASK | WM8915_SYSCLK_DIV_MASK,
src << WM8915_SYSCLK_SRC_SHIFT | ratediv);
snd_soc_update_bits(codec, WM8915_CLOCKING_1, WM8915_LFCLK_ENA, lfclk);
snd_soc_update_bits(codec, WM8915_AIF_CLOCKING_1,
WM8915_SYSCLK_ENA, old);
snd_soc_update_bits(codec, WM8996_AIF_CLOCKING_1,
WM8996_SYSCLK_SRC_MASK | WM8996_SYSCLK_DIV_MASK,
src << WM8996_SYSCLK_SRC_SHIFT | ratediv);
snd_soc_update_bits(codec, WM8996_CLOCKING_1, WM8996_LFCLK_ENA, lfclk);
snd_soc_update_bits(codec, WM8996_AIF_CLOCKING_1,
WM8996_SYSCLK_ENA, old);
wm8915->sysclk_src = clk_id;
wm8996->sysclk_src = clk_id;
return 0;
}
......@@ -2029,28 +2029,28 @@ static int fll_factors(struct _fll_div *fll_div, unsigned int Fref,
return 0;
}
static int wm8915_set_fll(struct snd_soc_codec *codec, int fll_id, int source,
static int wm8996_set_fll(struct snd_soc_codec *codec, int fll_id, int source,
unsigned int Fref, unsigned int Fout)
{
struct wm8915_priv *wm8915 = snd_soc_codec_get_drvdata(codec);
struct wm8996_priv *wm8996 = snd_soc_codec_get_drvdata(codec);
struct i2c_client *i2c = to_i2c_client(codec->dev);
struct _fll_div fll_div;
unsigned long timeout;
int ret, reg;
/* Any change? */
if (source == wm8915->fll_src && Fref == wm8915->fll_fref &&
Fout == wm8915->fll_fout)
if (source == wm8996->fll_src && Fref == wm8996->fll_fref &&
Fout == wm8996->fll_fout)
return 0;
if (Fout == 0) {
dev_dbg(codec->dev, "FLL disabled\n");
wm8915->fll_fref = 0;
wm8915->fll_fout = 0;
wm8996->fll_fref = 0;
wm8996->fll_fout = 0;
snd_soc_update_bits(codec, WM8915_FLL_CONTROL_1,
WM8915_FLL_ENA, 0);
snd_soc_update_bits(codec, WM8996_FLL_CONTROL_1,
WM8996_FLL_ENA, 0);
return 0;
}
......@@ -2060,16 +2060,16 @@ static int wm8915_set_fll(struct snd_soc_codec *codec, int fll_id, int source,
return ret;
switch (source) {
case WM8915_FLL_MCLK1:
case WM8996_FLL_MCLK1:
reg = 0;
break;
case WM8915_FLL_MCLK2:
case WM8996_FLL_MCLK2:
reg = 1;
break;
case WM8915_FLL_DACLRCLK1:
case WM8996_FLL_DACLRCLK1:
reg = 2;
break;
case WM8915_FLL_BCLK1:
case WM8996_FLL_BCLK1:
reg = 3;
break;
default:
......@@ -2077,42 +2077,42 @@ static int wm8915_set_fll(struct snd_soc_codec *codec, int fll_id, int source,
return -EINVAL;
}
reg |= fll_div.fll_refclk_div << WM8915_FLL_REFCLK_DIV_SHIFT;
reg |= fll_div.fll_ref_freq << WM8915_FLL_REF_FREQ_SHIFT;
reg |= fll_div.fll_refclk_div << WM8996_FLL_REFCLK_DIV_SHIFT;
reg |= fll_div.fll_ref_freq << WM8996_FLL_REF_FREQ_SHIFT;
snd_soc_update_bits(codec, WM8915_FLL_CONTROL_5,
WM8915_FLL_REFCLK_DIV_MASK | WM8915_FLL_REF_FREQ |
WM8915_FLL_REFCLK_SRC_MASK, reg);
snd_soc_update_bits(codec, WM8996_FLL_CONTROL_5,
WM8996_FLL_REFCLK_DIV_MASK | WM8996_FLL_REF_FREQ |
WM8996_FLL_REFCLK_SRC_MASK, reg);
reg = 0;
if (fll_div.theta || fll_div.lambda)
reg |= WM8915_FLL_EFS_ENA | (3 << WM8915_FLL_LFSR_SEL_SHIFT);
reg |= WM8996_FLL_EFS_ENA | (3 << WM8996_FLL_LFSR_SEL_SHIFT);
else
reg |= 1 << WM8915_FLL_LFSR_SEL_SHIFT;
snd_soc_write(codec, WM8915_FLL_EFS_2, reg);
reg |= 1 << WM8996_FLL_LFSR_SEL_SHIFT;
snd_soc_write(codec, WM8996_FLL_EFS_2, reg);
snd_soc_update_bits(codec, WM8915_FLL_CONTROL_2,
WM8915_FLL_OUTDIV_MASK |
WM8915_FLL_FRATIO_MASK,
(fll_div.fll_outdiv << WM8915_FLL_OUTDIV_SHIFT) |
snd_soc_update_bits(codec, WM8996_FLL_CONTROL_2,
WM8996_FLL_OUTDIV_MASK |
WM8996_FLL_FRATIO_MASK,
(fll_div.fll_outdiv << WM8996_FLL_OUTDIV_SHIFT) |
(fll_div.fll_fratio));
snd_soc_write(codec, WM8915_FLL_CONTROL_3, fll_div.theta);
snd_soc_write(codec, WM8996_FLL_CONTROL_3, fll_div.theta);
snd_soc_update_bits(codec, WM8915_FLL_CONTROL_4,
WM8915_FLL_N_MASK | WM8915_FLL_LOOP_GAIN_MASK,
(fll_div.n << WM8915_FLL_N_SHIFT) |
snd_soc_update_bits(codec, WM8996_FLL_CONTROL_4,
WM8996_FLL_N_MASK | WM8996_FLL_LOOP_GAIN_MASK,
(fll_div.n << WM8996_FLL_N_SHIFT) |
fll_div.fll_loop_gain);
snd_soc_write(codec, WM8915_FLL_EFS_1, fll_div.lambda);
snd_soc_write(codec, WM8996_FLL_EFS_1, fll_div.lambda);
snd_soc_update_bits(codec, WM8915_FLL_CONTROL_1,
WM8915_FLL_ENA, WM8915_FLL_ENA);
snd_soc_update_bits(codec, WM8996_FLL_CONTROL_1,
WM8996_FLL_ENA, WM8996_FLL_ENA);
/* The FLL supports live reconfiguration - kick that in case we were
* already enabled.
*/
snd_soc_write(codec, WM8915_FLL_CONTROL_6, WM8915_FLL_SWITCH_CLK);
snd_soc_write(codec, WM8996_FLL_CONTROL_6, WM8996_FLL_SWITCH_CLK);
/* Wait for the FLL to lock, using the interrupt if possible */
if (Fref > 1000000)
......@@ -2124,7 +2124,7 @@ static int wm8915_set_fll(struct snd_soc_codec *codec, int fll_id, int source,
if (i2c->irq)
timeout *= 1000;
ret = wait_for_completion_timeout(&wm8915->fll_lock, timeout);
ret = wait_for_completion_timeout(&wm8996->fll_lock, timeout);
if (ret == 0 && i2c->irq) {
dev_err(codec->dev, "Timed out waiting for FLL\n");
......@@ -2135,118 +2135,118 @@ static int wm8915_set_fll(struct snd_soc_codec *codec, int fll_id, int source,
dev_dbg(codec->dev, "FLL configured for %dHz->%dHz\n", Fref, Fout);
wm8915->fll_fref = Fref;
wm8915->fll_fout = Fout;
wm8915->fll_src = source;
wm8996->fll_fref = Fref;
wm8996->fll_fout = Fout;
wm8996->fll_src = source;
return ret;
}
#ifdef CONFIG_GPIOLIB
static inline struct wm8915_priv *gpio_to_wm8915(struct gpio_chip *chip)
static inline struct wm8996_priv *gpio_to_wm8996(struct gpio_chip *chip)
{
return container_of(chip, struct wm8915_priv, gpio_chip);
return container_of(chip, struct wm8996_priv, gpio_chip);
}
static void wm8915_gpio_set(struct gpio_chip *chip, unsigned offset, int value)
static void wm8996_gpio_set(struct gpio_chip *chip, unsigned offset, int value)
{
struct wm8915_priv *wm8915 = gpio_to_wm8915(chip);
struct snd_soc_codec *codec = wm8915->codec;
struct wm8996_priv *wm8996 = gpio_to_wm8996(chip);
struct snd_soc_codec *codec = wm8996->codec;
snd_soc_update_bits(codec, WM8915_GPIO_1 + offset,
WM8915_GP1_LVL, !!value << WM8915_GP1_LVL_SHIFT);
snd_soc_update_bits(codec, WM8996_GPIO_1 + offset,
WM8996_GP1_LVL, !!value << WM8996_GP1_LVL_SHIFT);
}
static int wm8915_gpio_direction_out(struct gpio_chip *chip,
static int wm8996_gpio_direction_out(struct gpio_chip *chip,
unsigned offset, int value)
{
struct wm8915_priv *wm8915 = gpio_to_wm8915(chip);
struct snd_soc_codec *codec = wm8915->codec;
struct wm8996_priv *wm8996 = gpio_to_wm8996(chip);
struct snd_soc_codec *codec = wm8996->codec;
int val;
val = (1 << WM8915_GP1_FN_SHIFT) | (!!value << WM8915_GP1_LVL_SHIFT);
val = (1 << WM8996_GP1_FN_SHIFT) | (!!value << WM8996_GP1_LVL_SHIFT);
return snd_soc_update_bits(codec, WM8915_GPIO_1 + offset,
WM8915_GP1_FN_MASK | WM8915_GP1_DIR |
WM8915_GP1_LVL, val);
return snd_soc_update_bits(codec, WM8996_GPIO_1 + offset,
WM8996_GP1_FN_MASK | WM8996_GP1_DIR |
WM8996_GP1_LVL, val);
}
static int wm8915_gpio_get(struct gpio_chip *chip, unsigned offset)
static int wm8996_gpio_get(struct gpio_chip *chip, unsigned offset)
{
struct wm8915_priv *wm8915 = gpio_to_wm8915(chip);
struct snd_soc_codec *codec = wm8915->codec;
struct wm8996_priv *wm8996 = gpio_to_wm8996(chip);
struct snd_soc_codec *codec = wm8996->codec;
int ret;
ret = snd_soc_read(codec, WM8915_GPIO_1 + offset);
ret = snd_soc_read(codec, WM8996_GPIO_1 + offset);
if (ret < 0)
return ret;
return (ret & WM8915_GP1_LVL) != 0;
return (ret & WM8996_GP1_LVL) != 0;
}
static int wm8915_gpio_direction_in(struct gpio_chip *chip, unsigned offset)
static int wm8996_gpio_direction_in(struct gpio_chip *chip, unsigned offset)
{
struct wm8915_priv *wm8915 = gpio_to_wm8915(chip);
struct snd_soc_codec *codec = wm8915->codec;
struct wm8996_priv *wm8996 = gpio_to_wm8996(chip);
struct snd_soc_codec *codec = wm8996->codec;
return snd_soc_update_bits(codec, WM8915_GPIO_1 + offset,
WM8915_GP1_FN_MASK | WM8915_GP1_DIR,
(1 << WM8915_GP1_FN_SHIFT) |
(1 << WM8915_GP1_DIR_SHIFT));
return snd_soc_update_bits(codec, WM8996_GPIO_1 + offset,
WM8996_GP1_FN_MASK | WM8996_GP1_DIR,
(1 << WM8996_GP1_FN_SHIFT) |
(1 << WM8996_GP1_DIR_SHIFT));
}
static struct gpio_chip wm8915_template_chip = {
.label = "wm8915",
static struct gpio_chip wm8996_template_chip = {
.label = "wm8996",
.owner = THIS_MODULE,
.direction_output = wm8915_gpio_direction_out,
.set = wm8915_gpio_set,
.direction_input = wm8915_gpio_direction_in,
.get = wm8915_gpio_get,
.direction_output = wm8996_gpio_direction_out,
.set = wm8996_gpio_set,
.direction_input = wm8996_gpio_direction_in,
.get = wm8996_gpio_get,
.can_sleep = 1,
};
static void wm8915_init_gpio(struct snd_soc_codec *codec)
static void wm8996_init_gpio(struct snd_soc_codec *codec)
{
struct wm8915_priv *wm8915 = snd_soc_codec_get_drvdata(codec);
struct wm8996_priv *wm8996 = snd_soc_codec_get_drvdata(codec);
int ret;
wm8915->gpio_chip = wm8915_template_chip;
wm8915->gpio_chip.ngpio = 5;
wm8915->gpio_chip.dev = codec->dev;
wm8996->gpio_chip = wm8996_template_chip;
wm8996->gpio_chip.ngpio = 5;
wm8996->gpio_chip.dev = codec->dev;
if (wm8915->pdata.gpio_base)
wm8915->gpio_chip.base = wm8915->pdata.gpio_base;
if (wm8996->pdata.gpio_base)
wm8996->gpio_chip.base = wm8996->pdata.gpio_base;
else
wm8915->gpio_chip.base = -1;
wm8996->gpio_chip.base = -1;
ret = gpiochip_add(&wm8915->gpio_chip);
ret = gpiochip_add(&wm8996->gpio_chip);
if (ret != 0)
dev_err(codec->dev, "Failed to add GPIOs: %d\n", ret);
}
static void wm8915_free_gpio(struct snd_soc_codec *codec)
static void wm8996_free_gpio(struct snd_soc_codec *codec)
{
struct wm8915_priv *wm8915 = snd_soc_codec_get_drvdata(codec);
struct wm8996_priv *wm8996 = snd_soc_codec_get_drvdata(codec);
int ret;
ret = gpiochip_remove(&wm8915->gpio_chip);
ret = gpiochip_remove(&wm8996->gpio_chip);
if (ret != 0)
dev_err(codec->dev, "Failed to remove GPIOs: %d\n", ret);
}
#else
static void wm8915_init_gpio(struct snd_soc_codec *codec)
static void wm8996_init_gpio(struct snd_soc_codec *codec)
{
}
static void wm8915_free_gpio(struct snd_soc_codec *codec)
static void wm8996_free_gpio(struct snd_soc_codec *codec)
{
}
#endif
/**
* wm8915_detect - Enable default WM8915 jack detection
* wm8996_detect - Enable default WM8996 jack detection
*
* The WM8915 has advanced accessory detection support for headsets.
* The WM8996 has advanced accessory detection support for headsets.
* This function provides a default implementation which integrates
* the majority of this functionality with minimal user configuration.
*
......@@ -2254,23 +2254,23 @@ static void wm8915_free_gpio(struct snd_soc_codec *codec)
* will also detect inverted microphone ground connections and update
* the polarity of the connections.
*/
int wm8915_detect(struct snd_soc_codec *codec, struct snd_soc_jack *jack,
wm8915_polarity_fn polarity_cb)
int wm8996_detect(struct snd_soc_codec *codec, struct snd_soc_jack *jack,
wm8996_polarity_fn polarity_cb)
{
struct wm8915_priv *wm8915 = snd_soc_codec_get_drvdata(codec);
struct wm8996_priv *wm8996 = snd_soc_codec_get_drvdata(codec);
wm8915->jack = jack;
wm8915->detecting = true;
wm8915->polarity_cb = polarity_cb;
wm8996->jack = jack;
wm8996->detecting = true;
wm8996->polarity_cb = polarity_cb;
if (wm8915->polarity_cb)
wm8915->polarity_cb(codec, 0);
if (wm8996->polarity_cb)
wm8996->polarity_cb(codec, 0);
/* Clear discarge to avoid noise during detection */
snd_soc_update_bits(codec, WM8915_MICBIAS_1,
WM8915_MICB1_DISCH, 0);
snd_soc_update_bits(codec, WM8915_MICBIAS_2,
WM8915_MICB2_DISCH, 0);
snd_soc_update_bits(codec, WM8996_MICBIAS_1,
WM8996_MICB1_DISCH, 0);
snd_soc_update_bits(codec, WM8996_MICBIAS_2,
WM8996_MICB2_DISCH, 0);
/* LDO2 powers the microphones, SYSCLK clocks detection */
snd_soc_dapm_force_enable_pin(&codec->dapm, "LDO2");
......@@ -2279,46 +2279,46 @@ int wm8915_detect(struct snd_soc_codec *codec, struct snd_soc_jack *jack,
/* We start off just enabling microphone detection - even a
* plain headphone will trigger detection.
*/
snd_soc_update_bits(codec, WM8915_MIC_DETECT_1,
WM8915_MICD_ENA, WM8915_MICD_ENA);
snd_soc_update_bits(codec, WM8996_MIC_DETECT_1,
WM8996_MICD_ENA, WM8996_MICD_ENA);
/* Slowest detection rate, gives debounce for initial detection */
snd_soc_update_bits(codec, WM8915_MIC_DETECT_1,
WM8915_MICD_RATE_MASK,
WM8915_MICD_RATE_MASK);
snd_soc_update_bits(codec, WM8996_MIC_DETECT_1,
WM8996_MICD_RATE_MASK,
WM8996_MICD_RATE_MASK);
/* Enable interrupts and we're off */
snd_soc_update_bits(codec, WM8915_INTERRUPT_STATUS_2_MASK,
WM8915_IM_MICD_EINT, 0);
snd_soc_update_bits(codec, WM8996_INTERRUPT_STATUS_2_MASK,
WM8996_IM_MICD_EINT, 0);
return 0;
}
EXPORT_SYMBOL_GPL(wm8915_detect);
EXPORT_SYMBOL_GPL(wm8996_detect);
static void wm8915_micd(struct snd_soc_codec *codec)
static void wm8996_micd(struct snd_soc_codec *codec)
{
struct wm8915_priv *wm8915 = snd_soc_codec_get_drvdata(codec);
struct wm8996_priv *wm8996 = snd_soc_codec_get_drvdata(codec);
int val, reg;
val = snd_soc_read(codec, WM8915_MIC_DETECT_3);
val = snd_soc_read(codec, WM8996_MIC_DETECT_3);
dev_dbg(codec->dev, "Microphone event: %x\n", val);
if (!(val & WM8915_MICD_VALID)) {
if (!(val & WM8996_MICD_VALID)) {
dev_warn(codec->dev, "Microphone detection state invalid\n");
return;
}
/* No accessory, reset everything and report removal */
if (!(val & WM8915_MICD_STS)) {
if (!(val & WM8996_MICD_STS)) {
dev_dbg(codec->dev, "Jack removal detected\n");
wm8915->jack_mic = false;
wm8915->detecting = true;
snd_soc_jack_report(wm8915->jack, 0,
wm8996->jack_mic = false;
wm8996->detecting = true;
snd_soc_jack_report(wm8996->jack, 0,
SND_JACK_HEADSET | SND_JACK_BTN_0);
snd_soc_update_bits(codec, WM8915_MIC_DETECT_1,
WM8915_MICD_RATE_MASK,
WM8915_MICD_RATE_MASK);
snd_soc_update_bits(codec, WM8996_MIC_DETECT_1,
WM8996_MICD_RATE_MASK,
WM8996_MICD_RATE_MASK);
return;
}
......@@ -2327,16 +2327,16 @@ static void wm8915_micd(struct snd_soc_codec *codec)
*/
if (val & 0x400) {
dev_dbg(codec->dev, "Microphone detected\n");
snd_soc_jack_report(wm8915->jack, SND_JACK_HEADSET,
snd_soc_jack_report(wm8996->jack, SND_JACK_HEADSET,
SND_JACK_HEADSET | SND_JACK_BTN_0);
wm8915->jack_mic = true;
wm8915->detecting = false;
wm8996->jack_mic = true;
wm8996->detecting = false;
/* Increase poll rate to give better responsiveness
* for buttons */
snd_soc_update_bits(codec, WM8915_MIC_DETECT_1,
WM8915_MICD_RATE_MASK,
5 << WM8915_MICD_RATE_SHIFT);
snd_soc_update_bits(codec, WM8996_MIC_DETECT_1,
WM8996_MICD_RATE_MASK,
5 << WM8996_MICD_RATE_SHIFT);
}
/* If we detected a lower impedence during initial startup
......@@ -2344,20 +2344,20 @@ static void wm8915_micd(struct snd_soc_codec *codec)
* do this for the lowest impedences to speed up detection of
* plain headphones.
*/
if (wm8915->detecting && (val & 0x3f0)) {
reg = snd_soc_read(codec, WM8915_ACCESSORY_DETECT_MODE_2);
reg ^= WM8915_HPOUT1FB_SRC | WM8915_MICD_SRC |
WM8915_MICD_BIAS_SRC;
snd_soc_update_bits(codec, WM8915_ACCESSORY_DETECT_MODE_2,
WM8915_HPOUT1FB_SRC | WM8915_MICD_SRC |
WM8915_MICD_BIAS_SRC, reg);
if (wm8915->polarity_cb)
wm8915->polarity_cb(codec,
(reg & WM8915_MICD_SRC) != 0);
if (wm8996->detecting && (val & 0x3f0)) {
reg = snd_soc_read(codec, WM8996_ACCESSORY_DETECT_MODE_2);
reg ^= WM8996_HPOUT1FB_SRC | WM8996_MICD_SRC |
WM8996_MICD_BIAS_SRC;
snd_soc_update_bits(codec, WM8996_ACCESSORY_DETECT_MODE_2,
WM8996_HPOUT1FB_SRC | WM8996_MICD_SRC |
WM8996_MICD_BIAS_SRC, reg);
if (wm8996->polarity_cb)
wm8996->polarity_cb(codec,
(reg & WM8996_MICD_SRC) != 0);
dev_dbg(codec->dev, "Set microphone polarity to %d\n",
(reg & WM8915_MICD_SRC) != 0);
(reg & WM8996_MICD_SRC) != 0);
return;
}
......@@ -2366,14 +2366,14 @@ static void wm8915_micd(struct snd_soc_codec *codec)
* impedence as BTN_0.
*/
if (val & 0x3fc) {
if (wm8915->jack_mic) {
if (wm8996->jack_mic) {
dev_dbg(codec->dev, "Mic button detected\n");
snd_soc_jack_report(wm8915->jack,
snd_soc_jack_report(wm8996->jack,
SND_JACK_HEADSET | SND_JACK_BTN_0,
SND_JACK_HEADSET | SND_JACK_BTN_0);
} else {
dev_dbg(codec->dev, "Headphone detected\n");
snd_soc_jack_report(wm8915->jack,
snd_soc_jack_report(wm8996->jack,
SND_JACK_HEADPHONE,
SND_JACK_HEADSET |
SND_JACK_BTN_0);
......@@ -2381,47 +2381,47 @@ static void wm8915_micd(struct snd_soc_codec *codec)
/* Increase the detection rate a bit for
* responsiveness.
*/
snd_soc_update_bits(codec, WM8915_MIC_DETECT_1,
WM8915_MICD_RATE_MASK,
7 << WM8915_MICD_RATE_SHIFT);
snd_soc_update_bits(codec, WM8996_MIC_DETECT_1,
WM8996_MICD_RATE_MASK,
7 << WM8996_MICD_RATE_SHIFT);
wm8915->detecting = false;
wm8996->detecting = false;
}
}
}
static irqreturn_t wm8915_irq(int irq, void *data)
static irqreturn_t wm8996_irq(int irq, void *data)
{
struct snd_soc_codec *codec = data;
struct wm8915_priv *wm8915 = snd_soc_codec_get_drvdata(codec);
struct wm8996_priv *wm8996 = snd_soc_codec_get_drvdata(codec);
int irq_val;
irq_val = snd_soc_read(codec, WM8915_INTERRUPT_STATUS_2);
irq_val = snd_soc_read(codec, WM8996_INTERRUPT_STATUS_2);
if (irq_val < 0) {
dev_err(codec->dev, "Failed to read IRQ status: %d\n",
irq_val);
return IRQ_NONE;
}
irq_val &= ~snd_soc_read(codec, WM8915_INTERRUPT_STATUS_2_MASK);
irq_val &= ~snd_soc_read(codec, WM8996_INTERRUPT_STATUS_2_MASK);
if (irq_val & (WM8915_DCS_DONE_01_EINT | WM8915_DCS_DONE_23_EINT)) {
if (irq_val & (WM8996_DCS_DONE_01_EINT | WM8996_DCS_DONE_23_EINT)) {
dev_dbg(codec->dev, "DC servo IRQ\n");
complete(&wm8915->dcs_done);
complete(&wm8996->dcs_done);
}
if (irq_val & WM8915_FIFOS_ERR_EINT)
if (irq_val & WM8996_FIFOS_ERR_EINT)
dev_err(codec->dev, "Digital core FIFO error\n");
if (irq_val & WM8915_FLL_LOCK_EINT) {
if (irq_val & WM8996_FLL_LOCK_EINT) {
dev_dbg(codec->dev, "FLL locked\n");
complete(&wm8915->fll_lock);
complete(&wm8996->fll_lock);
}
if (irq_val & WM8915_MICD_EINT)
wm8915_micd(codec);
if (irq_val & WM8996_MICD_EINT)
wm8996_micd(codec);
if (irq_val) {
snd_soc_write(codec, WM8915_INTERRUPT_STATUS_2, irq_val);
snd_soc_write(codec, WM8996_INTERRUPT_STATUS_2, irq_val);
return IRQ_HANDLED;
} else {
......@@ -2429,13 +2429,13 @@ static irqreturn_t wm8915_irq(int irq, void *data)
}
}
static irqreturn_t wm8915_edge_irq(int irq, void *data)
static irqreturn_t wm8996_edge_irq(int irq, void *data)
{
irqreturn_t ret = IRQ_NONE;
irqreturn_t val;
do {
val = wm8915_irq(irq, data);
val = wm8996_irq(irq, data);
if (val != IRQ_NONE)
ret = val;
} while (val != IRQ_NONE);
......@@ -2443,20 +2443,20 @@ static irqreturn_t wm8915_edge_irq(int irq, void *data)
return ret;
}
static void wm8915_retune_mobile_pdata(struct snd_soc_codec *codec)
static void wm8996_retune_mobile_pdata(struct snd_soc_codec *codec)
{
struct wm8915_priv *wm8915 = snd_soc_codec_get_drvdata(codec);
struct wm8915_pdata *pdata = &wm8915->pdata;
struct wm8996_priv *wm8996 = snd_soc_codec_get_drvdata(codec);
struct wm8996_pdata *pdata = &wm8996->pdata;
struct snd_kcontrol_new controls[] = {
SOC_ENUM_EXT("DSP1 EQ Mode",
wm8915->retune_mobile_enum,
wm8915_get_retune_mobile_enum,
wm8915_put_retune_mobile_enum),
wm8996->retune_mobile_enum,
wm8996_get_retune_mobile_enum,
wm8996_put_retune_mobile_enum),
SOC_ENUM_EXT("DSP2 EQ Mode",
wm8915->retune_mobile_enum,
wm8915_get_retune_mobile_enum,
wm8915_put_retune_mobile_enum),
wm8996->retune_mobile_enum,
wm8996_get_retune_mobile_enum,
wm8996_put_retune_mobile_enum),
};
int ret, i, j;
const char **t;
......@@ -2465,40 +2465,40 @@ static void wm8915_retune_mobile_pdata(struct snd_soc_codec *codec)
* of texts is likely to be less than the number of
* configurations due to the sample rate dependency of the
* configurations. */
wm8915->num_retune_mobile_texts = 0;
wm8915->retune_mobile_texts = NULL;
wm8996->num_retune_mobile_texts = 0;
wm8996->retune_mobile_texts = NULL;
for (i = 0; i < pdata->num_retune_mobile_cfgs; i++) {
for (j = 0; j < wm8915->num_retune_mobile_texts; j++) {
for (j = 0; j < wm8996->num_retune_mobile_texts; j++) {
if (strcmp(pdata->retune_mobile_cfgs[i].name,
wm8915->retune_mobile_texts[j]) == 0)
wm8996->retune_mobile_texts[j]) == 0)
break;
}
if (j != wm8915->num_retune_mobile_texts)
if (j != wm8996->num_retune_mobile_texts)
continue;
/* Expand the array... */
t = krealloc(wm8915->retune_mobile_texts,
t = krealloc(wm8996->retune_mobile_texts,
sizeof(char *) *
(wm8915->num_retune_mobile_texts + 1),
(wm8996->num_retune_mobile_texts + 1),
GFP_KERNEL);
if (t == NULL)
continue;
/* ...store the new entry... */
t[wm8915->num_retune_mobile_texts] =
t[wm8996->num_retune_mobile_texts] =
pdata->retune_mobile_cfgs[i].name;
/* ...and remember the new version. */
wm8915->num_retune_mobile_texts++;
wm8915->retune_mobile_texts = t;
wm8996->num_retune_mobile_texts++;
wm8996->retune_mobile_texts = t;
}
dev_dbg(codec->dev, "Allocated %d unique ReTune Mobile names\n",
wm8915->num_retune_mobile_texts);
wm8996->num_retune_mobile_texts);
wm8915->retune_mobile_enum.max = wm8915->num_retune_mobile_texts;
wm8915->retune_mobile_enum.texts = wm8915->retune_mobile_texts;
wm8996->retune_mobile_enum.max = wm8996->num_retune_mobile_texts;
wm8996->retune_mobile_enum.texts = wm8996->retune_mobile_texts;
ret = snd_soc_add_controls(codec, controls, ARRAY_SIZE(controls));
if (ret != 0)
......@@ -2506,18 +2506,18 @@ static void wm8915_retune_mobile_pdata(struct snd_soc_codec *codec)
"Failed to add ReTune Mobile controls: %d\n", ret);
}
static int wm8915_probe(struct snd_soc_codec *codec)
static int wm8996_probe(struct snd_soc_codec *codec)
{
int ret;
struct wm8915_priv *wm8915 = snd_soc_codec_get_drvdata(codec);
struct wm8996_priv *wm8996 = snd_soc_codec_get_drvdata(codec);
struct i2c_client *i2c = to_i2c_client(codec->dev);
struct snd_soc_dapm_context *dapm = &codec->dapm;
int i, irq_flags;
wm8915->codec = codec;
wm8996->codec = codec;
init_completion(&wm8915->dcs_done);
init_completion(&wm8915->fll_lock);
init_completion(&wm8996->dcs_done);
init_completion(&wm8996->fll_lock);
dapm->idle_bias_off = true;
dapm->bias_level = SND_SOC_BIAS_OFF;
......@@ -2528,25 +2528,25 @@ static int wm8915_probe(struct snd_soc_codec *codec)
goto err;
}
for (i = 0; i < ARRAY_SIZE(wm8915->supplies); i++)
wm8915->supplies[i].supply = wm8915_supply_names[i];
for (i = 0; i < ARRAY_SIZE(wm8996->supplies); i++)
wm8996->supplies[i].supply = wm8996_supply_names[i];
ret = regulator_bulk_get(codec->dev, ARRAY_SIZE(wm8915->supplies),
wm8915->supplies);
ret = regulator_bulk_get(codec->dev, ARRAY_SIZE(wm8996->supplies),
wm8996->supplies);
if (ret != 0) {
dev_err(codec->dev, "Failed to request supplies: %d\n", ret);
goto err;
}
wm8915->disable_nb[0].notifier_call = wm8915_regulator_event_0;
wm8915->disable_nb[1].notifier_call = wm8915_regulator_event_1;
wm8915->disable_nb[2].notifier_call = wm8915_regulator_event_2;
wm8915->disable_nb[3].notifier_call = wm8915_regulator_event_3;
wm8996->disable_nb[0].notifier_call = wm8996_regulator_event_0;
wm8996->disable_nb[1].notifier_call = wm8996_regulator_event_1;
wm8996->disable_nb[2].notifier_call = wm8996_regulator_event_2;
wm8996->disable_nb[3].notifier_call = wm8996_regulator_event_3;
/* This should really be moved into the regulator core */
for (i = 0; i < ARRAY_SIZE(wm8915->supplies); i++) {
ret = regulator_register_notifier(wm8915->supplies[i].consumer,
&wm8915->disable_nb[i]);
for (i = 0; i < ARRAY_SIZE(wm8996->supplies); i++) {
ret = regulator_register_notifier(wm8996->supplies[i].consumer,
&wm8996->disable_nb[i]);
if (ret != 0) {
dev_err(codec->dev,
"Failed to register regulator notifier: %d\n",
......@@ -2554,30 +2554,30 @@ static int wm8915_probe(struct snd_soc_codec *codec)
}
}
ret = regulator_bulk_enable(ARRAY_SIZE(wm8915->supplies),
wm8915->supplies);
ret = regulator_bulk_enable(ARRAY_SIZE(wm8996->supplies),
wm8996->supplies);
if (ret != 0) {
dev_err(codec->dev, "Failed to enable supplies: %d\n", ret);
goto err_get;
}
if (wm8915->pdata.ldo_ena >= 0) {
gpio_set_value_cansleep(wm8915->pdata.ldo_ena, 1);
if (wm8996->pdata.ldo_ena >= 0) {
gpio_set_value_cansleep(wm8996->pdata.ldo_ena, 1);
msleep(5);
}
ret = snd_soc_read(codec, WM8915_SOFTWARE_RESET);
ret = snd_soc_read(codec, WM8996_SOFTWARE_RESET);
if (ret < 0) {
dev_err(codec->dev, "Failed to read ID register: %d\n", ret);
goto err_enable;
}
if (ret != 0x8915) {
dev_err(codec->dev, "Device is not a WM8915, ID %x\n", ret);
dev_err(codec->dev, "Device is not a WM8996, ID %x\n", ret);
ret = -EINVAL;
goto err_enable;
}
ret = snd_soc_read(codec, WM8915_CHIP_REVISION);
ret = snd_soc_read(codec, WM8996_CHIP_REVISION);
if (ret < 0) {
dev_err(codec->dev, "Failed to read device revision: %d\n",
ret);
......@@ -2585,12 +2585,12 @@ static int wm8915_probe(struct snd_soc_codec *codec)
}
dev_info(codec->dev, "revision %c\n",
(ret & WM8915_CHIP_REV_MASK) + 'A');
(ret & WM8996_CHIP_REV_MASK) + 'A');
if (wm8915->pdata.ldo_ena >= 0) {
gpio_set_value_cansleep(wm8915->pdata.ldo_ena, 0);
if (wm8996->pdata.ldo_ena >= 0) {
gpio_set_value_cansleep(wm8996->pdata.ldo_ena, 0);
} else {
ret = wm8915_reset(codec);
ret = wm8996_reset(codec);
if (ret < 0) {
dev_err(codec->dev, "Failed to issue reset\n");
goto err_enable;
......@@ -2600,168 +2600,168 @@ static int wm8915_probe(struct snd_soc_codec *codec)
codec->cache_only = true;
/* Apply platform data settings */
snd_soc_update_bits(codec, WM8915_LINE_INPUT_CONTROL,
WM8915_INL_MODE_MASK | WM8915_INR_MODE_MASK,
wm8915->pdata.inl_mode << WM8915_INL_MODE_SHIFT |
wm8915->pdata.inr_mode);
snd_soc_update_bits(codec, WM8996_LINE_INPUT_CONTROL,
WM8996_INL_MODE_MASK | WM8996_INR_MODE_MASK,
wm8996->pdata.inl_mode << WM8996_INL_MODE_SHIFT |
wm8996->pdata.inr_mode);
for (i = 0; i < ARRAY_SIZE(wm8915->pdata.gpio_default); i++) {
if (!wm8915->pdata.gpio_default[i])
for (i = 0; i < ARRAY_SIZE(wm8996->pdata.gpio_default); i++) {
if (!wm8996->pdata.gpio_default[i])
continue;
snd_soc_write(codec, WM8915_GPIO_1 + i,
wm8915->pdata.gpio_default[i] & 0xffff);
snd_soc_write(codec, WM8996_GPIO_1 + i,
wm8996->pdata.gpio_default[i] & 0xffff);
}
if (wm8915->pdata.spkmute_seq)
snd_soc_update_bits(codec, WM8915_PDM_SPEAKER_MUTE_SEQUENCE,
WM8915_SPK_MUTE_ENDIAN |
WM8915_SPK_MUTE_SEQ1_MASK,
wm8915->pdata.spkmute_seq);
if (wm8996->pdata.spkmute_seq)
snd_soc_update_bits(codec, WM8996_PDM_SPEAKER_MUTE_SEQUENCE,
WM8996_SPK_MUTE_ENDIAN |
WM8996_SPK_MUTE_SEQ1_MASK,
wm8996->pdata.spkmute_seq);
snd_soc_update_bits(codec, WM8915_ACCESSORY_DETECT_MODE_2,
WM8915_MICD_BIAS_SRC | WM8915_HPOUT1FB_SRC |
WM8915_MICD_SRC, wm8915->pdata.micdet_def);
snd_soc_update_bits(codec, WM8996_ACCESSORY_DETECT_MODE_2,
WM8996_MICD_BIAS_SRC | WM8996_HPOUT1FB_SRC |
WM8996_MICD_SRC, wm8996->pdata.micdet_def);
/* Latch volume update bits */
snd_soc_update_bits(codec, WM8915_LEFT_LINE_INPUT_VOLUME,
WM8915_IN1_VU, WM8915_IN1_VU);
snd_soc_update_bits(codec, WM8915_RIGHT_LINE_INPUT_VOLUME,
WM8915_IN1_VU, WM8915_IN1_VU);
snd_soc_update_bits(codec, WM8915_DAC1_LEFT_VOLUME,
WM8915_DAC1_VU, WM8915_DAC1_VU);
snd_soc_update_bits(codec, WM8915_DAC1_RIGHT_VOLUME,
WM8915_DAC1_VU, WM8915_DAC1_VU);
snd_soc_update_bits(codec, WM8915_DAC2_LEFT_VOLUME,
WM8915_DAC2_VU, WM8915_DAC2_VU);
snd_soc_update_bits(codec, WM8915_DAC2_RIGHT_VOLUME,
WM8915_DAC2_VU, WM8915_DAC2_VU);
snd_soc_update_bits(codec, WM8915_OUTPUT1_LEFT_VOLUME,
WM8915_DAC1_VU, WM8915_DAC1_VU);
snd_soc_update_bits(codec, WM8915_OUTPUT1_RIGHT_VOLUME,
WM8915_DAC1_VU, WM8915_DAC1_VU);
snd_soc_update_bits(codec, WM8915_OUTPUT2_LEFT_VOLUME,
WM8915_DAC2_VU, WM8915_DAC2_VU);
snd_soc_update_bits(codec, WM8915_OUTPUT2_RIGHT_VOLUME,
WM8915_DAC2_VU, WM8915_DAC2_VU);
snd_soc_update_bits(codec, WM8915_DSP1_TX_LEFT_VOLUME,
WM8915_DSP1TX_VU, WM8915_DSP1TX_VU);
snd_soc_update_bits(codec, WM8915_DSP1_TX_RIGHT_VOLUME,
WM8915_DSP1TX_VU, WM8915_DSP1TX_VU);
snd_soc_update_bits(codec, WM8915_DSP2_TX_LEFT_VOLUME,
WM8915_DSP2TX_VU, WM8915_DSP2TX_VU);
snd_soc_update_bits(codec, WM8915_DSP2_TX_RIGHT_VOLUME,
WM8915_DSP2TX_VU, WM8915_DSP2TX_VU);
snd_soc_update_bits(codec, WM8915_DSP1_RX_LEFT_VOLUME,
WM8915_DSP1RX_VU, WM8915_DSP1RX_VU);
snd_soc_update_bits(codec, WM8915_DSP1_RX_RIGHT_VOLUME,
WM8915_DSP1RX_VU, WM8915_DSP1RX_VU);
snd_soc_update_bits(codec, WM8915_DSP2_RX_LEFT_VOLUME,
WM8915_DSP2RX_VU, WM8915_DSP2RX_VU);
snd_soc_update_bits(codec, WM8915_DSP2_RX_RIGHT_VOLUME,
WM8915_DSP2RX_VU, WM8915_DSP2RX_VU);
snd_soc_update_bits(codec, WM8996_LEFT_LINE_INPUT_VOLUME,
WM8996_IN1_VU, WM8996_IN1_VU);
snd_soc_update_bits(codec, WM8996_RIGHT_LINE_INPUT_VOLUME,
WM8996_IN1_VU, WM8996_IN1_VU);
snd_soc_update_bits(codec, WM8996_DAC1_LEFT_VOLUME,
WM8996_DAC1_VU, WM8996_DAC1_VU);
snd_soc_update_bits(codec, WM8996_DAC1_RIGHT_VOLUME,
WM8996_DAC1_VU, WM8996_DAC1_VU);
snd_soc_update_bits(codec, WM8996_DAC2_LEFT_VOLUME,
WM8996_DAC2_VU, WM8996_DAC2_VU);
snd_soc_update_bits(codec, WM8996_DAC2_RIGHT_VOLUME,
WM8996_DAC2_VU, WM8996_DAC2_VU);
snd_soc_update_bits(codec, WM8996_OUTPUT1_LEFT_VOLUME,
WM8996_DAC1_VU, WM8996_DAC1_VU);
snd_soc_update_bits(codec, WM8996_OUTPUT1_RIGHT_VOLUME,
WM8996_DAC1_VU, WM8996_DAC1_VU);
snd_soc_update_bits(codec, WM8996_OUTPUT2_LEFT_VOLUME,
WM8996_DAC2_VU, WM8996_DAC2_VU);
snd_soc_update_bits(codec, WM8996_OUTPUT2_RIGHT_VOLUME,
WM8996_DAC2_VU, WM8996_DAC2_VU);
snd_soc_update_bits(codec, WM8996_DSP1_TX_LEFT_VOLUME,
WM8996_DSP1TX_VU, WM8996_DSP1TX_VU);
snd_soc_update_bits(codec, WM8996_DSP1_TX_RIGHT_VOLUME,
WM8996_DSP1TX_VU, WM8996_DSP1TX_VU);
snd_soc_update_bits(codec, WM8996_DSP2_TX_LEFT_VOLUME,
WM8996_DSP2TX_VU, WM8996_DSP2TX_VU);
snd_soc_update_bits(codec, WM8996_DSP2_TX_RIGHT_VOLUME,
WM8996_DSP2TX_VU, WM8996_DSP2TX_VU);
snd_soc_update_bits(codec, WM8996_DSP1_RX_LEFT_VOLUME,
WM8996_DSP1RX_VU, WM8996_DSP1RX_VU);
snd_soc_update_bits(codec, WM8996_DSP1_RX_RIGHT_VOLUME,
WM8996_DSP1RX_VU, WM8996_DSP1RX_VU);
snd_soc_update_bits(codec, WM8996_DSP2_RX_LEFT_VOLUME,
WM8996_DSP2RX_VU, WM8996_DSP2RX_VU);
snd_soc_update_bits(codec, WM8996_DSP2_RX_RIGHT_VOLUME,
WM8996_DSP2RX_VU, WM8996_DSP2RX_VU);
/* No support currently for the underclocked TDM modes and
* pick a default TDM layout with each channel pair working with
* slots 0 and 1. */
snd_soc_update_bits(codec, WM8915_AIF1RX_CHANNEL_0_CONFIGURATION,
WM8915_AIF1RX_CHAN0_SLOTS_MASK |
WM8915_AIF1RX_CHAN0_START_SLOT_MASK,
1 << WM8915_AIF1RX_CHAN0_SLOTS_SHIFT | 0);
snd_soc_update_bits(codec, WM8915_AIF1RX_CHANNEL_1_CONFIGURATION,
WM8915_AIF1RX_CHAN1_SLOTS_MASK |
WM8915_AIF1RX_CHAN1_START_SLOT_MASK,
1 << WM8915_AIF1RX_CHAN1_SLOTS_SHIFT | 1);
snd_soc_update_bits(codec, WM8915_AIF1RX_CHANNEL_2_CONFIGURATION,
WM8915_AIF1RX_CHAN2_SLOTS_MASK |
WM8915_AIF1RX_CHAN2_START_SLOT_MASK,
1 << WM8915_AIF1RX_CHAN2_SLOTS_SHIFT | 0);
snd_soc_update_bits(codec, WM8915_AIF1RX_CHANNEL_3_CONFIGURATION,
WM8915_AIF1RX_CHAN3_SLOTS_MASK |
WM8915_AIF1RX_CHAN0_START_SLOT_MASK,
1 << WM8915_AIF1RX_CHAN3_SLOTS_SHIFT | 1);
snd_soc_update_bits(codec, WM8915_AIF1RX_CHANNEL_4_CONFIGURATION,
WM8915_AIF1RX_CHAN4_SLOTS_MASK |
WM8915_AIF1RX_CHAN0_START_SLOT_MASK,
1 << WM8915_AIF1RX_CHAN4_SLOTS_SHIFT | 0);
snd_soc_update_bits(codec, WM8915_AIF1RX_CHANNEL_5_CONFIGURATION,
WM8915_AIF1RX_CHAN5_SLOTS_MASK |
WM8915_AIF1RX_CHAN0_START_SLOT_MASK,
1 << WM8915_AIF1RX_CHAN5_SLOTS_SHIFT | 1);
snd_soc_update_bits(codec, WM8915_AIF2RX_CHANNEL_0_CONFIGURATION,
WM8915_AIF2RX_CHAN0_SLOTS_MASK |
WM8915_AIF2RX_CHAN0_START_SLOT_MASK,
1 << WM8915_AIF2RX_CHAN0_SLOTS_SHIFT | 0);
snd_soc_update_bits(codec, WM8915_AIF2RX_CHANNEL_1_CONFIGURATION,
WM8915_AIF2RX_CHAN1_SLOTS_MASK |
WM8915_AIF2RX_CHAN1_START_SLOT_MASK,
1 << WM8915_AIF2RX_CHAN1_SLOTS_SHIFT | 1);
snd_soc_update_bits(codec, WM8915_AIF1TX_CHANNEL_0_CONFIGURATION,
WM8915_AIF1TX_CHAN0_SLOTS_MASK |
WM8915_AIF1TX_CHAN0_START_SLOT_MASK,
1 << WM8915_AIF1TX_CHAN0_SLOTS_SHIFT | 0);
snd_soc_update_bits(codec, WM8915_AIF1TX_CHANNEL_1_CONFIGURATION,
WM8915_AIF1TX_CHAN1_SLOTS_MASK |
WM8915_AIF1TX_CHAN0_START_SLOT_MASK,
1 << WM8915_AIF1TX_CHAN1_SLOTS_SHIFT | 1);
snd_soc_update_bits(codec, WM8915_AIF1TX_CHANNEL_2_CONFIGURATION,
WM8915_AIF1TX_CHAN2_SLOTS_MASK |
WM8915_AIF1TX_CHAN0_START_SLOT_MASK,
1 << WM8915_AIF1TX_CHAN2_SLOTS_SHIFT | 0);
snd_soc_update_bits(codec, WM8915_AIF1TX_CHANNEL_3_CONFIGURATION,
WM8915_AIF1TX_CHAN3_SLOTS_MASK |
WM8915_AIF1TX_CHAN0_START_SLOT_MASK,
1 << WM8915_AIF1TX_CHAN3_SLOTS_SHIFT | 1);
snd_soc_update_bits(codec, WM8915_AIF1TX_CHANNEL_4_CONFIGURATION,
WM8915_AIF1TX_CHAN4_SLOTS_MASK |
WM8915_AIF1TX_CHAN0_START_SLOT_MASK,
1 << WM8915_AIF1TX_CHAN4_SLOTS_SHIFT | 0);
snd_soc_update_bits(codec, WM8915_AIF1TX_CHANNEL_5_CONFIGURATION,
WM8915_AIF1TX_CHAN5_SLOTS_MASK |
WM8915_AIF1TX_CHAN0_START_SLOT_MASK,
1 << WM8915_AIF1TX_CHAN5_SLOTS_SHIFT | 1);
snd_soc_update_bits(codec, WM8915_AIF2TX_CHANNEL_0_CONFIGURATION,
WM8915_AIF2TX_CHAN0_SLOTS_MASK |
WM8915_AIF2TX_CHAN0_START_SLOT_MASK,
1 << WM8915_AIF2TX_CHAN0_SLOTS_SHIFT | 0);
snd_soc_update_bits(codec, WM8915_AIF1TX_CHANNEL_1_CONFIGURATION,
WM8915_AIF2TX_CHAN1_SLOTS_MASK |
WM8915_AIF2TX_CHAN1_START_SLOT_MASK,
1 << WM8915_AIF1TX_CHAN1_SLOTS_SHIFT | 1);
if (wm8915->pdata.num_retune_mobile_cfgs)
wm8915_retune_mobile_pdata(codec);
snd_soc_update_bits(codec, WM8996_AIF1RX_CHANNEL_0_CONFIGURATION,
WM8996_AIF1RX_CHAN0_SLOTS_MASK |
WM8996_AIF1RX_CHAN0_START_SLOT_MASK,
1 << WM8996_AIF1RX_CHAN0_SLOTS_SHIFT | 0);
snd_soc_update_bits(codec, WM8996_AIF1RX_CHANNEL_1_CONFIGURATION,
WM8996_AIF1RX_CHAN1_SLOTS_MASK |
WM8996_AIF1RX_CHAN1_START_SLOT_MASK,
1 << WM8996_AIF1RX_CHAN1_SLOTS_SHIFT | 1);
snd_soc_update_bits(codec, WM8996_AIF1RX_CHANNEL_2_CONFIGURATION,
WM8996_AIF1RX_CHAN2_SLOTS_MASK |
WM8996_AIF1RX_CHAN2_START_SLOT_MASK,
1 << WM8996_AIF1RX_CHAN2_SLOTS_SHIFT | 0);
snd_soc_update_bits(codec, WM8996_AIF1RX_CHANNEL_3_CONFIGURATION,
WM8996_AIF1RX_CHAN3_SLOTS_MASK |
WM8996_AIF1RX_CHAN0_START_SLOT_MASK,
1 << WM8996_AIF1RX_CHAN3_SLOTS_SHIFT | 1);
snd_soc_update_bits(codec, WM8996_AIF1RX_CHANNEL_4_CONFIGURATION,
WM8996_AIF1RX_CHAN4_SLOTS_MASK |
WM8996_AIF1RX_CHAN0_START_SLOT_MASK,
1 << WM8996_AIF1RX_CHAN4_SLOTS_SHIFT | 0);
snd_soc_update_bits(codec, WM8996_AIF1RX_CHANNEL_5_CONFIGURATION,
WM8996_AIF1RX_CHAN5_SLOTS_MASK |
WM8996_AIF1RX_CHAN0_START_SLOT_MASK,
1 << WM8996_AIF1RX_CHAN5_SLOTS_SHIFT | 1);
snd_soc_update_bits(codec, WM8996_AIF2RX_CHANNEL_0_CONFIGURATION,
WM8996_AIF2RX_CHAN0_SLOTS_MASK |
WM8996_AIF2RX_CHAN0_START_SLOT_MASK,
1 << WM8996_AIF2RX_CHAN0_SLOTS_SHIFT | 0);
snd_soc_update_bits(codec, WM8996_AIF2RX_CHANNEL_1_CONFIGURATION,
WM8996_AIF2RX_CHAN1_SLOTS_MASK |
WM8996_AIF2RX_CHAN1_START_SLOT_MASK,
1 << WM8996_AIF2RX_CHAN1_SLOTS_SHIFT | 1);
snd_soc_update_bits(codec, WM8996_AIF1TX_CHANNEL_0_CONFIGURATION,
WM8996_AIF1TX_CHAN0_SLOTS_MASK |
WM8996_AIF1TX_CHAN0_START_SLOT_MASK,
1 << WM8996_AIF1TX_CHAN0_SLOTS_SHIFT | 0);
snd_soc_update_bits(codec, WM8996_AIF1TX_CHANNEL_1_CONFIGURATION,
WM8996_AIF1TX_CHAN1_SLOTS_MASK |
WM8996_AIF1TX_CHAN0_START_SLOT_MASK,
1 << WM8996_AIF1TX_CHAN1_SLOTS_SHIFT | 1);
snd_soc_update_bits(codec, WM8996_AIF1TX_CHANNEL_2_CONFIGURATION,
WM8996_AIF1TX_CHAN2_SLOTS_MASK |
WM8996_AIF1TX_CHAN0_START_SLOT_MASK,
1 << WM8996_AIF1TX_CHAN2_SLOTS_SHIFT | 0);
snd_soc_update_bits(codec, WM8996_AIF1TX_CHANNEL_3_CONFIGURATION,
WM8996_AIF1TX_CHAN3_SLOTS_MASK |
WM8996_AIF1TX_CHAN0_START_SLOT_MASK,
1 << WM8996_AIF1TX_CHAN3_SLOTS_SHIFT | 1);
snd_soc_update_bits(codec, WM8996_AIF1TX_CHANNEL_4_CONFIGURATION,
WM8996_AIF1TX_CHAN4_SLOTS_MASK |
WM8996_AIF1TX_CHAN0_START_SLOT_MASK,
1 << WM8996_AIF1TX_CHAN4_SLOTS_SHIFT | 0);
snd_soc_update_bits(codec, WM8996_AIF1TX_CHANNEL_5_CONFIGURATION,
WM8996_AIF1TX_CHAN5_SLOTS_MASK |
WM8996_AIF1TX_CHAN0_START_SLOT_MASK,
1 << WM8996_AIF1TX_CHAN5_SLOTS_SHIFT | 1);
snd_soc_update_bits(codec, WM8996_AIF2TX_CHANNEL_0_CONFIGURATION,
WM8996_AIF2TX_CHAN0_SLOTS_MASK |
WM8996_AIF2TX_CHAN0_START_SLOT_MASK,
1 << WM8996_AIF2TX_CHAN0_SLOTS_SHIFT | 0);
snd_soc_update_bits(codec, WM8996_AIF1TX_CHANNEL_1_CONFIGURATION,
WM8996_AIF2TX_CHAN1_SLOTS_MASK |
WM8996_AIF2TX_CHAN1_START_SLOT_MASK,
1 << WM8996_AIF1TX_CHAN1_SLOTS_SHIFT | 1);
if (wm8996->pdata.num_retune_mobile_cfgs)
wm8996_retune_mobile_pdata(codec);
else
snd_soc_add_controls(codec, wm8915_eq_controls,
ARRAY_SIZE(wm8915_eq_controls));
snd_soc_add_controls(codec, wm8996_eq_controls,
ARRAY_SIZE(wm8996_eq_controls));
/* If the TX LRCLK pins are not in LRCLK mode configure the
* AIFs to source their clocks from the RX LRCLKs.
*/
if ((snd_soc_read(codec, WM8915_GPIO_1)))
snd_soc_update_bits(codec, WM8915_AIF1_TX_LRCLK_2,
WM8915_AIF1TX_LRCLK_MODE,
WM8915_AIF1TX_LRCLK_MODE);
if ((snd_soc_read(codec, WM8996_GPIO_1)))
snd_soc_update_bits(codec, WM8996_AIF1_TX_LRCLK_2,
WM8996_AIF1TX_LRCLK_MODE,
WM8996_AIF1TX_LRCLK_MODE);
if ((snd_soc_read(codec, WM8915_GPIO_2)))
snd_soc_update_bits(codec, WM8915_AIF2_TX_LRCLK_2,
WM8915_AIF2TX_LRCLK_MODE,
WM8915_AIF2TX_LRCLK_MODE);
if ((snd_soc_read(codec, WM8996_GPIO_2)))
snd_soc_update_bits(codec, WM8996_AIF2_TX_LRCLK_2,
WM8996_AIF2TX_LRCLK_MODE,
WM8996_AIF2TX_LRCLK_MODE);
regulator_bulk_disable(ARRAY_SIZE(wm8915->supplies), wm8915->supplies);
regulator_bulk_disable(ARRAY_SIZE(wm8996->supplies), wm8996->supplies);
wm8915_init_gpio(codec);
wm8996_init_gpio(codec);
if (i2c->irq) {
if (wm8915->pdata.irq_flags)
irq_flags = wm8915->pdata.irq_flags;
if (wm8996->pdata.irq_flags)
irq_flags = wm8996->pdata.irq_flags;
else
irq_flags = IRQF_TRIGGER_LOW;
......@@ -2769,24 +2769,24 @@ static int wm8915_probe(struct snd_soc_codec *codec)
if (irq_flags & (IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING))
ret = request_threaded_irq(i2c->irq, NULL,
wm8915_edge_irq,
irq_flags, "wm8915", codec);
wm8996_edge_irq,
irq_flags, "wm8996", codec);
else
ret = request_threaded_irq(i2c->irq, NULL, wm8915_irq,
irq_flags, "wm8915", codec);
ret = request_threaded_irq(i2c->irq, NULL, wm8996_irq,
irq_flags, "wm8996", codec);
if (ret == 0) {
/* Unmask the interrupt */
snd_soc_update_bits(codec, WM8915_INTERRUPT_CONTROL,
WM8915_IM_IRQ, 0);
snd_soc_update_bits(codec, WM8996_INTERRUPT_CONTROL,
WM8996_IM_IRQ, 0);
/* Enable error reporting and DC servo status */
snd_soc_update_bits(codec,
WM8915_INTERRUPT_STATUS_2_MASK,
WM8915_IM_DCS_DONE_23_EINT |
WM8915_IM_DCS_DONE_01_EINT |
WM8915_IM_FLL_LOCK_EINT |
WM8915_IM_FIFOS_ERR_EINT,
WM8996_INTERRUPT_STATUS_2_MASK,
WM8996_IM_DCS_DONE_23_EINT |
WM8996_IM_DCS_DONE_01_EINT |
WM8996_IM_FLL_LOCK_EINT |
WM8996_IM_FIFOS_ERR_EINT,
0);
} else {
dev_err(codec->dev, "Failed to request IRQ: %d\n",
......@@ -2797,199 +2797,199 @@ static int wm8915_probe(struct snd_soc_codec *codec)
return 0;
err_enable:
if (wm8915->pdata.ldo_ena >= 0)
gpio_set_value_cansleep(wm8915->pdata.ldo_ena, 0);
if (wm8996->pdata.ldo_ena >= 0)
gpio_set_value_cansleep(wm8996->pdata.ldo_ena, 0);
regulator_bulk_disable(ARRAY_SIZE(wm8915->supplies), wm8915->supplies);
regulator_bulk_disable(ARRAY_SIZE(wm8996->supplies), wm8996->supplies);
err_get:
regulator_bulk_free(ARRAY_SIZE(wm8915->supplies), wm8915->supplies);
regulator_bulk_free(ARRAY_SIZE(wm8996->supplies), wm8996->supplies);
err:
return ret;
}
static int wm8915_remove(struct snd_soc_codec *codec)
static int wm8996_remove(struct snd_soc_codec *codec)
{
struct wm8915_priv *wm8915 = snd_soc_codec_get_drvdata(codec);
struct wm8996_priv *wm8996 = snd_soc_codec_get_drvdata(codec);
struct i2c_client *i2c = to_i2c_client(codec->dev);
int i;
snd_soc_update_bits(codec, WM8915_INTERRUPT_CONTROL,
WM8915_IM_IRQ, WM8915_IM_IRQ);
snd_soc_update_bits(codec, WM8996_INTERRUPT_CONTROL,
WM8996_IM_IRQ, WM8996_IM_IRQ);
if (i2c->irq)
free_irq(i2c->irq, codec);
wm8915_free_gpio(codec);
wm8996_free_gpio(codec);
for (i = 0; i < ARRAY_SIZE(wm8915->supplies); i++)
regulator_unregister_notifier(wm8915->supplies[i].consumer,
&wm8915->disable_nb[i]);
regulator_bulk_free(ARRAY_SIZE(wm8915->supplies), wm8915->supplies);
for (i = 0; i < ARRAY_SIZE(wm8996->supplies); i++)
regulator_unregister_notifier(wm8996->supplies[i].consumer,
&wm8996->disable_nb[i]);
regulator_bulk_free(ARRAY_SIZE(wm8996->supplies), wm8996->supplies);
return 0;
}
static struct snd_soc_codec_driver soc_codec_dev_wm8915 = {
.probe = wm8915_probe,
.remove = wm8915_remove,
.set_bias_level = wm8915_set_bias_level,
.seq_notifier = wm8915_seq_notifier,
.reg_cache_size = WM8915_MAX_REGISTER + 1,
static struct snd_soc_codec_driver soc_codec_dev_wm8996 = {
.probe = wm8996_probe,
.remove = wm8996_remove,
.set_bias_level = wm8996_set_bias_level,
.seq_notifier = wm8996_seq_notifier,
.reg_cache_size = WM8996_MAX_REGISTER + 1,
.reg_word_size = sizeof(u16),
.reg_cache_default = wm8915_reg,
.volatile_register = wm8915_volatile_register,
.readable_register = wm8915_readable_register,
.reg_cache_default = wm8996_reg,
.volatile_register = wm8996_volatile_register,
.readable_register = wm8996_readable_register,
.compress_type = SND_SOC_RBTREE_COMPRESSION,
.controls = wm8915_snd_controls,
.num_controls = ARRAY_SIZE(wm8915_snd_controls),
.dapm_widgets = wm8915_dapm_widgets,
.num_dapm_widgets = ARRAY_SIZE(wm8915_dapm_widgets),
.dapm_routes = wm8915_dapm_routes,
.num_dapm_routes = ARRAY_SIZE(wm8915_dapm_routes),
.set_pll = wm8915_set_fll,
.controls = wm8996_snd_controls,
.num_controls = ARRAY_SIZE(wm8996_snd_controls),
.dapm_widgets = wm8996_dapm_widgets,
.num_dapm_widgets = ARRAY_SIZE(wm8996_dapm_widgets),
.dapm_routes = wm8996_dapm_routes,
.num_dapm_routes = ARRAY_SIZE(wm8996_dapm_routes),
.set_pll = wm8996_set_fll,
};
#define WM8915_RATES (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000 |\
#define WM8996_RATES (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000 |\
SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_48000)
#define WM8915_FORMATS (SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_S16_LE |\
#define WM8996_FORMATS (SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_S16_LE |\
SNDRV_PCM_FMTBIT_S20_3LE | SNDRV_PCM_FMTBIT_S24_LE |\
SNDRV_PCM_FMTBIT_S32_LE)
static struct snd_soc_dai_ops wm8915_dai_ops = {
.set_fmt = wm8915_set_fmt,
.hw_params = wm8915_hw_params,
.set_sysclk = wm8915_set_sysclk,
static struct snd_soc_dai_ops wm8996_dai_ops = {
.set_fmt = wm8996_set_fmt,
.hw_params = wm8996_hw_params,
.set_sysclk = wm8996_set_sysclk,
};
static struct snd_soc_dai_driver wm8915_dai[] = {
static struct snd_soc_dai_driver wm8996_dai[] = {
{
.name = "wm8915-aif1",
.name = "wm8996-aif1",
.playback = {
.stream_name = "AIF1 Playback",
.channels_min = 1,
.channels_max = 6,
.rates = WM8915_RATES,
.formats = WM8915_FORMATS,
.rates = WM8996_RATES,
.formats = WM8996_FORMATS,
},
.capture = {
.stream_name = "AIF1 Capture",
.channels_min = 1,
.channels_max = 6,
.rates = WM8915_RATES,
.formats = WM8915_FORMATS,
.rates = WM8996_RATES,
.formats = WM8996_FORMATS,
},
.ops = &wm8915_dai_ops,
.ops = &wm8996_dai_ops,
},
{
.name = "wm8915-aif2",
.name = "wm8996-aif2",
.playback = {
.stream_name = "AIF2 Playback",
.channels_min = 1,
.channels_max = 2,
.rates = WM8915_RATES,
.formats = WM8915_FORMATS,
.rates = WM8996_RATES,
.formats = WM8996_FORMATS,
},
.capture = {
.stream_name = "AIF2 Capture",
.channels_min = 1,
.channels_max = 2,
.rates = WM8915_RATES,
.formats = WM8915_FORMATS,
.rates = WM8996_RATES,
.formats = WM8996_FORMATS,
},
.ops = &wm8915_dai_ops,
.ops = &wm8996_dai_ops,
},
};
static __devinit int wm8915_i2c_probe(struct i2c_client *i2c,
static __devinit int wm8996_i2c_probe(struct i2c_client *i2c,
const struct i2c_device_id *id)
{
struct wm8915_priv *wm8915;
struct wm8996_priv *wm8996;
int ret;
wm8915 = kzalloc(sizeof(struct wm8915_priv), GFP_KERNEL);
if (wm8915 == NULL)
wm8996 = kzalloc(sizeof(struct wm8996_priv), GFP_KERNEL);
if (wm8996 == NULL)
return -ENOMEM;
i2c_set_clientdata(i2c, wm8915);
i2c_set_clientdata(i2c, wm8996);
if (dev_get_platdata(&i2c->dev))
memcpy(&wm8915->pdata, dev_get_platdata(&i2c->dev),
sizeof(wm8915->pdata));
memcpy(&wm8996->pdata, dev_get_platdata(&i2c->dev),
sizeof(wm8996->pdata));
if (wm8915->pdata.ldo_ena > 0) {
ret = gpio_request_one(wm8915->pdata.ldo_ena,
GPIOF_OUT_INIT_LOW, "WM8915 ENA");
if (wm8996->pdata.ldo_ena > 0) {
ret = gpio_request_one(wm8996->pdata.ldo_ena,
GPIOF_OUT_INIT_LOW, "WM8996 ENA");
if (ret < 0) {
dev_err(&i2c->dev, "Failed to request GPIO %d: %d\n",
wm8915->pdata.ldo_ena, ret);
wm8996->pdata.ldo_ena, ret);
goto err;
}
}
ret = snd_soc_register_codec(&i2c->dev,
&soc_codec_dev_wm8915, wm8915_dai,
ARRAY_SIZE(wm8915_dai));
&soc_codec_dev_wm8996, wm8996_dai,
ARRAY_SIZE(wm8996_dai));
if (ret < 0)
goto err_gpio;
return ret;
err_gpio:
if (wm8915->pdata.ldo_ena > 0)
gpio_free(wm8915->pdata.ldo_ena);
if (wm8996->pdata.ldo_ena > 0)
gpio_free(wm8996->pdata.ldo_ena);
err:
kfree(wm8915);
kfree(wm8996);
return ret;
}
static __devexit int wm8915_i2c_remove(struct i2c_client *client)
static __devexit int wm8996_i2c_remove(struct i2c_client *client)
{
struct wm8915_priv *wm8915 = i2c_get_clientdata(client);
struct wm8996_priv *wm8996 = i2c_get_clientdata(client);
snd_soc_unregister_codec(&client->dev);
if (wm8915->pdata.ldo_ena > 0)
gpio_free(wm8915->pdata.ldo_ena);
if (wm8996->pdata.ldo_ena > 0)
gpio_free(wm8996->pdata.ldo_ena);
kfree(i2c_get_clientdata(client));
return 0;
}
static const struct i2c_device_id wm8915_i2c_id[] = {
{ "wm8915", 0 },
static const struct i2c_device_id wm8996_i2c_id[] = {
{ "wm8996", 0 },
{ }
};
MODULE_DEVICE_TABLE(i2c, wm8915_i2c_id);
MODULE_DEVICE_TABLE(i2c, wm8996_i2c_id);
static struct i2c_driver wm8915_i2c_driver = {
static struct i2c_driver wm8996_i2c_driver = {
.driver = {
.name = "wm8915",
.name = "wm8996",
.owner = THIS_MODULE,
},
.probe = wm8915_i2c_probe,
.remove = __devexit_p(wm8915_i2c_remove),
.id_table = wm8915_i2c_id,
.probe = wm8996_i2c_probe,
.remove = __devexit_p(wm8996_i2c_remove),
.id_table = wm8996_i2c_id,
};
static int __init wm8915_modinit(void)
static int __init wm8996_modinit(void)
{
int ret;
ret = i2c_add_driver(&wm8915_i2c_driver);
ret = i2c_add_driver(&wm8996_i2c_driver);
if (ret != 0) {
printk(KERN_ERR "Failed to register WM8915 I2C driver: %d\n",
printk(KERN_ERR "Failed to register WM8996 I2C driver: %d\n",
ret);
}
return ret;
}
module_init(wm8915_modinit);
module_init(wm8996_modinit);
static void __exit wm8915_exit(void)
static void __exit wm8996_exit(void)
{
i2c_del_driver(&wm8915_i2c_driver);
i2c_del_driver(&wm8996_i2c_driver);
}
module_exit(wm8915_exit);
module_exit(wm8996_exit);
MODULE_DESCRIPTION("ASoC WM8915 driver");
MODULE_DESCRIPTION("ASoC WM8996 driver");
MODULE_AUTHOR("Mark Brown <broonie@opensource.wolfsonmicro.com>");
MODULE_LICENSE("GPL");
sound/soc/codecs/wm8996.h 0 → 100644
浏览文件 @ a9ba6151
因为 它太大了无法显示 source diff 。你可以改为 查看blob。
sound/soc/samsung/Kconfig
浏览文件 @ a9ba6151
......@@ -183,7 +183,7 @@ config SND_SOC_SPEYSIDE
tristate "Audio support for Wolfson Speyside"
depends on SND_SOC_SAMSUNG && MACH_WLF_CRAGG_6410
select SND_SAMSUNG_I2S
select SND_SOC_WM8915
select SND_SOC_WM8996
select SND_SOC_WM9081
config SND_SOC_SPEYSIDE_WM8962
......
sound/soc/samsung/speyside.c
浏览文件 @ a9ba6151
......@@ -14,10 +14,10 @@
#include <sound/jack.h>
#include <linux/gpio.h>
#include "../codecs/wm8915.h"
#include "../codecs/wm8996.h"
#include "../codecs/wm9081.h"
#define WM8915_HPSEL_GPIO 214
#define WM8996_HPSEL_GPIO 214
static int speyside_set_bias_level(struct snd_soc_card *card,
struct snd_soc_dapm_context *dapm,
......@@ -31,12 +31,12 @@ static int speyside_set_bias_level(struct snd_soc_card *card,
switch (level) {
case SND_SOC_BIAS_STANDBY:
ret = snd_soc_dai_set_sysclk(codec_dai, WM8915_SYSCLK_MCLK2,
ret = snd_soc_dai_set_sysclk(codec_dai, WM8996_SYSCLK_MCLK2,
32768, SND_SOC_CLOCK_IN);
if (ret < 0)
return ret;
ret = snd_soc_dai_set_pll(codec_dai, WM8915_FLL_MCLK2,
ret = snd_soc_dai_set_pll(codec_dai, WM8996_FLL_MCLK2,
0, 0, 0);
if (ret < 0) {
pr_err("Failed to stop FLL\n");
......@@ -65,7 +65,7 @@ static int speyside_set_bias_level_post(struct snd_soc_card *card,
case SND_SOC_BIAS_PREPARE:
if (card->dapm.bias_level == SND_SOC_BIAS_STANDBY) {
ret = snd_soc_dai_set_pll(codec_dai, 0,
WM8915_FLL_MCLK2,
WM8996_FLL_MCLK2,
32768, 48000 * 256);
if (ret < 0) {
pr_err("Failed to start FLL\n");
......@@ -73,7 +73,7 @@ static int speyside_set_bias_level_post(struct snd_soc_card *card,
}
ret = snd_soc_dai_set_sysclk(codec_dai,
WM8915_SYSCLK_FLL,
WM8996_SYSCLK_FLL,
48000 * 256,
SND_SOC_CLOCK_IN);
if (ret < 0)
......@@ -149,26 +149,26 @@ static void speyside_set_polarity(struct snd_soc_codec *codec,
int polarity)
{
speyside_jack_polarity = !polarity;
gpio_direction_output(WM8915_HPSEL_GPIO, speyside_jack_polarity);
gpio_direction_output(WM8996_HPSEL_GPIO, speyside_jack_polarity);
/* Re-run DAPM to make sure we're using the correct mic bias */
snd_soc_dapm_sync(&codec->dapm);
}
static int speyside_wm8915_init(struct snd_soc_pcm_runtime *rtd)
static int speyside_wm8996_init(struct snd_soc_pcm_runtime *rtd)
{
struct snd_soc_dai *dai = rtd->codec_dai;
struct snd_soc_codec *codec = rtd->codec;
int ret;
ret = snd_soc_dai_set_sysclk(dai, WM8915_SYSCLK_MCLK2, 32768, 0);
ret = snd_soc_dai_set_sysclk(dai, WM8996_SYSCLK_MCLK2, 32768, 0);
if (ret < 0)
return ret;
ret = gpio_request(WM8915_HPSEL_GPIO, "HP_SEL");
ret = gpio_request(WM8996_HPSEL_GPIO, "HP_SEL");
if (ret != 0)
pr_err("Failed to request HP_SEL GPIO: %d\n", ret);
gpio_direction_output(WM8915_HPSEL_GPIO, speyside_jack_polarity);
gpio_direction_output(WM8996_HPSEL_GPIO, speyside_jack_polarity);
ret = snd_soc_jack_new(codec, "Headset",
SND_JACK_HEADSET | SND_JACK_BTN_0,
......@@ -182,7 +182,7 @@ static int speyside_wm8915_init(struct snd_soc_pcm_runtime *rtd)
if (ret)
return ret;
wm8915_detect(codec, &speyside_headset, speyside_set_polarity);
wm8996_detect(codec, &speyside_headset, speyside_set_polarity);
return 0;
}
......@@ -205,16 +205,16 @@ static struct snd_soc_dai_link speyside_dai[] = {
.name = "CPU",
.stream_name = "CPU",
.cpu_dai_name = "samsung-i2s.0",
.codec_dai_name = "wm8915-aif1",
.codec_dai_name = "wm8996-aif1",
.platform_name = "samsung-audio",
.codec_name = "wm8915.1-001a",
.init = speyside_wm8915_init,
.codec_name = "wm8996.1-001a",
.init = speyside_wm8996_init,
.ops = &speyside_ops,
},
{
.name = "Baseband",
.stream_name = "Baseband",
.cpu_dai_name = "wm8915-aif2",
.cpu_dai_name = "wm8996-aif2",
.codec_dai_name = "wm1250-ev1",
.codec_name = "wm1250-ev1.1-0027",
.ops = &speyside_ops,
......
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