diff --git a/arch/blackfin/Kconfig b/arch/blackfin/Kconfig index 7b03f9241d660e0b4bdd875c42b6f908603108f7..2e5ce848513e40b0f2185c0fffda4bb4c8a3de89 100644 --- a/arch/blackfin/Kconfig +++ b/arch/blackfin/Kconfig @@ -65,11 +65,6 @@ config GENERIC_CALIBRATE_DELAY bool default y -config IRQCHIP_DEMUX_GPIO - bool - depends on (BF52x || BF53x || BF561 || BF54x) - default y - source "init/Kconfig" source "kernel/Kconfig.preempt" diff --git a/arch/blackfin/mach-bf533/boards/H8606.c b/arch/blackfin/mach-bf533/boards/H8606.c index b79669a84aca883827537b8de8db1f51a6d68369..caf0a86665e373167c61d902fdeef07b51ab6587 100644 --- a/arch/blackfin/mach-bf533/boards/H8606.c +++ b/arch/blackfin/mach-bf533/boards/H8606.c @@ -94,10 +94,6 @@ static struct resource smc91x_resources[] = { .end = IRQ_PROG_INTB, .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL, }, { - /* - * denotes the flag pin and is used directly if - * CONFIG_IRQCHIP_DEMUX_GPIO is defined. - */ .start = IRQ_PF7, .end = IRQ_PF7, .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL, diff --git a/arch/blackfin/mach-bf533/boards/generic_board.c b/arch/blackfin/mach-bf533/boards/generic_board.c index 310b7772c458cf512e1dfbf341d9af5fb9666b34..e359a0d6467fd846c66c68e9fce44c480b877582 100644 --- a/arch/blackfin/mach-bf533/boards/generic_board.c +++ b/arch/blackfin/mach-bf533/boards/generic_board.c @@ -58,10 +58,6 @@ static struct resource smc91x_resources[] = { .end = IRQ_PROG_INTB, .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL, }, { - /* - * denotes the flag pin and is used directly if - * CONFIG_IRQCHIP_DEMUX_GPIO is defined. - */ .start = IRQ_PF7, .end = IRQ_PF7, .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL, diff --git a/arch/blackfin/mach-bf561/boards/generic_board.c b/arch/blackfin/mach-bf561/boards/generic_board.c index 46816be4b2bab8dac67a052f5bd00f4cddd68b38..fc80c5d059f8b28cbd29471f37c152f7d21e9322 100644 --- a/arch/blackfin/mach-bf561/boards/generic_board.c +++ b/arch/blackfin/mach-bf561/boards/generic_board.c @@ -48,10 +48,6 @@ static struct resource smc91x_resources[] = { .end = IRQ_PROG_INTB, .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL, }, { - /* - * denotes the flag pin and is used directly if - * CONFIG_IRQCHIP_DEMUX_GPIO is defined. - */ .start = IRQ_PF9, .end = IRQ_PF9, .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL, diff --git a/arch/blackfin/mach-bf561/boards/tepla.c b/arch/blackfin/mach-bf561/boards/tepla.c index 4a17c6da2a594e10c1c8849a6880adf879669316..ec6a2207c202491f347cd3ab2f45721fb33ec634 100644 --- a/arch/blackfin/mach-bf561/boards/tepla.c +++ b/arch/blackfin/mach-bf561/boards/tepla.c @@ -31,10 +31,6 @@ static struct resource smc91x_resources[] = { .end = IRQ_PROG_INTB, .flags = IORESOURCE_IRQ|IORESOURCE_IRQ_HIGHLEVEL, }, { - /* - * denotes the flag pin and is used directly if - * CONFIG_IRQCHIP_DEMUX_GPIO is defined. - */ .start = IRQ_PF7, .end = IRQ_PF7, .flags = IORESOURCE_IRQ|IORESOURCE_IRQ_HIGHLEVEL, diff --git a/arch/blackfin/mach-common/ints-priority-dc.c b/arch/blackfin/mach-common/ints-priority-dc.c index c2f05fabedc1c8f47e859d4821cecfe59e17c7b9..4882f0e801a9df1df9b40b36e4404775f1b5cc24 100644 --- a/arch/blackfin/mach-common/ints-priority-dc.c +++ b/arch/blackfin/mach-common/ints-priority-dc.c @@ -181,7 +181,6 @@ static struct irq_chip bf561_internal_irqchip = { .unmask = bf561_internal_unmask_irq, }; -#ifdef CONFIG_IRQCHIP_DEMUX_GPIO static unsigned short gpio_enabled[gpio_bank(MAX_BLACKFIN_GPIOS)]; static unsigned short gpio_edge_triggered[gpio_bank(MAX_BLACKFIN_GPIOS)]; @@ -362,8 +361,6 @@ static void bf561_demux_gpio_irq(unsigned int inta_irq, } -#endif /* CONFIG_IRQCHIP_DEMUX_GPIO */ - void __init init_exception_vectors(void) { SSYNC(); @@ -413,26 +410,21 @@ int __init init_arch_irq(void) set_irq_chip(irq, &bf561_core_irqchip); else set_irq_chip(irq, &bf561_internal_irqchip); -#ifdef CONFIG_IRQCHIP_DEMUX_GPIO + if ((irq != IRQ_PROG0_INTA) && - (irq != IRQ_PROG1_INTA) && (irq != IRQ_PROG2_INTA)) { -#endif + (irq != IRQ_PROG1_INTA) && + (irq != IRQ_PROG2_INTA)) set_irq_handler(irq, handle_simple_irq); -#ifdef CONFIG_IRQCHIP_DEMUX_GPIO - } else { + else set_irq_chained_handler(irq, bf561_demux_gpio_irq); - } -#endif - } -#ifdef CONFIG_IRQCHIP_DEMUX_GPIO for (irq = IRQ_PF0; irq <= IRQ_PF47; irq++) { set_irq_chip(irq, &bf561_gpio_irqchip); /* if configured as edge, then will be changed to do_edge_IRQ */ set_irq_handler(irq, handle_level_irq); } -#endif + bfin_write_IMASK(0); CSYNC(); ilat = bfin_read_ILAT(); @@ -457,9 +449,8 @@ int __init init_arch_irq(void) } #ifdef CONFIG_DO_IRQ_L1 -void do_irq(int vec, struct pt_regs *fp)__attribute__((l1_text)); +__attribute__((l1_text)) #endif - void do_irq(int vec, struct pt_regs *fp) { if (vec == EVT_IVTMR_P) { diff --git a/arch/blackfin/mach-common/ints-priority-sc.c b/arch/blackfin/mach-common/ints-priority-sc.c index 2d2b63567b301d80c7223e8025e4acab279847ca..147f0731087a031bb2514e29bdecdab7147138fe 100644 --- a/arch/blackfin/mach-common/ints-priority-sc.c +++ b/arch/blackfin/mach-common/ints-priority-sc.c @@ -308,7 +308,7 @@ static void bfin_demux_error_irq(unsigned int int_err_irq, } #endif /* BF537_GENERIC_ERROR_INT_DEMUX */ -#if defined(CONFIG_IRQCHIP_DEMUX_GPIO) && !defined(CONFIG_BF54x) +#if !defined(CONFIG_BF54x) static unsigned short gpio_enabled[gpio_bank(MAX_BLACKFIN_GPIOS)]; static unsigned short gpio_edge_triggered[gpio_bank(MAX_BLACKFIN_GPIOS)]; @@ -464,7 +464,7 @@ static void bfin_demux_gpio_irq(unsigned int intb_irq, } } -#else /* CONFIG_IRQCHIP_DEMUX_GPIO */ +#else /* CONFIG_BF54x */ #define NR_PINT_SYS_IRQS 4 #define NR_PINT_BITS 32 @@ -726,7 +726,7 @@ static void bfin_demux_gpio_irq(unsigned int intb_irq, } } -#endif /* CONFIG_IRQCHIP_DEMUX_GPIO */ +#endif void __init init_exception_vectors(void) { @@ -766,10 +766,10 @@ int __init init_arch_irq(void) bfin_write_SIC_IMASK1(SIC_UNMASK_ALL); bfin_write_SIC_IWR0(IWR_ENABLE_ALL); bfin_write_SIC_IWR1(IWR_ENABLE_ALL); -#ifdef CONFIG_BF54x +# ifdef CONFIG_BF54x bfin_write_SIC_IMASK2(SIC_UNMASK_ALL); bfin_write_SIC_IWR2(IWR_ENABLE_ALL); -#endif +# endif #else bfin_write_SIC_IMASK(SIC_UNMASK_ALL); bfin_write_SIC_IWR(IWR_ENABLE_ALL); @@ -778,13 +778,13 @@ int __init init_arch_irq(void) local_irq_disable(); -#if defined(CONFIG_IRQCHIP_DEMUX_GPIO) && defined(CONFIG_BF54x) -#ifdef CONFIG_PINTx_REASSIGN +#ifdef CONFIG_BF54x +# ifdef CONFIG_PINTx_REASSIGN pint[0]->assign = CONFIG_PINT0_ASSIGN; pint[1]->assign = CONFIG_PINT1_ASSIGN; pint[2]->assign = CONFIG_PINT2_ASSIGN; pint[3]->assign = CONFIG_PINT3_ASSIGN; -#endif +# endif /* Whenever PINTx_ASSIGN is altered init_pint_lut() must be executed! */ init_pint_lut(); #endif @@ -799,18 +799,17 @@ int __init init_arch_irq(void) #endif switch (irq) { -#ifdef CONFIG_IRQCHIP_DEMUX_GPIO #if defined(CONFIG_BF53x) case IRQ_PROG_INTA: set_irq_chained_handler(irq, bfin_demux_gpio_irq); break; -#if defined(BF537_FAMILY) && !(defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)) +# if defined(BF537_FAMILY) && !(defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)) case IRQ_MAC_RX: set_irq_chained_handler(irq, bfin_demux_gpio_irq); break; -#endif +# endif #elif defined(CONFIG_BF54x) case IRQ_PINT0: set_irq_chained_handler(irq, @@ -841,7 +840,6 @@ int __init init_arch_irq(void) set_irq_chained_handler(irq, bfin_demux_gpio_irq); break; -#endif #endif default: set_irq_handler(irq, handle_simple_irq); @@ -861,7 +859,6 @@ int __init init_arch_irq(void) } #endif -#ifdef CONFIG_IRQCHIP_DEMUX_GPIO #ifndef CONFIG_BF54x for (irq = IRQ_PF0; irq < NR_IRQS; irq++) { #else @@ -871,7 +868,7 @@ int __init init_arch_irq(void) /* if configured as edge, then will be changed to do_edge_IRQ */ set_irq_handler(irq, handle_level_irq); } -#endif + bfin_write_IMASK(0); CSYNC(); ilat = bfin_read_ILAT(); @@ -896,9 +893,8 @@ int __init init_arch_irq(void) } #ifdef CONFIG_DO_IRQ_L1 -void do_irq(int vec, struct pt_regs *fp) __attribute__((l1_text)); +__attribute__((l1_text)) #endif - void do_irq(int vec, struct pt_regs *fp) { if (vec == EVT_IVTMR_P) { diff --git a/include/asm-blackfin/mach-bf527/irq.h b/include/asm-blackfin/mach-bf527/irq.h index 304f5bcfebe4c56478f3447ccc021eb4dece1f5f..4e2b3f2020e5a4bb71c073526023fc7ef2b1f3d8 100644 --- a/include/asm-blackfin/mach-bf527/irq.h +++ b/include/asm-blackfin/mach-bf527/irq.h @@ -176,11 +176,7 @@ #define GPIO_IRQ_BASE IRQ_PF0 -#ifdef CONFIG_IRQCHIP_DEMUX_GPIO #define NR_IRQS (IRQ_PH15+1) -#else -#define NR_IRQS (SYS_IRQS+1) -#endif #define IVG7 7 #define IVG8 8 diff --git a/include/asm-blackfin/mach-bf533/irq.h b/include/asm-blackfin/mach-bf533/irq.h index 452fb825d891122ce674eda8b169538dcfdc0f85..832e6f6122da332d91072457ffbadaf56b6e9eff 100644 --- a/include/asm-blackfin/mach-bf533/irq.h +++ b/include/asm-blackfin/mach-bf533/irq.h @@ -130,11 +130,7 @@ Core Emulation ** #define GPIO_IRQ_BASE IRQ_PF0 -#ifdef CONFIG_IRQCHIP_DEMUX_GPIO #define NR_IRQS (IRQ_PF15+1) -#else -#define NR_IRQS SYS_IRQS -#endif #define IVG7 7 #define IVG8 8 diff --git a/include/asm-blackfin/mach-bf537/irq.h b/include/asm-blackfin/mach-bf537/irq.h index 36c44bc1a917d8acd6a6da642f0dc033234d2e05..be6f2ff77f311a0153414c428252dadfbd65b786 100644 --- a/include/asm-blackfin/mach-bf537/irq.h +++ b/include/asm-blackfin/mach-bf537/irq.h @@ -162,11 +162,7 @@ Core Emulation ** #define GPIO_IRQ_BASE IRQ_PF0 -#ifdef CONFIG_IRQCHIP_DEMUX_GPIO #define NR_IRQS (IRQ_PH15+1) -#else -#define NR_IRQS (IRQ_UART1_ERROR+1) -#endif #define IVG7 7 #define IVG8 8 diff --git a/include/asm-blackfin/mach-bf548/irq.h b/include/asm-blackfin/mach-bf548/irq.h index 3b08cf9bd6f36ec4bf2068a90df9648c1f2c2248..9fb7bc5399a828f851df28a5c6a14e612d085156 100644 --- a/include/asm-blackfin/mach-bf548/irq.h +++ b/include/asm-blackfin/mach-bf548/irq.h @@ -338,11 +338,7 @@ Events (highest priority) EMU 0 #define GPIO_IRQ_BASE IRQ_PA0 -#ifdef CONFIG_IRQCHIP_DEMUX_GPIO #define NR_IRQS (IRQ_PJ15+1) -#else -#define NR_IRQS (SYS_IRQS+1) -#endif /* For compatibility reasons with existing code */ diff --git a/include/asm-blackfin/mach-bf561/irq.h b/include/asm-blackfin/mach-bf561/irq.h index 12789927db3d976ec7e807a6416d23d477841244..83f0383957d25e099f36e04c139bf4197e7d705c 100644 --- a/include/asm-blackfin/mach-bf561/irq.h +++ b/include/asm-blackfin/mach-bf561/irq.h @@ -291,11 +291,7 @@ #define GPIO_IRQ_BASE IRQ_PF0 -#ifdef CONFIG_IRQCHIP_DEMUX_GPIO #define NR_IRQS (IRQ_PF47 + 1) -#else -#define NR_IRQS SYS_IRQS -#endif #define IVG7 7 #define IVG8 8