diff --git a/arch/arm/boot/dts/exynos3250-artik5-eval.dts b/arch/arm/boot/dts/exynos3250-artik5-eval.dts index be4d6aa379f394fb2be2f6e72c8706aadf7cdbbe..4bd2ee87124eab05014568fdbc24d308611bdf16 100644 --- a/arch/arm/boot/dts/exynos3250-artik5-eval.dts +++ b/arch/arm/boot/dts/exynos3250-artik5-eval.dts @@ -28,7 +28,7 @@ vqmmc-supply = <&ldo3_reg>; card-detect-delay = <200>; clock-frequency = <100000000>; - clock-freq-min-max = <400000 100000000>; + max-frequency = <100000000>; samsung,dw-mshc-ciu-div = <1>; samsung,dw-mshc-sdr-timing = <0 1>; samsung,dw-mshc-ddr-timing = <1 2>; diff --git a/arch/arm/boot/dts/exynos3250-artik5.dtsi b/arch/arm/boot/dts/exynos3250-artik5.dtsi index a70819b1b739b11a03b312372a3e294f9a436cd5..59c89d7662a8004b03f52cbdab7d3f9903bf9326 100644 --- a/arch/arm/boot/dts/exynos3250-artik5.dtsi +++ b/arch/arm/boot/dts/exynos3250-artik5.dtsi @@ -310,7 +310,7 @@ card-detect-delay = <200>; vmmc-supply = <&ldo12_reg>; clock-frequency = <100000000>; - clock-freq-min-max = <400000 100000000>; + max-frequency = <100000000>; samsung,dw-mshc-ciu-div = <1>; samsung,dw-mshc-sdr-timing = <0 1>; samsung,dw-mshc-ddr-timing = <1 2>; diff --git a/arch/arm/boot/dts/exynos3250-monk.dts b/arch/arm/boot/dts/exynos3250-monk.dts index 66f04f6ba6bb24a51f1bc3690a6ed2fdaf6ac9ee..cccfe4b791d1c85f0fddb1cd73f5b77c7986cab8 100644 --- a/arch/arm/boot/dts/exynos3250-monk.dts +++ b/arch/arm/boot/dts/exynos3250-monk.dts @@ -435,7 +435,7 @@ card-detect-delay = <200>; vmmc-supply = <&vemmc_reg>; clock-frequency = <100000000>; - clock-freq-min-max = <400000 100000000>; + max-frequency = <100000000>; samsung,dw-mshc-ciu-div = <1>; samsung,dw-mshc-sdr-timing = <0 1>; samsung,dw-mshc-ddr-timing = <1 2>; diff --git a/arch/arm/boot/dts/exynos3250-rinato.dts b/arch/arm/boot/dts/exynos3250-rinato.dts index 3967ee5f7752b60ed31a0d65781100f602dd4f92..548413e23c4727950c8e1fb1dce9489cf2414213 100644 --- a/arch/arm/boot/dts/exynos3250-rinato.dts +++ b/arch/arm/boot/dts/exynos3250-rinato.dts @@ -649,7 +649,7 @@ card-detect-delay = <200>; vmmc-supply = <&ldo12_reg>; clock-frequency = <100000000>; - clock-freq-min-max = <400000 100000000>; + max-frequency = <100000000>; samsung,dw-mshc-ciu-div = <1>; samsung,dw-mshc-sdr-timing = <0 1>; samsung,dw-mshc-ddr-timing = <1 2>;