From 9168e1db754383ea16b75ffcc1efbb9b09cfae64 Mon Sep 17 00:00:00 2001 From: Jon Hunter <jonathanh@nvidia.com> Date: Wed, 29 Jun 2016 12:07:33 +0100 Subject: [PATCH] arm64: tegra: Correct Tegra210 XUSB mailbox interrupt The XUSB mailbox interrupt for Tegra210 is 40 and not 49 which is for the XUSB pad controller. For some Tegra210 boards, this is causing USB connect and disconnect events to go undetected. Fix this by changing the interrupt number for the XUSB mailbox to 40. Signed-off-by: Jon Hunter <jonathanh@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com> --- arch/arm64/boot/dts/nvidia/tegra210.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/nvidia/tegra210.dtsi b/arch/arm64/boot/dts/nvidia/tegra210.dtsi index ac1fb886ca4c..b7318804f400 100644 --- a/arch/arm64/boot/dts/nvidia/tegra210.dtsi +++ b/arch/arm64/boot/dts/nvidia/tegra210.dtsi @@ -629,7 +629,7 @@ reg-names = "hcd", "fpci", "ipfs"; interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>; + <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>; clocks = <&tegra_car TEGRA210_CLK_XUSB_HOST>, <&tegra_car TEGRA210_CLK_XUSB_HOST_SRC>, -- GitLab