diff --git a/drivers/gpu/drm/nouveau/core/subdev/gpio/nve0.c b/drivers/gpu/drm/nouveau/core/subdev/gpio/nve0.c index 16b8c5bf5efa90574495c3fb6530d9a66f487f8b..8988621373b071969727b35109a9fc49613d8b0e 100644 --- a/drivers/gpu/drm/nouveau/core/subdev/gpio/nve0.c +++ b/drivers/gpu/drm/nouveau/core/subdev/gpio/nve0.c @@ -44,7 +44,7 @@ nve0_gpio_intr(struct nouveau_subdev *subdev) } nv_wr32(priv, 0xdc00, intr0); - nv_wr32(priv, 0xdc88, intr1); + nv_wr32(priv, 0xdc80, intr1); } void @@ -52,8 +52,8 @@ nve0_gpio_intr_enable(struct nouveau_event *event, int line) { const u32 addr = line < 16 ? 0xdc00 : 0xdc80; const u32 mask = 0x00010001 << (line & 0xf); - nv_wr32(event->priv, addr + 0x08, mask); - nv_mask(event->priv, addr + 0x00, mask, mask); + nv_wr32(event->priv, addr + 0x00, mask); + nv_mask(event->priv, addr + 0x08, mask, mask); } void @@ -61,8 +61,8 @@ nve0_gpio_intr_disable(struct nouveau_event *event, int line) { const u32 addr = line < 16 ? 0xdc00 : 0xdc80; const u32 mask = 0x00010001 << (line & 0xf); - nv_wr32(event->priv, addr + 0x08, mask); - nv_mask(event->priv, addr + 0x00, mask, 0x00000000); + nv_mask(event->priv, addr + 0x08, mask, 0x00000000); + nv_wr32(event->priv, addr + 0x00, mask); } int