From 78fe01a5a80da4621321a1dc199c3a0875e2fbb0 Mon Sep 17 00:00:00 2001 From: Yoichi Yuasa Date: Wed, 8 Jul 2009 15:08:19 +0900 Subject: [PATCH] MIPS: MIPSsim: Fix unbalance brace in mipssim get_c0_compare_int() cc1: warnings being treated as errors arch/mips/mipssim/sim_time.c: In function 'get_c0_compare_int': arch/mips/mipssim/sim_time.c:103: warning: ISO C90 forbids mixed declarations and code arch/mips/mipssim/sim_time.c:116: error: expected declaration or statement at end of input make[1]: *** [arch/mips/mipssim/sim_time.o] Error 1 Signed-off-by: Yoichi Yuasa Signed-off-by: Ralf Baechle --- arch/mips/mipssim/sim_time.c | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/arch/mips/mipssim/sim_time.c b/arch/mips/mipssim/sim_time.c index 0cea932f1241..5492c42f7650 100644 --- a/arch/mips/mipssim/sim_time.c +++ b/arch/mips/mipssim/sim_time.c @@ -89,13 +89,13 @@ unsigned __cpuinit get_c0_compare_int(void) if (cpu_has_veic) { set_vi_handler(MSC01E_INT_CPUCTR, mips_timer_dispatch); mips_cpu_timer_irq = MSC01E_INT_BASE + MSC01E_INT_CPUCTR; - } else { -#endif - { - if (cpu_has_vint) - set_vi_handler(cp0_compare_irq, mips_timer_dispatch); - mips_cpu_timer_irq = MIPS_CPU_IRQ_BASE + cp0_compare_irq; + + return mips_cpu_timer_irq; } +#endif + if (cpu_has_vint) + set_vi_handler(cp0_compare_irq, mips_timer_dispatch); + mips_cpu_timer_irq = MIPS_CPU_IRQ_BASE + cp0_compare_irq; return mips_cpu_timer_irq; } -- GitLab