diff --git a/drivers/pci/hotplug/pciehp.h b/drivers/pci/hotplug/pciehp.h
index c496258cd9a7a309f630dc6356eb4455eaeaa679..9e5a9fbb93d778cd8e123e6bdc669c1587d1764f 100644
--- a/drivers/pci/hotplug/pciehp.h
+++ b/drivers/pci/hotplug/pciehp.h
@@ -96,7 +96,6 @@ struct controller {
 	struct timer_list poll_timer;
 	unsigned long cmd_started;	/* jiffies */
 	unsigned int cmd_busy:1;
-	unsigned int no_cmd_complete:1;
 	unsigned int link_active_reporting:1;
 	unsigned int notification_enabled:1;
 	unsigned int power_fault_detected;
diff --git a/drivers/pci/hotplug/pciehp_hpc.c b/drivers/pci/hotplug/pciehp_hpc.c
index a3a5c65def1c4d3ba3553e31e6aef5be8fe3635f..f7c370993ab44ec8c71316da6d7fb3460b5b7070 100644
--- a/drivers/pci/hotplug/pciehp_hpc.c
+++ b/drivers/pci/hotplug/pciehp_hpc.c
@@ -140,7 +140,7 @@ static void pcie_wait_cmd(struct controller *ctrl)
 	 * If the controller does not generate notifications for command
 	 * completions, we never need to wait between writes.
 	 */
-	if (ctrl->no_cmd_complete)
+	if (NO_CMD_CMPL(ctrl))
 		return;
 
 	if (!ctrl->cmd_busy)
@@ -772,15 +772,6 @@ struct controller *pcie_init(struct pcie_device *dev)
 	init_waitqueue_head(&ctrl->queue);
 	dbg_ctrl(ctrl);
 
-	/*
-	 * Controller doesn't notify of command completion if the "No
-	 * Command Completed Support" bit is set in Slot Capabilities.
-	 * If set, it means the controller can accept hotplug commands
-	 * with no delay between them.
-	 */
-	if (NO_CMD_CMPL(ctrl))
-		ctrl->no_cmd_complete = 1;
-
 	/* Check if Data Link Layer Link Active Reporting is implemented */
 	pcie_capability_read_dword(pdev, PCI_EXP_LNKCAP, &link_cap);
 	if (link_cap & PCI_EXP_LNKCAP_DLLLARC) {