提交 64c535e9 编写于 作者: L Laurent Pinchart 提交者: Simon Horman

sh: sh772[34]: Set serial port sampling rate to 8 for SCIFA ports

SCIFA ports on sh7723 and sh7724 seem to use a sampling rate of half the
value specified in the datasheet. This is currently handled by a custom
baud rate calculation algorithm. The algorithm ID will be removed from
platform data, set the sampling rate directly instead.
Signed-off-by: NLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
上级 d850acf9
...@@ -98,7 +98,7 @@ static struct plat_sci_port scif3_platform_data = { ...@@ -98,7 +98,7 @@ static struct plat_sci_port scif3_platform_data = {
.flags = UPF_BOOT_AUTOCONF, .flags = UPF_BOOT_AUTOCONF,
.port_reg = SCIx_NOT_SUPPORTED, .port_reg = SCIx_NOT_SUPPORTED,
.scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
.scbrr_algo_id = SCBRR_ALGO_3, .sampling_rate = 8,
.type = PORT_SCIFA, .type = PORT_SCIFA,
}; };
...@@ -121,7 +121,7 @@ static struct plat_sci_port scif4_platform_data = { ...@@ -121,7 +121,7 @@ static struct plat_sci_port scif4_platform_data = {
.port_reg = SCIx_NOT_SUPPORTED, .port_reg = SCIx_NOT_SUPPORTED,
.flags = UPF_BOOT_AUTOCONF, .flags = UPF_BOOT_AUTOCONF,
.scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
.scbrr_algo_id = SCBRR_ALGO_3, .sampling_rate = 8,
.type = PORT_SCIFA, .type = PORT_SCIFA,
}; };
...@@ -144,7 +144,7 @@ static struct plat_sci_port scif5_platform_data = { ...@@ -144,7 +144,7 @@ static struct plat_sci_port scif5_platform_data = {
.port_reg = SCIx_NOT_SUPPORTED, .port_reg = SCIx_NOT_SUPPORTED,
.flags = UPF_BOOT_AUTOCONF, .flags = UPF_BOOT_AUTOCONF,
.scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
.scbrr_algo_id = SCBRR_ALGO_3, .sampling_rate = 8,
.type = PORT_SCIFA, .type = PORT_SCIFA,
}; };
......
...@@ -365,7 +365,7 @@ static struct plat_sci_port scif3_platform_data = { ...@@ -365,7 +365,7 @@ static struct plat_sci_port scif3_platform_data = {
.port_reg = SCIx_NOT_SUPPORTED, .port_reg = SCIx_NOT_SUPPORTED,
.flags = UPF_BOOT_AUTOCONF, .flags = UPF_BOOT_AUTOCONF,
.scscr = SCSCR_RE | SCSCR_TE, .scscr = SCSCR_RE | SCSCR_TE,
.scbrr_algo_id = SCBRR_ALGO_3, .sampling_rate = 8,
.type = PORT_SCIFA, .type = PORT_SCIFA,
}; };
...@@ -388,7 +388,7 @@ static struct plat_sci_port scif4_platform_data = { ...@@ -388,7 +388,7 @@ static struct plat_sci_port scif4_platform_data = {
.port_reg = SCIx_NOT_SUPPORTED, .port_reg = SCIx_NOT_SUPPORTED,
.flags = UPF_BOOT_AUTOCONF, .flags = UPF_BOOT_AUTOCONF,
.scscr = SCSCR_RE | SCSCR_TE, .scscr = SCSCR_RE | SCSCR_TE,
.scbrr_algo_id = SCBRR_ALGO_3, .sampling_rate = 8,
.type = PORT_SCIFA, .type = PORT_SCIFA,
}; };
...@@ -411,7 +411,7 @@ static struct plat_sci_port scif5_platform_data = { ...@@ -411,7 +411,7 @@ static struct plat_sci_port scif5_platform_data = {
.port_reg = SCIx_NOT_SUPPORTED, .port_reg = SCIx_NOT_SUPPORTED,
.flags = UPF_BOOT_AUTOCONF, .flags = UPF_BOOT_AUTOCONF,
.scscr = SCSCR_RE | SCSCR_TE, .scscr = SCSCR_RE | SCSCR_TE,
.scbrr_algo_id = SCBRR_ALGO_3, .sampling_rate = 8,
.type = PORT_SCIFA, .type = PORT_SCIFA,
}; };
......
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