diff --git a/arch/x86/include/asm/realmode.h b/arch/x86/include/asm/realmode.h
index 937dc6071d765762dba5b0ced982112ad95f4cad..fce3f4ae5bd6d93fc6b2b2f0599600b4914395f8 100644
--- a/arch/x86/include/asm/realmode.h
+++ b/arch/x86/include/asm/realmode.h
@@ -35,9 +35,8 @@ struct trampoline_header {
 	u32 gdt_base;
 #else
 	u64 start;
+	u64 efer;
 	u32 cr4;
-	u32 efer_low;
-	u32 efer_high;
 #endif
 };
 
diff --git a/arch/x86/realmode/init.c b/arch/x86/realmode/init.c
index 099277984b80078d8e7f48d8967d08b8bfbbda1b..cbca565af5bd5113db16274000b003550f12e52b 100644
--- a/arch/x86/realmode/init.c
+++ b/arch/x86/realmode/init.c
@@ -22,7 +22,7 @@ void __init setup_real_mode(void)
 	size_t size = PAGE_ALIGN(real_mode_blob_end - real_mode_blob);
 #ifdef CONFIG_X86_64
 	u64 *trampoline_pgd;
-	u32 efer_low, efer_high;
+	u64 efer;
 #endif
 
 	/* Has to be in very low memory so we can execute real-mode AP code. */
@@ -70,9 +70,8 @@ void __init setup_real_mode(void)
 	 * Some AMD processors will #GP(0) if EFER.LMA is set in WRMSR
 	 * so we need to mask it out.
 	 */
-	rdmsr(MSR_EFER, efer_low, efer_high);
-	trampoline_header->efer_low  = efer_low & ~EFER_LMA;
-	trampoline_header->efer_high = efer_high;
+	rdmsrl(MSR_EFER, efer);
+	trampoline_header->efer = efer & ~EFER_LMA;
 
 	trampoline_header->start = (u64) secondary_startup_64;
 	trampoline_cr4_features = &trampoline_header->cr4;
diff --git a/arch/x86/realmode/rm/trampoline_64.S b/arch/x86/realmode/rm/trampoline_64.S
index 1b9e1bc1ac5e0cbb1164adeb5075acdf170706be..bb360dc39d215ea2191fb6cfeada9a2ffba5000a 100644
--- a/arch/x86/realmode/rm/trampoline_64.S
+++ b/arch/x86/realmode/rm/trampoline_64.S
@@ -146,8 +146,8 @@ GLOBAL(trampoline_pgd)		.space	PAGE_SIZE
 	.balign	8
 GLOBAL(trampoline_header)
 	tr_start:		.space	8
-	GLOBAL(tr_cr4)		.space	4
 	GLOBAL(tr_efer)		.space	8
+	GLOBAL(tr_cr4)		.space	4
 END(trampoline_header)
 
 #include "trampoline_common.S"