diff --git a/arch/arm/common/sharpsl_pm.c b/arch/arm/common/sharpsl_pm.c index 780bbf7cb26f28266f3141250b763b82f2590e69..140f1d721d5007079db035e261d9718dd636cafc 100644 --- a/arch/arm/common/sharpsl_pm.c +++ b/arch/arm/common/sharpsl_pm.c @@ -29,8 +29,8 @@ #include #include #include -#include #include +#include #include #include diff --git a/arch/arm/mach-pxa/corgi_lcd.c b/arch/arm/mach-pxa/corgi_lcd.c index 411607bc1fc2ea81dfe4e5e8361800b7b431b996..d9b96319d498a00215cb1a32eeea6cd9ae5b1eba 100644 --- a/arch/arm/mach-pxa/corgi_lcd.c +++ b/arch/arm/mach-pxa/corgi_lcd.c @@ -22,7 +22,6 @@ #include #include #include -#include #include #include #include diff --git a/arch/arm/mach-pxa/corgi_ssp.c b/arch/arm/mach-pxa/corgi_ssp.c index 8e2f2215c4bac609529fed84388a7142b9e420ed..a5ee70735e04ab4b45f62c99dad2b7976c1bde42 100644 --- a/arch/arm/mach-pxa/corgi_ssp.c +++ b/arch/arm/mach-pxa/corgi_ssp.c @@ -20,7 +20,6 @@ #include #include -#include #include #include #include "sharpsl.h" diff --git a/arch/arm/mach-pxa/include/mach/mtd-xip.h b/arch/arm/mach-pxa/include/mach/mtd-xip.h index cfca8155be7232b294e72c3cf407e1c349f8c723..297387ec3618db35114729b9ae3cd89b2f7468aa 100644 --- a/arch/arm/mach-pxa/include/mach/mtd-xip.h +++ b/arch/arm/mach-pxa/include/mach/mtd-xip.h @@ -15,8 +15,8 @@ #ifndef __ARCH_PXA_MTD_XIP_H__ #define __ARCH_PXA_MTD_XIP_H__ -#include -#include +#include +#include #define xip_irqpending() (ICIP & ICMR) diff --git a/arch/arm/mach-pxa/include/mach/pxa-regs.h b/arch/arm/mach-pxa/include/mach/pxa-regs.h deleted file mode 100644 index 7e1e33a41b81ad4fd72084c4d299811942e8395c..0000000000000000000000000000000000000000 --- a/arch/arm/mach-pxa/include/mach/pxa-regs.h +++ /dev/null @@ -1,82 +0,0 @@ -/* - * arch/arm/mach-pxa/include/mach/pxa-regs.h - * - * Author: Nicolas Pitre - * Created: Jun 15, 2001 - * Copyright: MontaVista Software Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#ifndef __PXA_REGS_H -#define __PXA_REGS_H - -#include - -/* - * Real Time Clock - */ - -#define RCNR __REG(0x40900000) /* RTC Count Register */ -#define RTAR __REG(0x40900004) /* RTC Alarm Register */ -#define RTSR __REG(0x40900008) /* RTC Status Register */ -#define RTTR __REG(0x4090000C) /* RTC Timer Trim Register */ -#define PIAR __REG(0x40900038) /* Periodic Interrupt Alarm Register */ - -#define RTSR_PICE (1 << 15) /* Periodic interrupt count enable */ -#define RTSR_PIALE (1 << 14) /* Periodic interrupt Alarm enable */ -#define RTSR_HZE (1 << 3) /* HZ interrupt enable */ -#define RTSR_ALE (1 << 2) /* RTC alarm interrupt enable */ -#define RTSR_HZ (1 << 1) /* HZ rising-edge detected */ -#define RTSR_AL (1 << 0) /* RTC alarm detected */ - - -/* - * OS Timer & Match Registers - */ - -#define OSMR0 __REG(0x40A00000) /* */ -#define OSMR1 __REG(0x40A00004) /* */ -#define OSMR2 __REG(0x40A00008) /* */ -#define OSMR3 __REG(0x40A0000C) /* */ -#define OSMR4 __REG(0x40A00080) /* */ -#define OSCR __REG(0x40A00010) /* OS Timer Counter Register */ -#define OSCR4 __REG(0x40A00040) /* OS Timer Counter Register */ -#define OMCR4 __REG(0x40A000C0) /* */ -#define OSSR __REG(0x40A00014) /* OS Timer Status Register */ -#define OWER __REG(0x40A00018) /* OS Timer Watchdog Enable Register */ -#define OIER __REG(0x40A0001C) /* OS Timer Interrupt Enable Register */ - -#define OSSR_M3 (1 << 3) /* Match status channel 3 */ -#define OSSR_M2 (1 << 2) /* Match status channel 2 */ -#define OSSR_M1 (1 << 1) /* Match status channel 1 */ -#define OSSR_M0 (1 << 0) /* Match status channel 0 */ - -#define OWER_WME (1 << 0) /* Watchdog Match Enable */ - -#define OIER_E3 (1 << 3) /* Interrupt enable channel 3 */ -#define OIER_E2 (1 << 2) /* Interrupt enable channel 2 */ -#define OIER_E1 (1 << 1) /* Interrupt enable channel 1 */ -#define OIER_E0 (1 << 0) /* Interrupt enable channel 0 */ - - -/* - * Interrupt Controller - */ - -#define ICIP __REG(0x40D00000) /* Interrupt Controller IRQ Pending Register */ -#define ICMR __REG(0x40D00004) /* Interrupt Controller Mask Register */ -#define ICLR __REG(0x40D00008) /* Interrupt Controller Level Register */ -#define ICFP __REG(0x40D0000C) /* Interrupt Controller FIQ Pending Register */ -#define ICPR __REG(0x40D00010) /* Interrupt Controller Pending Register */ -#define ICCR __REG(0x40D00014) /* Interrupt Controller Control Register */ - -#define ICIP2 __REG(0x40D0009C) /* Interrupt Controller IRQ Pending Register 2 */ -#define ICMR2 __REG(0x40D000A0) /* Interrupt Controller Mask Register 2 */ -#define ICLR2 __REG(0x40D000A4) /* Interrupt Controller Level Register 2 */ -#define ICFP2 __REG(0x40D000A8) /* Interrupt Controller FIQ Pending Register 2 */ -#define ICPR2 __REG(0x40D000AC) /* Interrupt Controller Pending Register 2 */ - -#endif diff --git a/arch/arm/mach-pxa/include/mach/pxa2xx-regs.h b/arch/arm/mach-pxa/include/mach/pxa2xx-regs.h index 2f834de5b748109d122f375a14354051b2d7ab72..4fcddd9cab76988a8556afc708f7f5c5551118aa 100644 --- a/arch/arm/mach-pxa/include/mach/pxa2xx-regs.h +++ b/arch/arm/mach-pxa/include/mach/pxa2xx-regs.h @@ -14,7 +14,7 @@ #ifndef __PXA2XX_REGS_H #define __PXA2XX_REGS_H -#include +#include /* * PXA Chip selects diff --git a/arch/arm/mach-pxa/include/mach/regs-intc.h b/arch/arm/mach-pxa/include/mach/regs-intc.h new file mode 100644 index 0000000000000000000000000000000000000000..ad23e74b762f486e5abd4a9656d63b69b881becf --- /dev/null +++ b/arch/arm/mach-pxa/include/mach/regs-intc.h @@ -0,0 +1,23 @@ +#ifndef __ASM_MACH_REGS_INTC_H +#define __ASM_MACH_REGS_INTC_H + +#include + +/* + * Interrupt Controller + */ + +#define ICIP __REG(0x40D00000) /* Interrupt Controller IRQ Pending Register */ +#define ICMR __REG(0x40D00004) /* Interrupt Controller Mask Register */ +#define ICLR __REG(0x40D00008) /* Interrupt Controller Level Register */ +#define ICFP __REG(0x40D0000C) /* Interrupt Controller FIQ Pending Register */ +#define ICPR __REG(0x40D00010) /* Interrupt Controller Pending Register */ +#define ICCR __REG(0x40D00014) /* Interrupt Controller Control Register */ + +#define ICIP2 __REG(0x40D0009C) /* Interrupt Controller IRQ Pending Register 2 */ +#define ICMR2 __REG(0x40D000A0) /* Interrupt Controller Mask Register 2 */ +#define ICLR2 __REG(0x40D000A4) /* Interrupt Controller Level Register 2 */ +#define ICFP2 __REG(0x40D000A8) /* Interrupt Controller FIQ Pending Register 2 */ +#define ICPR2 __REG(0x40D000AC) /* Interrupt Controller Pending Register 2 */ + +#endif /* __ASM_MACH_REGS_INTC_H */ diff --git a/arch/arm/mach-pxa/include/mach/regs-ost.h b/arch/arm/mach-pxa/include/mach/regs-ost.h new file mode 100644 index 0000000000000000000000000000000000000000..a3e5f86ef67efdcb47ece9248ffa8f173bd1e42f --- /dev/null +++ b/arch/arm/mach-pxa/include/mach/regs-ost.h @@ -0,0 +1,34 @@ +#ifndef __ASM_MACH_REGS_OST_H +#define __ASM_MACH_REGS_OST_H + +#include + +/* + * OS Timer & Match Registers + */ + +#define OSMR0 __REG(0x40A00000) /* */ +#define OSMR1 __REG(0x40A00004) /* */ +#define OSMR2 __REG(0x40A00008) /* */ +#define OSMR3 __REG(0x40A0000C) /* */ +#define OSMR4 __REG(0x40A00080) /* */ +#define OSCR __REG(0x40A00010) /* OS Timer Counter Register */ +#define OSCR4 __REG(0x40A00040) /* OS Timer Counter Register */ +#define OMCR4 __REG(0x40A000C0) /* */ +#define OSSR __REG(0x40A00014) /* OS Timer Status Register */ +#define OWER __REG(0x40A00018) /* OS Timer Watchdog Enable Register */ +#define OIER __REG(0x40A0001C) /* OS Timer Interrupt Enable Register */ + +#define OSSR_M3 (1 << 3) /* Match status channel 3 */ +#define OSSR_M2 (1 << 2) /* Match status channel 2 */ +#define OSSR_M1 (1 << 1) /* Match status channel 1 */ +#define OSSR_M0 (1 << 0) /* Match status channel 0 */ + +#define OWER_WME (1 << 0) /* Watchdog Match Enable */ + +#define OIER_E3 (1 << 3) /* Interrupt enable channel 3 */ +#define OIER_E2 (1 << 2) /* Interrupt enable channel 2 */ +#define OIER_E1 (1 << 1) /* Interrupt enable channel 1 */ +#define OIER_E0 (1 << 0) /* Interrupt enable channel 0 */ + +#endif /* __ASM_MACH_REGS_OST_H */ diff --git a/arch/arm/mach-pxa/include/mach/regs-rtc.h b/arch/arm/mach-pxa/include/mach/regs-rtc.h new file mode 100644 index 0000000000000000000000000000000000000000..f0e4a589bbe19aa462f312a3693cbe3e8daffe61 --- /dev/null +++ b/arch/arm/mach-pxa/include/mach/regs-rtc.h @@ -0,0 +1,23 @@ +#ifndef __ASM_MACH_REGS_RTC_H +#define __ASM_MACH_REGS_RTC_H + +#include + +/* + * Real Time Clock + */ + +#define RCNR __REG(0x40900000) /* RTC Count Register */ +#define RTAR __REG(0x40900004) /* RTC Alarm Register */ +#define RTSR __REG(0x40900008) /* RTC Status Register */ +#define RTTR __REG(0x4090000C) /* RTC Timer Trim Register */ +#define PIAR __REG(0x40900038) /* Periodic Interrupt Alarm Register */ + +#define RTSR_PICE (1 << 15) /* Periodic interrupt count enable */ +#define RTSR_PIALE (1 << 14) /* Periodic interrupt Alarm enable */ +#define RTSR_HZE (1 << 3) /* HZ interrupt enable */ +#define RTSR_ALE (1 << 2) /* RTC alarm interrupt enable */ +#define RTSR_HZ (1 << 1) /* HZ rising-edge detected */ +#define RTSR_AL (1 << 0) /* RTC alarm detected */ + +#endif /* __ASM_MACH_REGS_RTC_H */ diff --git a/arch/arm/mach-pxa/include/mach/system.h b/arch/arm/mach-pxa/include/mach/system.h index 0f381e69299972604e3b95817310a5f2a286e894..0a587c4ec70931c3ba80c34ccdc4e35c782d9632 100644 --- a/arch/arm/mach-pxa/include/mach/system.h +++ b/arch/arm/mach-pxa/include/mach/system.h @@ -13,7 +13,6 @@ #include #include "hardware.h" #include "pxa2xx-regs.h" -#include "pxa-regs.h" static inline void arch_idle(void) { diff --git a/arch/arm/mach-pxa/irq.c b/arch/arm/mach-pxa/irq.c index d3d40a31f9da3cd41062e4b954504a5d69da846c..f6e0300e4f64c386fab8916dbf93e73b34b436cb 100644 --- a/arch/arm/mach-pxa/irq.c +++ b/arch/arm/mach-pxa/irq.c @@ -20,8 +20,8 @@ #include #include #include -#include #include +#include #include "generic.h" diff --git a/arch/arm/mach-pxa/mioa701.c b/arch/arm/mach-pxa/mioa701.c index dbda65f0e048ec396bec62035c55befba2988bbf..e77c95ca67f0ae702ed50464dcfb70a3466f4b54 100644 --- a/arch/arm/mach-pxa/mioa701.c +++ b/arch/arm/mach-pxa/mioa701.c @@ -41,6 +41,7 @@ #include #include +#include #include #include #include diff --git a/arch/arm/mach-pxa/reset.c b/arch/arm/mach-pxa/reset.c index 00b2dc2a10747b5f87d04d02f82d9f74bdd1b356..867c95c096183df28578471e1d8ef1300c113871 100644 --- a/arch/arm/mach-pxa/reset.c +++ b/arch/arm/mach-pxa/reset.c @@ -10,7 +10,7 @@ #include #include -#include +#include #include unsigned int reset_status; diff --git a/arch/arm/mach-pxa/sharpsl_pm.c b/arch/arm/mach-pxa/sharpsl_pm.c index f0845c1b001c8a94fca44dbb93df2edf621ecbd8..16b4ec67e3b6c03c41ff2b6316dc6613a27738fc 100644 --- a/arch/arm/mach-pxa/sharpsl_pm.c +++ b/arch/arm/mach-pxa/sharpsl_pm.c @@ -25,7 +25,6 @@ #include #include #include -#include #include #include #include "sharpsl.h" diff --git a/arch/arm/mach-pxa/sleep.S b/arch/arm/mach-pxa/sleep.S index a62c8375eb5349e2a1b1acce5f0177b613eb4282..2ed95f369cfc9a8ebb357b713f866e20842f3d86 100644 --- a/arch/arm/mach-pxa/sleep.S +++ b/arch/arm/mach-pxa/sleep.S @@ -15,7 +15,6 @@ #include #include -#include #include #define MDREFR_KDIV 0x200a4000 // all banks diff --git a/arch/arm/mach-pxa/spitz_pm.c b/arch/arm/mach-pxa/spitz_pm.c index 072e77cfe5a36ee4002c0b861115e2c0d7c5f8e7..2e4490562c9e85d5a4891c823a9e17d83a78923a 100644 --- a/arch/arm/mach-pxa/spitz_pm.c +++ b/arch/arm/mach-pxa/spitz_pm.c @@ -24,7 +24,6 @@ #include #include -#include #include #include #include "sharpsl.h" diff --git a/arch/arm/mach-pxa/standby.S b/arch/arm/mach-pxa/standby.S index f3821cfda72f9a1118c1178ff5be866f36a0787b..29f5f5c180b7dbe7ce6dd83488c5e2dcecd41b5c 100644 --- a/arch/arm/mach-pxa/standby.S +++ b/arch/arm/mach-pxa/standby.S @@ -13,7 +13,6 @@ #include #include -#include #include .text diff --git a/arch/arm/mach-pxa/time.c b/arch/arm/mach-pxa/time.c index 95656a72268dd9f1a1ee7177c4ca5286d9d0a570..8eb3830fbb0b297d77bdd46064cacfe9b3786ab0 100644 --- a/arch/arm/mach-pxa/time.c +++ b/arch/arm/mach-pxa/time.c @@ -22,8 +22,7 @@ #include #include #include -#include -#include +#include /* * This is PXA's sched_clock implementation. This has a resolution diff --git a/drivers/input/touchscreen/corgi_ts.c b/drivers/input/touchscreen/corgi_ts.c index 65202c9f63ffbe4f7838654d59514ea34048ed7d..e7292853d2bfebea61b1f88cb3cf86ad9d1d73f7 100644 --- a/drivers/input/touchscreen/corgi_ts.c +++ b/drivers/input/touchscreen/corgi_ts.c @@ -21,7 +21,6 @@ #include #include -#include #include diff --git a/drivers/net/irda/pxaficp_ir.c b/drivers/net/irda/pxaficp_ir.c index 31794c2363ec6870fbdd7a3fabe50ec05b9b2af0..e775338b525f7b96459594f1ea66418d30dcf47e 100644 --- a/drivers/net/irda/pxaficp_ir.c +++ b/drivers/net/irda/pxaficp_ir.c @@ -24,9 +24,8 @@ #include #include -#include -#include #include +#include #define FICP __REG(0x40800000) /* Start of FICP area */ #define ICCR0 __REG(0x40800000) /* ICP Control Register 0 */ diff --git a/drivers/rtc/rtc-sa1100.c b/drivers/rtc/rtc-sa1100.c index d26a5f82aabaf8eb58c61eb39c678d0f890ed5d1..4f247e4dd3f934441b46c4b87f7e69305bc8a02e 100644 --- a/drivers/rtc/rtc-sa1100.c +++ b/drivers/rtc/rtc-sa1100.c @@ -35,7 +35,8 @@ #include #ifdef CONFIG_ARCH_PXA -#include +#include +#include #endif #define RTC_DEF_DIVIDER 32768 - 1 diff --git a/drivers/watchdog/sa1100_wdt.c b/drivers/watchdog/sa1100_wdt.c index e19b4579471762d5f055e0eebaa99d6589d1398a..4b84f296d30cca977aea395981e8f00c7e10d542 100644 --- a/drivers/watchdog/sa1100_wdt.c +++ b/drivers/watchdog/sa1100_wdt.c @@ -30,7 +30,7 @@ #include #ifdef CONFIG_ARCH_PXA -#include +#include #endif #include