diff --git a/arch/powerpc/boot/dts/mpc8377_mds.dts b/arch/powerpc/boot/dts/mpc8377_mds.dts
new file mode 100644
index 0000000000000000000000000000000000000000..98b46065f45adbd16cbe191b219c311744064a39
--- /dev/null
+++ b/arch/powerpc/boot/dts/mpc8377_mds.dts
@@ -0,0 +1,279 @@
+/*
+ * MPC8377E MDS Device Tree Source
+ *
+ * Copyright 2007 Freescale Semiconductor Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ */
+
+/dts-v1/;
+
+/ {
+ model = "fsl,mpc8377emds";
+ compatible = "fsl,mpc8377emds","fsl,mpc837xmds";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ aliases {
+ ethernet0 = &enet0;
+ ethernet1 = &enet1;
+ serial0 = &serial0;
+ serial1 = &serial1;
+ pci0 = &pci0;
+ };
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ PowerPC,8377@0 {
+ device_type = "cpu";
+ reg = <0>;
+ d-cache-line-size = <0x20>;
+ i-cache-line-size = <0x20>;
+ d-cache-size = <0x8000>; // L1, 32K
+ i-cache-size = <0x8000>; // L1, 32K
+ timebase-frequency = <0>;
+ bus-frequency = <0>;
+ clock-frequency = <0>;
+ };
+ };
+
+ memory {
+ device_type = "memory";
+ reg = <0x00000000 0x20000000>; // 512MB at 0
+ };
+
+ soc@e0000000 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ device_type = "soc";
+ ranges = <0x0 0xe0000000 0x00100000>;
+ reg = <0xe0000000 0x00000200>;
+ bus-frequency = <0>;
+
+ wdt@200 {
+ compatible = "mpc83xx_wdt";
+ reg = <0x200 0x100>;
+ };
+
+ i2c@3000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ cell-index = <0>;
+ compatible = "fsl-i2c";
+ reg = <0x3000 0x100>;
+ interrupts = <0xe 0x8>;
+ interrupt-parent = < &ipic >;
+ dfsrr;
+ };
+
+ i2c@3100 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ cell-index = <1>;
+ compatible = "fsl-i2c";
+ reg = <0x3100 0x100>;
+ interrupts = <0xf 0x8>;
+ interrupt-parent = < &ipic >;
+ dfsrr;
+ };
+
+ spi@7000 {
+ compatible = "fsl_spi";
+ reg = <0x7000 0x1000>;
+ interrupts = <0x10 0x8>;
+ interrupt-parent = < &ipic >;
+ mode = "cpu";
+ };
+
+ /* phy type (ULPI, UTMI, UTMI_WIDE, SERIAL) */
+ usb@23000 {
+ compatible = "fsl-usb2-dr";
+ reg = <0x23000 0x1000>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ interrupt-parent = < &ipic >;
+ interrupts = <0x26 0x8>;
+ phy_type = "utmi_wide";
+ };
+
+ mdio@24520 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "fsl,gianfar-mdio";
+ reg = <0x24520 0x20>;
+ phy2: ethernet-phy@2 {
+ interrupt-parent = < &ipic >;
+ interrupts = <0x11 0x8>;
+ reg = <2>;
+ device_type = "ethernet-phy";
+ };
+ phy3: ethernet-phy@3 {
+ interrupt-parent = < &ipic >;
+ interrupts = <0x12 0x8>;
+ reg = <3>;
+ device_type = "ethernet-phy";
+ };
+ };
+
+ enet0: ethernet@24000 {
+ cell-index = <0>;
+ device_type = "network";
+ model = "eTSEC";
+ compatible = "gianfar";
+ reg = <0x24000 0x1000>;
+ local-mac-address = [ 00 00 00 00 00 00 ];
+ interrupts = <0x20 0x8 0x21 0x8 0x22 0x8>;
+ phy-connection-type = "mii";
+ interrupt-parent = < &ipic >;
+ phy-handle = < &phy2 >;
+ };
+
+ enet1: ethernet@25000 {
+ cell-index = <1>;
+ device_type = "network";
+ model = "eTSEC";
+ compatible = "gianfar";
+ reg = <0x25000 0x1000>;
+ local-mac-address = [ 00 00 00 00 00 00 ];
+ interrupts = <0x23 0x8 0x24 0x8 0x25 0x8>;
+ phy-connection-type = "mii";
+ interrupt-parent = < &ipic >;
+ phy-handle = < &phy3 >;
+ };
+
+ serial0: serial@4500 {
+ cell-index = <0>;
+ device_type = "serial";
+ compatible = "ns16550";
+ reg = <0x4500 0x100>;
+ clock-frequency = <0>;
+ interrupts = <0x9 0x8>;
+ interrupt-parent = < &ipic >;
+ };
+
+ serial1: serial@4600 {
+ cell-index = <1>;
+ device_type = "serial";
+ compatible = "ns16550";
+ reg = <0x4600 0x100>;
+ clock-frequency = <0>;
+ interrupts = <0xa 0x8>;
+ interrupt-parent = < &ipic >;
+ };
+
+ crypto@30000 {
+ model = "SEC3";
+ compatible = "talitos";
+ reg = <0x30000 0x10000>;
+ interrupts = <0xb 0x8>;
+ interrupt-parent = < &ipic >;
+ /* Rev. 3.0 geometry */
+ num-channels = <4>;
+ channel-fifo-len = <0x18>;
+ exec-units-mask = <0x000001fe>;
+ descriptor-types-mask = <0x03ab0ebf>;
+ };
+
+ sdhc@2e000 {
+ model = "eSDHC";
+ compatible = "fsl,esdhc";
+ reg = <0x2e000 0x1000>;
+ interrupts = <0x2a 0x8>;
+ interrupt-parent = < &ipic >;
+ };
+
+ sata@18000 {
+ compatible = "fsl,mpc8379-sata";
+ reg = <0x18000 0x1000>;
+ interrupts = <0x2c 0x8>;
+ interrupt-parent = < &ipic >;
+ };
+
+ sata@19000 {
+ compatible = "fsl,mpc8379-sata";
+ reg = <0x19000 0x1000>;
+ interrupts = <0x2d 0x8>;
+ interrupt-parent = < &ipic >;
+ };
+
+ /* IPIC
+ * interrupts cell = <intr #, sense>
+ * sense values match linux IORESOURCE_IRQ_* defines:
+ * sense == 8: Level, low assertion
+ * sense == 2: Edge, high-to-low change
+ */
+ ipic: pic@700 {
+ compatible = "fsl,ipic";
+ interrupt-controller;
+ #address-cells = <0>;
+ #interrupt-cells = <2>;
+ reg = <0x700 0x100>;
+ };
+ };
+
+ pci0: pci@e0008500 {
+ cell-index = <0>;
+ interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
+ interrupt-map = <
+
+ /* IDSEL 0x11 */
+ 0x8800 0x0 0x0 0x1 &ipic 0x14 0x8
+ 0x8800 0x0 0x0 0x2 &ipic 0x15 0x8
+ 0x8800 0x0 0x0 0x3 &ipic 0x16 0x8
+ 0x8800 0x0 0x0 0x4 &ipic 0x17 0x8
+
+ /* IDSEL 0x12 */
+ 0x9000 0x0 0x0 0x1 &ipic 0x16 0x8
+ 0x9000 0x0 0x0 0x2 &ipic 0x17 0x8
+ 0x9000 0x0 0x0 0x3 &ipic 0x14 0x8
+ 0x9000 0x0 0x0 0x4 &ipic 0x15 0x8
+
+ /* IDSEL 0x13 */
+ 0x9800 0x0 0x0 0x1 &ipic 0x17 0x8
+ 0x9800 0x0 0x0 0x2 &ipic 0x14 0x8
+ 0x9800 0x0 0x0 0x3 &ipic 0x15 0x8
+ 0x9800 0x0 0x0 0x4 &ipic 0x16 0x8
+
+ /* IDSEL 0x15 */
+ 0xa800 0x0 0x0 0x1 &ipic 0x14 0x8
+ 0xa800 0x0 0x0 0x2 &ipic 0x15 0x8
+ 0xa800 0x0 0x0 0x3 &ipic 0x16 0x8
+ 0xa800 0x0 0x0 0x4 &ipic 0x17 0x8
+
+ /* IDSEL 0x16 */
+ 0xb000 0x0 0x0 0x1 &ipic 0x17 0x8
+ 0xb000 0x0 0x0 0x2 &ipic 0x14 0x8
+ 0xb000 0x0 0x0 0x3 &ipic 0x15 0x8
+ 0xb000 0x0 0x0 0x4 &ipic 0x16 0x8
+
+ /* IDSEL 0x17 */
+ 0xb800 0x0 0x0 0x1 &ipic 0x16 0x8
+ 0xb800 0x0 0x0 0x2 &ipic 0x17 0x8
+ 0xb800 0x0 0x0 0x3 &ipic 0x14 0x8
+ 0xb800 0x0 0x0 0x4 &ipic 0x15 0x8
+
+ /* IDSEL 0x18 */
+ 0xc000 0x0 0x0 0x1 &ipic 0x15 0x8
+ 0xc000 0x0 0x0 0x2 &ipic 0x16 0x8
+ 0xc000 0x0 0x0 0x3 &ipic 0x17 0x8
+ 0xc000 0x0 0x0 0x4 &ipic 0x14 0x8>;
+ interrupt-parent = < &ipic >;
+ interrupts = <0x42 0x8>;
+ bus-range = <0 0>;
+ ranges = <0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000
+ 0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000
+ 0x01000000 0x0 0x00000000 0xe0300000 0x0 0x00100000>;
+ clock-frequency = <0>;
+ #interrupt-cells = <1>;
+ #size-cells = <2>;
+ #address-cells = <3>;
+ reg = <0xe0008500 0x100>;
+ compatible = "fsl,mpc8349-pci";
+ device_type = "pci";
+ };
+};
diff --git a/arch/powerpc/boot/dts/mpc8378_mds.dts b/arch/powerpc/boot/dts/mpc8378_mds.dts
new file mode 100644
index 0000000000000000000000000000000000000000..c117a6a3a8e6319a7fcd28420549f1e918cb0ac7
--- /dev/null
+++ b/arch/powerpc/boot/dts/mpc8378_mds.dts
@@ -0,0 +1,265 @@
+/*
+ * MPC8378E MDS Device Tree Source
+ *
+ * Copyright 2007 Freescale Semiconductor Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ */
+
+/dts-v1/;
+
+/ {
+ model = "fsl,mpc8378emds";
+ compatible = "fsl,mpc8378emds","fsl,mpc837xmds";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ aliases {
+ ethernet0 = &enet0;
+ ethernet1 = &enet1;
+ serial0 = &serial0;
+ serial1 = &serial1;
+ pci0 = &pci0;
+ };
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ PowerPC,8378@0 {
+ device_type = "cpu";
+ reg = <0>;
+ d-cache-line-size = <0x20>;
+ i-cache-line-size = <0x20>;
+ d-cache-size = <0x8000>; // L1, 32K
+ i-cache-size = <0x8000>; // L1, 32K
+ timebase-frequency = <0>;
+ bus-frequency = <0>;
+ clock-frequency = <0>;
+ };
+ };
+
+ memory {
+ device_type = "memory";
+ reg = <0x00000000 0x20000000>; // 512MB at 0
+ };
+
+ soc@e0000000 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ device_type = "soc";
+ ranges = <0x0 0xe0000000 0x00100000>;
+ reg = <0xe0000000 0x00000200>;
+ bus-frequency = <0>;
+
+ wdt@200 {
+ compatible = "mpc83xx_wdt";
+ reg = <0x200 0x100>;
+ };
+
+ i2c@3000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ cell-index = <0>;
+ compatible = "fsl-i2c";
+ reg = <0x3000 0x100>;
+ interrupts = <0xe 0x8>;
+ interrupt-parent = < &ipic >;
+ dfsrr;
+ };
+
+ i2c@3100 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ cell-index = <1>;
+ compatible = "fsl-i2c";
+ reg = <0x3100 0x100>;
+ interrupts = <0xf 0x8>;
+ interrupt-parent = < &ipic >;
+ dfsrr;
+ };
+
+ spi@7000 {
+ compatible = "fsl_spi";
+ reg = <0x7000 0x1000>;
+ interrupts = <0x10 0x8>;
+ interrupt-parent = < &ipic >;
+ mode = "cpu";
+ };
+
+ /* phy type (ULPI, UTMI, UTMI_WIDE, SERIAL) */
+ usb@23000 {
+ compatible = "fsl-usb2-dr";
+ reg = <0x23000 0x1000>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ interrupt-parent = < &ipic >;
+ interrupts = <0x26 0x8>;
+ phy_type = "utmi_wide";
+ };
+
+ mdio@24520 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "fsl,gianfar-mdio";
+ reg = <0x24520 0x20>;
+ phy2: ethernet-phy@2 {
+ interrupt-parent = < &ipic >;
+ interrupts = <0x11 0x8>;
+ reg = <2>;
+ device_type = "ethernet-phy";
+ };
+ phy3: ethernet-phy@3 {
+ interrupt-parent = < &ipic >;
+ interrupts = <0x12 0x8>;
+ reg = <3>;
+ device_type = "ethernet-phy";
+ };
+ };
+
+ enet0: ethernet@24000 {
+ cell-index = <0>;
+ device_type = "network";
+ model = "eTSEC";
+ compatible = "gianfar";
+ reg = <0x24000 0x1000>;
+ local-mac-address = [ 00 00 00 00 00 00 ];
+ interrupts = <0x20 0x8 0x21 0x8 0x22 0x8>;
+ phy-connection-type = "mii";
+ interrupt-parent = < &ipic >;
+ phy-handle = < &phy2 >;
+ };
+
+ enet1: ethernet@25000 {
+ cell-index = <1>;
+ device_type = "network";
+ model = "eTSEC";
+ compatible = "gianfar";
+ reg = <0x25000 0x1000>;
+ local-mac-address = [ 00 00 00 00 00 00 ];
+ interrupts = <0x23 0x8 0x24 0x8 0x25 0x8>;
+ phy-connection-type = "mii";
+ interrupt-parent = < &ipic >;
+ phy-handle = < &phy3 >;
+ };
+
+ serial0: serial@4500 {
+ cell-index = <0>;
+ device_type = "serial";
+ compatible = "ns16550";
+ reg = <0x4500 0x100>;
+ clock-frequency = <0>;
+ interrupts = <0x9 0x8>;
+ interrupt-parent = < &ipic >;
+ };
+
+ serial1: serial@4600 {
+ cell-index = <1>;
+ device_type = "serial";
+ compatible = "ns16550";
+ reg = <0x4600 0x100>;
+ clock-frequency = <0>;
+ interrupts = <0xa 0x8>;
+ interrupt-parent = < &ipic >;
+ };
+
+ crypto@30000 {
+ model = "SEC3";
+ compatible = "talitos";
+ reg = <0x30000 0x10000>;
+ interrupts = <0xb 0x8>;
+ interrupt-parent = < &ipic >;
+ /* Rev. 3.0 geometry */
+ num-channels = <4>;
+ channel-fifo-len = <0x18>;
+ exec-units-mask = <0x000001fe>;
+ descriptor-types-mask = <0x03ab0ebf>;
+ };
+
+ sdhc@2e000 {
+ model = "eSDHC";
+ compatible = "fsl,esdhc";
+ reg = <0x2e000 0x1000>;
+ interrupts = <0x2a 0x8>;
+ interrupt-parent = < &ipic >;
+ };
+
+ /* IPIC
+ * interrupts cell = <intr #, sense>
+ * sense values match linux IORESOURCE_IRQ_* defines:
+ * sense == 8: Level, low assertion
+ * sense == 2: Edge, high-to-low change
+ */
+ ipic: pic@700 {
+ compatible = "fsl,ipic";
+ interrupt-controller;
+ #address-cells = <0>;
+ #interrupt-cells = <2>;
+ reg = <0x700 0x100>;
+ };
+ };
+
+ pci0: pci@e0008500 {
+ cell-index = <0>;
+ interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
+ interrupt-map = <
+
+ /* IDSEL 0x11 */
+ 0x8800 0x0 0x0 0x1 &ipic 0x14 0x8
+ 0x8800 0x0 0x0 0x2 &ipic 0x15 0x8
+ 0x8800 0x0 0x0 0x3 &ipic 0x16 0x8
+ 0x8800 0x0 0x0 0x4 &ipic 0x17 0x8
+
+ /* IDSEL 0x12 */
+ 0x9000 0x0 0x0 0x1 &ipic 0x16 0x8
+ 0x9000 0x0 0x0 0x2 &ipic 0x17 0x8
+ 0x9000 0x0 0x0 0x3 &ipic 0x14 0x8
+ 0x9000 0x0 0x0 0x4 &ipic 0x15 0x8
+
+ /* IDSEL 0x13 */
+ 0x9800 0x0 0x0 0x1 &ipic 0x17 0x8
+ 0x9800 0x0 0x0 0x2 &ipic 0x14 0x8
+ 0x9800 0x0 0x0 0x3 &ipic 0x15 0x8
+ 0x9800 0x0 0x0 0x4 &ipic 0x16 0x8
+
+ /* IDSEL 0x15 */
+ 0xa800 0x0 0x0 0x1 &ipic 0x14 0x8
+ 0xa800 0x0 0x0 0x2 &ipic 0x15 0x8
+ 0xa800 0x0 0x0 0x3 &ipic 0x16 0x8
+ 0xa800 0x0 0x0 0x4 &ipic 0x17 0x8
+
+ /* IDSEL 0x16 */
+ 0xb000 0x0 0x0 0x1 &ipic 0x17 0x8
+ 0xb000 0x0 0x0 0x2 &ipic 0x14 0x8
+ 0xb000 0x0 0x0 0x3 &ipic 0x15 0x8
+ 0xb000 0x0 0x0 0x4 &ipic 0x16 0x8
+
+ /* IDSEL 0x17 */
+ 0xb800 0x0 0x0 0x1 &ipic 0x16 0x8
+ 0xb800 0x0 0x0 0x2 &ipic 0x17 0x8
+ 0xb800 0x0 0x0 0x3 &ipic 0x14 0x8
+ 0xb800 0x0 0x0 0x4 &ipic 0x15 0x8
+
+ /* IDSEL 0x18 */
+ 0xc000 0x0 0x0 0x1 &ipic 0x15 0x8
+ 0xc000 0x0 0x0 0x2 &ipic 0x16 0x8
+ 0xc000 0x0 0x0 0x3 &ipic 0x17 0x8
+ 0xc000 0x0 0x0 0x4 &ipic 0x14 0x8>;
+ interrupt-parent = < &ipic >;
+ interrupts = <0x42 0x8>;
+ bus-range = <0 0>;
+ ranges = <0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000
+ 0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000
+ 0x01000000 0x0 0x00000000 0xe0300000 0x0 0x00100000>;
+ clock-frequency = <0>;
+ #interrupt-cells = <1>;
+ #size-cells = <2>;
+ #address-cells = <3>;
+ reg = <0xe0008500 0x100>;
+ compatible = "fsl,mpc8349-pci";
+ device_type = "pci";
+ };
+};
diff --git a/arch/powerpc/boot/dts/mpc8379_mds.dts b/arch/powerpc/boot/dts/mpc8379_mds.dts
new file mode 100644
index 0000000000000000000000000000000000000000..fc3ba79fb684ba83dc80306ba53c9d47d42f144d
--- /dev/null
+++ b/arch/powerpc/boot/dts/mpc8379_mds.dts
@@ -0,0 +1,293 @@
+/*
+ * MPC8379E MDS Device Tree Source
+ *
+ * Copyright 2007 Freescale Semiconductor Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ */
+
+/dts-v1/;
+
+/ {
+ model = "fsl,mpc8379emds";
+ compatible = "fsl,mpc8379emds","fsl,mpc837xmds";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ aliases {
+ ethernet0 = &enet0;
+ ethernet1 = &enet1;
+ serial0 = &serial0;
+ serial1 = &serial1;
+ pci0 = &pci0;
+ };
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ PowerPC,8379@0 {
+ device_type = "cpu";
+ reg = <0>;
+ d-cache-line-size = <0x20>;
+ i-cache-line-size = <0x20>;
+ d-cache-size = <0x8000>; // L1, 32K
+ i-cache-size = <0x8000>; // L1, 32K
+ timebase-frequency = <0>;
+ bus-frequency = <0>;
+ clock-frequency = <0>;
+ };
+ };
+
+ memory {
+ device_type = "memory";
+ reg = <0x00000000 0x20000000>; // 512MB at 0
+ };
+
+ soc@e0000000 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ device_type = "soc";
+ ranges = <0x0 0xe0000000 0x00100000>;
+ reg = <0xe0000000 0x00000200>;
+ bus-frequency = <0>;
+
+ wdt@200 {
+ compatible = "mpc83xx_wdt";
+ reg = <0x200 0x100>;
+ };
+
+ i2c@3000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ cell-index = <0>;
+ compatible = "fsl-i2c";
+ reg = <0x3000 0x100>;
+ interrupts = <0xe 0x8>;
+ interrupt-parent = < &ipic >;
+ dfsrr;
+ };
+
+ i2c@3100 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ cell-index = <1>;
+ compatible = "fsl-i2c";
+ reg = <0x3100 0x100>;
+ interrupts = <0xf 0x8>;
+ interrupt-parent = < &ipic >;
+ dfsrr;
+ };
+
+ spi@7000 {
+ compatible = "fsl_spi";
+ reg = <0x7000 0x1000>;
+ interrupts = <0x10 0x8>;
+ interrupt-parent = < &ipic >;
+ mode = "cpu";
+ };
+
+ /* phy type (ULPI, UTMI, UTMI_WIDE, SERIAL) */
+ usb@23000 {
+ compatible = "fsl-usb2-dr";
+ reg = <0x23000 0x1000>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ interrupt-parent = < &ipic >;
+ interrupts = <0x26 0x8>;
+ phy_type = "utmi_wide";
+ };
+
+ mdio@24520 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "fsl,gianfar-mdio";
+ reg = <0x24520 0x20>;
+ phy2: ethernet-phy@2 {
+ interrupt-parent = < &ipic >;
+ interrupts = <0x11 0x8>;
+ reg = <2>;
+ device_type = "ethernet-phy";
+ };
+ phy3: ethernet-phy@3 {
+ interrupt-parent = < &ipic >;
+ interrupts = <0x12 0x8>;
+ reg = <3>;
+ device_type = "ethernet-phy";
+ };
+ };
+
+ enet0: ethernet@24000 {
+ cell-index = <0>;
+ device_type = "network";
+ model = "eTSEC";
+ compatible = "gianfar";
+ reg = <0x24000 0x1000>;
+ local-mac-address = [ 00 00 00 00 00 00 ];
+ interrupts = <0x20 0x8 0x21 0x8 0x22 0x8>;
+ phy-connection-type = "mii";
+ interrupt-parent = < &ipic >;
+ phy-handle = < &phy2 >;
+ };
+
+ enet1: ethernet@25000 {
+ cell-index = <1>;
+ device_type = "network";
+ model = "eTSEC";
+ compatible = "gianfar";
+ reg = <0x25000 0x1000>;
+ local-mac-address = [ 00 00 00 00 00 00 ];
+ interrupts = <0x23 0x8 0x24 0x8 0x25 0x8>;
+ phy-connection-type = "mii";
+ interrupt-parent = < &ipic >;
+ phy-handle = < &phy3 >;
+ };
+
+ serial0: serial@4500 {
+ cell-index = <0>;
+ device_type = "serial";
+ compatible = "ns16550";
+ reg = <0x4500 0x100>;
+ clock-frequency = <0>;
+ interrupts = <0x9 0x8>;
+ interrupt-parent = < &ipic >;
+ };
+
+ serial1: serial@4600 {
+ cell-index = <1>;
+ device_type = "serial";
+ compatible = "ns16550";
+ reg = <0x4600 0x100>;
+ clock-frequency = <0>;
+ interrupts = <0xa 0x8>;
+ interrupt-parent = < &ipic >;
+ };
+
+ crypto@30000 {
+ model = "SEC3";
+ compatible = "talitos";
+ reg = <0x30000 0x10000>;
+ interrupts = <0xb 0x8>;
+ interrupt-parent = < &ipic >;
+ /* Rev. 3.0 geometry */
+ num-channels = <4>;
+ channel-fifo-len = <0x18>;
+ exec-units-mask = <0x000001fe>;
+ descriptor-types-mask = <0x03ab0ebf>;
+ };
+
+ sdhc@2e000 {
+ model = "eSDHC";
+ compatible = "fsl,esdhc";
+ reg = <0x2e000 0x1000>;
+ interrupts = <0x2a 0x8>;
+ interrupt-parent = < &ipic >;
+ };
+
+ sata@18000 {
+ compatible = "fsl,mpc8379-sata";
+ reg = <0x18000 0x1000>;
+ interrupts = <0x2c 0x8>;
+ interrupt-parent = < &ipic >;
+ };
+
+ sata@19000 {
+ compatible = "fsl,mpc8379-sata";
+ reg = <0x19000 0x1000>;
+ interrupts = <0x2d 0x8>;
+ interrupt-parent = < &ipic >;
+ };
+
+ sata@1a000 {
+ compatible = "fsl,mpc8379-sata";
+ reg = <0x1a000 0x1000>;
+ interrupts = <0x2e 0x8>;
+ interrupt-parent = < &ipic >;
+ };
+
+ sata@1b000 {
+ compatible = "fsl,mpc8379-sata";
+ reg = <0x1b000 0x1000>;
+ interrupts = <0x2f 0x8>;
+ interrupt-parent = < &ipic >;
+ };
+
+ /* IPIC
+ * interrupts cell = <intr #, sense>
+ * sense values match linux IORESOURCE_IRQ_* defines:
+ * sense == 8: Level, low assertion
+ * sense == 2: Edge, high-to-low change
+ */
+ ipic: pic@700 {
+ compatible = "fsl,ipic";
+ interrupt-controller;
+ #address-cells = <0>;
+ #interrupt-cells = <2>;
+ reg = <0x700 0x100>;
+ };
+ };
+
+ pci0: pci@e0008500 {
+ cell-index = <0>;
+ interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
+ interrupt-map = <
+
+ /* IDSEL 0x11 */
+ 0x8800 0x0 0x0 0x1 &ipic 0x14 0x8
+ 0x8800 0x0 0x0 0x2 &ipic 0x15 0x8
+ 0x8800 0x0 0x0 0x3 &ipic 0x16 0x8
+ 0x8800 0x0 0x0 0x4 &ipic 0x17 0x8
+
+ /* IDSEL 0x12 */
+ 0x9000 0x0 0x0 0x1 &ipic 0x16 0x8
+ 0x9000 0x0 0x0 0x2 &ipic 0x17 0x8
+ 0x9000 0x0 0x0 0x3 &ipic 0x14 0x8
+ 0x9000 0x0 0x0 0x4 &ipic 0x15 0x8
+
+ /* IDSEL 0x13 */
+ 0x9800 0x0 0x0 0x1 &ipic 0x17 0x8
+ 0x9800 0x0 0x0 0x2 &ipic 0x14 0x8
+ 0x9800 0x0 0x0 0x3 &ipic 0x15 0x8
+ 0x9800 0x0 0x0 0x4 &ipic 0x16 0x8
+
+ /* IDSEL 0x15 */
+ 0xa800 0x0 0x0 0x1 &ipic 0x14 0x8
+ 0xa800 0x0 0x0 0x2 &ipic 0x15 0x8
+ 0xa800 0x0 0x0 0x3 &ipic 0x16 0x8
+ 0xa800 0x0 0x0 0x4 &ipic 0x17 0x8
+
+ /* IDSEL 0x16 */
+ 0xb000 0x0 0x0 0x1 &ipic 0x17 0x8
+ 0xb000 0x0 0x0 0x2 &ipic 0x14 0x8
+ 0xb000 0x0 0x0 0x3 &ipic 0x15 0x8
+ 0xb000 0x0 0x0 0x4 &ipic 0x16 0x8
+
+ /* IDSEL 0x17 */
+ 0xb800 0x0 0x0 0x1 &ipic 0x16 0x8
+ 0xb800 0x0 0x0 0x2 &ipic 0x17 0x8
+ 0xb800 0x0 0x0 0x3 &ipic 0x14 0x8
+ 0xb800 0x0 0x0 0x4 &ipic 0x15 0x8
+
+ /* IDSEL 0x18 */
+ 0xc000 0x0 0x0 0x1 &ipic 0x15 0x8
+ 0xc000 0x0 0x0 0x2 &ipic 0x16 0x8
+ 0xc000 0x0 0x0 0x3 &ipic 0x17 0x8
+ 0xc000 0x0 0x0 0x4 &ipic 0x14 0x8>;
+ interrupt-parent = < &ipic >;
+ interrupts = <0x42 0x8>;
+ bus-range = <0 0>;
+ ranges = <0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000
+ 0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000
+ 0x01000000 0x0 0x00000000 0xe0300000 0x0 0x00100000>;
+ clock-frequency = <0>;
+ #interrupt-cells = <1>;
+ #size-cells = <2>;
+ #address-cells = <3>;
+ reg = <0xe0008500 0x100>;
+ compatible = "fsl,mpc8349-pci";
+ device_type = "pci";
+ };
+};