提交 57016590 编写于 作者: F Florian Fainelli 提交者: David S. Miller

net: stmmac: Fix race between stmmac_drv_probe and stmmac_open

There is currently a small window during which the network device registered by
stmmac can be made visible, yet all resources, including and clock and MDIO bus
have not had a chance to be set up, this can lead to the following error to
occur:

[  473.919358] stmmaceth 0000:01:00.0 (unnamed net_device) (uninitialized):
                stmmac_dvr_probe: warning: cannot get CSR clock
[  473.919382] stmmaceth 0000:01:00.0: no reset control found
[  473.919412] stmmac - user ID: 0x10, Synopsys ID: 0x42
[  473.919429] stmmaceth 0000:01:00.0: DMA HW capability register supported
[  473.919436] stmmaceth 0000:01:00.0: RX Checksum Offload Engine supported
[  473.919443] stmmaceth 0000:01:00.0: TX Checksum insertion supported
[  473.919451] stmmaceth 0000:01:00.0 (unnamed net_device) (uninitialized):
                Enable RX Mitigation via HW Watchdog Timer
[  473.921395] libphy: PHY stmmac-1:00 not found
[  473.921417] stmmaceth 0000:01:00.0 eth0: Could not attach to PHY
[  473.921427] stmmaceth 0000:01:00.0 eth0: stmmac_open: Cannot attach to
                PHY (error: -19)
[  473.959710] libphy: stmmac: probed
[  473.959724] stmmaceth 0000:01:00.0 eth0: PHY ID 01410cc2 at 0 IRQ POLL
                (stmmac-1:00) active
[  473.959728] stmmaceth 0000:01:00.0 eth0: PHY ID 01410cc2 at 1 IRQ POLL
                (stmmac-1:01)
[  473.959731] stmmaceth 0000:01:00.0 eth0: PHY ID 01410cc2 at 2 IRQ POLL
                (stmmac-1:02)
[  473.959734] stmmaceth 0000:01:00.0 eth0: PHY ID 01410cc2 at 3 IRQ POLL
                (stmmac-1:03)

Fix this by making sure that register_netdev() is the last thing being done,
which guarantees that the clock and the MDIO bus are available.

Fixes: 4bfcbd7a ("stmmac: Move the mdio_register/_unregister in probe/remove")
Reported-by: NKweh, Hock Leong <hock.leong.kweh@intel.com>
Signed-off-by: NFlorian Fainelli <f.fainelli@gmail.com>
Signed-off-by: NDavid S. Miller <davem@davemloft.net>
上级 8f18e4d0
...@@ -3339,13 +3339,6 @@ int stmmac_dvr_probe(struct device *device, ...@@ -3339,13 +3339,6 @@ int stmmac_dvr_probe(struct device *device,
spin_lock_init(&priv->lock); spin_lock_init(&priv->lock);
ret = register_netdev(ndev);
if (ret) {
netdev_err(priv->dev, "%s: ERROR %i registering the device\n",
__func__, ret);
goto error_netdev_register;
}
/* If a specific clk_csr value is passed from the platform /* If a specific clk_csr value is passed from the platform
* this means that the CSR Clock Range selection cannot be * this means that the CSR Clock Range selection cannot be
* changed at run-time and it is fixed. Viceversa the driver'll try to * changed at run-time and it is fixed. Viceversa the driver'll try to
...@@ -3372,11 +3365,14 @@ int stmmac_dvr_probe(struct device *device, ...@@ -3372,11 +3365,14 @@ int stmmac_dvr_probe(struct device *device,
} }
} }
return 0; ret = register_netdev(ndev);
if (ret)
netdev_err(priv->dev, "%s: ERROR %i registering the device\n",
__func__, ret);
return ret;
error_mdio_register: error_mdio_register:
unregister_netdev(ndev);
error_netdev_register:
netif_napi_del(&priv->napi); netif_napi_del(&priv->napi);
error_hw_init: error_hw_init:
clk_disable_unprepare(priv->pclk); clk_disable_unprepare(priv->pclk);
......
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