提交 3ec18cd8 编写于 作者: S Stephane Eranian 提交者: Ingo Molnar

perf/x86: Enable Intel Cedarview Atom suppport

This patch enables perf_events support for Intel Cedarview
Atom (model 54) processors. Support includes PEBS and LBR.
Tested on my Atom N2600 netbook.
Signed-off-by: NStephane Eranian <eranian@google.com>
Signed-off-by: NPeter Zijlstra <a.p.zijlstra@chello.nl>
Link: http://lkml.kernel.org/r/20120820092421.GA11284@quadSigned-off-by: NIngo Molnar <mingo@kernel.org>
上级 a6fa941d
...@@ -2008,6 +2008,7 @@ __init int intel_pmu_init(void) ...@@ -2008,6 +2008,7 @@ __init int intel_pmu_init(void)
break; break;
case 28: /* Atom */ case 28: /* Atom */
case 54: /* Cedariew */
memcpy(hw_cache_event_ids, atom_hw_cache_event_ids, memcpy(hw_cache_event_ids, atom_hw_cache_event_ids,
sizeof(hw_cache_event_ids)); sizeof(hw_cache_event_ids));
......
...@@ -686,7 +686,8 @@ void intel_pmu_lbr_init_atom(void) ...@@ -686,7 +686,8 @@ void intel_pmu_lbr_init_atom(void)
* to have an operational LBR which can freeze * to have an operational LBR which can freeze
* on PMU interrupt * on PMU interrupt
*/ */
if (boot_cpu_data.x86_mask < 10) { if (boot_cpu_data.x86_model == 28
&& boot_cpu_data.x86_mask < 10) {
pr_cont("LBR disabled due to erratum"); pr_cont("LBR disabled due to erratum");
return; return;
} }
......
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