提交 37da7bbb 编写于 作者: L Linus Torvalds

Merge tag 'tty-3.19-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/tty

Pull tty/serial driver updates from Greg KH:
 "Here's the big tty/serial driver update for 3.19-rc1.

  There are a number of TTY core changes/fixes in here from Peter Hurley
  that have all been teted in linux-next for a long time now.  There are
  also the normal serial driver updates as well, full details in the
  changelog below"

* tag 'tty-3.19-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/tty: (219 commits)
  serial: pxa: hold port.lock when reporting modem line changes
  tty-hvsi_lib: Deletion of an unnecessary check before the function call "tty_kref_put"
  tty: Deletion of unnecessary checks before two function calls
  n_tty: Fix read_buf race condition, increment read_head after pushing data
  serial: of-serial: add PM suspend/resume support
  Revert "serial: of-serial: add PM suspend/resume support"
  Revert "serial: of-serial: fix up PM ops on no_console_suspend and port type"
  serial: 8250: don't attempt a trylock if in sysrq
  serial: core: Add big-endian iotype
  serial: samsung: use port->fifosize instead of hardcoded values
  serial: samsung: prefer to use fifosize from driver data
  serial: samsung: fix style problems
  serial: samsung: wait for transfer completion before clock disable
  serial: icom: fix error return code
  serial: tegra: clean up tty-flag assignments
  serial: Fix io address assign flow with Fintek PCI-to-UART Product
  serial: mxs-auart: fix tx_empty against shift register
  serial: mxs-auart: fix gpio change detection on interrupt
  serial: mxs-auart: Fix mxs_auart_set_ldisc()
  serial: 8250_dw: Use 64-bit access for OCTEON.
  ...
* BCM63xx UART
Required properties:
- compatible: "brcm,bcm6345-uart"
- reg: The base address of the UART register bank.
- interrupts: A single interrupt specifier.
- clocks: Clock driving the hardware; used to figure out the baud rate
divisor.
Example:
uart0: serial@14e00520 {
compatible = "brcm,bcm6345-uart";
reg = <0x14e00520 0x18>;
interrupt-parent = <&periph_intc>;
interrupts = <2>;
clocks = <&periph_clk>;
};
clocks {
periph_clk: periph_clk@0 {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <54000000>;
};
};
......@@ -11,8 +11,13 @@ Required properties:
- dma-names: "rx" for RX channel, "tx" for TX channel.
Optional properties:
- fsl,uart-has-rtscts : Indicate the UART has RTS and CTS lines,
- fsl,uart-has-rtscts : Indicate the UART has RTS and CTS lines
for hardware flow control,
it also means you enable the DMA support for this UART.
- {rts,cts,dtr,dsr,rng,dcd}-gpios: specify a GPIO for RTS/CTS/DTR/DSR/RI/DCD
line respectively. It will use specified PIO instead of the peripheral
function pin for the USART feature.
If unsure, don't specify this property.
Example:
auart0: serial@8006a000 {
......@@ -21,6 +26,9 @@ auart0: serial@8006a000 {
interrupts = <112>;
dmas = <&dma_apbx 8>, <&dma_apbx 9>;
dma-names = "rx", "tx";
cts-gpios = <&gpio1 15 GPIO_ACTIVE_LOW>;
dsr-gpios = <&gpio1 16 GPIO_ACTIVE_LOW>;
dcd-gpios = <&gpio1 17 GPIO_ACTIVE_LOW>;
};
Note: Each auart port should have an alias correctly numbered in "aliases"
......
......@@ -10,6 +10,7 @@ Required properties:
- "ns16850"
- "nvidia,tegra20-uart"
- "nxp,lpc3220-uart"
- "ralink,rt2880-uart"
- "ibm,qpace-nwp-serial"
- "altr,16550-FIFO32"
- "altr,16550-FIFO64"
......
......@@ -6,23 +6,35 @@ Required properties:
- interrupts: exactly one interrupt specifier
Optional properties:
- pinctrl: When present, must have one state named "default",
- pinctrl:
When present, must have one state named "default",
and may contain a second name named "sleep". The former
state sets up pins for ordinary operation whereas
the latter state will put the associated pins to sleep
when the UART is unused
- clocks: When present, the first clock listed must correspond to
- clocks:
When present, the first clock listed must correspond to
the clock named UARTCLK on the IP block, i.e. the clock
to the external serial line, whereas the second clock
must correspond to the PCLK clocking the internal logic
of the block. Just listing one clock (the first one) is
deprecated.
- clocks-names: When present, the first clock listed must be named
- clocks-names:
When present, the first clock listed must be named
"uartclk" and the second clock listed must be named
"apb_pclk"
- dmas: When present, may have one or two dma channels.
- dmas:
When present, may have one or two dma channels.
The first one must be named "rx", the second one
must be named "tx".
- auto-poll:
Enables polling when using RX DMA.
- poll-rate-ms:
Rate at which poll occurs when auto-poll is set,
default 100ms.
- poll-timeout-ms:
Poll timeout when auto-poll is set, default
3000ms.
See also bindings/arm/primecell.txt
......
......@@ -27,27 +27,52 @@ Optional properties:
- dmas: Should contain dma specifiers for transmit and receive channels
- dma-names: Should contain "tx" for transmit and "rx" for receive channels
Note: Aliases may be defined to ensure the correct ordering of the UARTs.
The alias serialN will result in the UART being assigned port N. If any
serialN alias exists, then an alias must exist for each enabled UART. The
serialN aliases should be in a .dts file instead of in a .dtsi file.
Examples:
A uartdm v1.4 device with dma capabilities.
serial@f991e000 {
compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
reg = <0xf991e000 0x1000>;
interrupts = <0 108 0x0>;
clocks = <&blsp1_uart2_apps_cxc>, <&blsp1_ahb_cxc>;
clock-names = "core", "iface";
dmas = <&dma0 0>, <&dma0 1>;
dma-names = "tx", "rx";
};
A uartdm v1.3 device without dma capabilities and part of a GSBI complex.
serial@19c40000 {
compatible = "qcom,msm-uartdm-v1.3", "qcom,msm-uartdm";
reg = <0x19c40000 0x1000>,
<0x19c00000 0x1000>;
interrupts = <0 195 0x0>;
clocks = <&gsbi5_uart_cxc>, <&gsbi5_ahb_cxc>;
clock-names = "core", "iface";
};
- A uartdm v1.4 device with dma capabilities.
serial@f991e000 {
compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
reg = <0xf991e000 0x1000>;
interrupts = <0 108 0x0>;
clocks = <&blsp1_uart2_apps_cxc>, <&blsp1_ahb_cxc>;
clock-names = "core", "iface";
dmas = <&dma0 0>, <&dma0 1>;
dma-names = "tx", "rx";
};
- A uartdm v1.3 device without dma capabilities and part of a GSBI complex.
serial@19c40000 {
compatible = "qcom,msm-uartdm-v1.3", "qcom,msm-uartdm";
reg = <0x19c40000 0x1000>,
<0x19c00000 0x1000>;
interrupts = <0 195 0x0>;
clocks = <&gsbi5_uart_cxc>, <&gsbi5_ahb_cxc>;
clock-names = "core", "iface";
};
- serialN alias.
aliases {
serial0 = &uarta;
serial1 = &uartc;
serial2 = &uartb;
};
uarta: serial@12490000 {
status = "ok";
};
uartb: serial@16340000 {
status = "ok";
};
uartc: serial@1a240000 {
status = "ok";
};
......@@ -4,8 +4,7 @@ Required properties:
- compatible: Must contain one of the following:
- "renesas,scifa-sh73a0" for SH73A0 (SH-Mobile AG5) SCIFA compatible UART.
- "renesas,scifb-sh73a0" for SH73A0 (SH-Mobile AG5) SCIFB compatible UART.
- "renesas,scif-r7s72100" for R7S72100 (RZ/A1H) SCIF compatible UART.
- "renesas,scifa-r8a73a4" for R8A73A4 (R-Mobile APE6) SCIFA compatible UART.
- "renesas,scifb-r8a73a4" for R8A73A4 (R-Mobile APE6) SCIFB compatible UART.
- "renesas,scifa-r8a7740" for R8A7740 (R-Mobile A1) SCIFA compatible UART.
......@@ -20,6 +19,12 @@ Required properties:
- "renesas,scifa-r8a7791" for R8A7791 (R-Car M2) SCIFA compatible UART.
- "renesas,scifb-r8a7791" for R8A7791 (R-Car M2) SCIFB compatible UART.
- "renesas,hscif-r8a7791" for R8A7791 (R-Car M2) HSCIF compatible UART.
- "renesas,scif-r8a7794" for R8A7794 (R-Car E2) SCIF compatible UART.
- "renesas,scifa-r8a7794" for R8A7794 (R-Car E2) SCIFA compatible UART.
- "renesas,scifb-r8a7794" for R8A7794 (R-Car E2) SCIFB compatible UART.
- "renesas,hscif-r8a7794" for R8A7794 (R-Car E2) HSCIF compatible UART.
- "renesas,scifa-sh73a0" for SH73A0 (SH-Mobile AG5) SCIFA compatible UART.
- "renesas,scifb-sh73a0" for SH73A0 (SH-Mobile AG5) SCIFB compatible UART.
- "renesas,scif" for generic SCIF compatible UART.
- "renesas,scifa" for generic SCIFA compatible UART.
- "renesas,scifb" for generic SCIFB compatible UART.
......
* CSR SiRFprimaII/atlasVI Universal Synchronous Asynchronous Receiver/Transmitter *
Required properties:
- compatible : Should be "sirf,prima2-uart" or "sirf, prima2-usp-uart"
- compatible : Should be "sirf,prima2-uart", "sirf, prima2-usp-uart",
"sirf,marco-uart" or "sirf,marco-bt-uart" which means
uart located in BT module and used for BT.
- reg : Offset and length of the register set for the device
- interrupts : Should contain uart interrupt
- fifosize : Should define hardware rx/tx fifo size
......@@ -31,3 +33,15 @@ usp@b0090000 {
rts-gpios = <&gpio 15 0>;
cts-gpios = <&gpio 46 0>;
};
for uart use in BT module,
uart6: uart@11000000 {
cell-index = <6>;
compatible = "sirf,marco-bt-uart", "sirf,marco-uart";
reg = <0x11000000 0x1000>;
interrupts = <0 100 0>;
clocks = <&clks 138>, <&clks 140>, <&clks 141>;
clock-names = "uart", "general", "noc";
fifosize = <128>;
status = "disabled";
}
......@@ -59,7 +59,9 @@ The core driver uses the info->tmpbuf_sem lock to prevent multi-threaded
access to the info->tmpbuf bouncebuffer used for port writes.
The port_sem semaphore is used to protect against ports being added/
removed or reconfigured at inappropriate times.
removed or reconfigured at inappropriate times. Since v2.6.27, this
semaphore has been the 'mutex' member of the tty_port struct, and
commonly referred to as the port mutex (or port->mutex).
uart_ops
......@@ -248,7 +250,7 @@ hardware.
Other flags may be used (eg, xon/xoff characters) if your
hardware supports hardware "soft" flow control.
Locking: none.
Locking: caller holds port->mutex
Interrupts: caller dependent.
This call must not sleep
......
......@@ -8026,6 +8026,12 @@ S: Maintained
F: Documentation/serial/rocket.txt
F: drivers/tty/rocket*
ROCKETPORT EXPRESS/INFINITY DRIVER
M: Kevin Cernekee <cernekee@gmail.com>
L: linux-serial@vger.kernel.org
S: Odd Fixes
F: drivers/tty/serial/rp2.*
ROSE NETWORK LAYER
M: Ralf Baechle <ralf@linux-mips.org>
L: linux-hams@vger.kernel.org
......
......@@ -9,8 +9,11 @@
#ifndef __BFIN_ASM_SERIAL_H__
#define __BFIN_ASM_SERIAL_H__
#include <linux/circ_buf.h>
#include <linux/serial_core.h>
#include <linux/spinlock.h>
#include <linux/timer.h>
#include <linux/workqueue.h>
#include <mach/anomaly.h>
#include <mach/bfin_serial.h>
......@@ -25,10 +28,6 @@
# endif
#endif
struct circ_buf;
struct timer_list;
struct work_struct;
struct bfin_serial_port {
struct uart_port port;
unsigned int old_status;
......
......@@ -632,6 +632,7 @@ static irqreturn_t winch_interrupt(int irq, void *data)
int fd = winch->fd;
int err;
char c;
struct pid *pgrp;
if (fd != -1) {
err = generic_read(fd, &c, NULL);
......@@ -657,7 +658,10 @@ static irqreturn_t winch_interrupt(int irq, void *data)
if (line != NULL) {
chan_window_size(line, &tty->winsize.ws_row,
&tty->winsize.ws_col);
kill_pgrp(tty->pgrp, SIGWINCH, 1);
pgrp = tty_get_pgrp(tty);
if (pgrp)
kill_pgrp(pgrp, SIGWINCH, 1);
put_pid(pgrp);
}
tty_kref_put(tty);
}
......
......@@ -64,6 +64,7 @@ enum parport_pc_pci_cards {
timedia_9079c,
wch_ch353_1s1p,
wch_ch353_2s1p,
wch_ch382_2s1p,
sunix_2s1p,
};
......@@ -151,6 +152,7 @@ static struct parport_pc_pci cards[] = {
/* timedia_9079c */ { 1, { { 2, 3 }, } },
/* wch_ch353_1s1p*/ { 1, { { 1, -1}, } },
/* wch_ch353_2s1p*/ { 1, { { 2, -1}, } },
/* wch_ch382_2s1p*/ { 1, { { 2, -1}, } },
/* sunix_2s1p */ { 1, { { 3, -1 }, } },
};
......@@ -257,6 +259,7 @@ static struct pci_device_id parport_serial_pci_tbl[] = {
/* WCH CARDS */
{ 0x4348, 0x5053, PCI_ANY_ID, PCI_ANY_ID, 0, 0, wch_ch353_1s1p},
{ 0x4348, 0x7053, 0x4348, 0x3253, 0, 0, wch_ch353_2s1p},
{ 0x1c00, 0x3250, 0x1c00, 0x3250, 0, 0, wch_ch382_2s1p},
/*
* More SUNIX variations. At least one of these has part number
......@@ -494,6 +497,13 @@ static struct pciserial_board pci_parport_serial_boards[] = {
.base_baud = 115200,
.uart_offset = 8,
},
[wch_ch382_2s1p] = {
.flags = FL_BASE0,
.num_ports = 2,
.base_baud = 115200,
.uart_offset = 8,
.first_offset = 0xC0,
},
[sunix_2s1p] = {
.flags = FL_BASE0|FL_BASE_BARS,
.num_ports = 2,
......
......@@ -309,8 +309,8 @@ static int __init ehv_bc_console_init(void)
* handle for udbg.
*/
if (stdout_bc != CONFIG_PPC_EARLY_DEBUG_EHV_BC_HANDLE)
pr_warning("ehv-bc: udbg handle %u is not the stdout handle\n",
CONFIG_PPC_EARLY_DEBUG_EHV_BC_HANDLE);
pr_warn("ehv-bc: udbg handle %u is not the stdout handle\n",
CONFIG_PPC_EARLY_DEBUG_EHV_BC_HANDLE);
#endif
/* add_preferred_console() must be called before register_console(),
......
......@@ -155,9 +155,9 @@ static struct tty_driver *goldfish_tty_console_device(struct console *c,
static int goldfish_tty_console_setup(struct console *co, char *options)
{
if ((unsigned)co->index > goldfish_tty_line_count)
if ((unsigned)co->index >= goldfish_tty_line_count)
return -ENODEV;
if (goldfish_ttys[co->index].base == 0)
if (!goldfish_ttys[co->index].base)
return -ENODEV;
return 0;
}
......@@ -317,7 +317,7 @@ static int goldfish_tty_remove(struct platform_device *pdev)
unregister_console(&qtty->console);
tty_unregister_device(goldfish_tty_driver, pdev->id);
iounmap(qtty->base);
qtty->base = 0;
qtty->base = NULL;
free_irq(qtty->irq, pdev);
goldfish_tty_current_line_count--;
if (goldfish_tty_current_line_count == 0)
......
......@@ -1575,7 +1575,7 @@ static int __init hvcs_module_init(void)
*/
rc = driver_create_file(&(hvcs_vio_driver.driver), &driver_attr_rescan);
if (rc)
pr_warning(KERN_ERR "HVCS: Failed to create rescan file (err %d)\n", rc);
pr_warning("HVCS: Failed to create rescan file (err %d)\n", rc);
return 0;
}
......
......@@ -405,8 +405,7 @@ void hvsilib_close(struct hvsi_priv *pv, struct hvc_struct *hp)
hvsi_send_close(pv);
}
if (pv->tty)
tty_kref_put(pv->tty);
tty_kref_put(pv->tty);
pv->tty = NULL;
}
......
......@@ -378,9 +378,9 @@ static void swap_packet_bitfield_to_le(unsigned char *data)
/*
* transform bits from aa.bbb.ccc to ccc.bbb.aa
*/
ret |= tmp & 0xc0 >> 6;
ret |= tmp & 0x38 >> 1;
ret |= tmp & 0x07 << 5;
ret |= (tmp & 0xc0) >> 6;
ret |= (tmp & 0x38) >> 1;
ret |= (tmp & 0x07) << 5;
*data = ret & 0xff;
#endif
}
......@@ -393,9 +393,9 @@ static void swap_packet_bitfield_from_le(unsigned char *data)
/*
* transform bits from ccc.bbb.aa to aa.bbb.ccc
*/
ret |= tmp & 0xe0 >> 5;
ret |= tmp & 0x1c << 1;
ret |= tmp & 0x03 << 6;
ret |= (tmp & 0xe0) >> 5;
ret |= (tmp & 0x1c) << 1;
ret |= (tmp & 0x03) << 6;
*data = ret & 0xff;
#endif
}
......
......@@ -249,7 +249,7 @@ static int lock_card(struct isi_board *card)
spin_unlock_irqrestore(&card->card_lock, card->flags);
msleep(10);
}
pr_warning("Failed to lock Card (0x%lx)\n", card->base);
pr_warn("Failed to lock Card (0x%lx)\n", card->base);
return 0; /* Failed to acquire the card! */
}
......@@ -378,13 +378,13 @@ static inline int __isicom_paranoia_check(struct isi_port const *port,
char *name, const char *routine)
{
if (!port) {
pr_warning("Warning: bad isicom magic for dev %s in %s.\n",
name, routine);
pr_warn("Warning: bad isicom magic for dev %s in %s\n",
name, routine);
return 1;
}
if (port->magic != ISICOM_MAGIC) {
pr_warning("Warning: NULL isicom port for dev %s in %s.\n",
name, routine);
pr_warn("Warning: NULL isicom port for dev %s in %s\n",
name, routine);
return 1;
}
......@@ -546,8 +546,8 @@ static irqreturn_t isicom_interrupt(int irq, void *dev_id)
byte_count = header & 0xff;
if (channel + 1 > card->port_count) {
pr_warning("%s(0x%lx): %d(channel) > port_count.\n",
__func__, base, channel+1);
pr_warn("%s(0x%lx): %d(channel) > port_count\n",
__func__, base, channel + 1);
outw(0x0000, base+0x04); /* enable interrupts */
spin_unlock(&card->card_lock);
return IRQ_HANDLED;
......
......@@ -321,7 +321,8 @@ static void n_tty_check_unthrottle(struct tty_struct *tty)
static inline void put_tty_queue(unsigned char c, struct n_tty_data *ldata)
{
*read_buf_addr(ldata, ldata->read_head++) = c;
*read_buf_addr(ldata, ldata->read_head) = c;
ldata->read_head++;
}
/**
......@@ -351,13 +352,13 @@ static void n_tty_packet_mode_flush(struct tty_struct *tty)
{
unsigned long flags;
spin_lock_irqsave(&tty->ctrl_lock, flags);
if (tty->link->packet) {
spin_lock_irqsave(&tty->ctrl_lock, flags);
tty->ctrl_status |= TIOCPKT_FLUSHREAD;
spin_unlock_irqrestore(&tty->ctrl_lock, flags);
if (waitqueue_active(&tty->link->read_wait))
wake_up_interruptible(&tty->link->read_wait);
}
spin_unlock_irqrestore(&tty->ctrl_lock, flags);
}
/**
......@@ -2128,7 +2129,6 @@ static ssize_t n_tty_read(struct tty_struct *tty, struct file *file,
int minimum, time;
ssize_t retval = 0;
long timeout;
unsigned long flags;
int packet;
c = job_control(tty, file);
......@@ -2174,10 +2174,10 @@ static ssize_t n_tty_read(struct tty_struct *tty, struct file *file,
unsigned char cs;
if (b != buf)
break;
spin_lock_irqsave(&tty->link->ctrl_lock, flags);
spin_lock_irq(&tty->link->ctrl_lock);
cs = tty->link->ctrl_status;
tty->link->ctrl_status = 0;
spin_unlock_irqrestore(&tty->link->ctrl_lock, flags);
spin_unlock_irq(&tty->link->ctrl_lock);
if (tty_put_user(tty, cs, b++)) {
retval = -EFAULT;
b--;
......@@ -2193,45 +2193,29 @@ static ssize_t n_tty_read(struct tty_struct *tty, struct file *file,
if (!input_available_p(tty, 0)) {
if (test_bit(TTY_OTHER_CLOSED, &tty->flags)) {
up_read(&tty->termios_rwsem);
tty_flush_to_ldisc(tty);
down_read(&tty->termios_rwsem);
if (!input_available_p(tty, 0)) {
retval = -EIO;
break;
}
} else {
if (tty_hung_up_p(file))
break;
if (!timeout)
break;
if (file->f_flags & O_NONBLOCK) {
retval = -EAGAIN;
break;
}
if (signal_pending(current)) {
retval = -ERESTARTSYS;
break;
}
n_tty_set_room(tty);
up_read(&tty->termios_rwsem);
timeout = wait_woken(&wait, TASK_INTERRUPTIBLE,
timeout);
down_read(&tty->termios_rwsem);
continue;
retval = -EIO;
break;
}
}
/* Deal with packet mode. */
if (packet && b == buf) {
if (tty_put_user(tty, TIOCPKT_DATA, b++)) {
retval = -EFAULT;
b--;
if (tty_hung_up_p(file))
break;
if (!timeout)
break;
if (file->f_flags & O_NONBLOCK) {
retval = -EAGAIN;
break;
}
nr--;
if (signal_pending(current)) {
retval = -ERESTARTSYS;
break;
}
n_tty_set_room(tty);
up_read(&tty->termios_rwsem);
timeout = wait_woken(&wait, TASK_INTERRUPTIBLE,
timeout);
down_read(&tty->termios_rwsem);
continue;
}
if (ldata->icanon && !L_EXTPROC(tty)) {
......@@ -2243,8 +2227,17 @@ static ssize_t n_tty_read(struct tty_struct *tty, struct file *file,
break;
} else {
int uncopied;
/* The copy function takes the read lock and handles
locking internally for this case */
/* Deal with packet mode. */
if (packet && b == buf) {
if (tty_put_user(tty, TIOCPKT_DATA, b++)) {
retval = -EFAULT;
b--;
break;
}
nr--;
}
uncopied = copy_from_read_buf(tty, &b, &nr);
uncopied += copy_from_read_buf(tty, &b, &nr);
if (uncopied) {
......
......@@ -47,10 +47,13 @@ static void pty_close(struct tty_struct *tty, struct file *filp)
set_bit(TTY_IO_ERROR, &tty->flags);
wake_up_interruptible(&tty->read_wait);
wake_up_interruptible(&tty->write_wait);
spin_lock_irq(&tty->ctrl_lock);
tty->packet = 0;
spin_unlock_irq(&tty->ctrl_lock);
/* Review - krefs on tty_link ?? */
if (!tty->link)
return;
tty_flush_to_ldisc(tty->link);
set_bit(TTY_OTHER_CLOSED, &tty->link->flags);
wake_up_interruptible(&tty->link->read_wait);
wake_up_interruptible(&tty->link->write_wait);
......@@ -64,9 +67,7 @@ static void pty_close(struct tty_struct *tty, struct file *filp)
mutex_unlock(&devpts_mutex);
}
#endif
tty_unlock(tty);
tty_vhangup(tty->link);
tty_lock(tty);
}
}
......@@ -178,21 +179,21 @@ static int pty_get_lock(struct tty_struct *tty, int __user *arg)
/* Set the packet mode on a pty */
static int pty_set_pktmode(struct tty_struct *tty, int __user *arg)
{
unsigned long flags;
int pktmode;
if (get_user(pktmode, arg))
return -EFAULT;
spin_lock_irqsave(&tty->ctrl_lock, flags);
spin_lock_irq(&tty->ctrl_lock);
if (pktmode) {
if (!tty->packet) {
tty->packet = 1;
tty->link->ctrl_status = 0;
smp_mb();
tty->packet = 1;
}
} else
tty->packet = 0;
spin_unlock_irqrestore(&tty->ctrl_lock, flags);
spin_unlock_irq(&tty->ctrl_lock);
return 0;
}
......@@ -207,15 +208,12 @@ static int pty_get_pktmode(struct tty_struct *tty, int __user *arg)
/* Send a signal to the slave */
static int pty_signal(struct tty_struct *tty, int sig)
{
unsigned long flags;
struct pid *pgrp;
if (tty->link) {
spin_lock_irqsave(&tty->link->ctrl_lock, flags);
pgrp = get_pid(tty->link->pgrp);
spin_unlock_irqrestore(&tty->link->ctrl_lock, flags);
kill_pgrp(pgrp, sig, 1);
pgrp = tty_get_pgrp(tty->link);
if (pgrp)
kill_pgrp(pgrp, sig, 1);
put_pid(pgrp);
}
return 0;
......@@ -224,16 +222,15 @@ static int pty_signal(struct tty_struct *tty, int sig)
static void pty_flush_buffer(struct tty_struct *tty)
{
struct tty_struct *to = tty->link;
unsigned long flags;
if (!to)
return;
/* tty_buffer_flush(to); FIXME */
if (to->packet) {
spin_lock_irqsave(&tty->ctrl_lock, flags);
spin_lock_irq(&tty->ctrl_lock);
tty->ctrl_status |= TIOCPKT_FLUSHWRITE;
wake_up_interruptible(&to->read_wait);
spin_unlock_irqrestore(&tty->ctrl_lock, flags);
spin_unlock_irq(&tty->ctrl_lock);
}
}
......@@ -262,6 +259,32 @@ static int pty_open(struct tty_struct *tty, struct file *filp)
static void pty_set_termios(struct tty_struct *tty,
struct ktermios *old_termios)
{
/* See if packet mode change of state. */
if (tty->link && tty->link->packet) {
int extproc = (old_termios->c_lflag & EXTPROC) |
(tty->termios.c_lflag & EXTPROC);
int old_flow = ((old_termios->c_iflag & IXON) &&
(old_termios->c_cc[VSTOP] == '\023') &&
(old_termios->c_cc[VSTART] == '\021'));
int new_flow = (I_IXON(tty) &&
STOP_CHAR(tty) == '\023' &&
START_CHAR(tty) == '\021');
if ((old_flow != new_flow) || extproc) {
spin_lock_irq(&tty->ctrl_lock);
if (old_flow != new_flow) {
tty->ctrl_status &= ~(TIOCPKT_DOSTOP | TIOCPKT_NOSTOP);
if (new_flow)
tty->ctrl_status |= TIOCPKT_DOSTOP;
else
tty->ctrl_status |= TIOCPKT_NOSTOP;
}
if (extproc)
tty->ctrl_status |= TIOCPKT_IOCTL;
spin_unlock_irq(&tty->ctrl_lock);
wake_up_interruptible(&tty->link->read_wait);
}
}
tty->termios.c_cflag &= ~(CSIZE | PARENB);
tty->termios.c_cflag |= (CS8 | CREAD);
}
......@@ -278,7 +301,6 @@ static void pty_set_termios(struct tty_struct *tty,
static int pty_resize(struct tty_struct *tty, struct winsize *ws)
{
struct pid *pgrp, *rpgrp;
unsigned long flags;
struct tty_struct *pty = tty->link;
/* For a PTY we need to lock the tty side */
......@@ -286,17 +308,9 @@ static int pty_resize(struct tty_struct *tty, struct winsize *ws)
if (!memcmp(ws, &tty->winsize, sizeof(*ws)))
goto done;
/* Get the PID values and reference them so we can
avoid holding the tty ctrl lock while sending signals.
We need to lock these individually however. */
spin_lock_irqsave(&tty->ctrl_lock, flags);
pgrp = get_pid(tty->pgrp);
spin_unlock_irqrestore(&tty->ctrl_lock, flags);
spin_lock_irqsave(&pty->ctrl_lock, flags);
rpgrp = get_pid(pty->pgrp);
spin_unlock_irqrestore(&pty->ctrl_lock, flags);
/* Signal the foreground process group of both ptys */
pgrp = tty_get_pgrp(tty);
rpgrp = tty_get_pgrp(pty);
if (pgrp)
kill_pgrp(pgrp, SIGWINCH, 1);
......@@ -327,26 +341,26 @@ static void pty_start(struct tty_struct *tty)
{
unsigned long flags;
spin_lock_irqsave(&tty->ctrl_lock, flags);
if (tty->link && tty->link->packet) {
spin_lock_irqsave(&tty->ctrl_lock, flags);
tty->ctrl_status &= ~TIOCPKT_STOP;
tty->ctrl_status |= TIOCPKT_START;
spin_unlock_irqrestore(&tty->ctrl_lock, flags);
wake_up_interruptible_poll(&tty->link->read_wait, POLLIN);
}
spin_unlock_irqrestore(&tty->ctrl_lock, flags);
}
static void pty_stop(struct tty_struct *tty)
{
unsigned long flags;
spin_lock_irqsave(&tty->ctrl_lock, flags);
if (tty->link && tty->link->packet) {
spin_lock_irqsave(&tty->ctrl_lock, flags);
tty->ctrl_status &= ~TIOCPKT_START;
tty->ctrl_status |= TIOCPKT_STOP;
spin_unlock_irqrestore(&tty->ctrl_lock, flags);
wake_up_interruptible_poll(&tty->link->read_wait, POLLIN);
}
spin_unlock_irqrestore(&tty->ctrl_lock, flags);
}
/**
......@@ -368,6 +382,10 @@ static int pty_common_install(struct tty_driver *driver, struct tty_struct *tty,
int idx = tty->index;
int retval = -ENOMEM;
/* Opening the slave first has always returned -EIO */
if (driver->subtype != PTY_TYPE_MASTER)
return -EIO;
ports[0] = kmalloc(sizeof **ports, GFP_KERNEL);
ports[1] = kmalloc(sizeof **ports, GFP_KERNEL);
if (!ports[0] || !ports[1])
......@@ -380,6 +398,8 @@ static int pty_common_install(struct tty_driver *driver, struct tty_struct *tty,
if (!o_tty)
goto err_put_module;
tty_set_lock_subclass(o_tty);
if (legacy) {
/* We always use new tty termios data so we can do this
the easy way .. */
......@@ -404,8 +424,6 @@ static int pty_common_install(struct tty_driver *driver, struct tty_struct *tty,
* Everything allocated ... set up the o_tty structure.
*/
tty_driver_kref_get(driver->other);
if (driver->subtype == PTY_TYPE_MASTER)
o_tty->count++;
/* Establish the links in both directions */
tty->link = o_tty;
o_tty->link = tty;
......@@ -417,6 +435,7 @@ static int pty_common_install(struct tty_driver *driver, struct tty_struct *tty,
tty_driver_kref_get(driver);
tty->count++;
o_tty->count++;
return 0;
err_free_termios:
if (legacy)
......@@ -489,7 +508,6 @@ static const struct tty_operations master_pty_ops_bsd = {
.flush_buffer = pty_flush_buffer,
.chars_in_buffer = pty_chars_in_buffer,
.unthrottle = pty_unthrottle,
.set_termios = pty_set_termios,
.ioctl = pty_bsd_ioctl,
.cleanup = pty_cleanup,
.resize = pty_resize,
......@@ -666,7 +684,6 @@ static const struct tty_operations ptm_unix98_ops = {
.flush_buffer = pty_flush_buffer,
.chars_in_buffer = pty_chars_in_buffer,
.unthrottle = pty_unthrottle,
.set_termios = pty_set_termios,
.ioctl = pty_unix98_ioctl,
.resize = pty_resize,
.shutdown = pty_unix98_shutdown,
......
......@@ -16,6 +16,9 @@
#include <linux/dmaengine.h>
struct uart_8250_dma {
int (*tx_dma)(struct uart_8250_port *p);
int (*rx_dma)(struct uart_8250_port *p, unsigned int iir);
/* Filter function */
dma_filter_fn fn;
......@@ -41,6 +44,8 @@ struct uart_8250_dma {
size_t tx_size;
unsigned char tx_running:1;
unsigned char tx_err: 1;
unsigned char rx_running:1;
};
struct old_serial_port {
......@@ -51,7 +56,7 @@ struct old_serial_port {
unsigned int flags;
unsigned char hub6;
unsigned char io_type;
unsigned char *iomem_base;
unsigned char __iomem *iomem_base;
unsigned short iomem_reg_shift;
unsigned long irqflags;
};
......@@ -114,6 +119,8 @@ static inline void serial_dl_write(struct uart_8250_port *up, int value)
}
struct uart_8250_port *serial8250_get_port(int line);
void serial8250_rpm_get(struct uart_8250_port *p);
void serial8250_rpm_put(struct uart_8250_port *p);
#if defined(__alpha__) && !defined(CONFIG_PCI)
/*
......
......@@ -541,23 +541,25 @@ void serial8250_clear_and_reinit_fifos(struct uart_8250_port *p)
}
EXPORT_SYMBOL_GPL(serial8250_clear_and_reinit_fifos);
static void serial8250_rpm_get(struct uart_8250_port *p)
void serial8250_rpm_get(struct uart_8250_port *p)
{
if (!(p->capabilities & UART_CAP_RPM))
return;
pm_runtime_get_sync(p->port.dev);
}
EXPORT_SYMBOL_GPL(serial8250_rpm_get);
static void serial8250_rpm_put(struct uart_8250_port *p)
void serial8250_rpm_put(struct uart_8250_port *p)
{
if (!(p->capabilities & UART_CAP_RPM))
return;
pm_runtime_mark_last_busy(p->port.dev);
pm_runtime_put_autosuspend(p->port.dev);
}
EXPORT_SYMBOL_GPL(serial8250_rpm_put);
/*
* This two wrapper ensure, that enable_runtime_pm_tx() can be called more than
* These two wrappers ensure that enable_runtime_pm_tx() can be called more than
* once and disable_runtime_pm_tx() will still disable RPM because the fifo is
* empty and the HW can idle again.
*/
......@@ -595,6 +597,7 @@ static void serial8250_rpm_put_tx(struct uart_8250_port *p)
*/
static void serial8250_set_sleep(struct uart_8250_port *p, int sleep)
{
unsigned char lcr = 0, efr = 0;
/*
* Exar UARTs have a SLEEP register that enables or disables
* each UART to enter sleep mode separately. On the XR17V35x the
......@@ -611,6 +614,8 @@ static void serial8250_set_sleep(struct uart_8250_port *p, int sleep)
if (p->capabilities & UART_CAP_SLEEP) {
if (p->capabilities & UART_CAP_EFR) {
lcr = serial_in(p, UART_LCR);
efr = serial_in(p, UART_EFR);
serial_out(p, UART_LCR, UART_LCR_CONF_MODE_B);
serial_out(p, UART_EFR, UART_EFR_ECB);
serial_out(p, UART_LCR, 0);
......@@ -618,8 +623,8 @@ static void serial8250_set_sleep(struct uart_8250_port *p, int sleep)
serial_out(p, UART_IER, sleep ? UART_IERX_SLEEP : 0);
if (p->capabilities & UART_CAP_EFR) {
serial_out(p, UART_LCR, UART_LCR_CONF_MODE_B);
serial_out(p, UART_EFR, 0);
serial_out(p, UART_LCR, 0);
serial_out(p, UART_EFR, efr);
serial_out(p, UART_LCR, lcr);
}
}
out:
......@@ -1350,7 +1355,7 @@ static void serial8250_start_tx(struct uart_port *port)
struct uart_8250_port *up = up_to_u8250p(port);
serial8250_rpm_get_tx(up);
if (up->dma && !serial8250_tx_dma(up)) {
if (up->dma && !up->dma->tx_dma(up)) {
return;
} else if (!(up->ier & UART_IER_THRI)) {
up->ier |= UART_IER_THRI;
......@@ -1397,6 +1402,19 @@ static void serial8250_stop_rx(struct uart_port *port)
serial8250_rpm_put(up);
}
static void serial8250_disable_ms(struct uart_port *port)
{
struct uart_8250_port *up =
container_of(port, struct uart_8250_port, port);
/* no MSR capabilities */
if (up->bugs & UART_BUG_NOMSR)
return;
up->ier &= ~UART_IER_MSI;
serial_port_out(port, UART_IER, up->ier);
}
static void serial8250_enable_ms(struct uart_port *port)
{
struct uart_8250_port *up = up_to_u8250p(port);
......@@ -1483,7 +1501,7 @@ serial8250_rx_chars(struct uart_8250_port *up, unsigned char lsr)
ignore_char:
lsr = serial_in(up, UART_LSR);
} while ((lsr & (UART_LSR_DR | UART_LSR_BI)) && (max_count-- > 0));
} while ((lsr & (UART_LSR_DR | UART_LSR_BI)) && (--max_count > 0));
spin_unlock(&port->lock);
tty_flip_buffer_push(&port->state->port);
spin_lock(&port->lock);
......@@ -1532,7 +1550,7 @@ void serial8250_tx_chars(struct uart_8250_port *up)
DEBUG_INTR("THRE...");
/*
* With RPM enabled, we have to wait once the FIFO is empty before the
* With RPM enabled, we have to wait until the FIFO is empty before the
* HW can go idle. So we get here once again with empty FIFO and disable
* the interrupt and RPM in __stop_tx()
*/
......@@ -1588,13 +1606,14 @@ int serial8250_handle_irq(struct uart_port *port, unsigned int iir)
if (status & (UART_LSR_DR | UART_LSR_BI)) {
if (up->dma)
dma_err = serial8250_rx_dma(up, iir);
dma_err = up->dma->rx_dma(up, iir);
if (!up->dma || dma_err)
status = serial8250_rx_chars(up, status);
}
serial8250_modem_status(up);
if (!up->dma && (status & UART_LSR_THRE))
if ((!up->dma || (up->dma && up->dma->tx_err)) &&
(status & UART_LSR_THRE))
serial8250_tx_chars(up);
spin_unlock_irqrestore(&port->lock, flags);
......@@ -2603,13 +2622,21 @@ serial8250_set_termios(struct uart_port *port, struct ktermios *termios,
}
static void
serial8250_set_ldisc(struct uart_port *port, int new)
serial8250_set_ldisc(struct uart_port *port, struct ktermios *termios)
{
if (new == N_PPS) {
if (termios->c_line == N_PPS) {
port->flags |= UPF_HARDPPS_CD;
spin_lock_irq(&port->lock);
serial8250_enable_ms(port);
} else
spin_unlock_irq(&port->lock);
} else {
port->flags &= ~UPF_HARDPPS_CD;
if (!UART_ENABLE_MS(port, termios->c_cflag)) {
spin_lock_irq(&port->lock);
serial8250_disable_ms(port);
spin_unlock_irq(&port->lock);
}
}
}
......@@ -2634,8 +2661,11 @@ serial8250_pm(struct uart_port *port, unsigned int state,
static unsigned int serial8250_port_size(struct uart_8250_port *pt)
{
if (pt->port.iotype == UPIO_AU)
if (pt->port.iotype == UPIO_AU) {
if (pt->port.type == PORT_RT2880)
return 0x100;
return 0x1000;
}
if (is_omap1_8250(pt))
return 0x16 << pt->port.regshift;
......@@ -2975,42 +3005,6 @@ serial8250_verify_port(struct uart_port *port, struct serial_struct *ser)
return 0;
}
static int serial8250_ioctl(struct uart_port *port, unsigned int cmd,
unsigned long arg)
{
struct uart_8250_port *up =
container_of(port, struct uart_8250_port, port);
int ret;
struct serial_rs485 rs485_config;
if (!up->rs485_config)
return -ENOIOCTLCMD;
switch (cmd) {
case TIOCSRS485:
if (copy_from_user(&rs485_config, (void __user *)arg,
sizeof(rs485_config)))
return -EFAULT;
ret = up->rs485_config(up, &rs485_config);
if (ret)
return ret;
memcpy(&up->rs485, &rs485_config, sizeof(rs485_config));
return 0;
case TIOCGRS485:
if (copy_to_user((void __user *)arg, &up->rs485,
sizeof(up->rs485)))
return -EFAULT;
return 0;
default:
break;
}
return -ENOIOCTLCMD;
}
static const char *
serial8250_type(struct uart_port *port)
{
......@@ -3042,7 +3036,6 @@ static struct uart_ops serial8250_pops = {
.request_port = serial8250_request_port,
.config_port = serial8250_config_port,
.verify_port = serial8250_verify_port,
.ioctl = serial8250_ioctl,
#ifdef CONFIG_CONSOLE_POLL
.poll_get_char = serial8250_get_poll_char,
.poll_put_char = serial8250_put_poll_char,
......@@ -3198,7 +3191,9 @@ serial8250_console_write(struct console *co, const char *s, unsigned int count)
serial8250_rpm_get(up);
if (port->sysrq || oops_in_progress)
if (port->sysrq)
locked = 0;
else if (oops_in_progress)
locked = spin_trylock_irqsave(&port->lock, flags);
else
spin_lock_irqsave(&port->lock, flags);
......@@ -3237,7 +3232,7 @@ serial8250_console_write(struct console *co, const char *s, unsigned int count)
serial8250_rpm_put(up);
}
static int __init serial8250_console_setup(struct console *co, char *options)
static int serial8250_console_setup(struct console *co, char *options)
{
struct uart_port *port;
int baud = 9600;
......@@ -3585,10 +3580,10 @@ int serial8250_register_8250_port(struct uart_8250_port *up)
uart->port.fifosize = up->port.fifosize;
uart->tx_loadsz = up->tx_loadsz;
uart->capabilities = up->capabilities;
uart->rs485_config = up->rs485_config;
uart->rs485 = up->rs485;
uart->port.throttle = up->port.throttle;
uart->port.unthrottle = up->port.unthrottle;
uart->port.rs485_config = up->port.rs485_config;
uart->port.rs485 = up->port.rs485;
/* Take tx_loadsz from fifosize if it wasn't set separately */
if (uart->port.fifosize && !uart->tx_loadsz)
......@@ -3623,8 +3618,13 @@ int serial8250_register_8250_port(struct uart_8250_port *up)
uart->dl_read = up->dl_read;
if (up->dl_write)
uart->dl_write = up->dl_write;
if (up->dma)
if (up->dma) {
uart->dma = up->dma;
if (!uart->dma->tx_dma)
uart->dma->tx_dma = serial8250_tx_dma;
if (!uart->dma->rx_dma)
uart->dma->rx_dma = serial8250_rx_dma;
}
if (serial8250_isa_config != NULL)
serial8250_isa_config(0, &uart->port,
......
......@@ -21,6 +21,7 @@ static void __dma_tx_complete(void *param)
struct uart_8250_dma *dma = p->dma;
struct circ_buf *xmit = &p->port.state->xmit;
unsigned long flags;
int ret;
dma_sync_single_for_cpu(dma->txchan->device->dev, dma->tx_addr,
UART_XMIT_SIZE, DMA_TO_DEVICE);
......@@ -36,8 +37,11 @@ static void __dma_tx_complete(void *param)
if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
uart_write_wakeup(&p->port);
if (!uart_circ_empty(xmit) && !uart_tx_stopped(&p->port))
serial8250_tx_dma(p);
ret = serial8250_tx_dma(p);
if (ret) {
p->ier |= UART_IER_THRI;
serial_port_out(&p->port, UART_IER, p->ier);
}
spin_unlock_irqrestore(&p->port.lock, flags);
}
......@@ -53,6 +57,7 @@ static void __dma_rx_complete(void *param)
dma_sync_single_for_cpu(dma->rxchan->device->dev, dma->rx_addr,
dma->rx_size, DMA_FROM_DEVICE);
dma->rx_running = 0;
dmaengine_tx_status(dma->rxchan, dma->rx_cookie, &state);
dmaengine_terminate_all(dma->rxchan);
......@@ -69,6 +74,7 @@ int serial8250_tx_dma(struct uart_8250_port *p)
struct uart_8250_dma *dma = p->dma;
struct circ_buf *xmit = &p->port.state->xmit;
struct dma_async_tx_descriptor *desc;
int ret;
if (uart_tx_stopped(&p->port) || dma->tx_running ||
uart_circ_empty(xmit))
......@@ -80,11 +86,12 @@ int serial8250_tx_dma(struct uart_8250_port *p)
dma->tx_addr + xmit->tail,
dma->tx_size, DMA_MEM_TO_DEV,
DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
if (!desc)
return -EBUSY;
if (!desc) {
ret = -EBUSY;
goto err;
}
dma->tx_running = 1;
desc->callback = __dma_tx_complete;
desc->callback_param = p;
......@@ -94,19 +101,23 @@ int serial8250_tx_dma(struct uart_8250_port *p)
UART_XMIT_SIZE, DMA_TO_DEVICE);
dma_async_issue_pending(dma->txchan);
if (dma->tx_err) {
dma->tx_err = 0;
if (p->ier & UART_IER_THRI) {
p->ier &= ~UART_IER_THRI;
serial_out(p, UART_IER, p->ier);
}
}
return 0;
err:
dma->tx_err = 1;
return ret;
}
EXPORT_SYMBOL_GPL(serial8250_tx_dma);
int serial8250_rx_dma(struct uart_8250_port *p, unsigned int iir)
{
struct uart_8250_dma *dma = p->dma;
struct dma_async_tx_descriptor *desc;
struct dma_tx_state state;
int dma_status;
dma_status = dmaengine_tx_status(dma->rxchan, dma->rx_cookie, &state);
switch (iir & 0x3f) {
case UART_IIR_RLSI:
......@@ -117,7 +128,7 @@ int serial8250_rx_dma(struct uart_8250_port *p, unsigned int iir)
* If RCVR FIFO trigger level was not reached, complete the
* transfer and let 8250_core copy the remaining data.
*/
if (dma_status == DMA_IN_PROGRESS) {
if (dma->rx_running) {
dmaengine_pause(dma->rxchan);
__dma_rx_complete(p);
}
......@@ -126,7 +137,7 @@ int serial8250_rx_dma(struct uart_8250_port *p, unsigned int iir)
break;
}
if (dma_status)
if (dma->rx_running)
return 0;
desc = dmaengine_prep_slave_single(dma->rxchan, dma->rx_addr,
......@@ -135,6 +146,7 @@ int serial8250_rx_dma(struct uart_8250_port *p, unsigned int iir)
if (!desc)
return -EBUSY;
dma->rx_running = 1;
desc->callback = __dma_rx_complete;
desc->callback_param = p;
......@@ -147,7 +159,6 @@ int serial8250_rx_dma(struct uart_8250_port *p, unsigned int iir)
return 0;
}
EXPORT_SYMBOL_GPL(serial8250_rx_dma);
int serial8250_request_dma(struct uart_8250_port *p)
{
......
......@@ -122,13 +122,44 @@ static unsigned int dw8250_serial_in(struct uart_port *p, int offset)
return dw8250_modify_msr(p, offset, value);
}
/* Read Back (rb) version to ensure register access ording. */
static void dw8250_serial_out_rb(struct uart_port *p, int offset, int value)
#ifdef CONFIG_64BIT
static unsigned int dw8250_serial_inq(struct uart_port *p, int offset)
{
dw8250_serial_out(p, offset, value);
dw8250_serial_in(p, UART_LCR);
unsigned int value;
value = (u8)__raw_readq(p->membase + (offset << p->regshift));
return dw8250_modify_msr(p, offset, value);
}
static void dw8250_serial_outq(struct uart_port *p, int offset, int value)
{
struct dw8250_data *d = p->private_data;
if (offset == UART_MCR)
d->last_mcr = value;
value &= 0xff;
__raw_writeq(value, p->membase + (offset << p->regshift));
/* Read back to ensure register write ordering. */
__raw_readq(p->membase + (UART_LCR << p->regshift));
/* Make sure LCR write wasn't ignored */
if (offset == UART_LCR) {
int tries = 1000;
while (tries--) {
unsigned int lcr = p->serial_in(p, UART_LCR);
if ((value & ~UART_LCR_SPAR) == (lcr & ~UART_LCR_SPAR))
return;
dw8250_force_idle(p);
__raw_writeq(value & 0xff,
p->membase + (UART_LCR << p->regshift));
}
dev_err(p->dev, "Couldn't set LCR to %d\n", value);
}
}
#endif /* CONFIG_64BIT */
static void dw8250_serial_out32(struct uart_port *p, int offset, int value)
{
struct dw8250_data *d = p->private_data;
......@@ -258,22 +289,19 @@ static int dw8250_probe_of(struct uart_port *p,
struct uart_8250_port *up = up_to_u8250p(p);
u32 val;
bool has_ucv = true;
int id;
#ifdef CONFIG_64BIT
if (of_device_is_compatible(np, "cavium,octeon-3860-uart")) {
#ifdef __BIG_ENDIAN
/*
* Low order bits of these 64-bit registers, when
* accessed as a byte, are 7 bytes further down in the
* address space in big endian mode.
*/
p->membase += 7;
#endif
p->serial_out = dw8250_serial_out_rb;
p->serial_in = dw8250_serial_inq;
p->serial_out = dw8250_serial_outq;
p->flags = UPF_SKIP_TEST | UPF_SHARE_IRQ | UPF_FIXED_TYPE;
p->type = PORT_OCTEON;
data->usr_reg = 0x27;
has_ucv = false;
} else if (!of_property_read_u32(np, "reg-io-width", &val)) {
} else
#endif
if (!of_property_read_u32(np, "reg-io-width", &val)) {
switch (val) {
case 1:
break;
......@@ -290,9 +318,22 @@ static int dw8250_probe_of(struct uart_port *p,
if (has_ucv)
dw8250_setup_port(up);
/* if we have a valid fifosize, try hooking up DMA here */
if (p->fifosize) {
up->dma = &data->dma;
up->dma->rxconf.src_maxburst = p->fifosize / 4;
up->dma->txconf.dst_maxburst = p->fifosize / 4;
}
if (!of_property_read_u32(np, "reg-shift", &val))
p->regshift = val;
/* get index of serial line, if found in DT aliases */
id = of_alias_get_id(np, "serial");
if (id >= 0)
p->line = id;
/* clock got configured through clk api, all done */
if (p->uartclk)
return 0;
......
......@@ -102,10 +102,8 @@ static int serial8250_em_probe(struct platform_device *pdev)
}
priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
if (!priv) {
dev_err(&pdev->dev, "unable to allocate private data\n");
if (!priv)
return -ENOMEM;
}
priv->sclk = devm_clk_get(&pdev->dev, "sclk");
if (IS_ERR(priv->sclk)) {
......
......@@ -89,11 +89,11 @@ static int fintek_8250_check_id(void)
return 0;
}
static int fintek_8250_rs4850_config(struct uart_8250_port *uart,
static int fintek_8250_rs485_config(struct uart_port *port,
struct serial_rs485 *rs485)
{
uint8_t config = 0;
int index = fintek_8250_get_index(uart->port.iobase);
int index = fintek_8250_get_index(port->iobase);
if (index < 0)
return -EINVAL;
......@@ -134,6 +134,8 @@ static int fintek_8250_rs4850_config(struct uart_8250_port *uart,
outb(config, DATA_PORT);
fintek_8250_exit_key();
port->rs485 = *rs485;
return 0;
}
......@@ -166,7 +168,7 @@ fintek_8250_probe(struct pnp_dev *dev, const struct pnp_device_id *dev_id)
uart.port.irq = pnp_irq(dev, 0);
uart.port.iobase = pnp_port_start(dev, 0);
uart.port.iotype = UPIO_PORT;
uart.rs485_config = fintek_8250_rs4850_config;
uart.port.rs485_config = fintek_8250_rs485_config;
uart.port.flags |= UPF_SKIP_TEST | UPF_BOOT_AUTOCONF;
if (pnp_irq_flags(dev, 0) & IORESOURCE_IRQ_SHAREABLE)
......
......@@ -88,10 +88,6 @@ extern int hp300_uart_scode;
/*
* Parse the bootinfo to find descriptions for headless console and
* debug serial ports and register them with the 8250 driver.
* This function should be called before serial_console_init() is called
* to make sure the serial console will be available for use. IA-64 kernel
* calls this function from setup_arch() after the EFI and ACPI tables have
* been parsed.
*/
int __init hp300_setup_serial_console(void)
{
......
......@@ -74,14 +74,14 @@ mtk8250_set_termios(struct uart_port *port, struct ktermios *termios,
/* Set to next lower baudrate supported */
if ((baud == 500000) || (baud == 576000))
baud = 460800;
quot = DIV_ROUND_CLOSEST(port->uartclk, 4 * baud);
quot = DIV_ROUND_UP(port->uartclk, 4 * baud);
} else {
serial_port_out(port, UART_MTK_HIGHS, 0x3);
/* Set to highest baudrate supported */
if (baud >= 1152000)
baud = 921600;
quot = (port->uartclk / (256 * baud)) + 1;
quot = DIV_ROUND_UP(port->uartclk, 256 * baud);
}
/*
......
此差异已折叠。
......@@ -79,29 +79,24 @@ setup_port(struct serial_private *priv, struct uart_8250_port *port,
int bar, int offset, int regshift)
{
struct pci_dev *dev = priv->dev;
unsigned long base, len;
if (bar >= PCI_NUM_BAR_RESOURCES)
return -EINVAL;
base = pci_resource_start(dev, bar);
if (pci_resource_flags(dev, bar) & IORESOURCE_MEM) {
len = pci_resource_len(dev, bar);
if (!priv->remapped_bar[bar])
priv->remapped_bar[bar] = ioremap_nocache(base, len);
priv->remapped_bar[bar] = pci_ioremap_bar(dev, bar);
if (!priv->remapped_bar[bar])
return -ENOMEM;
port->port.iotype = UPIO_MEM;
port->port.iobase = 0;
port->port.mapbase = base + offset;
port->port.mapbase = pci_resource_start(dev, bar) + offset;
port->port.membase = priv->remapped_bar[bar] + offset;
port->port.regshift = regshift;
} else {
port->port.iotype = UPIO_PORT;
port->port.iobase = base + offset;
port->port.iobase = pci_resource_start(dev, bar) + offset;
port->port.mapbase = 0;
port->port.membase = NULL;
port->port.regshift = 0;
......@@ -317,7 +312,6 @@ static void pci_plx9050_exit(struct pci_dev *dev)
static void pci_ni8420_exit(struct pci_dev *dev)
{
void __iomem *p;
unsigned long base, len;
unsigned int bar = 0;
if ((pci_resource_flags(dev, bar) & IORESOURCE_MEM) == 0) {
......@@ -325,9 +319,7 @@ static void pci_ni8420_exit(struct pci_dev *dev)
return;
}
base = pci_resource_start(dev, bar);
len = pci_resource_len(dev, bar);
p = ioremap_nocache(base, len);
p = pci_ioremap_bar(dev, bar);
if (p == NULL)
return;
......@@ -349,7 +341,6 @@ static void pci_ni8420_exit(struct pci_dev *dev)
static void pci_ni8430_exit(struct pci_dev *dev)
{
void __iomem *p;
unsigned long base, len;
unsigned int bar = 0;
if ((pci_resource_flags(dev, bar) & IORESOURCE_MEM) == 0) {
......@@ -357,9 +348,7 @@ static void pci_ni8430_exit(struct pci_dev *dev)
return;
}
base = pci_resource_start(dev, bar);
len = pci_resource_len(dev, bar);
p = ioremap_nocache(base, len);
p = pci_ioremap_bar(dev, bar);
if (p == NULL)
return;
......@@ -682,7 +671,6 @@ static int pci_xircom_init(struct pci_dev *dev)
static int pci_ni8420_init(struct pci_dev *dev)
{
void __iomem *p;
unsigned long base, len;
unsigned int bar = 0;
if ((pci_resource_flags(dev, bar) & IORESOURCE_MEM) == 0) {
......@@ -690,9 +678,7 @@ static int pci_ni8420_init(struct pci_dev *dev)
return 0;
}
base = pci_resource_start(dev, bar);
len = pci_resource_len(dev, bar);
p = ioremap_nocache(base, len);
p = pci_ioremap_bar(dev, bar);
if (p == NULL)
return -ENOMEM;
......@@ -714,7 +700,7 @@ static int pci_ni8420_init(struct pci_dev *dev)
static int pci_ni8430_init(struct pci_dev *dev)
{
void __iomem *p;
unsigned long base, len;
struct pci_bus_region region;
u32 device_window;
unsigned int bar = 0;
......@@ -723,14 +709,17 @@ static int pci_ni8430_init(struct pci_dev *dev)
return 0;
}
base = pci_resource_start(dev, bar);
len = pci_resource_len(dev, bar);
p = ioremap_nocache(base, len);
p = pci_ioremap_bar(dev, bar);
if (p == NULL)
return -ENOMEM;
/* Set device window address and size in BAR0 */
device_window = ((base + MITE_IOWBSR1_WIN_OFFSET) & 0xffffff00)
/*
* Set device window address and size in BAR0, while acknowledging that
* the resource structure may contain a translated address that differs
* from the address the device responds to.
*/
pcibios_resource_to_bus(dev->bus, &region, &dev->resource[bar]);
device_window = ((region.start + MITE_IOWBSR1_WIN_OFFSET) & 0xffffff00)
| MITE_IOWBSR1_WENAB | MITE_IOWBSR1_WSIZE;
writel(device_window, p + MITE_IOWBSR1);
......@@ -757,8 +746,8 @@ pci_ni8430_setup(struct serial_private *priv,
const struct pciserial_board *board,
struct uart_8250_port *port, int idx)
{
struct pci_dev *dev = priv->dev;
void __iomem *p;
unsigned long base, len;
unsigned int bar, offset = board->first_offset;
if (idx >= board->num_ports)
......@@ -767,9 +756,9 @@ pci_ni8430_setup(struct serial_private *priv,
bar = FL_GET_BASE(board->flags);
offset += idx * board->uart_offset;
base = pci_resource_start(priv->dev, bar);
len = pci_resource_len(priv->dev, bar);
p = ioremap_nocache(base, len);
p = pci_ioremap_bar(dev, bar);
if (!p)
return -ENOMEM;
/* enable the transceiver */
writeb(readb(p + offset + NI8430_PORTCON) | NI8430_PORTCON_TXVR_ENABLE,
......@@ -1002,6 +991,40 @@ static void pci_ite887x_exit(struct pci_dev *dev)
release_region(ioport, ITE_887x_IOSIZE);
}
/*
* EndRun Technologies.
* Determine the number of ports available on the device.
*/
#define PCI_VENDOR_ID_ENDRUN 0x7401
#define PCI_DEVICE_ID_ENDRUN_1588 0xe100
static int pci_endrun_init(struct pci_dev *dev)
{
u8 __iomem *p;
unsigned long deviceID;
unsigned int number_uarts = 0;
/* EndRun device is all 0xexxx */
if (dev->vendor == PCI_VENDOR_ID_ENDRUN &&
(dev->device & 0xf000) != 0xe000)
return 0;
p = pci_iomap(dev, 0, 5);
if (p == NULL)
return -ENOMEM;
deviceID = ioread32(p);
/* EndRun device */
if (deviceID == 0x07000200) {
number_uarts = ioread8(p + 4);
dev_dbg(&dev->dev,
"%d ports detected on EndRun PCI Express device\n",
number_uarts);
}
pci_iounmap(dev, p);
return number_uarts;
}
/*
* Oxford Semiconductor Inc.
* Check that device is part of the Tornado range of devices, then determine
......@@ -1531,25 +1554,48 @@ static int pci_fintek_setup(struct serial_private *priv,
unsigned long iobase;
unsigned long ciobase = 0;
u8 config_base;
u32 bar_data[3];
/*
* We are supposed to be able to read these from the PCI config space,
* but the values there don't seem to match what we need to use, so
* just use these hard-coded values for now, as they are correct.
* Find each UARTs offset in PCI configuraion space
*/
switch (idx) {
case 0: iobase = 0xe000; config_base = 0x40; break;
case 1: iobase = 0xe008; config_base = 0x48; break;
case 2: iobase = 0xe010; config_base = 0x50; break;
case 3: iobase = 0xe018; config_base = 0x58; break;
case 4: iobase = 0xe020; config_base = 0x60; break;
case 5: iobase = 0xe028; config_base = 0x68; break;
case 6: iobase = 0xe030; config_base = 0x70; break;
case 7: iobase = 0xe038; config_base = 0x78; break;
case 8: iobase = 0xe040; config_base = 0x80; break;
case 9: iobase = 0xe048; config_base = 0x88; break;
case 10: iobase = 0xe050; config_base = 0x90; break;
case 11: iobase = 0xe058; config_base = 0x98; break;
case 0:
config_base = 0x40;
break;
case 1:
config_base = 0x48;
break;
case 2:
config_base = 0x50;
break;
case 3:
config_base = 0x58;
break;
case 4:
config_base = 0x60;
break;
case 5:
config_base = 0x68;
break;
case 6:
config_base = 0x70;
break;
case 7:
config_base = 0x78;
break;
case 8:
config_base = 0x80;
break;
case 9:
config_base = 0x88;
break;
case 10:
config_base = 0x90;
break;
case 11:
config_base = 0x98;
break;
default:
/* Unknown number of ports, get out of here */
return -EINVAL;
......@@ -1560,6 +1606,14 @@ static int pci_fintek_setup(struct serial_private *priv,
ciobase = (int)(base + (0x8 * idx));
}
/* Get the io address dispatch from the BIOS */
pci_read_config_dword(pdev, 0x24, &bar_data[0]);
pci_read_config_dword(pdev, 0x20, &bar_data[1]);
pci_read_config_dword(pdev, 0x1c, &bar_data[2]);
/* Calculate Real IO Port */
iobase = (bar_data[idx/4] & 0xffffffe0) + (idx % 4) * 8;
dev_dbg(&pdev->dev, "%s: idx=%d iobase=0x%lx ciobase=0x%lx config_base=0x%2x\n",
__func__, idx, iobase, ciobase, config_base);
......@@ -1760,6 +1814,16 @@ pci_wch_ch353_setup(struct serial_private *priv,
return pci_default_setup(priv, board, port, idx);
}
static int
pci_wch_ch382_setup(struct serial_private *priv,
const struct pciserial_board *board,
struct uart_8250_port *port, int idx)
{
port->port.flags |= UPF_FIXED_TYPE;
port->port.type = PORT_16850;
return pci_default_setup(priv, board, port, idx);
}
#define PCI_VENDOR_ID_SBSMODULARIO 0x124B
#define PCI_SUBVENDOR_ID_SBSMODULARIO 0x124B
#define PCI_DEVICE_ID_OCTPRO 0x0001
......@@ -1814,6 +1878,8 @@ pci_wch_ch353_setup(struct serial_private *priv,
#define PCI_VENDOR_ID_SUNIX 0x1fd4
#define PCI_DEVICE_ID_SUNIX_1999 0x1999
#define PCIE_VENDOR_ID_WCH 0x1c00
#define PCIE_DEVICE_ID_WCH_CH382_2S1P 0x3250
/* Unknown vendors/cards - this should not be in linux/pci_ids.h */
#define PCI_SUBDEVICE_ID_UNKNOWN_0x1584 0x1584
......@@ -2345,6 +2411,17 @@ static struct pci_serial_quirk pci_serial_quirks[] __refdata = {
.init = pci_netmos_init,
.setup = pci_netmos_9900_setup,
},
/*
* EndRun Technologies
*/
{
.vendor = PCI_VENDOR_ID_ENDRUN,
.device = PCI_ANY_ID,
.subvendor = PCI_ANY_ID,
.subdevice = PCI_ANY_ID,
.init = pci_endrun_init,
.setup = pci_default_setup,
},
/*
* For Oxford Semiconductor Tornado based devices
*/
......@@ -2494,6 +2571,14 @@ static struct pci_serial_quirk pci_serial_quirks[] __refdata = {
.subdevice = PCI_ANY_ID,
.setup = pci_wch_ch353_setup,
},
/* WCH CH382 2S1P card (16750 clone) */
{
.vendor = PCIE_VENDOR_ID_WCH,
.device = PCIE_DEVICE_ID_WCH_CH382_2S1P,
.subvendor = PCI_ANY_ID,
.subdevice = PCI_ANY_ID,
.setup = pci_wch_ch382_setup,
},
/*
* ASIX devices with FIFO bug
*/
......@@ -2754,6 +2839,7 @@ enum pci_board_num_t {
pbn_panacom2,
pbn_panacom4,
pbn_plx_romulus,
pbn_endrun_2_4000000,
pbn_oxsemi,
pbn_oxsemi_1_4000000,
pbn_oxsemi_2_4000000,
......@@ -3298,6 +3384,20 @@ static struct pciserial_board pci_boards[] = {
.first_offset = 0x03,
},
/*
* EndRun Technologies
* Uses the size of PCI Base region 0 to
* signal now many ports are available
* 2 port 952 Uart support
*/
[pbn_endrun_2_4000000] = {
.flags = FL_BASE0,
.num_ports = 2,
.base_baud = 4000000,
.uart_offset = 0x200,
.first_offset = 0x1000,
},
/*
* This board uses the size of PCI Base region 0 to
* signal now many ports are available
......@@ -3586,6 +3686,7 @@ static const struct pci_device_id blacklist[] = {
/* multi-io cards handled by parport_serial */
{ PCI_DEVICE(0x4348, 0x7053), }, /* WCH CH353 2S1P */
{ PCI_DEVICE(0x4348, 0x5053), }, /* WCH CH353 1S1P */
{ PCI_DEVICE(0x1c00, 0x3250), }, /* WCH CH382 2S1P */
};
/*
......@@ -4170,6 +4271,13 @@ static struct pci_device_id serial_pci_tbl[] = {
{ PCI_VENDOR_ID_PLX, PCI_DEVICE_ID_PLX_ROMULUS,
0x10b5, 0x106a, 0, 0,
pbn_plx_romulus },
/*
* EndRun Technologies. PCI express device range.
* EndRun PTP/1588 has 2 Native UARTs.
*/
{ PCI_VENDOR_ID_ENDRUN, PCI_DEVICE_ID_ENDRUN_1588,
PCI_ANY_ID, PCI_ANY_ID, 0, 0,
pbn_endrun_2_4000000 },
/*
* Quatech cards. These actually have configurable clocks but for
* now we just use the default.
......
......@@ -293,12 +293,21 @@ config SERIAL_8250_EM
config SERIAL_8250_RT288X
bool "Ralink RT288x/RT305x/RT3662/RT3883 serial port support"
depends on SERIAL_8250 && (SOC_RT288X || SOC_RT305X || SOC_RT3883)
depends on SERIAL_8250 && (SOC_RT288X || SOC_RT305X || SOC_RT3883 || SOC_MT7620)
help
If you have a Ralink RT288x/RT305x SoC based board and want to use the
serial port, say Y to this option. The driver can handle up to 2 serial
ports. If unsure, say N.
config SERIAL_8250_OMAP
tristate "Support for OMAP internal UART (8250 based driver)"
depends on SERIAL_8250 && ARCH_OMAP2PLUS
help
If you have a machine based on an Texas Instruments OMAP CPU you
can enable its onboard serial ports by enabling this option.
This driver uses ttyS instead of ttyO.
config SERIAL_8250_FINTEK
tristate "Support for Fintek F81216A LPC to 4 UART"
depends on SERIAL_8250 && PNP
......
......@@ -20,5 +20,6 @@ obj-$(CONFIG_SERIAL_8250_HUB6) += 8250_hub6.o
obj-$(CONFIG_SERIAL_8250_FSL) += 8250_fsl.o
obj-$(CONFIG_SERIAL_8250_DW) += 8250_dw.o
obj-$(CONFIG_SERIAL_8250_EM) += 8250_em.o
obj-$(CONFIG_SERIAL_8250_OMAP) += 8250_omap.o
obj-$(CONFIG_SERIAL_8250_FINTEK) += 8250_fintek.o
obj-$(CONFIG_SERIAL_8250_MT6577) += 8250_mtk.o
......@@ -1029,11 +1029,11 @@ config SERIAL_VR41XX_CONSOLE
a console on a serial port, say Y. Otherwise, say N.
config SERIAL_JSM
tristate "Digi International NEO PCI Support"
tristate "Digi International NEO and Classic PCI Support"
depends on PCI
select SERIAL_CORE
help
This is a driver for Digi International's Neo series
This is a driver for Digi International's Neo and Classic series
of cards which provide multiple serial ports. You would need
something like this to connect more than two modems to your Linux
box, for instance in order to become a dial-in server. This driver
......@@ -1281,22 +1281,25 @@ config SERIAL_TIMBERDALE
Add support for UART controller on timberdale.
config SERIAL_BCM63XX
tristate "bcm63xx serial port support"
tristate "Broadcom BCM63xx/BCM33xx UART support"
select SERIAL_CORE
depends on BCM63XX
depends on MIPS || ARM || COMPILE_TEST
help
If you have a bcm63xx CPU, you can enable its onboard
serial port by enabling this options.
This enables the driver for the onchip UART core found on
the following chipsets:
To compile this driver as a module, choose M here: the
module will be called bcm963xx_uart.
BCM33xx (cable modem)
BCM63xx/BCM63xxx (DSL)
BCM68xx (PON)
BCM7xxx (STB) - DOCSIS console
config SERIAL_BCM63XX_CONSOLE
bool "Console on bcm63xx serial port"
bool "Console on BCM63xx serial port"
depends on SERIAL_BCM63XX=y
select SERIAL_CORE_CONSOLE
select SERIAL_EARLYCON
help
If you have enabled the serial port on the bcm63xx CPU
If you have enabled the serial port on the BCM63xx CPU
you can make it the console by answering Y to this option.
config SERIAL_GRLIB_GAISLER_APBUART
......@@ -1408,6 +1411,7 @@ config SERIAL_MXS_AUART
depends on ARCH_MXS
tristate "MXS AUART support"
select SERIAL_CORE
select SERIAL_MCTRL_GPIO if GPIOLIB
help
This driver supports the MXS Application UART (AUART) port.
......
......@@ -75,7 +75,8 @@ struct uart_amba_port {
static void pl010_stop_tx(struct uart_port *port)
{
struct uart_amba_port *uap = (struct uart_amba_port *)port;
struct uart_amba_port *uap =
container_of(port, struct uart_amba_port, port);
unsigned int cr;
cr = readb(uap->port.membase + UART010_CR);
......@@ -85,7 +86,8 @@ static void pl010_stop_tx(struct uart_port *port)
static void pl010_start_tx(struct uart_port *port)
{
struct uart_amba_port *uap = (struct uart_amba_port *)port;
struct uart_amba_port *uap =
container_of(port, struct uart_amba_port, port);
unsigned int cr;
cr = readb(uap->port.membase + UART010_CR);
......@@ -95,7 +97,8 @@ static void pl010_start_tx(struct uart_port *port)
static void pl010_stop_rx(struct uart_port *port)
{
struct uart_amba_port *uap = (struct uart_amba_port *)port;
struct uart_amba_port *uap =
container_of(port, struct uart_amba_port, port);
unsigned int cr;
cr = readb(uap->port.membase + UART010_CR);
......@@ -103,11 +106,22 @@ static void pl010_stop_rx(struct uart_port *port)
writel(cr, uap->port.membase + UART010_CR);
}
static void pl010_enable_ms(struct uart_port *port)
static void pl010_disable_ms(struct uart_port *port)
{
struct uart_amba_port *uap = (struct uart_amba_port *)port;
unsigned int cr;
cr = readb(uap->port.membase + UART010_CR);
cr &= ~UART010_CR_MSIE;
writel(cr, uap->port.membase + UART010_CR);
}
static void pl010_enable_ms(struct uart_port *port)
{
struct uart_amba_port *uap =
container_of(port, struct uart_amba_port, port);
unsigned int cr;
cr = readb(uap->port.membase + UART010_CR);
cr |= UART010_CR_MSIE;
writel(cr, uap->port.membase + UART010_CR);
......@@ -259,14 +273,16 @@ static irqreturn_t pl010_int(int irq, void *dev_id)
static unsigned int pl010_tx_empty(struct uart_port *port)
{
struct uart_amba_port *uap = (struct uart_amba_port *)port;
struct uart_amba_port *uap =
container_of(port, struct uart_amba_port, port);
unsigned int status = readb(uap->port.membase + UART01x_FR);
return status & UART01x_FR_BUSY ? 0 : TIOCSER_TEMT;
}
static unsigned int pl010_get_mctrl(struct uart_port *port)
{
struct uart_amba_port *uap = (struct uart_amba_port *)port;
struct uart_amba_port *uap =
container_of(port, struct uart_amba_port, port);
unsigned int result = 0;
unsigned int status;
......@@ -283,7 +299,8 @@ static unsigned int pl010_get_mctrl(struct uart_port *port)
static void pl010_set_mctrl(struct uart_port *port, unsigned int mctrl)
{
struct uart_amba_port *uap = (struct uart_amba_port *)port;
struct uart_amba_port *uap =
container_of(port, struct uart_amba_port, port);
if (uap->data)
uap->data->set_mctrl(uap->dev, uap->port.membase, mctrl);
......@@ -291,7 +308,8 @@ static void pl010_set_mctrl(struct uart_port *port, unsigned int mctrl)
static void pl010_break_ctl(struct uart_port *port, int break_state)
{
struct uart_amba_port *uap = (struct uart_amba_port *)port;
struct uart_amba_port *uap =
container_of(port, struct uart_amba_port, port);
unsigned long flags;
unsigned int lcr_h;
......@@ -307,7 +325,8 @@ static void pl010_break_ctl(struct uart_port *port, int break_state)
static int pl010_startup(struct uart_port *port)
{
struct uart_amba_port *uap = (struct uart_amba_port *)port;
struct uart_amba_port *uap =
container_of(port, struct uart_amba_port, port);
int retval;
/*
......@@ -347,7 +366,8 @@ static int pl010_startup(struct uart_port *port)
static void pl010_shutdown(struct uart_port *port)
{
struct uart_amba_port *uap = (struct uart_amba_port *)port;
struct uart_amba_port *uap =
container_of(port, struct uart_amba_port, port);
/*
* Free the interrupt
......@@ -374,7 +394,8 @@ static void
pl010_set_termios(struct uart_port *port, struct ktermios *termios,
struct ktermios *old)
{
struct uart_amba_port *uap = (struct uart_amba_port *)port;
struct uart_amba_port *uap =
container_of(port, struct uart_amba_port, port);
unsigned int lcr_h, old_cr;
unsigned long flags;
unsigned int baud, quot;
......@@ -468,13 +489,21 @@ pl010_set_termios(struct uart_port *port, struct ktermios *termios,
spin_unlock_irqrestore(&uap->port.lock, flags);
}
static void pl010_set_ldisc(struct uart_port *port, int new)
static void pl010_set_ldisc(struct uart_port *port, struct ktermios *termios)
{
if (new == N_PPS) {
if (termios->c_line == N_PPS) {
port->flags |= UPF_HARDPPS_CD;
spin_lock_irq(&port->lock);
pl010_enable_ms(port);
} else
spin_unlock_irq(&port->lock);
} else {
port->flags &= ~UPF_HARDPPS_CD;
if (!UART_ENABLE_MS(port, termios->c_cflag)) {
spin_lock_irq(&port->lock);
pl010_disable_ms(port);
spin_unlock_irq(&port->lock);
}
}
}
static const char *pl010_type(struct uart_port *port)
......@@ -551,7 +580,8 @@ static struct uart_amba_port *amba_ports[UART_NR];
static void pl010_console_putchar(struct uart_port *port, int ch)
{
struct uart_amba_port *uap = (struct uart_amba_port *)port;
struct uart_amba_port *uap =
container_of(port, struct uart_amba_port, port);
unsigned int status;
do {
......
......@@ -246,6 +246,7 @@ static int pl011_sgbuf_init(struct dma_chan *chan, struct pl011_sgbuf *sg,
sg_set_page(&sg->sg, phys_to_page(dma_addr),
PL011_DMA_BUFFER_SIZE, offset_in_page(dma_addr));
sg_dma_address(&sg->sg) = dma_addr;
sg_dma_len(&sg->sg) = PL011_DMA_BUFFER_SIZE;
return 0;
}
......@@ -321,10 +322,26 @@ static void pl011_dma_probe_initcall(struct device *dev, struct uart_amba_port *
.src_maxburst = uap->fifosize >> 2,
.device_fc = false,
};
struct dma_slave_caps caps;
/*
* Some DMA controllers provide information on their capabilities.
* If the controller does, check for suitable residue processing
* otherwise assime all is well.
*/
if (0 == dma_get_slave_caps(chan, &caps)) {
if (caps.residue_granularity ==
DMA_RESIDUE_GRANULARITY_DESCRIPTOR) {
dma_release_channel(chan);
dev_info(uap->port.dev,
"RX DMA disabled - no residue processing\n");
return;
}
}
dmaengine_slave_config(chan, &rx_conf);
uap->dmarx.chan = chan;
uap->dmarx.auto_poll_rate = false;
if (plat && plat->dma_rx_poll_enable) {
/* Set poll rate if specified. */
if (plat->dma_rx_poll_rate) {
......@@ -345,9 +362,24 @@ static void pl011_dma_probe_initcall(struct device *dev, struct uart_amba_port *
plat->dma_rx_poll_timeout;
else
uap->dmarx.poll_timeout = 3000;
} else
uap->dmarx.auto_poll_rate = false;
} else if (!plat && dev->of_node) {
uap->dmarx.auto_poll_rate = of_property_read_bool(
dev->of_node, "auto-poll");
if (uap->dmarx.auto_poll_rate) {
u32 x;
if (0 == of_property_read_u32(dev->of_node,
"poll-rate-ms", &x))
uap->dmarx.poll_rate = x;
else
uap->dmarx.poll_rate = 100;
if (0 == of_property_read_u32(dev->of_node,
"poll-timeout-ms", &x))
uap->dmarx.poll_timeout = x;
else
uap->dmarx.poll_timeout = 3000;
}
}
dev_info(uap->port.dev, "DMA channel RX %s\n",
dma_chan_name(uap->dmarx.chan));
}
......@@ -501,7 +533,11 @@ static int pl011_dma_tx_refill(struct uart_amba_port *uap)
memcpy(&dmatx->buf[0], &xmit->buf[xmit->tail], count);
else {
size_t first = UART_XMIT_SIZE - xmit->tail;
size_t second = xmit->head;
size_t second;
if (first > count)
first = count;
second = count - first;
memcpy(&dmatx->buf[0], &xmit->buf[xmit->tail], first);
if (second)
......@@ -988,7 +1024,7 @@ static void pl011_dma_startup(struct uart_amba_port *uap)
if (!uap->dmatx.chan)
return;
uap->dmatx.buf = kmalloc(PL011_DMA_BUFFER_SIZE, GFP_KERNEL);
uap->dmatx.buf = kmalloc(PL011_DMA_BUFFER_SIZE, GFP_KERNEL | __GFP_DMA);
if (!uap->dmatx.buf) {
dev_err(uap->port.dev, "no memory for DMA TX buffer\n");
uap->port.fifosize = uap->fifosize;
......@@ -1689,6 +1725,8 @@ static void pl011_shutdown(struct uart_port *port)
plat->exit();
}
if (uap->port.ops->flush_buffer)
uap->port.ops->flush_buffer(port);
}
static void
......
......@@ -119,7 +119,8 @@ static inline void ar933x_uart_putc(struct ar933x_uart_port *up, int ch)
static unsigned int ar933x_uart_tx_empty(struct uart_port *port)
{
struct ar933x_uart_port *up = (struct ar933x_uart_port *) port;
struct ar933x_uart_port *up =
container_of(port, struct ar933x_uart_port, port);
unsigned long flags;
unsigned int rdata;
......@@ -141,21 +142,24 @@ static void ar933x_uart_set_mctrl(struct uart_port *port, unsigned int mctrl)
static void ar933x_uart_start_tx(struct uart_port *port)
{
struct ar933x_uart_port *up = (struct ar933x_uart_port *) port;
struct ar933x_uart_port *up =
container_of(port, struct ar933x_uart_port, port);
ar933x_uart_start_tx_interrupt(up);
}
static void ar933x_uart_stop_tx(struct uart_port *port)
{
struct ar933x_uart_port *up = (struct ar933x_uart_port *) port;
struct ar933x_uart_port *up =
container_of(port, struct ar933x_uart_port, port);
ar933x_uart_stop_tx_interrupt(up);
}
static void ar933x_uart_stop_rx(struct uart_port *port)
{
struct ar933x_uart_port *up = (struct ar933x_uart_port *) port;
struct ar933x_uart_port *up =
container_of(port, struct ar933x_uart_port, port);
up->ier &= ~AR933X_UART_INT_RX_VALID;
ar933x_uart_write(up, AR933X_UART_INT_EN_REG, up->ier);
......@@ -163,7 +167,8 @@ static void ar933x_uart_stop_rx(struct uart_port *port)
static void ar933x_uart_break_ctl(struct uart_port *port, int break_state)
{
struct ar933x_uart_port *up = (struct ar933x_uart_port *) port;
struct ar933x_uart_port *up =
container_of(port, struct ar933x_uart_port, port);
unsigned long flags;
spin_lock_irqsave(&up->port.lock, flags);
......@@ -231,7 +236,8 @@ static void ar933x_uart_set_termios(struct uart_port *port,
struct ktermios *new,
struct ktermios *old)
{
struct ar933x_uart_port *up = (struct ar933x_uart_port *) port;
struct ar933x_uart_port *up =
container_of(port, struct ar933x_uart_port, port);
unsigned int cs;
unsigned long flags;
unsigned int baud, scale, step;
......@@ -404,7 +410,8 @@ static irqreturn_t ar933x_uart_interrupt(int irq, void *dev_id)
static int ar933x_uart_startup(struct uart_port *port)
{
struct ar933x_uart_port *up = (struct ar933x_uart_port *) port;
struct ar933x_uart_port *up =
container_of(port, struct ar933x_uart_port, port);
unsigned long flags;
int ret;
......@@ -430,7 +437,8 @@ static int ar933x_uart_startup(struct uart_port *port)
static void ar933x_uart_shutdown(struct uart_port *port)
{
struct ar933x_uart_port *up = (struct ar933x_uart_port *) port;
struct ar933x_uart_port *up =
container_of(port, struct ar933x_uart_port, port);
/* Disable all interrupts */
up->ier = 0;
......@@ -468,7 +476,8 @@ static void ar933x_uart_config_port(struct uart_port *port, int flags)
static int ar933x_uart_verify_port(struct uart_port *port,
struct serial_struct *ser)
{
struct ar933x_uart_port *up = (struct ar933x_uart_port *) port;
struct ar933x_uart_port *up =
container_of(port, struct ar933x_uart_port, port);
if (ser->type != PORT_UNKNOWN &&
ser->type != PORT_AR933X)
......@@ -521,7 +530,8 @@ static void ar933x_uart_wait_xmitr(struct ar933x_uart_port *up)
static void ar933x_uart_console_putchar(struct uart_port *port, int ch)
{
struct ar933x_uart_port *up = (struct ar933x_uart_port *) port;
struct ar933x_uart_port *up =
container_of(port, struct ar933x_uart_port, port);
ar933x_uart_wait_xmitr(up);
ar933x_uart_putc(up, ch);
......
......@@ -167,7 +167,6 @@ struct atmel_uart_port {
struct circ_buf rx_ring;
struct serial_rs485 rs485; /* rs485 settings */
struct mctrl_gpios *gpios;
int gpio_irq[UART_GPIO_MAX];
unsigned int tx_done_mask;
......@@ -290,13 +289,11 @@ static unsigned int atmel_get_lines_status(struct uart_port *port)
}
/* Enable or disable the rs485 support */
void atmel_config_rs485(struct uart_port *port, struct serial_rs485 *rs485conf)
static int atmel_config_rs485(struct uart_port *port,
struct serial_rs485 *rs485conf)
{
struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
unsigned int mode;
unsigned long flags;
spin_lock_irqsave(&port->lock, flags);
/* Disable interrupts */
UART_PUT_IDR(port, atmel_port->tx_done_mask);
......@@ -306,7 +303,7 @@ void atmel_config_rs485(struct uart_port *port, struct serial_rs485 *rs485conf)
/* Resetting serial mode to RS232 (0x0) */
mode &= ~ATMEL_US_USMODE;
atmel_port->rs485 = *rs485conf;
port->rs485 = *rs485conf;
if (rs485conf->flags & SER_RS485_ENABLED) {
dev_dbg(port->dev, "Setting UART to RS485\n");
......@@ -327,8 +324,7 @@ void atmel_config_rs485(struct uart_port *port, struct serial_rs485 *rs485conf)
/* Enable interrupts */
UART_PUT_IER(port, atmel_port->tx_done_mask);
spin_unlock_irqrestore(&port->lock, flags);
return 0;
}
/*
......@@ -372,11 +368,10 @@ static void atmel_set_mctrl(struct uart_port *port, u_int mctrl)
/* Resetting serial mode to RS232 (0x0) */
mode &= ~ATMEL_US_USMODE;
if (atmel_port->rs485.flags & SER_RS485_ENABLED) {
if (port->rs485.flags & SER_RS485_ENABLED) {
dev_dbg(port->dev, "Setting UART to RS485\n");
if ((atmel_port->rs485.delay_rts_after_send) > 0)
UART_PUT_TTGR(port,
atmel_port->rs485.delay_rts_after_send);
if ((port->rs485.delay_rts_after_send) > 0)
UART_PUT_TTGR(port, port->rs485.delay_rts_after_send);
mode |= ATMEL_US_USMODE_RS485;
} else {
dev_dbg(port->dev, "Setting UART to RS232\n");
......@@ -423,8 +418,8 @@ static void atmel_stop_tx(struct uart_port *port)
/* Disable interrupts */
UART_PUT_IDR(port, atmel_port->tx_done_mask);
if ((atmel_port->rs485.flags & SER_RS485_ENABLED) &&
!(atmel_port->rs485.flags & SER_RS485_RX_DURING_TX))
if ((port->rs485.flags & SER_RS485_ENABLED) &&
!(port->rs485.flags & SER_RS485_RX_DURING_TX))
atmel_start_rx(port);
}
......@@ -441,8 +436,8 @@ static void atmel_start_tx(struct uart_port *port)
really need this.*/
return;
if ((atmel_port->rs485.flags & SER_RS485_ENABLED) &&
!(atmel_port->rs485.flags & SER_RS485_RX_DURING_TX))
if ((port->rs485.flags & SER_RS485_ENABLED) &&
!(port->rs485.flags & SER_RS485_RX_DURING_TX))
atmel_stop_rx(port);
/* re-enable PDC transmit */
......@@ -807,7 +802,7 @@ static void atmel_tx_dma(struct uart_port *port)
atmel_port->cookie_tx = dmaengine_submit(desc);
} else {
if (atmel_port->rs485.flags & SER_RS485_ENABLED) {
if (port->rs485.flags & SER_RS485_ENABLED) {
/* DMA done, stop TX, start RX for RS485 */
atmel_start_rx(port);
}
......@@ -862,9 +857,8 @@ static int atmel_prepare_tx_dma(struct uart_port *port)
config.dst_addr_width = DMA_SLAVE_BUSWIDTH_1_BYTE;
config.dst_addr = port->mapbase + ATMEL_US_THR;
ret = dmaengine_device_control(atmel_port->chan_tx,
DMA_SLAVE_CONFIG,
(unsigned long)&config);
ret = dmaengine_slave_config(atmel_port->chan_tx,
&config);
if (ret) {
dev_err(port->dev, "DMA tx slave configuration failed\n");
goto chan_err;
......@@ -880,32 +874,6 @@ static int atmel_prepare_tx_dma(struct uart_port *port)
return -EINVAL;
}
static void atmel_flip_buffer_rx_dma(struct uart_port *port,
char *buf, size_t count)
{
struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
struct tty_port *tport = &port->state->port;
dma_sync_sg_for_cpu(port->dev,
&atmel_port->sg_rx,
1,
DMA_DEV_TO_MEM);
tty_insert_flip_string(tport, buf, count);
dma_sync_sg_for_device(port->dev,
&atmel_port->sg_rx,
1,
DMA_DEV_TO_MEM);
/*
* Drop the lock here since it might end up calling
* uart_start(), which takes the lock.
*/
spin_unlock(&port->lock);
tty_flip_buffer_push(tport);
spin_lock(&port->lock);
}
static void atmel_complete_rx_dma(void *arg)
{
struct uart_port *port = arg;
......@@ -934,11 +902,12 @@ static void atmel_release_rx_dma(struct uart_port *port)
static void atmel_rx_from_dma(struct uart_port *port)
{
struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
struct tty_port *tport = &port->state->port;
struct circ_buf *ring = &atmel_port->rx_ring;
struct dma_chan *chan = atmel_port->chan_rx;
struct dma_tx_state state;
enum dma_status dmastat;
size_t pending, count;
size_t count;
/* Reset the UART timeout early so that we don't miss one */
......@@ -953,27 +922,68 @@ static void atmel_rx_from_dma(struct uart_port *port)
tasklet_schedule(&atmel_port->tasklet);
return;
}
/* current transfer size should no larger than dma buffer */
pending = sg_dma_len(&atmel_port->sg_rx) - state.residue;
BUG_ON(pending > sg_dma_len(&atmel_port->sg_rx));
/* CPU claims ownership of RX DMA buffer */
dma_sync_sg_for_cpu(port->dev,
&atmel_port->sg_rx,
1,
DMA_DEV_TO_MEM);
/*
* This will take the chars we have so far,
* ring->head will record the transfer size, only new bytes come
* will insert into the framework.
* ring->head points to the end of data already written by the DMA.
* ring->tail points to the beginning of data to be read by the
* framework.
* The current transfer size should not be larger than the dma buffer
* length.
*/
if (pending > ring->head) {
count = pending - ring->head;
ring->head = sg_dma_len(&atmel_port->sg_rx) - state.residue;
BUG_ON(ring->head > sg_dma_len(&atmel_port->sg_rx));
/*
* At this point ring->head may point to the first byte right after the
* last byte of the dma buffer:
* 0 <= ring->head <= sg_dma_len(&atmel_port->sg_rx)
*
* However ring->tail must always points inside the dma buffer:
* 0 <= ring->tail <= sg_dma_len(&atmel_port->sg_rx) - 1
*
* Since we use a ring buffer, we have to handle the case
* where head is lower than tail. In such a case, we first read from
* tail to the end of the buffer then reset tail.
*/
if (ring->head < ring->tail) {
count = sg_dma_len(&atmel_port->sg_rx) - ring->tail;
tty_insert_flip_string(tport, ring->buf + ring->tail, count);
ring->tail = 0;
port->icount.rx += count;
}
atmel_flip_buffer_rx_dma(port, ring->buf + ring->head, count);
/* Finally we read data from tail to head */
if (ring->tail < ring->head) {
count = ring->head - ring->tail;
ring->head += count;
if (ring->head == sg_dma_len(&atmel_port->sg_rx))
tty_insert_flip_string(tport, ring->buf + ring->tail, count);
/* Wrap ring->head if needed */
if (ring->head >= sg_dma_len(&atmel_port->sg_rx))
ring->head = 0;
ring->tail = ring->head;
port->icount.rx += count;
}
/* USART retreives ownership of RX DMA buffer */
dma_sync_sg_for_device(port->dev,
&atmel_port->sg_rx,
1,
DMA_DEV_TO_MEM);
/*
* Drop the lock here since it might end up calling
* uart_start(), which takes the lock.
*/
spin_unlock(&port->lock);
tty_flip_buffer_push(tport);
spin_lock(&port->lock);
UART_PUT_IER(port, ATMEL_US_TIMEOUT);
}
......@@ -1026,9 +1036,8 @@ static int atmel_prepare_rx_dma(struct uart_port *port)
config.src_addr_width = DMA_SLAVE_BUSWIDTH_1_BYTE;
config.src_addr = port->mapbase + ATMEL_US_RHR;
ret = dmaengine_device_control(atmel_port->chan_rx,
DMA_SLAVE_CONFIG,
(unsigned long)&config);
ret = dmaengine_slave_config(atmel_port->chan_rx,
&config);
if (ret) {
dev_err(port->dev, "DMA rx slave configuration failed\n");
goto chan_err;
......@@ -1240,8 +1249,8 @@ static void atmel_tx_pdc(struct uart_port *port)
/* Enable interrupts */
UART_PUT_IER(port, atmel_port->tx_done_mask);
} else {
if ((atmel_port->rs485.flags & SER_RS485_ENABLED) &&
!(atmel_port->rs485.flags & SER_RS485_RX_DURING_TX)) {
if ((port->rs485.flags & SER_RS485_ENABLED) &&
!(port->rs485.flags & SER_RS485_RX_DURING_TX)) {
/* DMA done, stop TX, start RX for RS485 */
atmel_start_rx(port);
}
......@@ -1552,7 +1561,7 @@ static int atmel_init_property(struct atmel_uart_port *atmel_port,
return 0;
}
static void atmel_init_rs485(struct atmel_uart_port *atmel_port,
static void atmel_init_rs485(struct uart_port *port,
struct platform_device *pdev)
{
struct device_node *np = pdev->dev.of_node;
......@@ -1563,7 +1572,7 @@ static void atmel_init_rs485(struct atmel_uart_port *atmel_port,
/* rs485 properties */
if (of_property_read_u32_array(np, "rs485-rts-delay",
rs485_delay, 2) == 0) {
struct serial_rs485 *rs485conf = &atmel_port->rs485;
struct serial_rs485 *rs485conf = &port->rs485;
rs485conf->delay_rts_before_send = rs485_delay[0];
rs485conf->delay_rts_after_send = rs485_delay[1];
......@@ -1577,7 +1586,7 @@ static void atmel_init_rs485(struct atmel_uart_port *atmel_port,
rs485conf->flags |= SER_RS485_ENABLED;
}
} else {
atmel_port->rs485 = pdata->rs485;
port->rs485 = pdata->rs485;
}
}
......@@ -1801,6 +1810,20 @@ static int atmel_startup(struct uart_port *port)
return retval;
}
/*
* Flush any TX data submitted for DMA. Called when the TX circular
* buffer is reset.
*/
static void atmel_flush_buffer(struct uart_port *port)
{
struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
if (atmel_use_pdc_tx(port)) {
UART_PUT_TCR(port, 0);
atmel_port->pdc_tx.ofs = 0;
}
}
/*
* Disable the port
*/
......@@ -1852,20 +1875,8 @@ static void atmel_shutdown(struct uart_port *port)
atmel_free_gpio_irq(port);
atmel_port->ms_irq_enabled = false;
}
/*
* Flush any TX data submitted for DMA. Called when the TX circular
* buffer is reset.
*/
static void atmel_flush_buffer(struct uart_port *port)
{
struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
if (atmel_use_pdc_tx(port)) {
UART_PUT_TCR(port, 0);
atmel_port->pdc_tx.ofs = 0;
}
atmel_flush_buffer(port);
}
/*
......@@ -1911,7 +1922,6 @@ static void atmel_set_termios(struct uart_port *port, struct ktermios *termios,
{
unsigned long flags;
unsigned int mode, imr, quot, baud;
struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
/* Get current mode register */
mode = UART_GET_MR(port) & ~(ATMEL_US_USCLKS | ATMEL_US_CHRL
......@@ -2013,10 +2023,9 @@ static void atmel_set_termios(struct uart_port *port, struct ktermios *termios,
/* Resetting serial mode to RS232 (0x0) */
mode &= ~ATMEL_US_USMODE;
if (atmel_port->rs485.flags & SER_RS485_ENABLED) {
if ((atmel_port->rs485.delay_rts_after_send) > 0)
UART_PUT_TTGR(port,
atmel_port->rs485.delay_rts_after_send);
if (port->rs485.flags & SER_RS485_ENABLED) {
if ((port->rs485.delay_rts_after_send) > 0)
UART_PUT_TTGR(port, port->rs485.delay_rts_after_send);
mode |= ATMEL_US_USMODE_RS485;
}
......@@ -2040,13 +2049,20 @@ static void atmel_set_termios(struct uart_port *port, struct ktermios *termios,
spin_unlock_irqrestore(&port->lock, flags);
}
static void atmel_set_ldisc(struct uart_port *port, int new)
static void atmel_set_ldisc(struct uart_port *port, struct ktermios *termios)
{
if (new == N_PPS) {
if (termios->c_line == N_PPS) {
port->flags |= UPF_HARDPPS_CD;
spin_lock_irq(&port->lock);
atmel_enable_ms(port);
spin_unlock_irq(&port->lock);
} else {
port->flags &= ~UPF_HARDPPS_CD;
if (!UART_ENABLE_MS(port, termios->c_cflag)) {
spin_lock_irq(&port->lock);
atmel_disable_ms(port);
spin_unlock_irq(&port->lock);
}
}
}
......@@ -2148,35 +2164,6 @@ static void atmel_poll_put_char(struct uart_port *port, unsigned char ch)
}
#endif
static int
atmel_ioctl(struct uart_port *port, unsigned int cmd, unsigned long arg)
{
struct serial_rs485 rs485conf;
switch (cmd) {
case TIOCSRS485:
if (copy_from_user(&rs485conf, (struct serial_rs485 *) arg,
sizeof(rs485conf)))
return -EFAULT;
atmel_config_rs485(port, &rs485conf);
break;
case TIOCGRS485:
if (copy_to_user((struct serial_rs485 *) arg,
&(to_atmel_uart_port(port)->rs485),
sizeof(rs485conf)))
return -EFAULT;
break;
default:
return -ENOIOCTLCMD;
}
return 0;
}
static struct uart_ops atmel_pops = {
.tx_empty = atmel_tx_empty,
.set_mctrl = atmel_set_mctrl,
......@@ -2197,7 +2184,6 @@ static struct uart_ops atmel_pops = {
.config_port = atmel_config_port,
.verify_port = atmel_verify_port,
.pm = atmel_serial_pm,
.ioctl = atmel_ioctl,
#ifdef CONFIG_CONSOLE_POLL
.poll_get_char = atmel_poll_get_char,
.poll_put_char = atmel_poll_put_char,
......@@ -2217,7 +2203,7 @@ static int atmel_init_port(struct atmel_uart_port *atmel_port,
if (!atmel_init_property(atmel_port, pdev))
atmel_set_ops(port);
atmel_init_rs485(atmel_port, pdev);
atmel_init_rs485(port, pdev);
port->iotype = UPIO_MEM;
port->flags = UPF_BOOT_AUTOCONF;
......@@ -2226,6 +2212,7 @@ static int atmel_init_port(struct atmel_uart_port *atmel_port,
port->dev = &pdev->dev;
port->mapbase = pdev->resource[0].start;
port->irq = pdev->resource[1].start;
port->rs485_config = atmel_config_rs485;
tasklet_init(&atmel_port->tasklet, atmel_tasklet_func,
(unsigned long)port);
......@@ -2260,7 +2247,7 @@ static int atmel_init_port(struct atmel_uart_port *atmel_port,
}
/* Use TXEMPTY for interrupt when rs485 else TXRDY or ENDTX|TXBUFE */
if (atmel_port->rs485.flags & SER_RS485_ENABLED)
if (port->rs485.flags & SER_RS485_ENABLED)
atmel_port->tx_done_mask = ATMEL_US_TXEMPTY;
else if (atmel_use_pdc_tx(port)) {
port->fifosize = PDC_BUFFER_SIZE;
......@@ -2541,6 +2528,7 @@ static int atmel_serial_probe(struct platform_device *pdev)
struct atmel_uart_data *pdata = dev_get_platdata(&pdev->dev);
void *data;
int ret = -ENODEV;
bool rs485_enabled;
BUILD_BUG_ON(ATMEL_SERIAL_RINGSIZE & (ATMEL_SERIAL_RINGSIZE - 1));
......@@ -2588,6 +2576,8 @@ static int atmel_serial_probe(struct platform_device *pdev)
port->rx_ring.buf = data;
}
rs485_enabled = port->uart.rs485.flags & SER_RS485_ENABLED;
ret = uart_add_one_port(&atmel_uart, &port->uart);
if (ret)
goto err_add_port;
......@@ -2606,7 +2596,7 @@ static int atmel_serial_probe(struct platform_device *pdev)
device_init_wakeup(&pdev->dev, 1);
platform_set_drvdata(pdev, port);
if (port->rs485.flags & SER_RS485_ENABLED) {
if (rs485_enabled) {
UART_PUT_MR(&port->uart, ATMEL_US_USMODE_NORMAL);
UART_PUT_CR(&port->uart, ATMEL_US_RTSEN);
}
......
......@@ -588,20 +588,7 @@ static void bcm_uart_set_termios(struct uart_port *port,
*/
static int bcm_uart_request_port(struct uart_port *port)
{
unsigned int size;
size = UART_REG_SIZE;
if (!request_mem_region(port->mapbase, size, "bcm63xx")) {
dev_err(port->dev, "Memory region busy\n");
return -EBUSY;
}
port->membase = ioremap(port->mapbase, size);
if (!port->membase) {
dev_err(port->dev, "Unable to map registers\n");
release_mem_region(port->mapbase, size);
return -EBUSY;
}
/* UARTs always present */
return 0;
}
......@@ -610,8 +597,7 @@ static int bcm_uart_request_port(struct uart_port *port)
*/
static void bcm_uart_release_port(struct uart_port *port)
{
release_mem_region(port->mapbase, UART_REG_SIZE);
iounmap(port->membase);
/* Nothing to release ... */
}
/*
......@@ -782,6 +768,26 @@ static int __init bcm63xx_console_init(void)
console_initcall(bcm63xx_console_init);
static void bcm_early_write(struct console *con, const char *s, unsigned n)
{
struct earlycon_device *dev = con->data;
uart_console_write(&dev->port, s, n, bcm_console_putchar);
wait_for_xmitr(&dev->port);
}
static int __init bcm_early_console_setup(struct earlycon_device *device,
const char *opt)
{
if (!device->port.membase)
return -ENODEV;
device->con->write = bcm_early_write;
return 0;
}
OF_EARLYCON_DECLARE(bcm63xx_uart, "brcm,bcm6345-uart", bcm_early_console_setup);
#define BCM63XX_CONSOLE (&bcm63xx_console)
#else
#define BCM63XX_CONSOLE NULL
......@@ -813,25 +819,30 @@ static int bcm_uart_probe(struct platform_device *pdev)
if (pdev->id < 0 || pdev->id >= BCM63XX_NR_UARTS)
return -EINVAL;
if (ports[pdev->id].membase)
port = &ports[pdev->id];
if (port->membase)
return -EBUSY;
memset(port, 0, sizeof(*port));
res_mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
if (!res_mem)
return -ENODEV;
port->mapbase = res_mem->start;
port->membase = devm_ioremap_resource(&pdev->dev, res_mem);
if (IS_ERR(port->membase))
return PTR_ERR(port->membase);
res_irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
if (!res_irq)
return -ENODEV;
clk = clk_get(&pdev->dev, "periph");
clk = pdev->dev.of_node ? of_clk_get(pdev->dev.of_node, 0) :
clk_get(&pdev->dev, "periph");
if (IS_ERR(clk))
return -ENODEV;
port = &ports[pdev->id];
memset(port, 0, sizeof(*port));
port->iotype = UPIO_MEM;
port->mapbase = res_mem->start;
port->irq = res_irq->start;
port->ops = &bcm_uart_ops;
port->flags = UPF_BOOT_AUTOCONF;
......@@ -905,5 +916,5 @@ module_init(bcm_uart_init);
module_exit(bcm_uart_exit);
MODULE_AUTHOR("Maxime Bizon <mbizon@freebox.fr>");
MODULE_DESCRIPTION("Broadcom 63<xx integrated uart driver");
MODULE_DESCRIPTION("Broadcom 63xx integrated uart driver");
MODULE_LICENSE("GPL");
......@@ -517,14 +517,15 @@ static void sport_set_termios(struct uart_port *port,
up->csize = 5;
break;
default:
pr_warning("requested word length not supported\n");
pr_warn("requested word length not supported\n");
break;
}
if (termios->c_cflag & CSTOPB) {
up->stopb = 1;
}
if (termios->c_cflag & PARENB) {
pr_warning("PAREN bits is not supported yet\n");
pr_warn("PAREN bit is not supported yet\n");
/* up->parib = 1; */
}
......
......@@ -944,12 +944,13 @@ bfin_serial_verify_port(struct uart_port *port, struct serial_struct *ser)
* Enable the IrDA function if tty->ldisc.num is N_IRDA.
* In other cases, disable IrDA function.
*/
static void bfin_serial_set_ldisc(struct uart_port *port, int ld)
static void bfin_serial_set_ldisc(struct uart_port *port,
struct ktermios *termios)
{
struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
unsigned int val;
switch (ld) {
switch (termios->c_line) {
case N_IRDA:
val = UART_GET_GCTL(uart);
val |= (UMOD_IRDA | RPOLC);
......
......@@ -225,13 +225,14 @@ static void uart_clps711x_break_ctl(struct uart_port *port, int break_state)
writel(ubrlcr, port->membase + UBRLCR_OFFSET);
}
static void uart_clps711x_set_ldisc(struct uart_port *port, int ld)
static void uart_clps711x_set_ldisc(struct uart_port *port,
struct ktermios *termios)
{
if (!port->line) {
struct clps711x_port *s = dev_get_drvdata(port->dev);
regmap_update_bits(s->syscon, SYSCON_OFFSET, SYSCON1_SIREN,
(ld == N_IRDA) ? SYSCON1_SIREN : 0);
(termios->c_line == N_IRDA) ? SYSCON1_SIREN : 0);
}
}
......
......@@ -80,7 +80,8 @@ static void cpm_uart_initbd(struct uart_cpm_port *pinfo);
*/
static unsigned int cpm_uart_tx_empty(struct uart_port *port)
{
struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port;
struct uart_cpm_port *pinfo =
container_of(port, struct uart_cpm_port, port);
cbd_t __iomem *bdp = pinfo->tx_bd_base;
int ret = 0;
......@@ -102,7 +103,8 @@ static unsigned int cpm_uart_tx_empty(struct uart_port *port)
static void cpm_uart_set_mctrl(struct uart_port *port, unsigned int mctrl)
{
struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port;
struct uart_cpm_port *pinfo =
container_of(port, struct uart_cpm_port, port);
if (pinfo->gpios[GPIO_RTS] >= 0)
gpio_set_value(pinfo->gpios[GPIO_RTS], !(mctrl & TIOCM_RTS));
......@@ -113,7 +115,8 @@ static void cpm_uart_set_mctrl(struct uart_port *port, unsigned int mctrl)
static unsigned int cpm_uart_get_mctrl(struct uart_port *port)
{
struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port;
struct uart_cpm_port *pinfo =
container_of(port, struct uart_cpm_port, port);
unsigned int mctrl = TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
if (pinfo->gpios[GPIO_CTS] >= 0) {
......@@ -144,7 +147,8 @@ static unsigned int cpm_uart_get_mctrl(struct uart_port *port)
*/
static void cpm_uart_stop_tx(struct uart_port *port)
{
struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port;
struct uart_cpm_port *pinfo =
container_of(port, struct uart_cpm_port, port);
smc_t __iomem *smcp = pinfo->smcp;
scc_t __iomem *sccp = pinfo->sccp;
......@@ -161,7 +165,8 @@ static void cpm_uart_stop_tx(struct uart_port *port)
*/
static void cpm_uart_start_tx(struct uart_port *port)
{
struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port;
struct uart_cpm_port *pinfo =
container_of(port, struct uart_cpm_port, port);
smc_t __iomem *smcp = pinfo->smcp;
scc_t __iomem *sccp = pinfo->sccp;
......@@ -189,7 +194,8 @@ static void cpm_uart_start_tx(struct uart_port *port)
*/
static void cpm_uart_stop_rx(struct uart_port *port)
{
struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port;
struct uart_cpm_port *pinfo =
container_of(port, struct uart_cpm_port, port);
smc_t __iomem *smcp = pinfo->smcp;
scc_t __iomem *sccp = pinfo->sccp;
......@@ -206,7 +212,8 @@ static void cpm_uart_stop_rx(struct uart_port *port)
*/
static void cpm_uart_break_ctl(struct uart_port *port, int break_state)
{
struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port;
struct uart_cpm_port *pinfo =
container_of(port, struct uart_cpm_port, port);
pr_debug("CPM uart[%d]:break ctrl, break_state: %d\n", port->line,
break_state);
......@@ -240,7 +247,8 @@ static void cpm_uart_int_rx(struct uart_port *port)
unsigned char ch;
u8 *cp;
struct tty_port *tport = &port->state->port;
struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port;
struct uart_cpm_port *pinfo =
container_of(port, struct uart_cpm_port, port);
cbd_t __iomem *bdp;
u16 status;
unsigned int flg;
......@@ -397,7 +405,8 @@ static irqreturn_t cpm_uart_int(int irq, void *data)
static int cpm_uart_startup(struct uart_port *port)
{
int retval;
struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port;
struct uart_cpm_port *pinfo =
container_of(port, struct uart_cpm_port, port);
pr_debug("CPM uart[%d]:startup\n", port->line);
......@@ -442,7 +451,8 @@ inline void cpm_uart_wait_until_send(struct uart_cpm_port *pinfo)
*/
static void cpm_uart_shutdown(struct uart_port *port)
{
struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port;
struct uart_cpm_port *pinfo =
container_of(port, struct uart_cpm_port, port);
pr_debug("CPM uart[%d]:shutdown\n", port->line);
......@@ -492,7 +502,8 @@ static void cpm_uart_set_termios(struct uart_port *port,
unsigned long flags;
u16 cval, scval, prev_mode;
int bits, sbits;
struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port;
struct uart_cpm_port *pinfo =
container_of(port, struct uart_cpm_port, port);
smc_t __iomem *smcp = pinfo->smcp;
scc_t __iomem *sccp = pinfo->sccp;
int maxidl;
......@@ -675,7 +686,8 @@ static int cpm_uart_tx_pump(struct uart_port *port)
cbd_t __iomem *bdp;
u8 *p;
int count;
struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port;
struct uart_cpm_port *pinfo =
container_of(port, struct uart_cpm_port, port);
struct circ_buf *xmit = &port->state->xmit;
/* Handle xon/xoff */
......@@ -906,7 +918,8 @@ static void cpm_uart_init_smc(struct uart_cpm_port *pinfo)
*/
static int cpm_uart_request_port(struct uart_port *port)
{
struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port;
struct uart_cpm_port *pinfo =
container_of(port, struct uart_cpm_port, port);
int ret;
pr_debug("CPM uart[%d]:request port\n", port->line);
......@@ -938,7 +951,8 @@ static int cpm_uart_request_port(struct uart_port *port)
static void cpm_uart_release_port(struct uart_port *port)
{
struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port;
struct uart_cpm_port *pinfo =
container_of(port, struct uart_cpm_port, port);
if (!(pinfo->flags & FLAG_CONSOLE))
cpm_uart_freebuf(pinfo);
......@@ -1082,7 +1096,8 @@ static int poll_wait_key(char *obuf, struct uart_cpm_port *pinfo)
static int cpm_get_poll_char(struct uart_port *port)
{
struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port;
struct uart_cpm_port *pinfo =
container_of(port, struct uart_cpm_port, port);
if (!serial_polled) {
serial_polled = 1;
......@@ -1099,7 +1114,8 @@ static int cpm_get_poll_char(struct uart_port *port)
static void cpm_put_poll_char(struct uart_port *port,
unsigned char c)
{
struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port;
struct uart_cpm_port *pinfo =
container_of(port, struct uart_cpm_port, port);
static char ch[2];
ch[0] = (char)c;
......
......@@ -3675,12 +3675,6 @@ rs_close(struct tty_struct *tty, struct file * filp)
return;
}
info->port.flags |= ASYNC_CLOSING;
/*
* Save the termios structure, since this port may have
* separate termios for callout and dialin.
*/
if (info->port.flags & ASYNC_NORMAL_ACTIVE)
info->normal_termios = tty->termios;
/*
* Now we wait for the transmit buffer to clear; and we notify
* the line discipline to only process XON/XOFF characters.
......@@ -4076,11 +4070,6 @@ rs_open(struct tty_struct *tty, struct file * filp)
return retval;
}
if ((info->port.count == 1) && (info->port.flags & ASYNC_SPLIT_TERMIOS)) {
tty->termios = info->normal_termios;
change_speed(info);
}
#ifdef SERIAL_DEBUG_OPEN
printk("rs_open ttyS%d successful...\n", info->line);
#endif
......@@ -4327,7 +4316,6 @@ static int __init rs_init(void)
info->custom_divisor = 0;
info->x_char = 0;
info->event = 0;
info->normal_termios = driver->init_termios;
info->xmit.buf = NULL;
info->xmit.tail = info->xmit.head = 0;
info->first_recv_buffer = info->last_recv_buffer = NULL;
......
......@@ -98,7 +98,6 @@ struct e100_serial {
struct work_struct work;
struct async_icount icount; /* error-statistics etc.*/
struct ktermios normal_termios;
unsigned long char_time_usec; /* The time for 1 char, in usecs */
unsigned long flush_time_usec; /* How often we should flush */
......
......@@ -98,7 +98,7 @@ static int __init parse_options(struct earlycon_device *device,
strlcpy(device->options, options, length);
}
if (mmio || mmio32)
if (port->iotype == UPIO_MEM || port->iotype == UPIO_MEM32)
pr_info("Early serial console at MMIO%s 0x%llx (options '%s')\n",
mmio32 ? "32" : "",
(unsigned long long)port->mapbase,
......
......@@ -1786,15 +1786,13 @@ static int lpuart_probe(struct platform_device *pdev)
}
sport->port.line = ret;
sport->lpuart32 = of_device_is_compatible(np, "fsl,ls1021a-lpuart");
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
if (!res)
return -ENODEV;
sport->port.mapbase = res->start;
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
sport->port.membase = devm_ioremap_resource(&pdev->dev, res);
if (IS_ERR(sport->port.membase))
return PTR_ERR(sport->port.membase);
sport->port.mapbase = res->start;
sport->port.dev = &pdev->dev;
sport->port.type = PORT_LPUART;
sport->port.iotype = UPIO_MEM;
......@@ -1862,6 +1860,20 @@ static int lpuart_suspend(struct device *dev)
static int lpuart_resume(struct device *dev)
{
struct lpuart_port *sport = dev_get_drvdata(dev);
unsigned long temp;
if (sport->lpuart32) {
lpuart32_setup_watermark(sport);
temp = lpuart32_read(sport->port.membase + UARTCTRL);
temp |= (UARTCTRL_RIE | UARTCTRL_TIE | UARTCTRL_RE |
UARTCTRL_TE | UARTCTRL_ILIE);
lpuart32_write(temp, sport->port.membase + UARTCTRL);
} else {
lpuart_setup_watermark(sport);
temp = readb(sport->port.membase + UARTCR2);
temp |= (UARTCR2_RIE | UARTCR2_TIE | UARTCR2_RE | UARTCR2_TE);
writeb(temp, sport->port.membase + UARTCR2);
}
uart_resume_port(&lpuart_reg, &sport->port);
......@@ -1884,11 +1896,8 @@ static struct platform_driver lpuart_driver = {
static int __init lpuart_serial_init(void)
{
int ret;
pr_info("serial: Freescale lpuart driver\n");
int ret = uart_register_driver(&lpuart_reg);
ret = uart_register_driver(&lpuart_reg);
if (ret)
return ret;
......
......@@ -1550,8 +1550,10 @@ static int icom_probe(struct pci_dev *dev,
icom_adapter->base_addr = pci_ioremap_bar(dev, 0);
if (!icom_adapter->base_addr)
if (!icom_adapter->base_addr) {
retval = -ENOMEM;
goto probe_exit1;
}
/* save off irq and request irq line */
if ( (retval = request_irq(dev->irq, icom_interrupt,
......
......@@ -302,7 +302,7 @@ static inline int is_imx6q_uart(struct imx_port *sport)
/*
* Save and restore functions for UCR1, UCR2 and UCR3 registers
*/
#if defined(CONFIG_CONSOLE_POLL) || defined(CONFIG_SERIAL_IMX_CONSOLE)
#if defined(CONFIG_SERIAL_IMX_CONSOLE)
static void imx_port_ucrs_save(struct uart_port *port,
struct imx_port_ucrs *ucr)
{
......@@ -991,7 +991,6 @@ static int imx_uart_dma_init(struct imx_port *sport)
sport->rx_buf = kzalloc(PAGE_SIZE, GFP_KERNEL);
if (!sport->rx_buf) {
dev_err(dev, "cannot alloc DMA buffer.\n");
ret = -ENOMEM;
goto err;
}
......@@ -1076,11 +1075,11 @@ static int imx_startup(struct uart_port *port)
retval = clk_prepare_enable(sport->clk_per);
if (retval)
goto error_out1;
return retval;
retval = clk_prepare_enable(sport->clk_ipg);
if (retval) {
clk_disable_unprepare(sport->clk_per);
goto error_out1;
return retval;
}
imx_setup_ufcr(sport, 0);
......@@ -1109,37 +1108,6 @@ static int imx_startup(struct uart_port *port)
while (!(readl(sport->port.membase + UCR2) & UCR2_SRST) && (--i > 0))
udelay(1);
/*
* Allocate the IRQ(s) i.MX1 has three interrupts whereas later
* chips only have one interrupt.
*/
if (sport->txirq > 0) {
retval = request_irq(sport->rxirq, imx_rxint, 0,
dev_name(port->dev), sport);
if (retval)
goto error_out1;
retval = request_irq(sport->txirq, imx_txint, 0,
dev_name(port->dev), sport);
if (retval)
goto error_out2;
/* do not use RTS IRQ on IrDA */
if (!USE_IRDA(sport)) {
retval = request_irq(sport->rtsirq, imx_rtsint, 0,
dev_name(port->dev), sport);
if (retval)
goto error_out3;
}
} else {
retval = request_irq(sport->port.irq, imx_int, 0,
dev_name(port->dev), sport);
if (retval) {
free_irq(sport->port.irq, sport);
goto error_out1;
}
}
spin_lock_irqsave(&sport->port.lock, flags);
/*
* Finally, clear and enable interrupts
......@@ -1201,15 +1169,6 @@ static int imx_startup(struct uart_port *port)
}
return 0;
error_out3:
if (sport->txirq)
free_irq(sport->txirq, sport);
error_out2:
if (sport->rxirq)
free_irq(sport->rxirq, sport);
error_out1:
return retval;
}
static void imx_shutdown(struct uart_port *port)
......@@ -1254,17 +1213,6 @@ static void imx_shutdown(struct uart_port *port)
*/
del_timer_sync(&sport->timer);
/*
* Free the interrupts
*/
if (sport->txirq > 0) {
if (!USE_IRDA(sport))
free_irq(sport->rtsirq, sport);
free_irq(sport->txirq, sport);
free_irq(sport->rxirq, sport);
} else
free_irq(sport->port.irq, sport);
/*
* Disable all interrupts, port and break condition.
*/
......@@ -1507,44 +1455,65 @@ imx_verify_port(struct uart_port *port, struct serial_struct *ser)
}
#if defined(CONFIG_CONSOLE_POLL)
static int imx_poll_init(struct uart_port *port)
{
struct imx_port *sport = (struct imx_port *)port;
unsigned long flags;
unsigned long temp;
int retval;
retval = clk_prepare_enable(sport->clk_ipg);
if (retval)
return retval;
retval = clk_prepare_enable(sport->clk_per);
if (retval)
clk_disable_unprepare(sport->clk_ipg);
imx_setup_ufcr(sport, 0);
spin_lock_irqsave(&sport->port.lock, flags);
temp = readl(sport->port.membase + UCR1);
if (is_imx1_uart(sport))
temp |= IMX1_UCR1_UARTCLKEN;
temp |= UCR1_UARTEN | UCR1_RRDYEN;
temp &= ~(UCR1_TXMPTYEN | UCR1_RTSDEN);
writel(temp, sport->port.membase + UCR1);
temp = readl(sport->port.membase + UCR2);
temp |= UCR2_RXEN;
writel(temp, sport->port.membase + UCR2);
spin_unlock_irqrestore(&sport->port.lock, flags);
return 0;
}
static int imx_poll_get_char(struct uart_port *port)
{
if (!(readl(port->membase + USR2) & USR2_RDR))
if (!(readl_relaxed(port->membase + USR2) & USR2_RDR))
return NO_POLL_CHAR;
return readl(port->membase + URXD0) & URXD_RX_DATA;
return readl_relaxed(port->membase + URXD0) & URXD_RX_DATA;
}
static void imx_poll_put_char(struct uart_port *port, unsigned char c)
{
struct imx_port_ucrs old_ucr;
unsigned int status;
/* save control registers */
imx_port_ucrs_save(port, &old_ucr);
/* disable interrupts */
writel(UCR1_UARTEN, port->membase + UCR1);
writel(old_ucr.ucr2 & ~(UCR2_ATEN | UCR2_RTSEN | UCR2_ESCI),
port->membase + UCR2);
writel(old_ucr.ucr3 & ~(UCR3_DCD | UCR3_RI | UCR3_DTREN),
port->membase + UCR3);
/* drain */
do {
status = readl(port->membase + USR1);
status = readl_relaxed(port->membase + USR1);
} while (~status & USR1_TRDY);
/* write */
writel(c, port->membase + URTX0);
writel_relaxed(c, port->membase + URTX0);
/* flush */
do {
status = readl(port->membase + USR2);
status = readl_relaxed(port->membase + USR2);
} while (~status & USR2_TXDC);
/* restore control registers */
imx_port_ucrs_restore(port, &old_ucr);
}
#endif
......@@ -1565,6 +1534,7 @@ static struct uart_ops imx_pops = {
.config_port = imx_config_port,
.verify_port = imx_verify_port,
#if defined(CONFIG_CONSOLE_POLL)
.poll_init = imx_poll_init,
.poll_get_char = imx_poll_get_char,
.poll_put_char = imx_poll_put_char,
#endif
......@@ -1929,6 +1899,36 @@ static int serial_imx_probe(struct platform_device *pdev)
sport->port.uartclk = clk_get_rate(sport->clk_per);
/*
* Allocate the IRQ(s) i.MX1 has three interrupts whereas later
* chips only have one interrupt.
*/
if (sport->txirq > 0) {
ret = devm_request_irq(&pdev->dev, sport->rxirq, imx_rxint, 0,
dev_name(&pdev->dev), sport);
if (ret)
return ret;
ret = devm_request_irq(&pdev->dev, sport->txirq, imx_txint, 0,
dev_name(&pdev->dev), sport);
if (ret)
return ret;
/* do not use RTS IRQ on IrDA */
if (!USE_IRDA(sport)) {
ret = devm_request_irq(&pdev->dev, sport->rtsirq,
imx_rtsint, 0,
dev_name(&pdev->dev), sport);
if (ret)
return ret;
}
} else {
ret = devm_request_irq(&pdev->dev, sport->port.irq, imx_int, 0,
dev_name(&pdev->dev), sport);
if (ret)
return ret;
}
imx_ports[sport->port.line] = sport;
platform_set_drvdata(pdev, sport);
......@@ -1959,11 +1959,8 @@ static struct platform_driver serial_imx_driver = {
static int __init imx_serial_init(void)
{
int ret;
pr_info("Serial: IMX driver\n");
int ret = uart_register_driver(&imx_reg);
ret = uart_register_driver(&imx_reg);
if (ret)
return ret;
......
......@@ -544,7 +544,8 @@ static unsigned int ip22zilog_get_mctrl(struct uart_port *port)
/* The port lock is held and interrupts are disabled. */
static void ip22zilog_set_mctrl(struct uart_port *port, unsigned int mctrl)
{
struct uart_ip22zilog_port *up = (struct uart_ip22zilog_port *) port;
struct uart_ip22zilog_port *up =
container_of(port, struct uart_ip22zilog_port, port);
struct zilog_channel *channel = ZILOG_CHANNEL_FROM_PORT(port);
unsigned char set_bits, clear_bits;
......@@ -568,7 +569,8 @@ static void ip22zilog_set_mctrl(struct uart_port *port, unsigned int mctrl)
/* The port lock is held and interrupts are disabled. */
static void ip22zilog_stop_tx(struct uart_port *port)
{
struct uart_ip22zilog_port *up = (struct uart_ip22zilog_port *) port;
struct uart_ip22zilog_port *up =
container_of(port, struct uart_ip22zilog_port, port);
up->flags |= IP22ZILOG_FLAG_TX_STOPPED;
}
......@@ -576,7 +578,8 @@ static void ip22zilog_stop_tx(struct uart_port *port)
/* The port lock is held and interrupts are disabled. */
static void ip22zilog_start_tx(struct uart_port *port)
{
struct uart_ip22zilog_port *up = (struct uart_ip22zilog_port *) port;
struct uart_ip22zilog_port *up =
container_of(port, struct uart_ip22zilog_port, port);
struct zilog_channel *channel = ZILOG_CHANNEL_FROM_PORT(port);
unsigned char status;
......@@ -636,7 +639,8 @@ static void ip22zilog_stop_rx(struct uart_port *port)
/* The port lock is held. */
static void ip22zilog_enable_ms(struct uart_port *port)
{
struct uart_ip22zilog_port *up = (struct uart_ip22zilog_port *) port;
struct uart_ip22zilog_port *up =
container_of(port, struct uart_ip22zilog_port, port);
struct zilog_channel *channel = ZILOG_CHANNEL_FROM_PORT(port);
unsigned char new_reg;
......@@ -652,7 +656,8 @@ static void ip22zilog_enable_ms(struct uart_port *port)
/* The port lock is not held. */
static void ip22zilog_break_ctl(struct uart_port *port, int break_state)
{
struct uart_ip22zilog_port *up = (struct uart_ip22zilog_port *) port;
struct uart_ip22zilog_port *up =
container_of(port, struct uart_ip22zilog_port, port);
struct zilog_channel *channel = ZILOG_CHANNEL_FROM_PORT(port);
unsigned char set_bits, clear_bits, new_reg;
unsigned long flags;
......@@ -873,7 +878,8 @@ static void
ip22zilog_set_termios(struct uart_port *port, struct ktermios *termios,
struct ktermios *old)
{
struct uart_ip22zilog_port *up = (struct uart_ip22zilog_port *) port;
struct uart_ip22zilog_port *up =
container_of(port, struct uart_ip22zilog_port, port);
unsigned long flags;
int baud, brg;
......
......@@ -4,5 +4,5 @@
obj-$(CONFIG_SERIAL_JSM) += jsm.o
jsm-objs := jsm_driver.o jsm_neo.o jsm_tty.o
jsm-objs := jsm_driver.o jsm_neo.o jsm_tty.o jsm_cls.o
......@@ -13,11 +13,6 @@
* implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
* PURPOSE. See the GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 * Temple Place - Suite 330, Boston,
* MA 02111-1307, USA.
*
* Contact Information:
* Scott H Kilau <Scott_Kilau@digi.com>
* Wendy Xiong <wendyx@us.ibm.com>
......@@ -68,6 +63,10 @@ do { \
#define MAX_STOPS_SENT 5
/* Board ids */
#define PCI_DEVICE_ID_CLASSIC_4 0x0028
#define PCI_DEVICE_ID_CLASSIC_8 0x0029
#define PCI_DEVICE_ID_CLASSIC_4_422 0x00D0
#define PCI_DEVICE_ID_CLASSIC_8_422 0x00D1
#define PCI_DEVICE_ID_NEO_4 0x00B0
#define PCI_DEVICE_ID_NEO_1_422 0x00CC
#define PCI_DEVICE_ID_NEO_1_422_485 0x00CD
......@@ -112,21 +111,21 @@ struct jsm_channel;
************************************************************************/
struct board_ops {
irq_handler_t intr;
void (*uart_init) (struct jsm_channel *ch);
void (*uart_off) (struct jsm_channel *ch);
void (*param) (struct jsm_channel *ch);
void (*assert_modem_signals) (struct jsm_channel *ch);
void (*flush_uart_write) (struct jsm_channel *ch);
void (*flush_uart_read) (struct jsm_channel *ch);
void (*disable_receiver) (struct jsm_channel *ch);
void (*enable_receiver) (struct jsm_channel *ch);
void (*send_break) (struct jsm_channel *ch);
void (*clear_break) (struct jsm_channel *ch, int);
void (*send_start_character) (struct jsm_channel *ch);
void (*send_stop_character) (struct jsm_channel *ch);
void (*copy_data_from_queue_to_uart) (struct jsm_channel *ch);
u32 (*get_uart_bytes_left) (struct jsm_channel *ch);
void (*send_immediate_char) (struct jsm_channel *ch, unsigned char);
void (*uart_init)(struct jsm_channel *ch);
void (*uart_off)(struct jsm_channel *ch);
void (*param)(struct jsm_channel *ch);
void (*assert_modem_signals)(struct jsm_channel *ch);
void (*flush_uart_write)(struct jsm_channel *ch);
void (*flush_uart_read)(struct jsm_channel *ch);
void (*disable_receiver)(struct jsm_channel *ch);
void (*enable_receiver)(struct jsm_channel *ch);
void (*send_break)(struct jsm_channel *ch);
void (*clear_break)(struct jsm_channel *ch);
void (*send_start_character)(struct jsm_channel *ch);
void (*send_stop_character)(struct jsm_channel *ch);
void (*copy_data_from_queue_to_uart)(struct jsm_channel *ch);
u32 (*get_uart_bytes_left)(struct jsm_channel *ch);
void (*send_immediate_char)(struct jsm_channel *ch, unsigned char);
};
......@@ -189,7 +188,7 @@ struct jsm_board
#define CH_LOOPBACK 0x2000 /* Channel is in lookback mode */
#define CH_BAUD0 0x08000 /* Used for checking B0 transitions */
/* Our Read/Error/Write queue sizes */
/* Our Read/Error queue sizes */
#define RQUEUEMASK 0x1FFF /* 8 K - 1 */
#define EQUEUEMASK 0x1FFF /* 8 K - 1 */
#define RQUEUESIZE (RQUEUEMASK + 1)
......@@ -222,7 +221,10 @@ struct jsm_channel {
u8 ch_mostat; /* FEP output modem status */
u8 ch_mistat; /* FEP input modem status */
struct neo_uart_struct __iomem *ch_neo_uart; /* Pointer to the "mapped" UART struct */
/* Pointers to the "mapped" UART structs */
struct neo_uart_struct __iomem *ch_neo_uart; /* NEO card */
struct cls_uart_struct __iomem *ch_cls_uart; /* Classic card */
u8 ch_cached_lsr; /* Cached value of the LSR register */
u8 *ch_rqueue; /* Our read queue buffer - malloc'ed */
......@@ -254,6 +256,60 @@ struct jsm_channel {
u64 ch_xoff_sends; /* Count of xoffs transmitted */
};
/************************************************************************
* Per channel/port Classic UART structures *
************************************************************************
* Base Structure Entries Usage Meanings to Host *
* *
* W = read write R = read only *
* U = Unused. *
************************************************************************/
struct cls_uart_struct {
u8 txrx; /* WR RHR/THR - Holding Reg */
u8 ier; /* WR IER - Interrupt Enable Reg */
u8 isr_fcr; /* WR ISR/FCR - Interrupt Status Reg/Fifo Control Reg*/
u8 lcr; /* WR LCR - Line Control Reg */
u8 mcr; /* WR MCR - Modem Control Reg */
u8 lsr; /* WR LSR - Line Status Reg */
u8 msr; /* WR MSR - Modem Status Reg */
u8 spr; /* WR SPR - Scratch Pad Reg */
};
/* Where to read the interrupt register (8bits) */
#define UART_CLASSIC_POLL_ADDR_OFFSET 0x40
#define UART_EXAR654_ENHANCED_REGISTER_SET 0xBF
#define UART_16654_FCR_TXTRIGGER_8 0x0
#define UART_16654_FCR_TXTRIGGER_16 0x10
#define UART_16654_FCR_TXTRIGGER_32 0x20
#define UART_16654_FCR_TXTRIGGER_56 0x30
#define UART_16654_FCR_RXTRIGGER_8 0x0
#define UART_16654_FCR_RXTRIGGER_16 0x40
#define UART_16654_FCR_RXTRIGGER_56 0x80
#define UART_16654_FCR_RXTRIGGER_60 0xC0
#define UART_IIR_CTSRTS 0x20 /* Received CTS/RTS change of state */
#define UART_IIR_RDI_TIMEOUT 0x0C /* Receiver data TIMEOUT */
/*
* These are the EXTENDED definitions for the Exar 654's Interrupt
* Enable Register.
*/
#define UART_EXAR654_EFR_ECB 0x10 /* Enhanced control bit */
#define UART_EXAR654_EFR_IXON 0x2 /* Receiver compares Xon1/Xoff1 */
#define UART_EXAR654_EFR_IXOFF 0x8 /* Transmit Xon1/Xoff1 */
#define UART_EXAR654_EFR_RTSDTR 0x40 /* Auto RTS/DTR Flow Control Enable */
#define UART_EXAR654_EFR_CTSDSR 0x80 /* Auto CTS/DSR Flow COntrol Enable */
#define UART_EXAR654_XOFF_DETECT 0x1 /* Indicates whether chip saw an incoming XOFF char */
#define UART_EXAR654_XON_DETECT 0x2 /* Indicates whether chip saw an incoming XON char */
#define UART_EXAR654_IER_XOFF 0x20 /* Xoff Interrupt Enable */
#define UART_EXAR654_IER_RTSDTR 0x40 /* Output Interrupt Enable */
#define UART_EXAR654_IER_CTSDSR 0x80 /* Input Interrupt Enable */
/************************************************************************
* Per channel/port NEO UART structure *
......@@ -374,6 +430,7 @@ struct neo_uart_struct {
*/
extern struct uart_driver jsm_uart_driver;
extern struct board_ops jsm_neo_ops;
extern struct board_ops jsm_cls_ops;
extern int jsm_debug;
/*************************************************************************
......
此差异已折叠。
......@@ -13,11 +13,6 @@
* implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
* PURPOSE. See the GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 * Temple Place - Suite 330, Boston,
* MA 02111-1307, USA.
*
* Contact Information:
* Scott H Kilau <Scott_Kilau@digi.com>
* Wendy Xiong <wendyx@us.ibm.com>
......@@ -31,8 +26,7 @@
#include "jsm.h"
MODULE_AUTHOR("Digi International, http://www.digi.com");
MODULE_DESCRIPTION("Driver for the Digi International "
"Neo PCI based product line");
MODULE_DESCRIPTION("Driver for the Digi International Neo and Classic PCI based product line");
MODULE_LICENSE("GPL");
MODULE_SUPPORTED_DEVICE("jsm");
......@@ -50,7 +44,7 @@ struct uart_driver jsm_uart_driver = {
};
static pci_ers_result_t jsm_io_error_detected(struct pci_dev *pdev,
pci_channel_state_t state);
pci_channel_state_t state);
static pci_ers_result_t jsm_io_slot_reset(struct pci_dev *pdev);
static void jsm_io_resume(struct pci_dev *pdev);
......@@ -68,7 +62,7 @@ static int jsm_probe_one(struct pci_dev *pdev, const struct pci_device_id *ent)
{
int rc = 0;
struct jsm_board *brd;
static int adapter_count = 0;
static int adapter_count;
rc = pci_enable_device(pdev);
if (rc) {
......@@ -82,10 +76,8 @@ static int jsm_probe_one(struct pci_dev *pdev, const struct pci_device_id *ent)
goto out_disable_device;
}
brd = kzalloc(sizeof(struct jsm_board), GFP_KERNEL);
brd = kzalloc(sizeof(*brd), GFP_KERNEL);
if (!brd) {
dev_err(&pdev->dev,
"memory allocation for board structure failed\n");
rc = -ENOMEM;
goto out_release_regions;
}
......@@ -95,7 +87,6 @@ static int jsm_probe_one(struct pci_dev *pdev, const struct pci_device_id *ent)
brd->pci_dev = pdev;
switch (pdev->device) {
case PCI_DEVICE_ID_NEO_2DB9:
case PCI_DEVICE_ID_NEO_2DB9PRI:
case PCI_DEVICE_ID_NEO_2RJ45:
......@@ -104,6 +95,8 @@ static int jsm_probe_one(struct pci_dev *pdev, const struct pci_device_id *ent)
brd->maxports = 2;
break;
case PCI_DEVICE_ID_CLASSIC_4:
case PCI_DEVICE_ID_CLASSIC_4_422:
case PCI_DEVICE_ID_NEO_4:
case PCIE_DEVICE_ID_NEO_4:
case PCIE_DEVICE_ID_NEO_4RJ45:
......@@ -111,6 +104,8 @@ static int jsm_probe_one(struct pci_dev *pdev, const struct pci_device_id *ent)
brd->maxports = 4;
break;
case PCI_DEVICE_ID_CLASSIC_8:
case PCI_DEVICE_ID_CLASSIC_8_422:
case PCI_DEVICE_ID_DIGI_NEO_8:
case PCIE_DEVICE_ID_NEO_8:
case PCIE_DEVICE_ID_NEO_8RJ45:
......@@ -129,36 +124,109 @@ static int jsm_probe_one(struct pci_dev *pdev, const struct pci_device_id *ent)
brd->irq = pdev->irq;
jsm_dbg(INIT, &brd->pci_dev, "jsm_found_board - NEO adapter\n");
switch (pdev->device) {
case PCI_DEVICE_ID_CLASSIC_4:
case PCI_DEVICE_ID_CLASSIC_4_422:
case PCI_DEVICE_ID_CLASSIC_8:
case PCI_DEVICE_ID_CLASSIC_8_422:
jsm_dbg(INIT, &brd->pci_dev,
"jsm_found_board - Classic adapter\n");
/*
* For PCI ClassicBoards
* PCI Local Address (.i.e. "resource" number) space
* 0 PLX Memory Mapped Config
* 1 PLX I/O Mapped Config
* 2 I/O Mapped UARTs and Status
* 3 Memory Mapped VPD
* 4 Memory Mapped UARTs and Status
*/
/* Get the PCI Base Address Registers */
brd->membase = pci_resource_start(pdev, 4);
brd->membase_end = pci_resource_end(pdev, 4);
if (brd->membase & 0x1)
brd->membase &= ~0x3;
else
brd->membase &= ~0xF;
brd->iobase = pci_resource_start(pdev, 1);
brd->iobase_end = pci_resource_end(pdev, 1);
brd->iobase = ((unsigned int)(brd->iobase)) & 0xFFFE;
/* Assign the board_ops struct */
brd->bd_ops = &jsm_cls_ops;
brd->bd_uart_offset = 0x8;
brd->bd_dividend = 921600;
brd->re_map_membase = ioremap(brd->membase,
pci_resource_len(pdev, 4));
if (!brd->re_map_membase) {
dev_err(&pdev->dev,
"Card has no PCI Memory resources, failing board.\n");
rc = -ENOMEM;
goto out_kfree_brd;
}
/*
* Enable Local Interrupt 1 (0x1),
* Local Interrupt 1 Polarity Active high (0x2),
* Enable PCI interrupt (0x43)
*/
outb(0x43, brd->iobase + 0x4c);
break;
case PCI_DEVICE_ID_NEO_2DB9:
case PCI_DEVICE_ID_NEO_2DB9PRI:
case PCI_DEVICE_ID_NEO_2RJ45:
case PCI_DEVICE_ID_NEO_2RJ45PRI:
case PCI_DEVICE_ID_NEO_2_422_485:
case PCI_DEVICE_ID_NEO_4:
case PCIE_DEVICE_ID_NEO_4:
case PCIE_DEVICE_ID_NEO_4RJ45:
case PCIE_DEVICE_ID_NEO_4_IBM:
case PCI_DEVICE_ID_DIGI_NEO_8:
case PCIE_DEVICE_ID_NEO_8:
case PCIE_DEVICE_ID_NEO_8RJ45:
jsm_dbg(INIT, &brd->pci_dev, "jsm_found_board - NEO adapter\n");
/* get the PCI Base Address Registers */
brd->membase = pci_resource_start(pdev, 0);
brd->membase_end = pci_resource_end(pdev, 0);
/* get the PCI Base Address Registers */
brd->membase = pci_resource_start(pdev, 0);
brd->membase_end = pci_resource_end(pdev, 0);
if (brd->membase & 1)
brd->membase &= ~3;
else
brd->membase &= ~15;
if (brd->membase & 1)
brd->membase &= ~0x3;
else
brd->membase &= ~0xF;
/* Assign the board_ops struct */
brd->bd_ops = &jsm_neo_ops;
/* Assign the board_ops struct */
brd->bd_ops = &jsm_neo_ops;
brd->bd_uart_offset = 0x200;
brd->bd_dividend = 921600;
brd->bd_uart_offset = 0x200;
brd->bd_dividend = 921600;
brd->re_map_membase = ioremap(brd->membase, pci_resource_len(pdev, 0));
if (!brd->re_map_membase) {
dev_err(&pdev->dev,
"card has no PCI Memory resources, "
"failing board.\n");
rc = -ENOMEM;
goto out_kfree_brd;
brd->re_map_membase = ioremap(brd->membase,
pci_resource_len(pdev, 0));
if (!brd->re_map_membase) {
dev_err(&pdev->dev,
"Card has no PCI Memory resources, failing board.\n");
rc = -ENOMEM;
goto out_kfree_brd;
}
break;
default:
return -ENXIO;
}
rc = request_irq(brd->irq, brd->bd_ops->intr,
IRQF_SHARED, "JSM", brd);
rc = request_irq(brd->irq, brd->bd_ops->intr, IRQF_SHARED, "JSM", brd);
if (rc) {
printk(KERN_WARNING "Failed to hook IRQ %d\n",brd->irq);
dev_warn(&pdev->dev, "Failed to hook IRQ %d\n", brd->irq);
goto out_iounmap;
}
......@@ -178,7 +246,7 @@ static int jsm_probe_one(struct pci_dev *pdev, const struct pci_device_id *ent)
}
/* Log the information about the board */
dev_info(&pdev->dev, "board %d: Digi Neo (rev %d), irq %d\n",
dev_info(&pdev->dev, "board %d: Digi Classic/Neo (rev %d), irq %d\n",
adapter_count, brd->rev, brd->irq);
pci_set_drvdata(pdev, brd);
......@@ -205,6 +273,18 @@ static void jsm_remove_one(struct pci_dev *pdev)
struct jsm_board *brd = pci_get_drvdata(pdev);
int i = 0;
switch (pdev->device) {
case PCI_DEVICE_ID_CLASSIC_4:
case PCI_DEVICE_ID_CLASSIC_4_422:
case PCI_DEVICE_ID_CLASSIC_8:
case PCI_DEVICE_ID_CLASSIC_8_422:
/* Tell card not to interrupt anymore. */
outb(0x0, brd->iobase + 0x4c);
break;
default:
break;
}
jsm_remove_uart_port(brd);
free_irq(brd->irq, brd);
......@@ -239,6 +319,10 @@ static struct pci_device_id jsm_pci_tbl[] = {
{ PCI_DEVICE(PCI_VENDOR_ID_DIGI, PCIE_DEVICE_ID_NEO_4), 0, 0, 11 },
{ PCI_DEVICE(PCI_VENDOR_ID_DIGI, PCIE_DEVICE_ID_NEO_4RJ45), 0, 0, 12 },
{ PCI_DEVICE(PCI_VENDOR_ID_DIGI, PCIE_DEVICE_ID_NEO_8RJ45), 0, 0, 13 },
{ PCI_DEVICE(PCI_VENDOR_ID_DIGI, PCI_DEVICE_ID_CLASSIC_4), 0, 0, 14 },
{ PCI_DEVICE(PCI_VENDOR_ID_DIGI, PCI_DEVICE_ID_CLASSIC_4_422), 0, 0, 15 },
{ PCI_DEVICE(PCI_VENDOR_ID_DIGI, PCI_DEVICE_ID_CLASSIC_8), 0, 0, 16 },
{ PCI_DEVICE(PCI_VENDOR_ID_DIGI, PCI_DEVICE_ID_CLASSIC_8_422), 0, 0, 17 },
{ 0, }
};
MODULE_DEVICE_TABLE(pci, jsm_pci_tbl);
......
......@@ -13,11 +13,6 @@
* implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
* PURPOSE. See the GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 * Temple Place - Suite 330, Boston,
* MA 02111-1307, USA.
*
* Contact Information:
* Scott H Kilau <Scott_Kilau@digi.com>
* Wendy Xiong <wendyx@us.ibm.com>
......@@ -649,7 +644,7 @@ static void neo_flush_uart_write(struct jsm_channel *ch)
/* Check to see if the UART feels it completely flushed the FIFO. */
tmp = readb(&ch->ch_neo_uart->isr_fcr);
if (tmp & 4) {
if (tmp & UART_FCR_CLEAR_XMIT) {
jsm_dbg(IOCTL, &ch->ch_bd->pci_dev,
"Still flushing TX UART... i: %d\n", i);
udelay(10);
......@@ -694,7 +689,7 @@ static void neo_flush_uart_read(struct jsm_channel *ch)
/*
* No locks are assumed to be held when calling this function.
*/
static void neo_clear_break(struct jsm_channel *ch, int force)
static void neo_clear_break(struct jsm_channel *ch)
{
unsigned long lock_flags;
......@@ -1024,27 +1019,24 @@ static void neo_param(struct jsm_channel *ch)
lcr |= UART_LCR_STOP;
switch (ch->ch_c_cflag & CSIZE) {
case CS5:
lcr |= UART_LCR_WLEN5;
break;
case CS6:
lcr |= UART_LCR_WLEN6;
break;
case CS7:
lcr |= UART_LCR_WLEN7;
break;
case CS8:
default:
lcr |= UART_LCR_WLEN8;
case CS5:
lcr |= UART_LCR_WLEN5;
break;
case CS6:
lcr |= UART_LCR_WLEN6;
break;
case CS7:
lcr |= UART_LCR_WLEN7;
break;
case CS8:
default:
lcr |= UART_LCR_WLEN8;
break;
}
ier = readb(&ch->ch_neo_uart->ier);
uart_lcr = readb(&ch->ch_neo_uart->lcr);
if (baud == 0)
baud = 9600;
quot = ch->ch_bd->bd_dividend / baud;
if (quot != 0) {
......
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......@@ -497,8 +497,10 @@ lqasc_type(struct uart_port *port)
static void
lqasc_release_port(struct uart_port *port)
{
struct platform_device *pdev = to_platform_device(port->dev);
if (port->flags & UPF_IOREMAP) {
iounmap(port->membase);
devm_iounmap(&pdev->dev, port->membase);
port->membase = NULL;
}
}
......
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......@@ -809,6 +809,7 @@ static void men_z135_remove(struct mcb_device *mdev)
static const struct mcb_device_id men_z135_ids[] = {
{ .device = 0x87 },
{ }
};
MODULE_DEVICE_TABLE(mcb, men_z135_ids);
......
......@@ -1371,7 +1371,7 @@ static void hsu_global_init(void)
hsu->iolen = 0x1000;
if (!(request_mem_region(hsu->paddr, hsu->iolen, "HSU global")))
pr_warning("HSU: error in request mem region\n");
pr_warn("HSU: error in request mem region\n");
hsu->reg = ioremap_nocache((unsigned long)hsu->paddr, hsu->iolen);
if (!hsu->reg) {
......
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......@@ -65,6 +65,7 @@
#define UART_CR_TX_ENABLE (1 << 2)
#define UART_CR_RX_DISABLE (1 << 1)
#define UART_CR_RX_ENABLE (1 << 0)
#define UART_CR_CMD_RESET_RXBREAK_START ((1 << 11) | (2 << 4))
#define UART_IMR 0x0014
#define UART_IMR_TXLEV (1 << 0)
......@@ -72,6 +73,7 @@
#define UART_IMR_RXLEV (1 << 4)
#define UART_IMR_DELTA_CTS (1 << 5)
#define UART_IMR_CURRENT_CTS (1 << 6)
#define UART_IMR_RXBREAK_START (1 << 10)
#define UART_IPR_RXSTALE_LAST 0x20
#define UART_IPR_STALE_LSB 0x1F
......
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......@@ -1352,7 +1352,8 @@ static int pmz_verify_port(struct uart_port *port, struct serial_struct *ser)
static int pmz_poll_get_char(struct uart_port *port)
{
struct uart_pmac_port *uap = (struct uart_pmac_port *)port;
struct uart_pmac_port *uap =
container_of(port, struct uart_pmac_port, port);
int tries = 2;
while (tries) {
......@@ -1367,7 +1368,8 @@ static int pmz_poll_get_char(struct uart_port *port)
static void pmz_poll_put_char(struct uart_port *port, unsigned char c)
{
struct uart_pmac_port *uap = (struct uart_pmac_port *)port;
struct uart_pmac_port *uap =
container_of(port, struct uart_pmac_port, port);
/* Wait for the transmit buffer to empty. */
while ((read_zsreg(uap, R0) & Tx_BUF_EMP) == 0)
......@@ -1954,7 +1956,8 @@ static void __exit exit_pmz(void)
static void pmz_console_putchar(struct uart_port *port, int ch)
{
struct uart_pmac_port *uap = (struct uart_pmac_port *)port;
struct uart_pmac_port *uap =
container_of(port, struct uart_pmac_port, port);
/* Wait for the transmit buffer to empty. */
while ((read_zsreg(uap, R0) & Tx_BUF_EMP) == 0)
......
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