提交 2de027e5 编写于 作者: F Florian Schilhabel 提交者: Greg Kroah-Hartman

staging: rtl8192su: updated r8192SU_HWImg.c, r8192SU_HWImg.h

Signed-off-by: NFlorian Schilhabel <florian.c.schilhabel@googlemail.com>
Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
上级 5d4d454c
...@@ -93,7 +93,7 @@ u32 Rtl8192SUPHY_REG_2T2RArray[PHY_REG_2T2RArrayLength] = { ...@@ -93,7 +93,7 @@ u32 Rtl8192SUPHY_REG_2T2RArray[PHY_REG_2T2RArrayLength] = {
0x900,0x00000000, 0x900,0x00000000,
0x904,0x00000023, 0x904,0x00000023,
0x908,0x00000000, 0x908,0x00000000,
0x90c,0x03321333, 0x90c,0x01121313,
0xa00,0x00d047c8, 0xa00,0x00d047c8,
0xa04,0x80ff0008, 0xa04,0x80ff0008,
0xa08,0x8ccd8300, 0xa08,0x8ccd8300,
...@@ -135,7 +135,7 @@ u32 Rtl8192SUPHY_REG_2T2RArray[PHY_REG_2T2RArrayLength] = { ...@@ -135,7 +135,7 @@ u32 Rtl8192SUPHY_REG_2T2RArray[PHY_REG_2T2RArrayLength] = {
0xc68,0x69543420, 0xc68,0x69543420,
0xc6c,0x433c0094, 0xc6c,0x433c0094,
0xc70,0x2c7f000d, 0xc70,0x2c7f000d,
0xc74,0x0186155b, 0xc74,0x0186175b,
0xc78,0x0000001f, 0xc78,0x0000001f,
0xc7c,0x00b91612, 0xc7c,0x00b91612,
0xc80,0x40000100, 0xc80,0x40000100,
...@@ -256,13 +256,34 @@ u32 Rtl8192SUPHY_ChangeTo_2T2RArray[PHY_ChangeTo_2T2RArrayLength] = { ...@@ -256,13 +256,34 @@ u32 Rtl8192SUPHY_ChangeTo_2T2RArray[PHY_ChangeTo_2T2RArrayLength] = {
}; };
u32 Rtl8192SUPHY_REG_Array_PG[PHY_REG_Array_PGLength] = { u32 Rtl8192SUPHY_REG_Array_PG[PHY_REG_Array_PGLength] = {
0xe00,0xffffffff,0x06090909, 0xe00,0xffffffff,0x04060606,
0xe04,0xffffffff,0x00030406, 0xe04,0xffffffff,0x00020204,
0xe08,0x0000ff00,0x00000000, 0xe08,0x0000ff00,0x00000000,
0xe10,0xffffffff,0x0a0c0d0e, 0xe10,0xffffffff,0x0408080a,
0xe14,0xffffffff,0x04070809, 0xe14,0xffffffff,0x00020204,
0xe18,0xffffffff,0x0a0c0d0e, 0xe18,0xffffffff,0x0408080a,
0xe1c,0xffffffff,0x04070809, 0xe1c,0xffffffff,0x00020204,
0xe00,0xffffffff,0x00000000,
0xe04,0xffffffff,0x00000000,
0xe08,0x0000ff00,0x00000000,
0xe10,0xffffffff,0x00000000,
0xe14,0xffffffff,0x00000000,
0xe18,0xffffffff,0x00000000,
0xe1c,0xffffffff,0x00000000,
0xe00,0xffffffff,0x00000000,
0xe04,0xffffffff,0x00000000,
0xe08,0x0000ff00,0x00000000,
0xe10,0xffffffff,0x00000000,
0xe14,0xffffffff,0x00000000,
0xe18,0xffffffff,0x00000000,
0xe1c,0xffffffff,0x00000000,
0xe00,0xffffffff,0x00000000,
0xe04,0xffffffff,0x00000000,
0xe08,0x0000ff00,0x00000000,
0xe10,0xffffffff,0x00000000,
0xe14,0xffffffff,0x00000000,
0xe18,0xffffffff,0x00000000,
0xe1c,0xffffffff,0x00000000,
}; };
u32 Rtl8192SURadioA_1T_Array[RadioA_1T_ArrayLength] = { u32 Rtl8192SURadioA_1T_Array[RadioA_1T_ArrayLength] = {
......
/******************************************************************************
* Copyright(c) 2008 - 2010 Realtek Corporation. All rights reserved.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
* The full GNU General Public License is included in this distribution in the
* file called LICENSE.
*
* Contact Information:
* wlanfae <wlanfae@realtek.com>
******************************************************************************/
#ifndef __INC_HAL8192SU_FW_IMG_H #ifndef __INC_HAL8192SU_FW_IMG_H
#define __INC_HAL8192SU_FW_IMG_H #define __INC_HAL8192SU_FW_IMG_H
...@@ -19,7 +37,7 @@ extern u32 Rtl8192SUPHY_ChangeTo_1T1RArray[PHY_ChangeTo_1T1RArrayLength]; ...@@ -19,7 +37,7 @@ extern u32 Rtl8192SUPHY_ChangeTo_1T1RArray[PHY_ChangeTo_1T1RArrayLength];
extern u32 Rtl8192SUPHY_ChangeTo_1T2RArray[PHY_ChangeTo_1T2RArrayLength]; extern u32 Rtl8192SUPHY_ChangeTo_1T2RArray[PHY_ChangeTo_1T2RArrayLength];
#define PHY_ChangeTo_2T2RArrayLength 45 #define PHY_ChangeTo_2T2RArrayLength 45
extern u32 Rtl8192SUPHY_ChangeTo_2T2RArray[PHY_ChangeTo_2T2RArrayLength]; extern u32 Rtl8192SUPHY_ChangeTo_2T2RArray[PHY_ChangeTo_2T2RArrayLength];
#define PHY_REG_Array_PGLength 21 #define PHY_REG_Array_PGLength 84
extern u32 Rtl8192SUPHY_REG_Array_PG[PHY_REG_Array_PGLength]; extern u32 Rtl8192SUPHY_REG_Array_PG[PHY_REG_Array_PGLength];
#define RadioA_1T_ArrayLength 202 #define RadioA_1T_ArrayLength 202
extern u32 Rtl8192SURadioA_1T_Array[RadioA_1T_ArrayLength]; extern u32 Rtl8192SURadioA_1T_Array[RadioA_1T_ArrayLength];
...@@ -38,5 +56,5 @@ extern u32 Rtl8192SUMACPHY_Array_PG[MACPHY_Array_PGLength]; ...@@ -38,5 +56,5 @@ extern u32 Rtl8192SUMACPHY_Array_PG[MACPHY_Array_PGLength];
#define AGCTAB_ArrayLength 320 #define AGCTAB_ArrayLength 320
extern u32 Rtl8192SUAGCTAB_Array[AGCTAB_ArrayLength]; extern u32 Rtl8192SUAGCTAB_Array[AGCTAB_ArrayLength];
#endif //__INC_HAL8192SU_FW_IMG_H #endif
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