diff --git a/arch/arm/mach-imx/clk-imx27.c b/arch/arm/mach-imx/clk-imx27.c
index ef7001c190a760c91559fb5e7feb40ffbf57cf94..fcfb81b881af932983a9a3c701b13c9914e18c64 100644
--- a/arch/arm/mach-imx/clk-imx27.c
+++ b/arch/arm/mach-imx/clk-imx27.c
@@ -18,36 +18,11 @@ static void __iomem *ccm __initdata;
 #define CCM_MPCTL1		(ccm + 0x08)
 #define CCM_SPCTL0		(ccm + 0x0c)
 #define CCM_SPCTL1		(ccm + 0x10)
-#define CCM_OSC26MCTL		(ccm + 0x14)
 #define CCM_PCDR0		(ccm + 0x18)
 #define CCM_PCDR1		(ccm + 0x1c)
 #define CCM_PCCR0		(ccm + 0x20)
 #define CCM_PCCR1		(ccm + 0x24)
 #define CCM_CCSR		(ccm + 0x28)
-#define CCM_PMCTL		(ccm + 0x2c)
-#define CCM_PMCOUNT		(ccm + 0x30)
-#define CCM_WKGDCTL		(ccm + 0x34)
-
-#define CCM_CSCR_UPDATE_DIS	(1 << 31)
-#define CCM_CSCR_SSI2		(1 << 23)
-#define CCM_CSCR_SSI1		(1 << 22)
-#define CCM_CSCR_VPU		(1 << 21)
-#define CCM_CSCR_MSHC           (1 << 20)
-#define CCM_CSCR_SPLLRES        (1 << 19)
-#define CCM_CSCR_MPLLRES        (1 << 18)
-#define CCM_CSCR_SP             (1 << 17)
-#define CCM_CSCR_MCU            (1 << 16)
-#define CCM_CSCR_OSC26MDIV      (1 << 4)
-#define CCM_CSCR_OSC26M         (1 << 3)
-#define CCM_CSCR_FPM            (1 << 2)
-#define CCM_CSCR_SPEN           (1 << 1)
-#define CCM_CSCR_MPEN           (1 << 0)
-
-/* i.MX27 TO 2+ */
-#define CCM_CSCR_ARM_SRC        (1 << 15)
-
-#define CCM_SPCTL1_LF           (1 << 15)
-#define CCM_SPCTL1_BRMO         (1 << 6)
 
 static const char *vpu_sel_clks[] = { "spll", "mpll_main2", };
 static const char *cpu_sel_clks[] = { "mpll_main2", "mpll", };