diff --git a/arch/x86/include/asm/fpu/internal.h b/arch/x86/include/asm/fpu/internal.h index 71d44be5acb1d842e37040b89e9544eac43eef8d..4617eeb57004bd6595132c1a08971b8e4b04d029 100644 --- a/arch/x86/include/asm/fpu/internal.h +++ b/arch/x86/include/asm/fpu/internal.h @@ -36,7 +36,7 @@ int ia32_setup_frame(int sig, struct ksignal *ksig, #define MXCSR_DEFAULT 0x1f80 extern unsigned int mxcsr_feature_mask; -extern void fpu__cpu_init(void); +extern void fpu__init_cpu(void); extern void eager_fpu_init(void); extern void fpu__init_system_xstate(void); diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c index 8f6a4ea39657c7e523ab9ac732bbe0e218d0e6d0..d28f8ebc506d535e1c64cf5b4671008cfe94a178 100644 --- a/arch/x86/kernel/cpu/common.c +++ b/arch/x86/kernel/cpu/common.c @@ -1435,7 +1435,7 @@ void cpu_init(void) clear_all_debug_regs(); dbg_restore_debug_regs(); - fpu__cpu_init(); + fpu__init_cpu(); if (is_uv_system()) uv_cpu_init(); @@ -1491,7 +1491,7 @@ void cpu_init(void) clear_all_debug_regs(); dbg_restore_debug_regs(); - fpu__cpu_init(); + fpu__init_cpu(); } #endif diff --git a/arch/x86/kernel/fpu/init.c b/arch/x86/kernel/fpu/init.c index 0c9c1069fba812c22865bddb82fdb244a8fcdb29..cf27bbed1ba16c46045df3f39a8055c3b766a6e1 100644 --- a/arch/x86/kernel/fpu/init.c +++ b/arch/x86/kernel/fpu/init.c @@ -241,11 +241,6 @@ void fpu__init_system(void) fpu__init_system_ctx_switch(); } -void fpu__cpu_init(void) -{ - fpu__init_cpu(); -} - static int __init no_387(char *s) { setup_clear_cpu_cap(X86_FEATURE_FPU); diff --git a/arch/x86/xen/enlighten.c b/arch/x86/xen/enlighten.c index 43f8704b7289a46ec2986af3b8c85db2aee5f955..98088bf5906a189487ca72b2a55ad59b7a922ed8 100644 --- a/arch/x86/xen/enlighten.c +++ b/arch/x86/xen/enlighten.c @@ -1423,7 +1423,7 @@ static void xen_pvh_set_cr_flags(int cpu) return; /* * For BSP, PSE PGE are set in probe_page_size_mask(), for APs - * set them here. For all, OSFXSR OSXMMEXCPT are set in fpu__cpu_init(). + * set them here. For all, OSFXSR OSXMMEXCPT are set in fpu__init_cpu(). */ if (cpu_has_pse) cr4_set_bits_and_update_boot(X86_CR4_PSE);