diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index bebefe79f7ce162b058790cdc3e0ba19326e5b62..2b89aacdda905848518e9a656faf205cf292c994 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -63,14 +63,6 @@ static void gen9_init_clock_gating(struct drm_device *dev)
 	I915_WRITE(GEN8_UCGCTL6, I915_READ(GEN8_UCGCTL6) |
 		   GEN8_SDEUNIT_CLOCK_GATE_DISABLE);
 
-	/*
-	 * WaDisableDgMirrorFixInHalfSliceChicken5:skl
-	 * This is a pre-production w/a.
-	 */
-	I915_WRITE(GEN9_HALF_SLICE_CHICKEN5,
-		   I915_READ(GEN9_HALF_SLICE_CHICKEN5) &
-		   ~GEN9_DG_MIRROR_FIX_ENABLE);
-
 	/* Wa4x4STCOptimizationDisable:skl */
 	I915_WRITE(CACHE_MODE_1,
 		   _MASKED_BIT_ENABLE(GEN8_4x4_STC_OPTIMIZATION_DISABLE));
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
index b869f1c687536d7b5e9974739c8bf83fc0256570..248db5157e0296a660545176938231665c83da06 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
@@ -882,6 +882,16 @@ static int gen9_init_workarounds(struct intel_engine_cs *ring)
 	WA_SET_BIT_MASKED(GEN8_ROW_CHICKEN,
 			  PARTIAL_INSTRUCTION_SHOOTDOWN_DISABLE);
 
+	if (INTEL_REVID(dev) == SKL_REVID_A0) {
+		/*
+		* WaDisableDgMirrorFixInHalfSliceChicken5:skl
+		* This is a pre-production w/a.
+		*/
+		I915_WRITE(GEN9_HALF_SLICE_CHICKEN5,
+			I915_READ(GEN9_HALF_SLICE_CHICKEN5) &
+			~GEN9_DG_MIRROR_FIX_ENABLE);
+	}
+
 	return 0;
 }