Documentation: devicetree: Add ECC information to synopsys ddr controller

Add ECC information to synopsys ddr memory controller.
Signed-off-by: NPunnaiah Choudary Kalluri <punnaia@xilinx.com>
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>

Documentation/devicetree/bindings/memory-controllers/synopsys.txt

 Binding for Synopsys IntelliDDR Multi Protocol Memory Controller
 
+This controller has an optional ECC support in half-bus width (16-bit)
+configuration. The ECC controller corrects one bit error and detects
+two bit errors.
+
 Required properties:
  - compatible: Should be 'xlnx,zynq-ddrc-a05'
  - reg: Base address and size of the controllers memory area