sh-pfc: Split pins and functions into separate gpio_chip instances

Register two GPIO chips, one for the real GPIOs and one for the function
GPIOs.
Signed-off-by: NLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: NLinus Walleij <linus.walleij@linaro.org>

drivers/pinctrl/sh-pfc/core.c

@@ -95,7 +95,7 @@ static bool sh_pfc_gpio_is_pin(struct sh_pfc *pfc, unsigned int gpio)
 	       (pfc->info->pins[gpio].enum_id != 0);
 }
 
-bool sh_pfc_gpio_is_function(struct sh_pfc *pfc, unsigned int gpio)
+static bool sh_pfc_gpio_is_function(struct sh_pfc *pfc, unsigned int gpio)
 {
 	return (gpio >= pfc->info->nr_pins) &&
 	       (gpio < pfc->info->nr_pins + pfc->info->nr_func_gpios) &&

drivers/pinctrl/sh-pfc/core.h

@@ -33,6 +33,8 @@ struct sh_pfc {
 	struct sh_pfc_window *window;
 
 	struct sh_pfc_chip *gpio;
+	struct sh_pfc_chip *func;
+
 	struct sh_pfc_pinctrl *pinctrl;
 };
 
@@ -47,7 +49,6 @@ void sh_pfc_write_bit(struct pinmux_data_reg *dr, unsigned long in_pos,
 		      unsigned long value);
 int sh_pfc_get_data_reg(struct sh_pfc *pfc, unsigned gpio,
 			struct pinmux_data_reg **drp, int *bitp);
-bool sh_pfc_gpio_is_function(struct sh_pfc *pfc, unsigned int gpio);
 int sh_pfc_gpio_to_enum(struct sh_pfc *pfc, unsigned gpio, int pos,
 			pinmux_enum_t *enum_idp);
 int sh_pfc_config_gpio(struct sh_pfc *pfc, unsigned gpio, int pinmux_type,

drivers/pinctrl/sh-pfc/gpio.c

@@ -36,112 +36,62 @@ static struct sh_pfc *gpio_to_pfc(struct gpio_chip *gc)
 	return gpio_to_pfc_chip(gc)->pfc;
 }
 
-static int sh_gpio_request(struct gpio_chip *gc, unsigned offset)
-{
-	struct sh_pfc *pfc = gpio_to_pfc(gc);
-	unsigned long flags;
-	int ret = -EINVAL;
+/* -----------------------------------------------------------------------------
+ * Pin GPIOs
+ */
 
-	if (offset < pfc->info->nr_pins)
+static int gpio_pin_request(struct gpio_chip *gc, unsigned offset)
+{
 	return pinctrl_request_gpio(offset);
-
-	pr_notice_once("Use of GPIO API for function requests is deprecated, convert to pinctrl\n");
-
-	spin_lock_irqsave(&pfc->lock, flags);
-
-	if (!sh_pfc_gpio_is_function(pfc, offset))
-		goto done;
-
-	if (sh_pfc_config_gpio(pfc, offset, PINMUX_TYPE_FUNCTION,
-			       GPIO_CFG_DRYRUN))
-		goto done;
-
-	if (sh_pfc_config_gpio(pfc, offset, PINMUX_TYPE_FUNCTION,
-			       GPIO_CFG_REQ))
-		goto done;
-
-	ret = 0;
-
-done:
-	spin_unlock_irqrestore(&pfc->lock, flags);
-	return ret;
 }
 
-static void sh_gpio_free(struct gpio_chip *gc, unsigned offset)
+static void gpio_pin_free(struct gpio_chip *gc, unsigned offset)
 {
-	struct sh_pfc *pfc = gpio_to_pfc(gc);
-	unsigned long flags;
-
-	if (offset < pfc->info->nr_pins)
 	return pinctrl_free_gpio(offset);
-
-	spin_lock_irqsave(&pfc->lock, flags);
-
-	sh_pfc_config_gpio(pfc, offset, PINMUX_TYPE_FUNCTION, GPIO_CFG_FREE);
-
-	spin_unlock_irqrestore(&pfc->lock, flags);
 }
 
-static void sh_gpio_set_value(struct sh_pfc *pfc, unsigned gpio, int value)
+static void gpio_pin_set_value(struct sh_pfc *pfc, unsigned offset, int value)
 {
 	struct pinmux_data_reg *dr = NULL;
 	int bit = 0;
 
-	if (sh_pfc_get_data_reg(pfc, gpio, &dr, &bit) != 0)
+	if (sh_pfc_get_data_reg(pfc, offset, &dr, &bit) != 0)
 		BUG();
-	else
+
 	sh_pfc_write_bit(dr, bit, value);
 }
 
-static int sh_gpio_get_value(struct sh_pfc *pfc, unsigned gpio)
+static int gpio_pin_direction_input(struct gpio_chip *gc, unsigned offset)
 {
-	struct pinmux_data_reg *dr = NULL;
-	int bit = 0;
-
-	if (sh_pfc_get_data_reg(pfc, gpio, &dr, &bit) != 0)
-		return -EINVAL;
-
-	return sh_pfc_read_bit(dr, bit);
+	return pinctrl_gpio_direction_input(offset);
 }
 
-static int sh_gpio_direction_input(struct gpio_chip *gc, unsigned offset)
+static int gpio_pin_direction_output(struct gpio_chip *gc, unsigned offset,
+				    int value)
 {
-	struct sh_pfc *pfc = gpio_to_pfc(gc);
-
-	if (offset >= pfc->info->nr_pins) {
-		/* Function GPIOs can only be requested, never configured. */
-		return -EINVAL;
-	}
+	gpio_pin_set_value(gpio_to_pfc(gc), offset, value);
 
-	return pinctrl_gpio_direction_input(offset);
+	return pinctrl_gpio_direction_output(offset);
 }
 
-static int sh_gpio_direction_output(struct gpio_chip *gc, unsigned offset,
-				    int value)
+static int gpio_pin_get(struct gpio_chip *gc, unsigned offset)
 {
 	struct sh_pfc *pfc = gpio_to_pfc(gc);
+	struct pinmux_data_reg *dr = NULL;
+	int bit = 0;
 
-	if (offset >= pfc->info->nr_pins) {
-		/* Function GPIOs can only be requested, never configured. */
+	if (sh_pfc_get_data_reg(pfc, offset, &dr, &bit) != 0)
 		return -EINVAL;
-	}
-
-	sh_gpio_set_value(gpio_to_pfc(gc), offset, value);
 
-	return pinctrl_gpio_direction_output(offset);
-}
-
-static int sh_gpio_get(struct gpio_chip *gc, unsigned offset)
-{
-	return sh_gpio_get_value(gpio_to_pfc(gc), offset);
+	return sh_pfc_read_bit(dr, bit);
 }
 
-static void sh_gpio_set(struct gpio_chip *gc, unsigned offset, int value)
+static void gpio_pin_set(struct gpio_chip *gc, unsigned offset, int value)
 {
-	sh_gpio_set_value(gpio_to_pfc(gc), offset, value);
+	gpio_pin_set_value(gpio_to_pfc(gc), offset, value);
 }
 
-static int sh_gpio_to_irq(struct gpio_chip *gc, unsigned offset)
+static int gpio_pin_to_irq(struct gpio_chip *gc, unsigned offset)
 {
 	struct sh_pfc *pfc = gpio_to_pfc(gc);
 	pinmux_enum_t enum_id;
@@ -167,60 +117,141 @@ static int sh_gpio_to_irq(struct gpio_chip *gc, unsigned offset)
 	return -ENOSYS;
 }
 
-static void sh_pfc_gpio_setup(struct sh_pfc_chip *chip)
+static void gpio_pin_setup(struct sh_pfc_chip *chip)
 {
 	struct sh_pfc *pfc = chip->pfc;
 	struct gpio_chip *gc = &chip->gpio_chip;
 
-	gc->request = sh_gpio_request;
-	gc->free = sh_gpio_free;
-	gc->direction_input = sh_gpio_direction_input;
-	gc->get = sh_gpio_get;
-	gc->direction_output = sh_gpio_direction_output;
-	gc->set = sh_gpio_set;
-	gc->to_irq = sh_gpio_to_irq;
+	gc->request = gpio_pin_request;
+	gc->free = gpio_pin_free;
+	gc->direction_input = gpio_pin_direction_input;
+	gc->get = gpio_pin_get;
+	gc->direction_output = gpio_pin_direction_output;
+	gc->set = gpio_pin_set;
+	gc->to_irq = gpio_pin_to_irq;
 
 	gc->label = pfc->info->name;
+	gc->dev = pfc->dev;
 	gc->owner = THIS_MODULE;
 	gc->base = 0;
-	gc->ngpio = pfc->info->nr_pins + pfc->info->nr_func_gpios;
+	gc->ngpio = pfc->info->nr_pins;
 }
 
-int sh_pfc_register_gpiochip(struct sh_pfc *pfc)
+/* -----------------------------------------------------------------------------
+ * Function GPIOs
+ */
+
+static int gpio_function_request(struct gpio_chip *gc, unsigned offset)
+{
+	struct sh_pfc *pfc = gpio_to_pfc(gc);
+	unsigned int gpio = gc->base + offset;
+	unsigned long flags;
+	int ret = -EINVAL;
+
+	pr_notice_once("Use of GPIO API for function requests is deprecated, convert to pinctrl\n");
+
+	if (pfc->info->func_gpios[offset].enum_id == 0)
+		return ret;
+
+	spin_lock_irqsave(&pfc->lock, flags);
+
+	if (sh_pfc_config_gpio(pfc, gpio, PINMUX_TYPE_FUNCTION,
+			       GPIO_CFG_DRYRUN))
+		goto done;
+
+	if (sh_pfc_config_gpio(pfc, gpio, PINMUX_TYPE_FUNCTION,
+			       GPIO_CFG_REQ))
+		goto done;
+
+	ret = 0;
+
+done:
+	spin_unlock_irqrestore(&pfc->lock, flags);
+	return ret;
+}
+
+static void gpio_function_free(struct gpio_chip *gc, unsigned offset)
+{
+	struct sh_pfc *pfc = gpio_to_pfc(gc);
+	unsigned int gpio = gc->base + offset;
+	unsigned long flags;
+
+	spin_lock_irqsave(&pfc->lock, flags);
+
+	sh_pfc_config_gpio(pfc, gpio, PINMUX_TYPE_FUNCTION, GPIO_CFG_FREE);
+
+	spin_unlock_irqrestore(&pfc->lock, flags);
+}
+
+static void gpio_function_setup(struct sh_pfc_chip *chip)
+{
+	struct sh_pfc *pfc = chip->pfc;
+	struct gpio_chip *gc = &chip->gpio_chip;
+
+	gc->request = gpio_function_request;
+	gc->free = gpio_function_free;
+
+	gc->label = pfc->info->name;
+	gc->owner = THIS_MODULE;
+	gc->base = pfc->info->nr_pins;
+	gc->ngpio = pfc->info->nr_func_gpios;
+}
+
+/* -----------------------------------------------------------------------------
+ * Register/unregister
+ */
+
+static struct sh_pfc_chip *
+sh_pfc_add_gpiochip(struct sh_pfc *pfc, void(*setup)(struct sh_pfc_chip *))
 {
 	struct sh_pfc_chip *chip;
 	int ret;
 
 	chip = devm_kzalloc(pfc->dev, sizeof(*chip), GFP_KERNEL);
 	if (unlikely(!chip))
-		return -ENOMEM;
+		return ERR_PTR(-ENOMEM);
 
 	chip->pfc = pfc;
 
-	sh_pfc_gpio_setup(chip);
+	setup(chip);
 
 	ret = gpiochip_add(&chip->gpio_chip);
 	if (unlikely(ret < 0))
-		return ret;
+		return ERR_PTR(ret);
+
+	pr_info("%s handling gpio %u -> %u\n",
+		chip->gpio_chip.label, chip->gpio_chip.base,
+		chip->gpio_chip.base + chip->gpio_chip.ngpio - 1);
+
+	return chip;
+}
+
+int sh_pfc_register_gpiochip(struct sh_pfc *pfc)
+{
+	struct sh_pfc_chip *chip;
+
+	chip = sh_pfc_add_gpiochip(pfc, gpio_pin_setup);
+	if (IS_ERR(chip))
+		return PTR_ERR(chip);
 
 	pfc->gpio = chip;
 
-	pr_info("%s handling gpio 0 -> %u\n",
-		pfc->info->name,
-		pfc->info->nr_pins + pfc->info->nr_func_gpios - 1);
+	chip = sh_pfc_add_gpiochip(pfc, gpio_function_setup);
+	if (IS_ERR(chip))
+		return PTR_ERR(chip);
+
+	pfc->func = chip;
 
 	return 0;
 }
 
 int sh_pfc_unregister_gpiochip(struct sh_pfc *pfc)
 {
-	struct sh_pfc_chip *chip = pfc->gpio;
+	int err;
 	int ret;
 
-	ret = gpiochip_remove(&chip->gpio_chip);
-	if (unlikely(ret < 0))
-		return ret;
+	ret = gpiochip_remove(&pfc->gpio->gpio_chip);
+	err = gpiochip_remove(&pfc->func->gpio_chip);
 
-	pfc->gpio = NULL;
-	return 0;
+	return ret < 0 ? ret : err;
 }