drm/nv30-nv40/fb: make use of bankoff for zeta buffers, where supported

Signed-off-by: NBen Skeggs <bskeggs@redhat.com>

drivers/gpu/drm/nouveau/core/include/subdev/fb.h

@@ -148,6 +148,9 @@ int  nv41_fb_init(struct nouveau_object *);
 int  nv44_fb_init(struct nouveau_object *);
 void nv41_fb_tile_prog(struct nouveau_fb *, int, struct nouveau_fb_tile *);
 
+void nv46_fb_tile_init(struct nouveau_fb *, int i, u32 addr, u32 size,
+		       u32 pitch, u32 flags, struct nouveau_fb_tile *);
+
 void nv50_fb_vram_del(struct nouveau_fb *, struct nouveau_mem **);
 void nv50_fb_trap(struct nouveau_fb *, int display);
 

drivers/gpu/drm/nouveau/core/subdev/fb/nv30.c

@@ -34,7 +34,12 @@ void
 nv30_fb_tile_init(struct nouveau_fb *pfb, int i, u32 addr, u32 size, u32 pitch,
 		  u32 flags, struct nouveau_fb_tile *tile)
 {
-	tile->addr = addr | 1;
+	/* for performance, select alternate bank offset for zeta */
+	if (!(flags & 4)) tile->addr = (0 << 4);
+	else              tile->addr = (1 << 4);
+
+	tile->addr |= 0x00000001; /* enable */
+	tile->addr |= addr;
 	tile->limit = max(1u, addr + size) - 1;
 	tile->pitch = pitch;
 }

drivers/gpu/drm/nouveau/core/subdev/fb/nv44.c

@@ -30,6 +30,16 @@ struct nv44_fb_priv {
 	struct nouveau_fb base;
 };
 
+static void
+nv44_fb_tile_init(struct nouveau_fb *pfb, int i, u32 addr, u32 size, u32 pitch,
+		  u32 flags, struct nouveau_fb_tile *tile)
+{
+	tile->addr  = 0x00000001; /* mode = vram */
+	tile->addr |= addr;
+	tile->limit = max(1u, addr + size) - 1;
+	tile->pitch = pitch;
+}
+
 int
 nv44_fb_init(struct nouveau_object *object)
 {
@@ -72,7 +82,7 @@ nv44_fb_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
 
 	priv->base.memtype_valid = nv04_fb_memtype_valid;
 	priv->base.tile.regions = 12;
-	priv->base.tile.init = nv30_fb_tile_init;
+	priv->base.tile.init = nv44_fb_tile_init;
 	priv->base.tile.fini = nv30_fb_tile_fini;
 	priv->base.tile.prog = nv41_fb_tile_prog;
 	return nouveau_fb_created(&priv->base);

drivers/gpu/drm/nouveau/core/subdev/fb/nv46.c

@@ -30,6 +30,20 @@ struct nv46_fb_priv {
 	struct nouveau_fb base;
 };
 
+void
+nv46_fb_tile_init(struct nouveau_fb *pfb, int i, u32 addr, u32 size, u32 pitch,
+		  u32 flags, struct nouveau_fb_tile *tile)
+{
+	/* for performance, select alternate bank offset for zeta */
+	if (!(flags & 4)) tile->addr = (0 << 3);
+	else              tile->addr = (1 << 3);
+
+	tile->addr |= 0x00000001; /* mode = vram */
+	tile->addr |= addr;
+	tile->limit = max(1u, addr + size) - 1;
+	tile->pitch = pitch;
+}
+
 static int
 nv46_fb_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
 	     struct nouveau_oclass *oclass, void *data, u32 size,
@@ -57,7 +71,7 @@ nv46_fb_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
 
 	priv->base.memtype_valid = nv04_fb_memtype_valid;
 	priv->base.tile.regions = 15;
-	priv->base.tile.init = nv30_fb_tile_init;
+	priv->base.tile.init = nv46_fb_tile_init;
 	priv->base.tile.fini = nv30_fb_tile_fini;
 	priv->base.tile.prog = nv41_fb_tile_prog;
 	return nouveau_fb_created(&priv->base);

drivers/gpu/drm/nouveau/core/subdev/fb/nv4e.c

@@ -48,7 +48,7 @@ nv4e_fb_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
 	priv->base.ram.type = NV_MEM_TYPE_STOLEN;
 	priv->base.memtype_valid = nv04_fb_memtype_valid;
 	priv->base.tile.regions = 12;
-	priv->base.tile.init = nv30_fb_tile_init;
+	priv->base.tile.init = nv46_fb_tile_init;
 	priv->base.tile.fini = nv30_fb_tile_fini;
 	priv->base.tile.prog = nv41_fb_tile_prog;
 	return nouveau_fb_created(&priv->base);