arm: Use genirq lockdep helper to set lock class

Remove the open coded access to irq_desc which will fail on sparse irq
and use the proper wrappers.
Signed-off-by: NThomas Gleixner <tglx@linutronix.de>

arch/arm/mach-at91/gpio.c

@@ -518,7 +518,7 @@ void __init at91_gpio_irq_setup(void)
 		__raw_writel(~0, this->regbase + PIO_IDR);
 
 		for (i = 0, pin = this->chip.base; i < 32; i++, pin++) {
-			lockdep_set_class(&irq_desc[pin].lock, &gpio_lock_class);
+			irq_set_lockdep_class(pin, &gpio_lock_class);
 
 			/*
 			 * Can use the "simple" and not "edge" handler since it's

arch/arm/mach-tegra/gpio.c

@@ -340,7 +340,7 @@ static int __init tegra_gpio_init(void)
 	for (i = INT_GPIO_BASE; i < (INT_GPIO_BASE + TEGRA_NR_GPIOS); i++) {
 		bank = &tegra_gpio_banks[GPIO_BANK(irq_to_gpio(i))];
 
-		lockdep_set_class(&irq_desc[i].lock, &gpio_lock_class);
+		irq_set_lockdep_class(i, &gpio_lock_class);
 		set_irq_chip_data(i, bank);
 		set_irq_chip(i, &tegra_gpio_irq_chip);
 		set_irq_handler(i, handle_simple_irq);

arch/arm/plat-omap/gpio.c

@@ -1672,9 +1672,7 @@ static void __init omap_gpio_chip_init(struct gpio_bank *bank)
 
 	for (j = bank->virtual_irq_start;
 		     j < bank->virtual_irq_start + bank_width; j++) {
-		struct irq_desc *d = irq_to_desc(j);
-
-		lockdep_set_class(&d->lock, &gpio_lock_class);
+		irq_set_lockdep_class(j, &gpio_lock_class);
 		set_irq_chip_data(j, bank);
 		if (bank_is_mpuio(bank))
 			set_irq_chip(j, &mpuio_irq_chip);