diff --git a/arch/powerpc/platforms/85xx/Kconfig b/arch/powerpc/platforms/85xx/Kconfig index 333779ee5f1e1b7029313ee38096e37128ef3085..74779b92ff36c81b166c87a2da2bcf876009b81f 100644 --- a/arch/powerpc/platforms/85xx/Kconfig +++ b/arch/powerpc/platforms/85xx/Kconfig @@ -83,6 +83,12 @@ config TQM8560 select TQM85xx select CPM2 +config SBC8548 + bool "Wind River SBC8548" + select DEFAULT_UIMAGE + help + This option enables support for the Wind River SBC8548 board + config SBC8560 bool "Wind River SBC8560" select DEFAULT_UIMAGE @@ -100,7 +106,7 @@ config MPC8540 bool select PPC_UDBG_16550 select PPC_INDIRECT_PCI - default y if MPC8540_ADS || MPC85xx_CDS + default y if MPC8540_ADS || MPC85xx_CDS || SBC8548 config MPC85xx bool @@ -110,4 +116,4 @@ config MPC85xx select FSL_PCI if PCI select SERIAL_8250_SHARE_IRQ if SERIAL_8250 default y if MPC8540_ADS || MPC85xx_CDS || MPC8560_ADS \ - || MPC85xx_MDS || MPC85xx_DS || STX_GP3 || SBC8560 + || MPC85xx_MDS || MPC85xx_DS || STX_GP3 || SBC8560 || SBC8548 diff --git a/arch/powerpc/platforms/85xx/Makefile b/arch/powerpc/platforms/85xx/Makefile index 698f9f950504e5a92eefe158aefc1a30db684bc0..cb7af4ebd75f78d44b6a2bf3237a9097a2d256e3 100644 --- a/arch/powerpc/platforms/85xx/Makefile +++ b/arch/powerpc/platforms/85xx/Makefile @@ -9,3 +9,4 @@ obj-$(CONFIG_MPC85xx_MDS) += mpc85xx_mds.o obj-$(CONFIG_STX_GP3) += stx_gp3.o obj-$(CONFIG_TQM85xx) += tqm85xx.o obj-$(CONFIG_SBC8560) += sbc8560.o +obj-$(CONFIG_SBC8548) += sbc8548.o diff --git a/arch/powerpc/platforms/85xx/sbc8548.c b/arch/powerpc/platforms/85xx/sbc8548.c new file mode 100644 index 0000000000000000000000000000000000000000..de27b576c13d5afe1dcbf83d66993bc05e4dc657 --- /dev/null +++ b/arch/powerpc/platforms/85xx/sbc8548.c @@ -0,0 +1,169 @@ +/* + * Wind River SBC8548 setup and early boot code. + * + * Copyright 2007 Wind River Systems Inc. + * + * By Paul Gortmaker (see MAINTAINERS for contact information) + * + * Based largely on the MPC8548CDS support - Copyright 2005 Freescale Inc. + * + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include + +static void __init sbc8548_pic_init(void) +{ + struct mpic *mpic; + struct resource r; + struct device_node *np = NULL; + + np = of_find_node_by_type(np, "open-pic"); + + if (np == NULL) { + printk(KERN_ERR "Could not find open-pic node\n"); + return; + } + + if (of_address_to_resource(np, 0, &r)) { + printk(KERN_ERR "Failed to map mpic register space\n"); + of_node_put(np); + return; + } + + mpic = mpic_alloc(np, r.start, + MPIC_PRIMARY | MPIC_WANTS_RESET | MPIC_BIG_ENDIAN, + 0, 256, " OpenPIC "); + BUG_ON(mpic == NULL); + + /* Return the mpic node */ + of_node_put(np); + + mpic_init(mpic); +} + +/* + * Setup the architecture + */ +static void __init sbc8548_setup_arch(void) +{ +#ifdef CONFIG_PCI + struct device_node *np; +#endif + + if (ppc_md.progress) + ppc_md.progress("sbc8548_setup_arch()", 0); + +#ifdef CONFIG_PCI + for_each_node_by_type(np, "pci") { + if (of_device_is_compatible(np, "fsl,mpc8540-pci") || + of_device_is_compatible(np, "fsl,mpc8548-pcie")) { + struct resource rsrc; + of_address_to_resource(np, 0, &rsrc); + if ((rsrc.start & 0xfffff) == 0x8000) + fsl_add_bridge(np, 1); + else + fsl_add_bridge(np, 0); + } + } +#endif +} + +static void sbc8548_show_cpuinfo(struct seq_file *m) +{ + uint pvid, svid, phid1; + uint memsize = total_memory; + + pvid = mfspr(SPRN_PVR); + svid = mfspr(SPRN_SVR); + + seq_printf(m, "Vendor\t\t: Wind River\n"); + seq_printf(m, "Machine\t\t: SBC8548\n"); + seq_printf(m, "PVR\t\t: 0x%x\n", pvid); + seq_printf(m, "SVR\t\t: 0x%x\n", svid); + + /* Display cpu Pll setting */ + phid1 = mfspr(SPRN_HID1); + seq_printf(m, "PLL setting\t: 0x%x\n", ((phid1 >> 24) & 0x3f)); + + /* Display the amount of memory */ + seq_printf(m, "Memory\t\t: %d MB\n", memsize / (1024 * 1024)); +} + +static struct of_device_id __initdata of_bus_ids[] = { + { .name = "soc", }, + { .type = "soc", }, + {}, +}; + +static int __init declare_of_platform_devices(void) +{ + if (!machine_is(sbc8548)) + return 0; + + of_platform_bus_probe(NULL, of_bus_ids, NULL); + return 0; +} +device_initcall(declare_of_platform_devices); + +/* + * Called very early, device-tree isn't unflattened + */ +static int __init sbc8548_probe(void) +{ + unsigned long root = of_get_flat_dt_root(); + + return of_flat_dt_is_compatible(root, "SBC8548"); +} + +define_machine(sbc8548) { + .name = "SBC8548", + .probe = sbc8548_probe, + .setup_arch = sbc8548_setup_arch, + .init_IRQ = sbc8548_pic_init, + .show_cpuinfo = sbc8548_show_cpuinfo, + .get_irq = mpic_get_irq, + .restart = fsl_rstcr_restart, +#ifdef CONFIG_PCI + .pcibios_fixup_bus = fsl_pcibios_fixup_bus, +#endif + .calibrate_decr = generic_calibrate_decr, + .progress = udbg_progress, +};