提交 0d35024c 编写于 作者: S Sujith Manoharan 提交者: Kalle Valo

ath9k: Set keep awake timer

When MCI is enabled and WoW sleep is enabled,
make sure that the RTC keep awake timer is set
with the required value. This is also required
when the AR_WA is programmed.
Signed-off-by: NSujith Manoharan <c_manoha@qca.qualcomm.com>
Signed-off-by: NKalle Valo <kvalo@codeaurora.org>
上级 2a0eef1a
...@@ -44,6 +44,9 @@ static void ath9k_hw_set_powermode_wow_sleep(struct ath_hw *ah) ...@@ -44,6 +44,9 @@ static void ath9k_hw_set_powermode_wow_sleep(struct ath_hw *ah)
REG_CLR_BIT(ah, AR_DIRECT_CONNECT, AR_DC_TSF2_ENABLE); REG_CLR_BIT(ah, AR_DIRECT_CONNECT, AR_DC_TSF2_ENABLE);
} }
if (ath9k_hw_mci_is_enabled(ah))
REG_WRITE(ah, AR_RTC_KEEP_AWAKE, 0x2);
REG_WRITE(ah, AR_RTC_FORCE_WAKE, AR_RTC_FORCE_WAKE_ON_INT); REG_WRITE(ah, AR_RTC_FORCE_WAKE, AR_RTC_FORCE_WAKE_ON_INT);
} }
...@@ -407,6 +410,9 @@ void ath9k_hw_wow_enable(struct ath_hw *ah, u32 pattern_enable) ...@@ -407,6 +410,9 @@ void ath9k_hw_wow_enable(struct ath_hw *ah, u32 pattern_enable)
ath9k_hw_wow_set_arwr_reg(ah); ath9k_hw_wow_set_arwr_reg(ah);
if (ath9k_hw_mci_is_enabled(ah))
REG_WRITE(ah, AR_RTC_KEEP_AWAKE, 0x2);
/* HW WoW */ /* HW WoW */
REG_CLR_BIT(ah, AR_PCU_MISC_MODE3, BIT(5)); REG_CLR_BIT(ah, AR_PCU_MISC_MODE3, BIT(5));
......
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