提交 09760ea3 编写于 作者: S Sean Paul 提交者: Inki Dae

drm/exynos: Replace mdelay with usleep_range

Replace the unnecessary atomic mdelay calls with usleep_range calls.
Signed-off-by: NSean Paul <seanpaul@chromium.org>
Signed-off-by: NInki Dae <inki.dae@samsung.com>
上级 0bc4a0aa
...@@ -1647,9 +1647,9 @@ static void hdmi_conf_reset(struct hdmi_context *hdata) ...@@ -1647,9 +1647,9 @@ static void hdmi_conf_reset(struct hdmi_context *hdata)
/* resetting HDMI core */ /* resetting HDMI core */
hdmi_reg_writemask(hdata, reg, 0, HDMI_CORE_SW_RSTOUT); hdmi_reg_writemask(hdata, reg, 0, HDMI_CORE_SW_RSTOUT);
mdelay(10); usleep_range(10000, 12000);
hdmi_reg_writemask(hdata, reg, ~0, HDMI_CORE_SW_RSTOUT); hdmi_reg_writemask(hdata, reg, ~0, HDMI_CORE_SW_RSTOUT);
mdelay(10); usleep_range(10000, 12000);
} }
static void hdmi_conf_init(struct hdmi_context *hdata) static void hdmi_conf_init(struct hdmi_context *hdata)
...@@ -1774,7 +1774,7 @@ static void hdmi_v13_timing_apply(struct hdmi_context *hdata) ...@@ -1774,7 +1774,7 @@ static void hdmi_v13_timing_apply(struct hdmi_context *hdata)
u32 val = hdmi_reg_read(hdata, HDMI_V13_PHY_STATUS); u32 val = hdmi_reg_read(hdata, HDMI_V13_PHY_STATUS);
if (val & HDMI_PHY_STATUS_READY) if (val & HDMI_PHY_STATUS_READY)
break; break;
mdelay(1); usleep_range(1000, 2000);
} }
/* steady state not achieved */ /* steady state not achieved */
if (tries == 0) { if (tries == 0) {
...@@ -1941,7 +1941,7 @@ static void hdmi_v14_timing_apply(struct hdmi_context *hdata) ...@@ -1941,7 +1941,7 @@ static void hdmi_v14_timing_apply(struct hdmi_context *hdata)
u32 val = hdmi_reg_read(hdata, HDMI_PHY_STATUS_0); u32 val = hdmi_reg_read(hdata, HDMI_PHY_STATUS_0);
if (val & HDMI_PHY_STATUS_READY) if (val & HDMI_PHY_STATUS_READY)
break; break;
mdelay(1); usleep_range(1000, 2000);
} }
/* steady state not achieved */ /* steady state not achieved */
if (tries == 0) { if (tries == 0) {
...@@ -1993,9 +1993,9 @@ static void hdmiphy_conf_reset(struct hdmi_context *hdata) ...@@ -1993,9 +1993,9 @@ static void hdmiphy_conf_reset(struct hdmi_context *hdata)
/* reset hdmiphy */ /* reset hdmiphy */
hdmi_reg_writemask(hdata, reg, ~0, HDMI_PHY_SW_RSTOUT); hdmi_reg_writemask(hdata, reg, ~0, HDMI_PHY_SW_RSTOUT);
mdelay(10); usleep_range(10000, 12000);
hdmi_reg_writemask(hdata, reg, 0, HDMI_PHY_SW_RSTOUT); hdmi_reg_writemask(hdata, reg, 0, HDMI_PHY_SW_RSTOUT);
mdelay(10); usleep_range(10000, 12000);
} }
static void hdmiphy_poweron(struct hdmi_context *hdata) static void hdmiphy_poweron(struct hdmi_context *hdata)
...@@ -2043,7 +2043,7 @@ static void hdmiphy_conf_apply(struct hdmi_context *hdata) ...@@ -2043,7 +2043,7 @@ static void hdmiphy_conf_apply(struct hdmi_context *hdata)
return; return;
} }
mdelay(10); usleep_range(10000, 12000);
/* operation mode */ /* operation mode */
operation[0] = 0x1f; operation[0] = 0x1f;
......
...@@ -600,7 +600,7 @@ static void vp_win_reset(struct mixer_context *ctx) ...@@ -600,7 +600,7 @@ static void vp_win_reset(struct mixer_context *ctx)
/* waiting until VP_SRESET_PROCESSING is 0 */ /* waiting until VP_SRESET_PROCESSING is 0 */
if (~vp_reg_read(res, VP_SRESET) & VP_SRESET_PROCESSING) if (~vp_reg_read(res, VP_SRESET) & VP_SRESET_PROCESSING)
break; break;
mdelay(10); usleep_range(10000, 12000);
} }
WARN(tries == 0, "failed to reset Video Processor\n"); WARN(tries == 0, "failed to reset Video Processor\n");
} }
......
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