提交 047d2df5 编写于 作者: B Ben Skeggs

drm/nvc0/pm: parse clock for pll 0x0a (0x137020) from perf table

Signed-off-by: NBen Skeggs <bskeggs@redhat.com>
上级 40f6193b
...@@ -433,6 +433,7 @@ struct nouveau_pm_level { ...@@ -433,6 +433,7 @@ struct nouveau_pm_level {
u32 memory; u32 memory;
u32 shader; u32 shader;
u32 unk05; u32 unk05;
u32 unk0a;
u8 voltage; u8 voltage;
u8 fanspeed; u8 fanspeed;
......
...@@ -243,12 +243,14 @@ nouveau_perf_init(struct drm_device *dev) ...@@ -243,12 +243,14 @@ nouveau_perf_init(struct drm_device *dev)
} else { } else {
perflvl->shader = ROM16(subent(3)) & 0xfff; perflvl->shader = ROM16(subent(3)) & 0xfff;
perflvl->core = perflvl->shader / 2; perflvl->core = perflvl->shader / 2;
perflvl->unk0a = ROM16(subent(4)) & 0xfff;
perflvl->memory = ROM16(subent(5)) & 0xfff; perflvl->memory = ROM16(subent(5)) & 0xfff;
} }
perflvl->core *= 1000; perflvl->core *= 1000;
perflvl->shader *= 1000; perflvl->shader *= 1000;
perflvl->memory *= 1000; perflvl->memory *= 1000;
perflvl->unk0a *= 1000;
break; break;
} }
......
Markdown is supported
0% .
You are about to add 0 people to the discussion. Proceed with caution.
先完成此消息的编辑!
想要评论请 注册