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提交 015f1e42 编写于 作者: K Kevin Hilman
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Merge remote-tracking branch 'omap/hsmmc' into for_3.4/cleanup/pm-base

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MAINTAINERS
浏览文件 @ 015f1e42
......@@ -3318,6 +3318,12 @@ S: Maintained
F: net/ieee802154/
F: drivers/ieee802154/
IIO SUBSYSTEM AND DRIVERS
M: Jonathan Cameron <jic23@cam.ac.uk>
L: linux-iio@vger.kernel.org
S: Maintained
F: drivers/staging/iio/
IKANOS/ADI EAGLE ADSL USB DRIVER
M: Matthieu Castet <castet.matthieu@free.fr>
M: Stanislaw Gruszka <stf_xl@wp.pl>
......
Makefile
浏览文件 @ 015f1e42
VERSION = 3
PATCHLEVEL = 3
SUBLEVEL = 0
EXTRAVERSION = -rc3
EXTRAVERSION = -rc4
NAME = Saber-toothed Squirrel
# *DOCUMENTATION*
......
arch/arm/boot/dts/exynos4210.dtsi
浏览文件 @ 015f1e42
......@@ -29,6 +29,7 @@
compatible = "arm,cortex-a9-gic";
#interrupt-cells = <3>;
interrupt-controller;
cpu-offset = <0x8000>;
reg = <0x10490000 0x1000>, <0x10480000 0x100>;
};
......
arch/arm/boot/dts/tegra-paz00.dts
浏览文件 @ 015f1e42
......@@ -46,11 +46,11 @@
};
serial@70006200 {
status = "disable";
clock-frequency = <216000000>;
};
serial@70006300 {
clock-frequency = <216000000>;
status = "disable";
};
serial@70006400 {
......@@ -60,7 +60,7 @@
sdhci@c8000000 {
cd-gpios = <&gpio 173 0>; /* gpio PV5 */
wp-gpios = <&gpio 57 0>; /* gpio PH1 */
power-gpios = <&gpio 155 0>; /* gpio PT3 */
power-gpios = <&gpio 169 0>; /* gpio PV1 */
};
sdhci@c8000200 {
......
arch/arm/kernel/traps.c
浏览文件 @ 015f1e42
......@@ -266,6 +266,7 @@ void die(const char *str, struct pt_regs *regs, int err)
{
struct thread_info *thread = current_thread_info();
int ret;
enum bug_trap_type bug_type = BUG_TRAP_TYPE_NONE;
oops_enter();
......@@ -273,7 +274,9 @@ void die(const char *str, struct pt_regs *regs, int err)
console_verbose();
bust_spinlocks(1);
if (!user_mode(regs))
report_bug(regs->ARM_pc, regs);
bug_type = report_bug(regs->ARM_pc, regs);
if (bug_type != BUG_TRAP_TYPE_NONE)
str = "Oops - BUG";
ret = __die(str, err, thread, regs);
if (regs && kexec_should_crash(thread->task))
......
arch/arm/kernel/vmlinux.lds.S
浏览文件 @ 015f1e42
......@@ -10,6 +10,7 @@
#include <asm/page.h>
#define PROC_INFO \
. = ALIGN(4); \
VMLINUX_SYMBOL(__proc_info_begin) = .; \
*(.proc.info.init) \
VMLINUX_SYMBOL(__proc_info_end) = .;
......
arch/arm/mach-at91/at91rm9200_devices.c
浏览文件 @ 015f1e42
......@@ -83,7 +83,7 @@ void __init at91_add_device_usbh(struct at91_usbh_data *data) {}
* USB Device (Gadget)
* -------------------------------------------------------------------- */
#ifdef CONFIG_USB_AT91
#if defined(CONFIG_USB_AT91) || defined(CONFIG_USB_AT91_MODULE)
static struct at91_udc_data udc_data;
static struct resource udc_resources[] = {
......
arch/arm/mach-at91/at91sam9260_devices.c
浏览文件 @ 015f1e42
......@@ -84,7 +84,7 @@ void __init at91_add_device_usbh(struct at91_usbh_data *data) {}
* USB Device (Gadget)
* -------------------------------------------------------------------- */
#ifdef CONFIG_USB_AT91
#if defined(CONFIG_USB_AT91) || defined(CONFIG_USB_AT91_MODULE)
static struct at91_udc_data udc_data;
static struct resource udc_resources[] = {
......@@ -1215,8 +1215,7 @@ void __init at91_add_device_serial(void) {}
* CF/IDE
* -------------------------------------------------------------------- */
#if defined(CONFIG_BLK_DEV_IDE_AT91) || defined(CONFIG_BLK_DEV_IDE_AT91_MODULE) || \
defined(CONFIG_PATA_AT91) || defined(CONFIG_PATA_AT91_MODULE) || \
#if defined(CONFIG_PATA_AT91) || defined(CONFIG_PATA_AT91_MODULE) || \
defined(CONFIG_AT91_CF) || defined(CONFIG_AT91_CF_MODULE)
static struct at91_cf_data cf0_data;
......@@ -1313,10 +1312,8 @@ void __init at91_add_device_cf(struct at91_cf_data *data)
if (data->flags & AT91_CF_TRUE_IDE)
#if defined(CONFIG_PATA_AT91) || defined(CONFIG_PATA_AT91_MODULE)
pdev->name = "pata_at91";
#elif defined(CONFIG_BLK_DEV_IDE_AT91) || defined(CONFIG_BLK_DEV_IDE_AT91_MODULE)
pdev->name = "at91_ide";
#else
#warning "board requires AT91_CF_TRUE_IDE: enable either at91_ide or pata_at91"
#warning "board requires AT91_CF_TRUE_IDE: enable pata_at91"
#endif
else
pdev->name = "at91_cf";
......
arch/arm/mach-at91/at91sam9261_devices.c
浏览文件 @ 015f1e42
......@@ -87,7 +87,7 @@ void __init at91_add_device_usbh(struct at91_usbh_data *data) {}
* USB Device (Gadget)
* -------------------------------------------------------------------- */
#ifdef CONFIG_USB_AT91
#if defined(CONFIG_USB_AT91) || defined(CONFIG_USB_AT91_MODULE)
static struct at91_udc_data udc_data;
static struct resource udc_resources[] = {
......
arch/arm/mach-at91/at91sam9263_devices.c
浏览文件 @ 015f1e42
......@@ -92,7 +92,7 @@ void __init at91_add_device_usbh(struct at91_usbh_data *data) {}
* USB Device (Gadget)
* -------------------------------------------------------------------- */
#ifdef CONFIG_USB_AT91
#if defined(CONFIG_USB_AT91) || defined(CONFIG_USB_AT91_MODULE)
static struct at91_udc_data udc_data;
static struct resource udc_resources[] = {
......@@ -355,8 +355,8 @@ void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data) {}
* Compact Flash (PCMCIA or IDE)
* -------------------------------------------------------------------- */
#if defined(CONFIG_AT91_CF) || defined(CONFIG_AT91_CF_MODULE) || \
defined(CONFIG_BLK_DEV_IDE_AT91) || defined(CONFIG_BLK_DEV_IDE_AT91_MODULE)
#if defined(CONFIG_PATA_AT91) || defined(CONFIG_PATA_AT91_MODULE) || \
defined(CONFIG_AT91_CF) || defined(CONFIG_AT91_CF_MODULE)
static struct at91_cf_data cf0_data;
......@@ -450,7 +450,7 @@ void __init at91_add_device_cf(struct at91_cf_data *data)
at91_set_A_periph(AT91_PIN_PD9, 0); /* CFCE2 */
at91_set_A_periph(AT91_PIN_PD14, 0); /* CFNRW */
pdev->name = (data->flags & AT91_CF_TRUE_IDE) ? "at91_ide" : "at91_cf";
pdev->name = (data->flags & AT91_CF_TRUE_IDE) ? "pata_at91" : "at91_cf";
platform_device_register(pdev);
}
#else
......
arch/arm/mach-at91/include/mach/at91sam9_smc.h
浏览文件 @ 015f1e42
......@@ -18,6 +18,35 @@
#include <mach/cpu.h>
#ifndef __ASSEMBLY__
struct sam9_smc_config {
/* Setup register */
u8 ncs_read_setup;
u8 nrd_setup;
u8 ncs_write_setup;
u8 nwe_setup;
/* Pulse register */
u8 ncs_read_pulse;
u8 nrd_pulse;
u8 ncs_write_pulse;
u8 nwe_pulse;
/* Cycle register */
u16 read_cycle;
u16 write_cycle;
/* Mode register */
u32 mode;
u8 tdf_cycles:4;
};
extern void sam9_smc_configure(int id, int cs, struct sam9_smc_config *config);
extern void sam9_smc_read(int id, int cs, struct sam9_smc_config *config);
extern void sam9_smc_read_mode(int id, int cs, struct sam9_smc_config *config);
extern void sam9_smc_write_mode(int id, int cs, struct sam9_smc_config *config);
#endif
#define AT91_SMC_SETUP 0x00 /* Setup Register for CS n */
#define AT91_SMC_NWESETUP (0x3f << 0) /* NWE Setup Length */
#define AT91_SMC_NWESETUP_(x) ((x) << 0)
......
arch/arm/mach-at91/sam9_smc.c
浏览文件 @ 015f1e42
......@@ -2,6 +2,7 @@
* linux/arch/arm/mach-at91/sam9_smc.c
*
* Copyright (C) 2008 Andrew Victor
* Copyright (C) 2011 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
......@@ -22,7 +23,22 @@
static void __iomem *smc_base_addr[2];
static void __init sam9_smc_cs_configure(void __iomem *base, struct sam9_smc_config* config)
static void sam9_smc_cs_write_mode(void __iomem *base,
struct sam9_smc_config *config)
{
__raw_writel(config->mode
| AT91_SMC_TDF_(config->tdf_cycles),
base + AT91_SMC_MODE);
}
void sam9_smc_write_mode(int id, int cs,
struct sam9_smc_config *config)
{
sam9_smc_cs_write_mode(AT91_SMC_CS(id, cs), config);
}
static void sam9_smc_cs_configure(void __iomem *base,
struct sam9_smc_config *config)
{
/* Setup register */
......@@ -45,16 +61,66 @@ static void __init sam9_smc_cs_configure(void __iomem *base, struct sam9_smc_con
base + AT91_SMC_CYCLE);
/* Mode register */
__raw_writel(config->mode
| AT91_SMC_TDF_(config->tdf_cycles),
base + AT91_SMC_MODE);
sam9_smc_cs_write_mode(base, config);
}
void __init sam9_smc_configure(int id, int cs, struct sam9_smc_config* config)
void sam9_smc_configure(int id, int cs,
struct sam9_smc_config *config)
{
sam9_smc_cs_configure(AT91_SMC_CS(id, cs), config);
}
static void sam9_smc_cs_read_mode(void __iomem *base,
struct sam9_smc_config *config)
{
u32 val = __raw_readl(base + AT91_SMC_MODE);
config->mode = (val & ~AT91_SMC_NWECYCLE);
config->tdf_cycles = (val & AT91_SMC_NWECYCLE) >> 16 ;
}
void sam9_smc_read_mode(int id, int cs,
struct sam9_smc_config *config)
{
sam9_smc_cs_read_mode(AT91_SMC_CS(id, cs), config);
}
static void sam9_smc_cs_read(void __iomem *base,
struct sam9_smc_config *config)
{
u32 val;
/* Setup register */
val = __raw_readl(base + AT91_SMC_SETUP);
config->nwe_setup = val & AT91_SMC_NWESETUP;
config->ncs_write_setup = (val & AT91_SMC_NCS_WRSETUP) >> 8;
config->nrd_setup = (val & AT91_SMC_NRDSETUP) >> 16;
config->ncs_read_setup = (val & AT91_SMC_NCS_RDSETUP) >> 24;
/* Pulse register */
val = __raw_readl(base + AT91_SMC_PULSE);
config->nwe_setup = val & AT91_SMC_NWEPULSE;
config->ncs_write_pulse = (val & AT91_SMC_NCS_WRPULSE) >> 8;
config->nrd_pulse = (val & AT91_SMC_NRDPULSE) >> 16;
config->ncs_read_pulse = (val & AT91_SMC_NCS_RDPULSE) >> 24;
/* Cycle register */
val = __raw_readl(base + AT91_SMC_CYCLE);
config->write_cycle = val & AT91_SMC_NWECYCLE;
config->read_cycle = (val & AT91_SMC_NRDCYCLE) >> 16;
/* Mode register */
sam9_smc_cs_read_mode(base, config);
}
void sam9_smc_read(int id, int cs, struct sam9_smc_config *config)
{
sam9_smc_cs_read(AT91_SMC_CS(id, cs), config);
}
void __init at91sam9_ioremap_smc(int id, u32 addr)
{
if (id > 1) {
......
arch/arm/mach-at91/sam9_smc.h
浏览文件 @ 015f1e42
......@@ -8,27 +8,4 @@
* published by the Free Software Foundation.
*/
struct sam9_smc_config {
/* Setup register */
u8 ncs_read_setup;
u8 nrd_setup;
u8 ncs_write_setup;
u8 nwe_setup;
/* Pulse register */
u8 ncs_read_pulse;
u8 nrd_pulse;
u8 ncs_write_pulse;
u8 nwe_pulse;
/* Cycle register */
u16 read_cycle;
u16 write_cycle;
/* Mode register */
u32 mode;
u8 tdf_cycles:4;
};
extern void __init sam9_smc_configure(int id, int cs, struct sam9_smc_config* config);
extern void __init at91sam9_ioremap_smc(int id, u32 addr);
arch/arm/mach-dove/common.c
浏览文件 @ 015f1e42
......@@ -28,6 +28,7 @@
#include <asm/mach/arch.h>
#include <linux/irq.h>
#include <plat/time.h>
#include <plat/ehci-orion.h>
#include <plat/common.h>
#include <plat/addr-map.h>
#include "common.h"
......@@ -71,7 +72,7 @@ void __init dove_map_io(void)
****************************************************************************/
void __init dove_ehci0_init(void)
{
orion_ehci_init(DOVE_USB0_PHYS_BASE, IRQ_DOVE_USB0);
orion_ehci_init(DOVE_USB0_PHYS_BASE, IRQ_DOVE_USB0, EHCI_PHY_NA);
}
/*****************************************************************************
......
arch/arm/mach-ep93xx/vision_ep9307.c
浏览文件 @ 015f1e42
......@@ -32,6 +32,7 @@
#include <mach/hardware.h>
#include <mach/fb.h>
#include <mach/ep93xx_spi.h>
#include <mach/gpio-ep93xx.h>
#include <asm/mach-types.h>
#include <asm/mach/map.h>
......@@ -153,7 +154,6 @@ static struct i2c_board_info vision_i2c_info[] __initdata = {
}, {
I2C_BOARD_INFO("pca9539", 0x74),
.platform_data = &pca953x_74_gpio_data,
.irq = gpio_to_irq(EP93XX_GPIO_LINE_F(7)),
}, {
I2C_BOARD_INFO("pca9539", 0x75),
.platform_data = &pca953x_75_gpio_data,
......@@ -348,6 +348,8 @@ static void __init vision_init_machine(void)
"pca9539:74"))
pr_warn("cannot request interrupt gpio for pca9539:74\n");
vision_i2c_info[1].irq = gpio_to_irq(EP93XX_GPIO_LINE_F(7));
ep93xx_register_i2c(&vision_i2c_gpio_data, vision_i2c_info,
ARRAY_SIZE(vision_i2c_info));
ep93xx_register_spi(&vision_spi_master, vision_spi_board_info,
......
arch/arm/mach-exynos/clock-exynos4210.c
浏览文件 @ 015f1e42
......@@ -32,6 +32,7 @@
#include "common.h"
#ifdef CONFIG_PM_SLEEP
static struct sleep_save exynos4210_clock_save[] = {
SAVE_ITEM(S5P_CLKSRC_IMAGE),
SAVE_ITEM(S5P_CLKSRC_LCD1),
......@@ -42,6 +43,7 @@ static struct sleep_save exynos4210_clock_save[] = {
SAVE_ITEM(S5P_CLKGATE_IP_LCD1),
SAVE_ITEM(S5P_CLKGATE_IP_PERIR_4210),
};
#endif
static struct clksrc_clk *sysclks[] = {
/* nothing here yet */
......
arch/arm/mach-exynos/clock-exynos4212.c
浏览文件 @ 015f1e42
......@@ -32,12 +32,14 @@
#include "common.h"
#ifdef CONFIG_PM_SLEEP
static struct sleep_save exynos4212_clock_save[] = {
SAVE_ITEM(S5P_CLKSRC_IMAGE),
SAVE_ITEM(S5P_CLKDIV_IMAGE),
SAVE_ITEM(S5P_CLKGATE_IP_IMAGE_4212),
SAVE_ITEM(S5P_CLKGATE_IP_PERIR_4212),
};
#endif
static struct clk *clk_src_mpll_user_list[] = {
[0] = &clk_fin_mpll,
......
arch/arm/mach-exynos/clock.c
浏览文件 @ 015f1e42
......@@ -30,6 +30,7 @@
#include "common.h"
#ifdef CONFIG_PM_SLEEP
static struct sleep_save exynos4_clock_save[] = {
SAVE_ITEM(S5P_CLKDIV_LEFTBUS),
SAVE_ITEM(S5P_CLKGATE_IP_LEFTBUS),
......@@ -93,6 +94,7 @@ static struct sleep_save exynos4_clock_save[] = {
SAVE_ITEM(S5P_CLKGATE_SCLKCPU),
SAVE_ITEM(S5P_CLKGATE_IP_CPU),
};
#endif
struct clk clk_sclk_hdmi27m = {
.name = "sclk_hdmi27m",
......
arch/arm/mach-exynos/mach-exynos4-dt.c
浏览文件 @ 015f1e42
......@@ -15,11 +15,13 @@
#include <linux/serial_core.h>
#include <asm/mach/arch.h>
#include <asm/hardware/gic.h>
#include <mach/map.h>
#include <plat/cpu.h>
#include <plat/regs-serial.h>
#include <plat/exynos4.h>
#include "common.h"
/*
* The following lookup table is used to override device names when devices
......@@ -60,7 +62,7 @@ static const struct of_dev_auxdata exynos4210_auxdata_lookup[] __initconst = {
static void __init exynos4210_dt_map_io(void)
{
s5p_init_io(NULL, 0, S5P_VA_CHIPID);
exynos_init_io(NULL, 0);
s3c24xx_init_clocks(24000000);
}
......@@ -79,7 +81,9 @@ DT_MACHINE_START(EXYNOS4210_DT, "Samsung Exynos4 (Flattened Device Tree)")
/* Maintainer: Thomas Abraham <thomas.abraham@linaro.org> */
.init_irq = exynos4_init_irq,
.map_io = exynos4210_dt_map_io,
.handle_irq = gic_handle_irq,
.init_machine = exynos4210_dt_machine_init,
.timer = &exynos4_timer,
.dt_compat = exynos4210_dt_compat,
.restart = exynos4_restart,
MACHINE_END
arch/arm/mach-exynos/mach-nuri.c
浏览文件 @ 015f1e42
......@@ -220,14 +220,14 @@ static struct s3c_fb_pd_win nuri_fb_win0 = {
.lower_margin = 1,
.hsync_len = 48,
.vsync_len = 3,
.xres = 1280,
.yres = 800,
.xres = 1024,
.yres = 600,
.refresh = 60,
},
.max_bpp = 24,
.default_bpp = 16,
.virtual_x = 1280,
.virtual_y = 800,
.virtual_x = 1024,
.virtual_y = 2 * 600,
};
static struct s3c_fb_platdata nuri_fb_pdata __initdata = {
......
arch/arm/mach-exynos/mach-universal_c210.c
浏览文件 @ 015f1e42
......@@ -910,7 +910,7 @@ static struct s5p_fimc_isp_info universal_camera_sensors[] = {
.bus_type = FIMC_MIPI_CSI2,
.board_info = &m5mols_board_info,
.i2c_bus_num = 0,
.clk_frequency = 21600000UL,
.clk_frequency = 24000000UL,
.csi_data_align = 32,
},
};
......
arch/arm/mach-exynos/pm.c
浏览文件 @ 015f1e42
......@@ -206,7 +206,7 @@ static void exynos4_pm_prepare(void)
}
static int exynos4_pm_add(struct device *dev)
static int exynos4_pm_add(struct device *dev, struct subsys_interface *sif)
{
pm_cpu_prep = exynos4_pm_prepare;
pm_cpu_sleep = exynos4_cpu_suspend;
......@@ -384,7 +384,9 @@ static void exynos4_pm_resume(void)
exynos4_restore_pll();
#ifdef CONFIG_SMP
scu_enable(S5P_VA_SCU);
#endif
#ifdef CONFIG_CACHE_L2X0
s3c_pm_do_restore_core(exynos4_l2cc_save, ARRAY_SIZE(exynos4_l2cc_save));
......
arch/arm/mach-kirkwood/common.c
浏览文件 @ 015f1e42
......@@ -27,6 +27,7 @@
#include <plat/cache-feroceon-l2.h>
#include <plat/mvsdio.h>
#include <plat/orion_nand.h>
#include <plat/ehci-orion.h>
#include <plat/common.h>
#include <plat/time.h>
#include <plat/addr-map.h>
......@@ -73,7 +74,7 @@ unsigned int kirkwood_clk_ctrl = CGC_DUNIT | CGC_RESERVED;
void __init kirkwood_ehci_init(void)
{
kirkwood_clk_ctrl |= CGC_USB0;
orion_ehci_init(USB_PHYS_BASE, IRQ_KIRKWOOD_USB);
orion_ehci_init(USB_PHYS_BASE, IRQ_KIRKWOOD_USB, EHCI_PHY_NA);
}
......
arch/arm/mach-kirkwood/mpp.h
浏览文件 @ 015f1e42
此差异已折叠。
arch/arm/mach-mv78xx0/common.c
浏览文件 @ 015f1e42
......@@ -19,6 +19,7 @@
#include <mach/mv78xx0.h>
#include <mach/bridge-regs.h>
#include <plat/cache-feroceon-l2.h>
#include <plat/ehci-orion.h>
#include <plat/orion_nand.h>
#include <plat/time.h>
#include <plat/common.h>
......@@ -169,7 +170,7 @@ void __init mv78xx0_map_io(void)
****************************************************************************/
void __init mv78xx0_ehci0_init(void)
{
orion_ehci_init(USB0_PHYS_BASE, IRQ_MV78XX0_USB_0);
orion_ehci_init(USB0_PHYS_BASE, IRQ_MV78XX0_USB_0, EHCI_PHY_NA);
}
......
arch/arm/mach-mv78xx0/mpp.h
浏览文件 @ 015f1e42
......@@ -24,296 +24,296 @@
#define MPP_78100_A0_MASK MPP(0, 0x0, 0, 0, 1)
#define MPP0_GPIO MPP(0, 0x0, 1, 1, 1)
#define MPP0_GE0_COL MPP(0, 0x1, 1, 0, 1)
#define MPP0_GE1_TXCLK MPP(0, 0x2, 0, 1, 1)
#define MPP0_GE0_COL MPP(0, 0x1, 0, 0, 1)
#define MPP0_GE1_TXCLK MPP(0, 0x2, 0, 0, 1)
#define MPP0_UNUSED MPP(0, 0x3, 0, 0, 1)
#define MPP1_GPIO MPP(1, 0x0, 1, 1, 1)
#define MPP1_GE0_RXERR MPP(1, 0x1, 1, 0, 1)
#define MPP1_GE1_TXCTL MPP(1, 0x2, 0, 1, 1)
#define MPP1_GE0_RXERR MPP(1, 0x1, 0, 0, 1)
#define MPP1_GE1_TXCTL MPP(1, 0x2, 0, 0, 1)
#define MPP1_UNUSED MPP(1, 0x3, 0, 0, 1)
#define MPP2_GPIO MPP(2, 0x0, 1, 1, 1)
#define MPP2_GE0_CRS MPP(2, 0x1, 1, 0, 1)
#define MPP2_GE1_RXCTL MPP(2, 0x2, 1, 0, 1)
#define MPP2_GE0_CRS MPP(2, 0x1, 0, 0, 1)
#define MPP2_GE1_RXCTL MPP(2, 0x2, 0, 0, 1)
#define MPP2_UNUSED MPP(2, 0x3, 0, 0, 1)
#define MPP3_GPIO MPP(3, 0x0, 1, 1, 1)
#define MPP3_GE0_TXERR MPP(3, 0x1, 0, 1, 1)
#define MPP3_GE1_RXCLK MPP(3, 0x2, 1, 0, 1)
#define MPP3_GE0_TXERR MPP(3, 0x1, 0, 0, 1)
#define MPP3_GE1_RXCLK MPP(3, 0x2, 0, 0, 1)
#define MPP3_UNUSED MPP(3, 0x3, 0, 0, 1)
#define MPP4_GPIO MPP(4, 0x0, 1, 1, 1)
#define MPP4_GE0_TXD4 MPP(4, 0x1, 0, 1, 1)
#define MPP4_GE1_TXD0 MPP(4, 0x2, 0, 1, 1)
#define MPP4_GE0_TXD4 MPP(4, 0x1, 0, 0, 1)
#define MPP4_GE1_TXD0 MPP(4, 0x2, 0, 0, 1)
#define MPP4_UNUSED MPP(4, 0x3, 0, 0, 1)
#define MPP5_GPIO MPP(5, 0x0, 1, 1, 1)
#define MPP5_GE0_TXD5 MPP(5, 0x1, 0, 1, 1)
#define MPP5_GE1_TXD1 MPP(5, 0x2, 0, 1, 1)
#define MPP5_GE0_TXD5 MPP(5, 0x1, 0, 0, 1)
#define MPP5_GE1_TXD1 MPP(5, 0x2, 0, 0, 1)
#define MPP5_UNUSED MPP(5, 0x3, 0, 0, 1)
#define MPP6_GPIO MPP(6, 0x0, 1, 1, 1)
#define MPP6_GE0_TXD6 MPP(6, 0x1, 0, 1, 1)
#define MPP6_GE1_TXD2 MPP(6, 0x2, 0, 1, 1)
#define MPP6_GE0_TXD6 MPP(6, 0x1, 0, 0, 1)
#define MPP6_GE1_TXD2 MPP(6, 0x2, 0, 0, 1)
#define MPP6_UNUSED MPP(6, 0x3, 0, 0, 1)
#define MPP7_GPIO MPP(7, 0x0, 1, 1, 1)
#define MPP7_GE0_TXD7 MPP(7, 0x1, 0, 1, 1)
#define MPP7_GE1_TXD3 MPP(7, 0x2, 0, 1, 1)
#define MPP7_GE0_TXD7 MPP(7, 0x1, 0, 0, 1)
#define MPP7_GE1_TXD3 MPP(7, 0x2, 0, 0, 1)
#define MPP7_UNUSED MPP(7, 0x3, 0, 0, 1)
#define MPP8_GPIO MPP(8, 0x0, 1, 1, 1)
#define MPP8_GE0_RXD4 MPP(8, 0x1, 1, 0, 1)
#define MPP8_GE1_RXD0 MPP(8, 0x2, 1, 0, 1)
#define MPP8_GE0_RXD4 MPP(8, 0x1, 0, 0, 1)
#define MPP8_GE1_RXD0 MPP(8, 0x2, 0, 0, 1)
#define MPP8_UNUSED MPP(8, 0x3, 0, 0, 1)
#define MPP9_GPIO MPP(9, 0x0, 1, 1, 1)
#define MPP9_GE0_RXD5 MPP(9, 0x1, 1, 0, 1)
#define MPP9_GE1_RXD1 MPP(9, 0x2, 1, 0, 1)
#define MPP9_GE0_RXD5 MPP(9, 0x1, 0, 0, 1)
#define MPP9_GE1_RXD1 MPP(9, 0x2, 0, 0, 1)
#define MPP9_UNUSED MPP(9, 0x3, 0, 0, 1)
#define MPP10_GPIO MPP(10, 0x0, 1, 1, 1)
#define MPP10_GE0_RXD6 MPP(10, 0x1, 1, 0, 1)
#define MPP10_GE1_RXD2 MPP(10, 0x2, 1, 0, 1)
#define MPP10_GE0_RXD6 MPP(10, 0x1, 0, 0, 1)
#define MPP10_GE1_RXD2 MPP(10, 0x2, 0, 0, 1)
#define MPP10_UNUSED MPP(10, 0x3, 0, 0, 1)
#define MPP11_GPIO MPP(11, 0x0, 1, 1, 1)
#define MPP11_GE0_RXD7 MPP(11, 0x1, 1, 0, 1)
#define MPP11_GE1_RXD3 MPP(11, 0x2, 1, 0, 1)
#define MPP11_GE0_RXD7 MPP(11, 0x1, 0, 0, 1)
#define MPP11_GE1_RXD3 MPP(11, 0x2, 0, 0, 1)
#define MPP11_UNUSED MPP(11, 0x3, 0, 0, 1)
#define MPP12_GPIO MPP(12, 0x0, 1, 1, 1)
#define MPP12_M_BB MPP(12, 0x3, 1, 0, 1)
#define MPP12_UA0_CTSn MPP(12, 0x4, 1, 0, 1)
#define MPP12_NAND_FLASH_REn0 MPP(12, 0x5, 0, 1, 1)
#define MPP12_TDM0_SCSn MPP(12, 0X6, 0, 1, 1)
#define MPP12_M_BB MPP(12, 0x3, 0, 0, 1)
#define MPP12_UA0_CTSn MPP(12, 0x4, 0, 0, 1)
#define MPP12_NAND_FLASH_REn0 MPP(12, 0x5, 0, 0, 1)
#define MPP12_TDM0_SCSn MPP(12, 0X6, 0, 0, 1)
#define MPP12_UNUSED MPP(12, 0x1, 0, 0, 1)
#define MPP13_GPIO MPP(13, 0x0, 1, 1, 1)
#define MPP13_SYSRST_OUTn MPP(13, 0x3, 0, 1, 1)
#define MPP13_UA0_RTSn MPP(13, 0x4, 0, 1, 1)
#define MPP13_NAN_FLASH_WEn0 MPP(13, 0x5, 0, 1, 1)
#define MPP13_TDM_SCLK MPP(13, 0x6, 0, 1, 1)
#define MPP13_SYSRST_OUTn MPP(13, 0x3, 0, 0, 1)
#define MPP13_UA0_RTSn MPP(13, 0x4, 0, 0, 1)
#define MPP13_NAN_FLASH_WEn0 MPP(13, 0x5, 0, 0, 1)
#define MPP13_TDM_SCLK MPP(13, 0x6, 0, 0, 1)
#define MPP13_UNUSED MPP(13, 0x1, 0, 0, 1)
#define MPP14_GPIO MPP(14, 0x0, 1, 1, 1)
#define MPP14_SATA1_ACTn MPP(14, 0x3, 0, 1, 1)
#define MPP14_UA1_CTSn MPP(14, 0x4, 1, 0, 1)
#define MPP14_NAND_FLASH_REn1 MPP(14, 0x5, 0, 1, 1)
#define MPP14_TDM_SMOSI MPP(14, 0x6, 0, 1, 1)
#define MPP14_SATA1_ACTn MPP(14, 0x3, 0, 0, 1)
#define MPP14_UA1_CTSn MPP(14, 0x4, 0, 0, 1)
#define MPP14_NAND_FLASH_REn1 MPP(14, 0x5, 0, 0, 1)
#define MPP14_TDM_SMOSI MPP(14, 0x6, 0, 0, 1)
#define MPP14_UNUSED MPP(14, 0x1, 0, 0, 1)
#define MPP15_GPIO MPP(15, 0x0, 1, 1, 1)
#define MPP15_SATA0_ACTn MPP(15, 0x3, 0, 1, 1)
#define MPP15_UA1_RTSn MPP(15, 0x4, 0, 1, 1)
#define MPP15_NAND_FLASH_WEn1 MPP(15, 0x5, 0, 1, 1)
#define MPP15_TDM_SMISO MPP(15, 0x6, 1, 0, 1)
#define MPP15_SATA0_ACTn MPP(15, 0x3, 0, 0, 1)
#define MPP15_UA1_RTSn MPP(15, 0x4, 0, 0, 1)
#define MPP15_NAND_FLASH_WEn1 MPP(15, 0x5, 0, 0, 1)
#define MPP15_TDM_SMISO MPP(15, 0x6, 0, 0, 1)
#define MPP15_UNUSED MPP(15, 0x1, 0, 0, 1)
#define MPP16_GPIO MPP(16, 0x0, 1, 1, 1)
#define MPP16_SATA1_PRESENTn MPP(16, 0x3, 0, 1, 1)
#define MPP16_UA2_TXD MPP(16, 0x4, 0, 1, 1)
#define MPP16_NAND_FLASH_REn3 MPP(16, 0x5, 0, 1, 1)
#define MPP16_TDM_INTn MPP(16, 0x6, 1, 0, 1)
#define MPP16_SATA1_PRESENTn MPP(16, 0x3, 0, 0, 1)
#define MPP16_UA2_TXD MPP(16, 0x4, 0, 0, 1)
#define MPP16_NAND_FLASH_REn3 MPP(16, 0x5, 0, 0, 1)
#define MPP16_TDM_INTn MPP(16, 0x6, 0, 0, 1)
#define MPP16_UNUSED MPP(16, 0x1, 0, 0, 1)
#define MPP17_GPIO MPP(17, 0x0, 1, 1, 1)
#define MPP17_SATA0_PRESENTn MPP(17, 0x3, 0, 1, 1)
#define MPP17_UA2_RXD MPP(17, 0x4, 1, 0, 1)
#define MPP17_NAND_FLASH_WEn3 MPP(17, 0x5, 0, 1, 1)
#define MPP17_TDM_RSTn MPP(17, 0x6, 0, 1, 1)
#define MPP17_SATA0_PRESENTn MPP(17, 0x3, 0, 0, 1)
#define MPP17_UA2_RXD MPP(17, 0x4, 0, 0, 1)
#define MPP17_NAND_FLASH_WEn3 MPP(17, 0x5, 0, 0, 1)
#define MPP17_TDM_RSTn MPP(17, 0x6, 0, 0, 1)
#define MPP17_UNUSED MPP(17, 0x1, 0, 0, 1)
#define MPP18_GPIO MPP(18, 0x0, 1, 1, 1)
#define MPP18_UA0_CTSn MPP(18, 0x4, 1, 0, 1)
#define MPP18_BOOT_FLASH_REn MPP(18, 0x5, 0, 1, 1)
#define MPP18_UA0_CTSn MPP(18, 0x4, 0, 0, 1)
#define MPP18_BOOT_FLASH_REn MPP(18, 0x5, 0, 0, 1)
#define MPP18_UNUSED MPP(18, 0x1, 0, 0, 1)
#define MPP19_GPIO MPP(19, 0x0, 1, 1, 1)
#define MPP19_UA0_CTSn MPP(19, 0x4, 0, 1, 1)
#define MPP19_BOOT_FLASH_WEn MPP(19, 0x5, 0, 1, 1)
#define MPP19_UA0_CTSn MPP(19, 0x4, 0, 0, 1)
#define MPP19_BOOT_FLASH_WEn MPP(19, 0x5, 0, 0, 1)
#define MPP19_UNUSED MPP(19, 0x1, 0, 0, 1)
#define MPP20_GPIO MPP(20, 0x0, 1, 1, 1)
#define MPP20_UA1_CTSs MPP(20, 0x4, 1, 0, 1)
#define MPP20_TDM_PCLK MPP(20, 0x6, 1, 1, 0)
#define MPP20_UA1_CTSs MPP(20, 0x4, 0, 0, 1)
#define MPP20_TDM_PCLK MPP(20, 0x6, 0, 0, 0)
#define MPP20_UNUSED MPP(20, 0x1, 0, 0, 1)
#define MPP21_GPIO MPP(21, 0x0, 1, 1, 1)
#define MPP21_UA1_CTSs MPP(21, 0x4, 0, 1, 1)
#define MPP21_TDM_FSYNC MPP(21, 0x6, 1, 1, 0)
#define MPP21_UA1_CTSs MPP(21, 0x4, 0, 0, 1)
#define MPP21_TDM_FSYNC MPP(21, 0x6, 0, 0, 0)
#define MPP21_UNUSED MPP(21, 0x1, 0, 0, 1)
#define MPP22_GPIO MPP(22, 0x0, 1, 1, 1)
#define MPP22_UA3_TDX MPP(22, 0x4, 0, 1, 1)
#define MPP22_NAND_FLASH_REn2 MPP(22, 0x5, 0, 1, 1)
#define MPP22_TDM_DRX MPP(22, 0x6, 1, 0, 1)
#define MPP22_UA3_TDX MPP(22, 0x4, 0, 0, 1)
#define MPP22_NAND_FLASH_REn2 MPP(22, 0x5, 0, 0, 1)
#define MPP22_TDM_DRX MPP(22, 0x6, 0, 0, 1)
#define MPP22_UNUSED MPP(22, 0x1, 0, 0, 1)
#define MPP23_GPIO MPP(23, 0x0, 1, 1, 1)
#define MPP23_UA3_RDX MPP(23, 0x4, 1, 0, 1)
#define MPP23_NAND_FLASH_WEn2 MPP(23, 0x5, 0, 1, 1)
#define MPP23_TDM_DTX MPP(23, 0x6, 0, 1, 1)
#define MPP23_UA3_RDX MPP(23, 0x4, 0, 0, 1)
#define MPP23_NAND_FLASH_WEn2 MPP(23, 0x5, 0, 0, 1)
#define MPP23_TDM_DTX MPP(23, 0x6, 0, 0, 1)
#define MPP23_UNUSED MPP(23, 0x1, 0, 0, 1)
#define MPP24_GPIO MPP(24, 0x0, 1, 1, 1)
#define MPP24_UA2_TXD MPP(24, 0x4, 0, 1, 1)
#define MPP24_TDM_INTn MPP(24, 0x6, 1, 0, 1)
#define MPP24_UA2_TXD MPP(24, 0x4, 0, 0, 1)
#define MPP24_TDM_INTn MPP(24, 0x6, 0, 0, 1)
#define MPP24_UNUSED MPP(24, 0x1, 0, 0, 1)
#define MPP25_GPIO MPP(25, 0x0, 1, 1, 1)
#define MPP25_UA2_RXD MPP(25, 0x4, 1, 0, 1)
#define MPP25_TDM_RSTn MPP(25, 0x6, 0, 1, 1)
#define MPP25_UA2_RXD MPP(25, 0x4, 0, 0, 1)
#define MPP25_TDM_RSTn MPP(25, 0x6, 0, 0, 1)
#define MPP25_UNUSED MPP(25, 0x1, 0, 0, 1)
#define MPP26_GPIO MPP(26, 0x0, 1, 1, 1)
#define MPP26_UA2_CTSn MPP(26, 0x4, 1, 0, 1)
#define MPP26_TDM_PCLK MPP(26, 0x6, 1, 1, 1)
#define MPP26_UA2_CTSn MPP(26, 0x4, 0, 0, 1)
#define MPP26_TDM_PCLK MPP(26, 0x6, 0, 0, 1)
#define MPP26_UNUSED MPP(26, 0x1, 0, 0, 1)
#define MPP27_GPIO MPP(27, 0x0, 1, 1, 1)
#define MPP27_UA2_RTSn MPP(27, 0x4, 0, 1, 1)
#define MPP27_TDM_FSYNC MPP(27, 0x6, 1, 1, 1)
#define MPP27_UA2_RTSn MPP(27, 0x4, 0, 0, 1)
#define MPP27_TDM_FSYNC MPP(27, 0x6, 0, 0, 1)
#define MPP27_UNUSED MPP(27, 0x1, 0, 0, 1)
#define MPP28_GPIO MPP(28, 0x0, 1, 1, 1)
#define MPP28_UA3_TXD MPP(28, 0x4, 0, 1, 1)
#define MPP28_TDM_DRX MPP(28, 0x6, 1, 0, 1)
#define MPP28_UA3_TXD MPP(28, 0x4, 0, 0, 1)
#define MPP28_TDM_DRX MPP(28, 0x6, 0, 0, 1)
#define MPP28_UNUSED MPP(28, 0x1, 0, 0, 1)
#define MPP29_GPIO MPP(29, 0x0, 1, 1, 1)
#define MPP29_UA3_RXD MPP(29, 0x4, 1, 0, 1)
#define MPP29_SYSRST_OUTn MPP(29, 0x5, 0, 1, 1)
#define MPP29_TDM_DTX MPP(29, 0x6, 0, 1, 1)
#define MPP29_UA3_RXD MPP(29, 0x4, 0, 0, 1)
#define MPP29_SYSRST_OUTn MPP(29, 0x5, 0, 0, 1)
#define MPP29_TDM_DTX MPP(29, 0x6, 0, 0, 1)
#define MPP29_UNUSED MPP(29, 0x1, 0, 0, 1)
#define MPP30_GPIO MPP(30, 0x0, 1, 1, 1)
#define MPP30_UA3_CTSn MPP(30, 0x4, 1, 0, 1)
#define MPP30_UA3_CTSn MPP(30, 0x4, 0, 0, 1)
#define MPP30_UNUSED MPP(30, 0x1, 0, 0, 1)
#define MPP31_GPIO MPP(31, 0x0, 1, 1, 1)
#define MPP31_UA3_RTSn MPP(31, 0x4, 0, 1, 1)
#define MPP31_TDM1_SCSn MPP(31, 0x6, 0, 1, 1)
#define MPP31_UA3_RTSn MPP(31, 0x4, 0, 0, 1)
#define MPP31_TDM1_SCSn MPP(31, 0x6, 0, 0, 1)
#define MPP31_UNUSED MPP(31, 0x1, 0, 0, 1)
#define MPP32_GPIO MPP(32, 0x1, 1, 1, 1)
#define MPP32_UA3_TDX MPP(32, 0x4, 0, 1, 1)
#define MPP32_SYSRST_OUTn MPP(32, 0x5, 0, 1, 1)
#define MPP32_TDM0_RXQ MPP(32, 0x6, 0, 1, 1)
#define MPP32_UA3_TDX MPP(32, 0x4, 0, 0, 1)
#define MPP32_SYSRST_OUTn MPP(32, 0x5, 0, 0, 1)
#define MPP32_TDM0_RXQ MPP(32, 0x6, 0, 0, 1)
#define MPP32_UNUSED MPP(32, 0x3, 0, 0, 1)
#define MPP33_GPIO MPP(33, 0x1, 1, 1, 1)
#define MPP33_UA3_RDX MPP(33, 0x4, 1, 0, 1)
#define MPP33_TDM0_TXQ MPP(33, 0x6, 0, 1, 1)
#define MPP33_UA3_RDX MPP(33, 0x4, 0, 0, 1)
#define MPP33_TDM0_TXQ MPP(33, 0x6, 0, 0, 1)
#define MPP33_UNUSED MPP(33, 0x3, 0, 0, 1)
#define MPP34_GPIO MPP(34, 0x1, 1, 1, 1)
#define MPP34_UA2_TDX MPP(34, 0x4, 0, 1, 1)
#define MPP34_TDM1_RXQ MPP(34, 0x6, 0, 1, 1)
#define MPP34_UA2_TDX MPP(34, 0x4, 0, 0, 1)
#define MPP34_TDM1_RXQ MPP(34, 0x6, 0, 0, 1)
#define MPP34_UNUSED MPP(34, 0x3, 0, 0, 1)
#define MPP35_GPIO MPP(35, 0x1, 1, 1, 1)
#define MPP35_UA2_RDX MPP(35, 0x4, 1, 0, 1)
#define MPP35_TDM1_TXQ MPP(35, 0x6, 0, 1, 1)
#define MPP35_UA2_RDX MPP(35, 0x4, 0, 0, 1)
#define MPP35_TDM1_TXQ MPP(35, 0x6, 0, 0, 1)
#define MPP35_UNUSED MPP(35, 0x3, 0, 0, 1)
#define MPP36_GPIO MPP(36, 0x1, 1, 1, 1)
#define MPP36_UA0_CTSn MPP(36, 0x2, 1, 0, 1)
#define MPP36_UA2_TDX MPP(36, 0x4, 0, 1, 1)
#define MPP36_TDM0_SCSn MPP(36, 0x6, 0, 1, 1)
#define MPP36_UA0_CTSn MPP(36, 0x2, 0, 0, 1)
#define MPP36_UA2_TDX MPP(36, 0x4, 0, 0, 1)
#define MPP36_TDM0_SCSn MPP(36, 0x6, 0, 0, 1)
#define MPP36_UNUSED MPP(36, 0x3, 0, 0, 1)
#define MPP37_GPIO MPP(37, 0x1, 1, 1, 1)
#define MPP37_UA0_RTSn MPP(37, 0x2, 0, 1, 1)
#define MPP37_UA2_RXD MPP(37, 0x4, 1, 0, 1)
#define MPP37_SYSRST_OUTn MPP(37, 0x5, 0, 1, 1)
#define MPP37_TDM_SCLK MPP(37, 0x6, 0, 1, 1)
#define MPP37_UA0_RTSn MPP(37, 0x2, 0, 0, 1)
#define MPP37_UA2_RXD MPP(37, 0x4, 0, 0, 1)
#define MPP37_SYSRST_OUTn MPP(37, 0x5, 0, 0, 1)
#define MPP37_TDM_SCLK MPP(37, 0x6, 0, 0, 1)
#define MPP37_UNUSED MPP(37, 0x3, 0, 0, 1)
#define MPP38_GPIO MPP(38, 0x1, 1, 1, 1)
#define MPP38_UA1_CTSn MPP(38, 0x2, 1, 0, 1)
#define MPP38_UA3_TXD MPP(38, 0x4, 0, 1, 1)
#define MPP38_SYSRST_OUTn MPP(38, 0x5, 0, 1, 1)
#define MPP38_TDM_SMOSI MPP(38, 0x6, 0, 1, 1)
#define MPP38_UA1_CTSn MPP(38, 0x2, 0, 0, 1)
#define MPP38_UA3_TXD MPP(38, 0x4, 0, 0, 1)
#define MPP38_SYSRST_OUTn MPP(38, 0x5, 0, 0, 1)
#define MPP38_TDM_SMOSI MPP(38, 0x6, 0, 0, 1)
#define MPP38_UNUSED MPP(38, 0x3, 0, 0, 1)
#define MPP39_GPIO MPP(39, 0x1, 1, 1, 1)
#define MPP39_UA1_RTSn MPP(39, 0x2, 0, 1, 1)
#define MPP39_UA3_RXD MPP(39, 0x4, 1, 0, 1)
#define MPP39_SYSRST_OUTn MPP(39, 0x5, 0, 1, 1)
#define MPP39_TDM_SMISO MPP(39, 0x6, 1, 0, 1)
#define MPP39_UA1_RTSn MPP(39, 0x2, 0, 0, 1)
#define MPP39_UA3_RXD MPP(39, 0x4, 0, 0, 1)
#define MPP39_SYSRST_OUTn MPP(39, 0x5, 0, 0, 1)
#define MPP39_TDM_SMISO MPP(39, 0x6, 0, 0, 1)
#define MPP39_UNUSED MPP(39, 0x3, 0, 0, 1)
#define MPP40_GPIO MPP(40, 0x1, 1, 1, 1)
#define MPP40_TDM_INTn MPP(40, 0x6, 1, 0, 1)
#define MPP40_TDM_INTn MPP(40, 0x6, 0, 0, 1)
#define MPP40_UNUSED MPP(40, 0x0, 0, 0, 1)
#define MPP41_GPIO MPP(41, 0x1, 1, 1, 1)
#define MPP41_TDM_RSTn MPP(41, 0x6, 0, 1, 1)
#define MPP41_TDM_RSTn MPP(41, 0x6, 0, 0, 1)
#define MPP41_UNUSED MPP(41, 0x0, 0, 0, 1)
#define MPP42_GPIO MPP(42, 0x1, 1, 1, 1)
#define MPP42_TDM_PCLK MPP(42, 0x6, 1, 1, 1)
#define MPP42_TDM_PCLK MPP(42, 0x6, 0, 0, 1)
#define MPP42_UNUSED MPP(42, 0x0, 0, 0, 1)
#define MPP43_GPIO MPP(43, 0x1, 1, 1, 1)
#define MPP43_TDM_FSYNC MPP(43, 0x6, 1, 1, 1)
#define MPP43_TDM_FSYNC MPP(43, 0x6, 0, 0, 1)
#define MPP43_UNUSED MPP(43, 0x0, 0, 0, 1)
#define MPP44_GPIO MPP(44, 0x1, 1, 1, 1)
#define MPP44_TDM_DRX MPP(44, 0x6, 1, 0, 1)
#define MPP44_TDM_DRX MPP(44, 0x6, 0, 0, 1)
#define MPP44_UNUSED MPP(44, 0x0, 0, 0, 1)
#define MPP45_GPIO MPP(45, 0x1, 1, 1, 1)
#define MPP45_SATA0_ACTn MPP(45, 0x3, 0, 1, 1)
#define MPP45_TDM_DRX MPP(45, 0x6, 0, 1, 1)
#define MPP45_SATA0_ACTn MPP(45, 0x3, 0, 0, 1)
#define MPP45_TDM_DRX MPP(45, 0x6, 0, 0, 1)
#define MPP45_UNUSED MPP(45, 0x0, 0, 0, 1)
#define MPP46_GPIO MPP(46, 0x1, 1, 1, 1)
#define MPP46_TDM_SCSn MPP(46, 0x6, 0, 1, 1)
#define MPP46_TDM_SCSn MPP(46, 0x6, 0, 0, 1)
#define MPP46_UNUSED MPP(46, 0x0, 0, 0, 1)
......@@ -323,14 +323,14 @@
#define MPP48_GPIO MPP(48, 0x1, 1, 1, 1)
#define MPP48_SATA1_ACTn MPP(48, 0x3, 0, 1, 1)
#define MPP48_SATA1_ACTn MPP(48, 0x3, 0, 0, 1)
#define MPP48_UNUSED MPP(48, 0x2, 0, 0, 1)
#define MPP49_GPIO MPP(49, 0x1, 1, 1, 1)
#define MPP49_SATA0_ACTn MPP(49, 0x3, 0, 1, 1)
#define MPP49_M_BB MPP(49, 0x4, 1, 0, 1)
#define MPP49_SATA0_ACTn MPP(49, 0x3, 0, 0, 1)
#define MPP49_M_BB MPP(49, 0x4, 0, 0, 1)
#define MPP49_UNUSED MPP(49, 0x2, 0, 0, 1)
......
arch/arm/mach-omap2/Makefile
浏览文件 @ 015f1e42
......@@ -11,9 +11,9 @@ hwmod-common = omap_hwmod.o \
omap_hwmod_common_data.o
clock-common = clock.o clock_common_data.o \
clkt_dpll.o clkt_clksel.o
secure-common = omap-smc.o omap-secure.o
secure-common = omap-smc.o omap-secure.o
obj-$(CONFIG_ARCH_OMAP2) += $(omap-2-3-common) $(hwmod-common) $(secure-common)
obj-$(CONFIG_ARCH_OMAP2) += $(omap-2-3-common) $(hwmod-common)
obj-$(CONFIG_ARCH_OMAP3) += $(omap-2-3-common) $(hwmod-common) $(secure-common)
obj-$(CONFIG_ARCH_OMAP4) += prm44xx.o $(hwmod-common) $(secure-common)
......
arch/arm/mach-omap2/board-2430sdp.c
浏览文件 @ 015f1e42
......@@ -279,7 +279,7 @@ static void __init omap_2430sdp_init(void)
platform_add_devices(sdp2430_devices, ARRAY_SIZE(sdp2430_devices));
omap_serial_init();
omap_sdrc_init(NULL, NULL);
omap2_hsmmc_init(mmc);
omap_hsmmc_init(mmc);
omap2_usbfs_init(&sdp2430_usb_config);
omap_mux_init_signal("usb0hs_stp", OMAP_PULL_ENA | OMAP_PULL_UP);
......
arch/arm/mach-omap2/board-3430sdp.c
浏览文件 @ 015f1e42
......@@ -232,11 +232,13 @@ static struct omap2_hsmmc_info mmc[] = {
*/
.caps = MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA,
.gpio_wp = 4,
.deferred = true,
},
{
.mmc = 2,
.caps = MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA,
.gpio_wp = 7,
.deferred = true,
},
{} /* Terminator */
};
......@@ -249,7 +251,7 @@ static int sdp3430_twl_gpio_setup(struct device *dev,
*/
mmc[0].gpio_cd = gpio + 0;
mmc[1].gpio_cd = gpio + 1;
omap2_hsmmc_init(mmc);
omap_hsmmc_late_init(mmc);
/* gpio + 7 is "sub_lcd_en_bkl" (output/PWM1) */
gpio_request_one(gpio + 7, GPIOF_OUT_INIT_LOW, "sub_lcd_en_bkl");
......@@ -606,6 +608,7 @@ static void __init omap_3430sdp_init(void)
omap3_mux_init(board_mux, OMAP_PACKAGE_CBB);
omap_board_config = sdp3430_config;
omap_board_config_size = ARRAY_SIZE(sdp3430_config);
omap_hsmmc_init(mmc);
omap3430_i2c_init();
omap_display_init(&sdp3430_dss_data);
if (omap_rev() > OMAP3430_REV_ES1_0)
......
arch/arm/mach-omap2/board-4430sdp.c
浏览文件 @ 015f1e42
......@@ -491,9 +491,9 @@ static int __init omap4_twl6030_hsmmc_init(struct omap2_hsmmc_info *controllers)
{
struct omap2_hsmmc_info *c;
omap2_hsmmc_init(controllers);
omap_hsmmc_init(controllers);
for (c = controllers; c->mmc; c++)
omap4_twl6030_hsmmc_set_late_init(c->dev);
omap4_twl6030_hsmmc_set_late_init(&c->pdev->dev);
return 0;
}
......@@ -814,7 +814,7 @@ static struct omap_dss_board_info sdp4430_dss_data = {
.default_device = &sdp4430_lcd_device,
};
static void omap_4430sdp_display_init(void)
static void __init omap_4430sdp_display_init(void)
{
int r;
......@@ -851,7 +851,7 @@ static struct omap_board_mux board_mux[] __initdata = {
#define board_mux NULL
#endif
static void omap4_sdp4430_wifi_mux_init(void)
static void __init omap4_sdp4430_wifi_mux_init(void)
{
omap_mux_init_gpio(GPIO_WIFI_IRQ, OMAP_PIN_INPUT |
OMAP_PIN_OFF_WAKEUPENABLE);
......@@ -878,12 +878,17 @@ static struct wl12xx_platform_data omap4_sdp4430_wlan_data __initdata = {
.board_tcxo_clock = WL12XX_TCXOCLOCK_26,
};
static void omap4_sdp4430_wifi_init(void)
static void __init omap4_sdp4430_wifi_init(void)
{
int ret;
omap4_sdp4430_wifi_mux_init();
if (wl12xx_set_platform_data(&omap4_sdp4430_wlan_data))
pr_err("Error setting wl12xx data\n");
platform_device_register(&omap_vwlan_device);
ret = wl12xx_set_platform_data(&omap4_sdp4430_wlan_data);
if (ret)
pr_err("Error setting wl12xx data: %d\n", ret);
ret = platform_device_register(&omap_vwlan_device);
if (ret)
pr_err("Error registering wl12xx device: %d\n", ret);
}
static void __init omap_4430sdp_init(void)
......
arch/arm/mach-omap2/board-am3517evm.c
浏览文件 @ 015f1e42
......@@ -504,7 +504,7 @@ static void __init am3517_evm_init(void)
am3517_evm_musb_init();
/* MMC init function */
omap2_hsmmc_init(mmc);
omap_hsmmc_init(mmc);
}
MACHINE_START(OMAP3517EVM, "OMAP3517/AM3517 EVM")
......
arch/arm/mach-omap2/board-cm-t35.c
浏览文件 @ 015f1e42
......@@ -412,7 +412,7 @@ static struct omap2_hsmmc_info mmc[] = {
.caps = MMC_CAP_4_BIT_DATA,
.gpio_cd = -EINVAL,
.gpio_wp = -EINVAL,
.deferred = true,
},
{
.mmc = 2,
......@@ -436,7 +436,7 @@ static struct usbhs_omap_board_data usbhs_bdata __initdata = {
.reset_gpio_port[2] = -EINVAL
};
static void cm_t35_init_usbh(void)
static void __init cm_t35_init_usbh(void)
{
int err;
......@@ -470,7 +470,7 @@ static int cm_t35_twl_gpio_setup(struct device *dev, unsigned gpio,
/* gpio + 0 is "mmc0_cd" (input/IRQ) */
mmc[0].gpio_cd = gpio + 0;
omap2_hsmmc_init(mmc);
omap_hsmmc_late_init(mmc);
return 0;
}
......@@ -638,6 +638,7 @@ static void __init cm_t3x_common_init(void)
omap_serial_init();
omap_sdrc_init(mt46h32m32lf6_sdrc_params,
mt46h32m32lf6_sdrc_params);
omap_hsmmc_init(mmc);
cm_t35_init_i2c();
omap_ads7846_init(1, CM_T35_GPIO_PENDOWN, 0, NULL);
cm_t35_init_ethernet();
......
arch/arm/mach-omap2/board-devkit8000.c
浏览文件 @ 015f1e42
......@@ -100,6 +100,7 @@ static struct omap2_hsmmc_info mmc[] = {
.mmc = 1,
.caps = MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA,
.gpio_wp = 29,
.deferred = true,
},
{} /* Terminator */
};
......@@ -228,7 +229,7 @@ static int devkit8000_twl_gpio_setup(struct device *dev,
/* gpio + 0 is "mmc0_cd" (input/IRQ) */
mmc[0].gpio_cd = gpio + 0;
omap2_hsmmc_init(mmc);
omap_hsmmc_late_init(mmc);
/* TWL4030_GPIO_MAX + 1 == ledB, PMU_STAT (out, active low LED) */
gpio_leds[2].gpio = gpio + TWL4030_GPIO_MAX + 1;
......@@ -636,6 +637,7 @@ static void __init devkit8000_init(void)
omap_dm9000_init();
omap_hsmmc_init(mmc);
devkit8000_i2c_init();
platform_add_devices(devkit8000_devices,
ARRAY_SIZE(devkit8000_devices));
......
arch/arm/mach-omap2/board-flash.c
浏览文件 @ 015f1e42
......@@ -189,7 +189,7 @@ static u8 get_gpmc0_type(void)
*
* @return - void.
*/
void board_flash_init(struct flash_partitions partition_info[],
void __init board_flash_init(struct flash_partitions partition_info[],
char chip_sel_board[][GPMC_CS_NUM], int nand_type)
{
u8 cs = 0;
......
arch/arm/mach-omap2/board-generic.c
浏览文件 @ 015f1e42
......@@ -17,6 +17,7 @@
#include <linux/i2c/twl.h>
#include <mach/hardware.h>
#include <asm/hardware/gic.h>
#include <asm/mach/arch.h>
#include <plat/board.h>
......@@ -102,6 +103,7 @@ DT_MACHINE_START(OMAP242X_DT, "Generic OMAP2420 (Flattened Device Tree)")
.map_io = omap242x_map_io,
.init_early = omap2420_init_early,
.init_irq = omap2_init_irq,
.handle_irq = omap2_intc_handle_irq,
.init_machine = omap_generic_init,
.timer = &omap2_timer,
.dt_compat = omap242x_boards_compat,
......@@ -141,6 +143,7 @@ DT_MACHINE_START(OMAP3_DT, "Generic OMAP3 (Flattened Device Tree)")
.map_io = omap3_map_io,
.init_early = omap3430_init_early,
.init_irq = omap3_init_irq,
.handle_irq = omap3_intc_handle_irq,
.init_machine = omap3_init,
.timer = &omap3_timer,
.dt_compat = omap3_boards_compat,
......@@ -160,6 +163,7 @@ DT_MACHINE_START(OMAP4_DT, "Generic OMAP4 (Flattened Device Tree)")
.map_io = omap4_map_io,
.init_early = omap4430_init_early,
.init_irq = gic_init_irq,
.handle_irq = gic_handle_irq,
.init_machine = omap4_init,
.timer = &omap4_timer,
.dt_compat = omap4_boards_compat,
......
arch/arm/mach-omap2/board-igep0020.c
浏览文件 @ 015f1e42
......@@ -295,6 +295,7 @@ static struct omap2_hsmmc_info mmc[] = {
.caps = MMC_CAP_4_BIT_DATA,
.gpio_cd = -EINVAL,
.gpio_wp = -EINVAL,
.deferred = true,
},
#if defined(CONFIG_LIBERTAS_SDIO) || defined(CONFIG_LIBERTAS_SDIO_MODULE)
{
......@@ -402,7 +403,7 @@ static int igep_twl_gpio_setup(struct device *dev,
/* gpio + 0 is "mmc0_cd" (input/IRQ) */
mmc[0].gpio_cd = gpio + 0;
omap2_hsmmc_init(mmc);
omap_hsmmc_late_init(mmc);
/* TWL4030_GPIO_MAX + 1 == ledB (out, active low LED) */
#if !defined(CONFIG_LEDS_GPIO) && !defined(CONFIG_LEDS_GPIO_MODULE)
......@@ -639,6 +640,9 @@ static void __init igep_init(void)
/* Get IGEP2 hardware revision */
igep2_get_revision();
omap_hsmmc_init(mmc);
/* Register I2C busses and drivers */
igep_i2c_init();
platform_add_devices(igep_devices, ARRAY_SIZE(igep_devices));
......
arch/arm/mach-omap2/board-ldp.c
浏览文件 @ 015f1e42
......@@ -424,7 +424,7 @@ static void __init omap_ldp_init(void)
board_nand_init(ldp_nand_partitions,
ARRAY_SIZE(ldp_nand_partitions), ZOOM_NAND_CS, 0);
omap2_hsmmc_init(mmc);
omap_hsmmc_init(mmc);
ldp_display_init();
}
......
arch/arm/mach-omap2/board-n8x0.c
浏览文件 @ 015f1e42
......@@ -370,7 +370,11 @@ static void n8x0_mmc_callback(void *data, u8 card_mask)
else
*openp = 0;
#ifdef CONFIG_MMC_OMAP
omap_mmc_notify_cover_event(mmc_device, index, *openp);
#else
pr_warn("MMC: notify cover event not available\n");
#endif
}
static int n8x0_mmc_late_init(struct device *dev)
......
arch/arm/mach-omap2/board-omap3beagle.c
浏览文件 @ 015f1e42
......@@ -253,6 +253,7 @@ static struct omap2_hsmmc_info mmc[] = {
.mmc = 1,
.caps = MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA,
.gpio_wp = -EINVAL,
.deferred = true,
},
{} /* Terminator */
};
......@@ -272,12 +273,10 @@ static int beagle_twl_gpio_setup(struct device *dev,
{
int r;
if (beagle_config.mmc1_gpio_wp != -EINVAL)
omap_mux_init_gpio(beagle_config.mmc1_gpio_wp, OMAP_PIN_INPUT);
mmc[0].gpio_wp = beagle_config.mmc1_gpio_wp;
/* gpio + 0 is "mmc0_cd" (input/IRQ) */
mmc[0].gpio_cd = gpio + 0;
omap2_hsmmc_init(mmc);
omap_hsmmc_late_init(mmc);
/*
* TWL4030_GPIO_MAX + 0 == ledA, EHCI nEN_USB_PWR (out, XM active
......@@ -521,6 +520,11 @@ static void __init omap3_beagle_init(void)
{
omap3_mux_init(board_mux, OMAP_PACKAGE_CBB);
omap3_beagle_init_rev();
if (beagle_config.mmc1_gpio_wp != -EINVAL)
omap_mux_init_gpio(beagle_config.mmc1_gpio_wp, OMAP_PIN_INPUT);
omap_hsmmc_init(mmc);
omap3_beagle_i2c_init();
gpio_buttons[0].gpio = beagle_config.usr_button_gpio;
......
arch/arm/mach-omap2/board-omap3evm.c
浏览文件 @ 015f1e42
......@@ -317,6 +317,7 @@ static struct omap2_hsmmc_info mmc[] = {
.caps = MMC_CAP_4_BIT_DATA,
.gpio_cd = -EINVAL,
.gpio_wp = 63,
.deferred = true,
},
#ifdef CONFIG_WL12XX_PLATFORM_DATA
{
......@@ -361,9 +362,8 @@ static int omap3evm_twl_gpio_setup(struct device *dev,
int r, lcd_bl_en;
/* gpio + 0 is "mmc0_cd" (input/IRQ) */
omap_mux_init_gpio(63, OMAP_PIN_INPUT);
mmc[0].gpio_cd = gpio + 0;
omap2_hsmmc_init(mmc);
omap_hsmmc_late_init(mmc);
/*
* Most GPIOs are for USB OTG. Some are mostly sent to
......@@ -617,6 +617,21 @@ static struct gpio omap3_evm_ehci_gpios[] __initdata = {
{ OMAP3_EVM_EHCI_SELECT, GPIOF_OUT_INIT_LOW, "select EHCI port" },
};
static void __init omap3_evm_wl12xx_init(void)
{
#ifdef CONFIG_WL12XX_PLATFORM_DATA
int ret;
/* WL12xx WLAN Init */
ret = wl12xx_set_platform_data(&omap3evm_wlan_data);
if (ret)
pr_err("error setting wl12xx data: %d\n", ret);
ret = platform_device_register(&omap3evm_wlan_regulator);
if (ret)
pr_err("error registering wl12xx device: %d\n", ret);
#endif
}
static void __init omap3_evm_init(void)
{
omap3_evm_get_revision();
......@@ -629,6 +644,9 @@ static void __init omap3_evm_init(void)
omap_board_config = omap3_evm_config;
omap_board_config_size = ARRAY_SIZE(omap3_evm_config);
omap_mux_init_gpio(63, OMAP_PIN_INPUT);
omap_hsmmc_init(mmc);
omap3_evm_i2c_init();
omap_display_init(&omap3_evm_dss_data);
......@@ -665,13 +683,7 @@ static void __init omap3_evm_init(void)
omap_ads7846_init(1, OMAP3_EVM_TS_GPIO, 310, NULL);
omap3evm_init_smsc911x();
omap3_evm_display_init();
#ifdef CONFIG_WL12XX_PLATFORM_DATA
/* WL12xx WLAN Init */
if (wl12xx_set_platform_data(&omap3evm_wlan_data))
pr_err("error setting wl12xx data\n");
platform_device_register(&omap3evm_wlan_regulator);
#endif
omap3_evm_wl12xx_init();
}
MACHINE_START(OMAP3EVM, "OMAP3 EVM")
......
arch/arm/mach-omap2/board-omap3logic.c
浏览文件 @ 015f1e42
......@@ -128,7 +128,7 @@ static void __init board_mmc_init(void)
return;
}
omap2_hsmmc_init(board_mmc_info);
omap_hsmmc_init(board_mmc_info);
}
static struct omap_smsc911x_platform_data __initdata board_smsc911x_data = {
......
arch/arm/mach-omap2/board-omap3pandora.c
浏览文件 @ 015f1e42
......@@ -273,6 +273,7 @@ static struct omap2_hsmmc_info omap3pandora_mmc[] = {
.gpio_cd = -EINVAL,
.gpio_wp = 126,
.ext_clock = 0,
.deferred = true,
},
{
.mmc = 2,
......@@ -281,6 +282,7 @@ static struct omap2_hsmmc_info omap3pandora_mmc[] = {
.gpio_wp = 127,
.ext_clock = 1,
.transceiver = true,
.deferred = true,
},
{
.mmc = 3,
......@@ -300,7 +302,7 @@ static int omap3pandora_twl_gpio_setup(struct device *dev,
/* gpio + {0,1} is "mmc{0,1}_cd" (input/IRQ) */
omap3pandora_mmc[0].gpio_cd = gpio + 0;
omap3pandora_mmc[1].gpio_cd = gpio + 1;
omap2_hsmmc_init(omap3pandora_mmc);
omap_hsmmc_late_init(omap3pandora_mmc);
/* gpio + 13 drives 32kHz buffer for wifi module */
gpio_32khz = gpio + 13;
......@@ -580,6 +582,7 @@ static struct omap_board_mux board_mux[] __initdata = {
static void __init omap3pandora_init(void)
{
omap3_mux_init(board_mux, OMAP_PACKAGE_CBB);
omap_hsmmc_init(omap3pandora_mmc);
omap3pandora_i2c_init();
pandora_wl1251_init();
platform_add_devices(omap3pandora_devices,
......
arch/arm/mach-omap2/board-omap3stalker.c
浏览文件 @ 015f1e42
......@@ -209,10 +209,11 @@ static struct regulator_init_data omap3stalker_vsim = {
static struct omap2_hsmmc_info mmc[] = {
{
.mmc = 1,
.caps = MMC_CAP_4_BIT_DATA,
.gpio_cd = -EINVAL,
.gpio_wp = 23,
.mmc = 1,
.caps = MMC_CAP_4_BIT_DATA,
.gpio_cd = -EINVAL,
.gpio_wp = 23,
.deferred = true,
},
{} /* Terminator */
};
......@@ -282,9 +283,8 @@ omap3stalker_twl_gpio_setup(struct device *dev,
unsigned gpio, unsigned ngpio)
{
/* gpio + 0 is "mmc0_cd" (input/IRQ) */
omap_mux_init_gpio(23, OMAP_PIN_INPUT);
mmc[0].gpio_cd = gpio + 0;
omap2_hsmmc_init(mmc);
omap_hsmmc_late_init(mmc);
/*
* Most GPIOs are for USB OTG. Some are mostly sent to
......@@ -425,6 +425,9 @@ static void __init omap3_stalker_init(void)
omap_board_config = omap3_stalker_config;
omap_board_config_size = ARRAY_SIZE(omap3_stalker_config);
omap_mux_init_gpio(23, OMAP_PIN_INPUT);
omap_hsmmc_init(mmc);
omap3_stalker_i2c_init();
platform_add_devices(omap3_stalker_devices,
......
arch/arm/mach-omap2/board-omap3touchbook.c
浏览文件 @ 015f1e42
......@@ -100,6 +100,7 @@ static struct omap2_hsmmc_info mmc[] = {
.mmc = 1,
.caps = MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA,
.gpio_wp = 29,
.deferred = true,
},
{} /* Terminator */
};
......@@ -117,15 +118,9 @@ static struct gpio_led gpio_leds[];
static int touchbook_twl_gpio_setup(struct device *dev,
unsigned gpio, unsigned ngpio)
{
if (system_rev >= 0x20 && system_rev <= 0x34301000) {
omap_mux_init_gpio(23, OMAP_PIN_INPUT);
mmc[0].gpio_wp = 23;
} else {
omap_mux_init_gpio(29, OMAP_PIN_INPUT);
}
/* gpio + 0 is "mmc0_cd" (input/IRQ) */
mmc[0].gpio_cd = gpio + 0;
omap2_hsmmc_init(mmc);
omap_hsmmc_late_init(mmc);
/* REVISIT: need ehci-omap hooks for external VBUS
* power switch and overcurrent detect
......@@ -351,6 +346,14 @@ static void __init omap3_touchbook_init(void)
pm_power_off = omap3_touchbook_poweroff;
if (system_rev >= 0x20 && system_rev <= 0x34301000) {
omap_mux_init_gpio(23, OMAP_PIN_INPUT);
mmc[0].gpio_wp = 23;
} else {
omap_mux_init_gpio(29, OMAP_PIN_INPUT);
}
omap_hsmmc_init(mmc);
omap3_touchbook_i2c_init();
platform_add_devices(omap3_touchbook_devices,
ARRAY_SIZE(omap3_touchbook_devices));
......
arch/arm/mach-omap2/board-omap4panda.c
浏览文件 @ 015f1e42
......@@ -245,9 +245,9 @@ static int __init omap4_twl6030_hsmmc_init(struct omap2_hsmmc_info *controllers)
{
struct omap2_hsmmc_info *c;
omap2_hsmmc_init(controllers);
omap_hsmmc_init(controllers);
for (c = controllers; c->mmc; c++)
omap4_twl6030_hsmmc_set_late_init(c->dev);
omap4_twl6030_hsmmc_set_late_init(&c->pdev->dev);
return 0;
}
......@@ -461,7 +461,7 @@ static struct omap_dss_board_info omap4_panda_dss_data = {
.default_device = &omap4_panda_dvi_device,
};
void omap4_panda_display_init(void)
void __init omap4_panda_display_init(void)
{
int r;
......@@ -488,13 +488,15 @@ void omap4_panda_display_init(void)
static void __init omap4_panda_init(void)
{
int package = OMAP_PACKAGE_CBS;
int ret;
if (omap_rev() == OMAP4430_REV_ES1_0)
package = OMAP_PACKAGE_CBL;
omap4_mux_init(board_mux, NULL, package);
if (wl12xx_set_platform_data(&omap_panda_wlan_data))
pr_err("error setting wl12xx data\n");
ret = wl12xx_set_platform_data(&omap_panda_wlan_data);
if (ret)
pr_err("error setting wl12xx data: %d\n", ret);
omap4_panda_i2c_init();
platform_add_devices(panda_devices, ARRAY_SIZE(panda_devices));
......
arch/arm/mach-omap2/board-overo.c
浏览文件 @ 015f1e42
......@@ -407,8 +407,6 @@ static inline void __init overo_init_keys(void) { return; }
static int overo_twl_gpio_setup(struct device *dev,
unsigned gpio, unsigned ngpio)
{
omap2_hsmmc_init(mmc);
#if defined(CONFIG_LEDS_GPIO) || defined(CONFIG_LEDS_GPIO_MODULE)
/* TWL4030_GPIO_MAX + 1 == ledB, PMU_STAT (out, active low LED) */
gpio_leds[2].gpio = gpio + TWL4030_GPIO_MAX + 1;
......@@ -505,6 +503,7 @@ static void __init overo_init(void)
int ret;
omap3_mux_init(board_mux, OMAP_PACKAGE_CBB);
omap_hsmmc_init(mmc);
overo_i2c_init();
omap_display_init(&overo_dss_data);
omap_serial_init();
......
arch/arm/mach-omap2/board-rm680.c
浏览文件 @ 015f1e42
......@@ -120,7 +120,7 @@ static void __init rm680_peripherals_init(void)
ARRAY_SIZE(rm680_peripherals_devices));
rm680_i2c_init();
gpmc_onenand_init(board_onenand_data);
omap2_hsmmc_init(mmc);
omap_hsmmc_init(mmc);
}
#ifdef CONFIG_OMAP_MUX
......
arch/arm/mach-omap2/board-rx51-peripherals.c
浏览文件 @ 015f1e42
......@@ -1142,7 +1142,7 @@ void __init rx51_peripherals_init(void)
partition = omap_mux_get("core");
if (partition)
omap2_hsmmc_init(mmc);
omap_hsmmc_init(mmc);
rx51_charger_init();
}
......
arch/arm/mach-omap2/board-zoom-peripherals.c
浏览文件 @ 015f1e42
......@@ -205,6 +205,7 @@ static struct omap2_hsmmc_info mmc[] = {
.caps = MMC_CAP_4_BIT_DATA,
.gpio_wp = -EINVAL,
.power_saving = true,
.deferred = true,
},
{
.name = "internal",
......@@ -233,7 +234,7 @@ static int zoom_twl_gpio_setup(struct device *dev,
/* gpio + 0 is "mmc0_cd" (input/IRQ) */
mmc[0].gpio_cd = gpio + 0;
omap2_hsmmc_init(mmc);
omap_hsmmc_late_init(mmc);
ret = gpio_request_one(LCD_PANEL_ENABLE_GPIO, GPIOF_OUT_INIT_LOW,
"lcd enable");
......@@ -296,9 +297,12 @@ static void enable_board_wakeup_source(void)
void __init zoom_peripherals_init(void)
{
if (wl12xx_set_platform_data(&omap_zoom_wlan_data))
pr_err("error setting wl12xx data\n");
int ret = wl12xx_set_platform_data(&omap_zoom_wlan_data);
if (ret)
pr_err("error setting wl12xx data: %d\n", ret);
omap_hsmmc_init(mmc);
omap_i2c_init();
platform_device_register(&omap_vwlan_device);
usb_musb_init(NULL);
......
arch/arm/mach-omap2/devices.c
浏览文件 @ 015f1e42
......@@ -276,7 +276,7 @@ int __init omap4_keyboard_init(struct omap4_keypad_platform_data
}
#if defined(CONFIG_OMAP_MBOX_FWK) || defined(CONFIG_OMAP_MBOX_FWK_MODULE)
static inline void omap_init_mbox(void)
static inline void __init omap_init_mbox(void)
{
struct omap_hwmod *oh;
struct platform_device *pdev;
......@@ -337,7 +337,7 @@ static inline void omap_init_audio(void) {}
#if defined(CONFIG_SND_OMAP_SOC_MCPDM) || \
defined(CONFIG_SND_OMAP_SOC_MCPDM_MODULE)
static void omap_init_mcpdm(void)
static void __init omap_init_mcpdm(void)
{
struct omap_hwmod *oh;
struct platform_device *pdev;
......@@ -358,7 +358,7 @@ static inline void omap_init_mcpdm(void) {}
#if defined(CONFIG_SND_OMAP_SOC_DMIC) || \
defined(CONFIG_SND_OMAP_SOC_DMIC_MODULE)
static void omap_init_dmic(void)
static void __init omap_init_dmic(void)
{
struct omap_hwmod *oh;
struct platform_device *pdev;
......@@ -380,7 +380,7 @@ static inline void omap_init_dmic(void) {}
#include <plat/mcspi.h>
static int omap_mcspi_init(struct omap_hwmod *oh, void *unused)
static int __init omap_mcspi_init(struct omap_hwmod *oh, void *unused)
{
struct platform_device *pdev;
char *name = "omap2_mcspi";
......
arch/arm/mach-omap2/display.c
浏览文件 @ 015f1e42
......@@ -125,7 +125,7 @@ static void omap4_hdmi_mux_pads(enum omap_hdmi_flags flags)
}
}
static int omap4_dsi_mux_pads(int dsi_id, unsigned lanes)
static int __init omap4_dsi_mux_pads(int dsi_id, unsigned lanes)
{
u32 enable_mask, enable_shift;
u32 pipd_mask, pipd_shift;
......@@ -158,7 +158,7 @@ static int omap4_dsi_mux_pads(int dsi_id, unsigned lanes)
return 0;
}
int omap_hdmi_init(enum omap_hdmi_flags flags)
int __init omap_hdmi_init(enum omap_hdmi_flags flags)
{
if (cpu_is_omap44xx())
omap4_hdmi_mux_pads(flags);
......@@ -166,7 +166,7 @@ int omap_hdmi_init(enum omap_hdmi_flags flags)
return 0;
}
static int omap_dsi_enable_pads(int dsi_id, unsigned lane_mask)
static int __init omap_dsi_enable_pads(int dsi_id, unsigned lane_mask)
{
if (cpu_is_omap44xx())
return omap4_dsi_mux_pads(dsi_id, lane_mask);
......@@ -174,7 +174,7 @@ static int omap_dsi_enable_pads(int dsi_id, unsigned lane_mask)
return 0;
}
static void omap_dsi_disable_pads(int dsi_id, unsigned lane_mask)
static void __init omap_dsi_disable_pads(int dsi_id, unsigned lane_mask)
{
if (cpu_is_omap44xx())
omap4_dsi_mux_pads(dsi_id, 0);
......
arch/arm/mach-omap2/gpio.c
浏览文件 @ 015f1e42
......@@ -24,7 +24,7 @@
#include <plat/omap_hwmod.h>
#include <plat/omap_device.h>
static int omap2_gpio_dev_init(struct omap_hwmod *oh, void *unused)
static int __init omap2_gpio_dev_init(struct omap_hwmod *oh, void *unused)
{
struct platform_device *pdev;
struct omap_gpio_platform_data *pdata;
......
arch/arm/mach-omap2/hsmmc.c
浏览文件 @ 015f1e42
......@@ -428,69 +428,140 @@ static int __init omap_hsmmc_pdata_init(struct omap2_hsmmc_info *c,
return 0;
}
static int omap_hsmmc_done;
void omap_hsmmc_late_init(struct omap2_hsmmc_info *c)
{
struct platform_device *pdev;
struct omap_mmc_platform_data *mmc_pdata;
int res;
if (omap_hsmmc_done != 1)
return;
omap_hsmmc_done++;
for (; c->mmc; c++) {
if (!c->deferred)
continue;
pdev = c->pdev;
if (!pdev)
continue;
mmc_pdata = pdev->dev.platform_data;
if (!mmc_pdata)
continue;
mmc_pdata->slots[0].switch_pin = c->gpio_cd;
mmc_pdata->slots[0].gpio_wp = c->gpio_wp;
res = omap_device_register(pdev);
if (res)
pr_err("Could not late init MMC %s\n",
c->name);
}
}
#define MAX_OMAP_MMC_HWMOD_NAME_LEN 16
void __init omap_init_hsmmc(struct omap2_hsmmc_info *hsmmcinfo, int ctrl_nr)
static void omap_hsmmc_init_one(struct omap2_hsmmc_info *hsmmcinfo,
int ctrl_nr)
{
struct omap_hwmod *oh;
struct omap_hwmod *ohs[1];
struct omap_device *od;
struct platform_device *pdev;
char oh_name[MAX_OMAP_MMC_HWMOD_NAME_LEN];
struct omap_mmc_platform_data *mmc_data;
struct omap_mmc_dev_attr *mmc_dev_attr;
char *name;
int l;
int res;
mmc_data = kzalloc(sizeof(struct omap_mmc_platform_data), GFP_KERNEL);
if (!mmc_data) {
pr_err("Cannot allocate memory for mmc device!\n");
goto done;
return;
}
if (omap_hsmmc_pdata_init(hsmmcinfo, mmc_data) < 0) {
pr_err("%s fails!\n", __func__);
goto done;
}
res = omap_hsmmc_pdata_init(hsmmcinfo, mmc_data);
if (res < 0)
goto free_mmc;
omap_hsmmc_mux(mmc_data, (ctrl_nr - 1));
name = "omap_hsmmc";
l = snprintf(oh_name, MAX_OMAP_MMC_HWMOD_NAME_LEN,
res = snprintf(oh_name, MAX_OMAP_MMC_HWMOD_NAME_LEN,
"mmc%d", ctrl_nr);
WARN(l >= MAX_OMAP_MMC_HWMOD_NAME_LEN,
WARN(res >= MAX_OMAP_MMC_HWMOD_NAME_LEN,
"String buffer overflow in MMC%d device setup\n", ctrl_nr);
oh = omap_hwmod_lookup(oh_name);
if (!oh) {
pr_err("Could not look up %s\n", oh_name);
kfree(mmc_data->slots[0].name);
goto done;
goto free_name;
}
ohs[0] = oh;
if (oh->dev_attr != NULL) {
mmc_dev_attr = oh->dev_attr;
mmc_data->controller_flags = mmc_dev_attr->flags;
}
pdev = omap_device_build(name, ctrl_nr - 1, oh, mmc_data,
sizeof(struct omap_mmc_platform_data), NULL, 0, false);
if (IS_ERR(pdev)) {
WARN(1, "Can't build omap_device for %s:%s.\n", name, oh->name);
kfree(mmc_data->slots[0].name);
goto done;
pdev = platform_device_alloc(name, ctrl_nr - 1);
if (!pdev) {
pr_err("Could not allocate pdev for %s\n", name);
goto free_name;
}
/*
* return device handle to board setup code
* required to populate for regulator framework structure
*/
hsmmcinfo->dev = &pdev->dev;
dev_set_name(&pdev->dev, "%s.%d", pdev->name, pdev->id);
od = omap_device_alloc(pdev, ohs, 1, NULL, 0);
if (!od) {
pr_err("Could not allocate od for %s\n", name);
goto put_pdev;
}
res = platform_device_add_data(pdev, mmc_data,
sizeof(struct omap_mmc_platform_data));
if (res) {
pr_err("Could not add pdata for %s\n", name);
goto put_pdev;
}
hsmmcinfo->pdev = pdev;
if (hsmmcinfo->deferred)
goto free_mmc;
done:
res = omap_device_register(pdev);
if (res) {
pr_err("Could not register od for %s\n", name);
goto free_od;
}
goto free_mmc;
free_od:
omap_device_delete(od);
put_pdev:
platform_device_put(pdev);
free_name:
kfree(mmc_data->slots[0].name);
free_mmc:
kfree(mmc_data);
}
void __init omap2_hsmmc_init(struct omap2_hsmmc_info *controllers)
void __init omap_hsmmc_init(struct omap2_hsmmc_info *controllers)
{
u32 reg;
if (omap_hsmmc_done)
return;
omap_hsmmc_done = 1;
if (!cpu_is_omap44xx()) {
if (cpu_is_omap2430()) {
control_pbias_offset = OMAP243X_CONTROL_PBIAS_LITE;
......@@ -515,7 +586,7 @@ void __init omap2_hsmmc_init(struct omap2_hsmmc_info *controllers)
}
for (; controllers->mmc; controllers++)
omap_init_hsmmc(controllers, controllers->mmc);
omap_hsmmc_init_one(controllers, controllers->mmc);
}
......
arch/arm/mach-omap2/hsmmc.h
浏览文件 @ 015f1e42
......@@ -21,10 +21,11 @@ struct omap2_hsmmc_info {
bool no_off; /* power_saving and power is not to go off */
bool no_off_init; /* no power off when not in MMC sleep state */
bool vcc_aux_disable_is_sleep; /* Regulator off remapped to sleep */
bool deferred; /* mmc needs a deferred probe */
int gpio_cd; /* or -EINVAL */
int gpio_wp; /* or -EINVAL */
char *name; /* or NULL for default */
struct device *dev; /* returned: pointer to mmc adapter */
struct platform_device *pdev; /* mmc controller instance */
int ocr_mask; /* temporary HACK */
/* Remux (pad configuration) when powering on/off */
void (*remux)(struct device *dev, int slot, int power_on);
......@@ -34,11 +35,16 @@ struct omap2_hsmmc_info {
#if defined(CONFIG_MMC_OMAP_HS) || defined(CONFIG_MMC_OMAP_HS_MODULE)
void omap2_hsmmc_init(struct omap2_hsmmc_info *);
void omap_hsmmc_init(struct omap2_hsmmc_info *);
void omap_hsmmc_late_init(struct omap2_hsmmc_info *);
#else
static inline void omap2_hsmmc_init(struct omap2_hsmmc_info *info)
static inline void omap_hsmmc_init(struct omap2_hsmmc_info *info)
{
}
static inline void omap_hsmmc_late_init(struct omap2_hsmmc_info *info)
{
}
......
arch/arm/mach-omap2/mcbsp.c
浏览文件 @ 015f1e42
......@@ -122,7 +122,7 @@ static int omap3_enable_st_clock(unsigned int id, bool enable)
return 0;
}
static int omap_init_mcbsp(struct omap_hwmod *oh, void *unused)
static int __init omap_init_mcbsp(struct omap_hwmod *oh, void *unused)
{
int id, count = 1;
char *name = "omap-mcbsp";
......
arch/arm/mach-omap2/mux.c
浏览文件 @ 015f1e42
......@@ -1094,8 +1094,8 @@ static void omap_mux_init_package(struct omap_mux *superset,
omap_mux_package_init_balls(package_balls, superset);
}
static void omap_mux_init_signals(struct omap_mux_partition *partition,
struct omap_board_mux *board_mux)
static void __init omap_mux_init_signals(struct omap_mux_partition *partition,
struct omap_board_mux *board_mux)
{
omap_mux_set_cmdline_signals();
omap_mux_write_array(partition, board_mux);
......@@ -1109,8 +1109,8 @@ static void omap_mux_init_package(struct omap_mux *superset,
{
}
static void omap_mux_init_signals(struct omap_mux_partition *partition,
struct omap_board_mux *board_mux)
static void __init omap_mux_init_signals(struct omap_mux_partition *partition,
struct omap_board_mux *board_mux)
{
}
......
arch/arm/mach-omap2/omap-headsmp.S
浏览文件 @ 015f1e42
......@@ -18,6 +18,7 @@
#include <linux/linkage.h>
#include <linux/init.h>
__CPUINIT
/*
* OMAP4 specific entry point for secondary CPU to jump from ROM
* code. This routine also provides a holding flag into which
......
arch/arm/mach-omap2/omap_hwmod.c
浏览文件 @ 015f1e42
......@@ -1517,8 +1517,8 @@ static int _enable(struct omap_hwmod *oh)
if (oh->_state != _HWMOD_STATE_INITIALIZED &&
oh->_state != _HWMOD_STATE_IDLE &&
oh->_state != _HWMOD_STATE_DISABLED) {
WARN(1, "omap_hwmod: %s: enabled state can only be entered "
"from initialized, idle, or disabled state\n", oh->name);
WARN(1, "omap_hwmod: %s: enabled state can only be entered from initialized, idle, or disabled state\n",
oh->name);
return -EINVAL;
}
......@@ -1600,8 +1600,8 @@ static int _idle(struct omap_hwmod *oh)
pr_debug("omap_hwmod: %s: idling\n", oh->name);
if (oh->_state != _HWMOD_STATE_ENABLED) {
WARN(1, "omap_hwmod: %s: idle state can only be entered from "
"enabled state\n", oh->name);
WARN(1, "omap_hwmod: %s: idle state can only be entered from enabled state\n",
oh->name);
return -EINVAL;
}
......@@ -1682,8 +1682,8 @@ static int _shutdown(struct omap_hwmod *oh)
if (oh->_state != _HWMOD_STATE_IDLE &&
oh->_state != _HWMOD_STATE_ENABLED) {
WARN(1, "omap_hwmod: %s: disabled state can only be entered "
"from idle, or enabled state\n", oh->name);
WARN(1, "omap_hwmod: %s: disabled state can only be entered from idle, or enabled state\n",
oh->name);
return -EINVAL;
}
......@@ -2240,8 +2240,8 @@ void omap_hwmod_ocp_barrier(struct omap_hwmod *oh)
BUG_ON(!oh);
if (!oh->class->sysc || !oh->class->sysc->sysc_flags) {
WARN(1, "omap_device: %s: OCP barrier impossible due to "
"device configuration\n", oh->name);
WARN(1, "omap_device: %s: OCP barrier impossible due to device configuration\n",
oh->name);
return;
}
......
arch/arm/mach-omap2/pm.c
浏览文件 @ 015f1e42
......@@ -28,7 +28,7 @@
static struct omap_device_pm_latency *pm_lats;
static int _init_omap_device(char *name)
static int __init _init_omap_device(char *name)
{
struct omap_hwmod *oh;
struct platform_device *pdev;
......
arch/arm/mach-omap2/pm24xx.c
浏览文件 @ 015f1e42
......@@ -81,13 +81,7 @@ static int omap2_fclks_active(void)
f1 = omap2_cm_read_mod_reg(CORE_MOD, CM_FCLKEN1);
f2 = omap2_cm_read_mod_reg(CORE_MOD, OMAP24XX_CM_FCLKEN2);
/* Ignore UART clocks. These are handled by UART core (serial.c) */
f1 &= ~(OMAP24XX_EN_UART1_MASK | OMAP24XX_EN_UART2_MASK);
f2 &= ~OMAP24XX_EN_UART3_MASK;
if (f1 | f2)
return 1;
return 0;
return (f1 | f2) ? 1 : 0;
}
static void omap2_enter_full_retention(void)
......
arch/arm/mach-omap2/prm44xx.c
浏览文件 @ 015f1e42
......@@ -18,6 +18,7 @@
#include <linux/io.h>
#include <plat/cpu.h>
#include <plat/irqs.h>
#include <plat/prcm.h>
#include "iomap.h"
......
arch/arm/mach-omap2/serial.c
浏览文件 @ 015f1e42
......@@ -107,18 +107,18 @@ static void omap_uart_set_noidle(struct platform_device *pdev)
omap_hwmod_set_slave_idlemode(od->hwmods[0], HWMOD_IDLEMODE_NO);
}
static void omap_uart_set_forceidle(struct platform_device *pdev)
static void omap_uart_set_smartidle(struct platform_device *pdev)
{
struct omap_device *od = to_omap_device(pdev);
omap_hwmod_set_slave_idlemode(od->hwmods[0], HWMOD_IDLEMODE_FORCE);
omap_hwmod_set_slave_idlemode(od->hwmods[0], HWMOD_IDLEMODE_SMART);
}
#else
static void omap_uart_enable_wakeup(struct platform_device *pdev, bool enable)
{}
static void omap_uart_set_noidle(struct platform_device *pdev) {}
static void omap_uart_set_forceidle(struct platform_device *pdev) {}
static void omap_uart_set_smartidle(struct platform_device *pdev) {}
#endif /* CONFIG_PM */
#ifdef CONFIG_OMAP_MUX
......@@ -349,7 +349,7 @@ void __init omap_serial_init_port(struct omap_board_data *bdata,
omap_up.uartclk = OMAP24XX_BASE_BAUD * 16;
omap_up.flags = UPF_BOOT_AUTOCONF;
omap_up.get_context_loss_count = omap_pm_get_dev_context_loss_count;
omap_up.set_forceidle = omap_uart_set_forceidle;
omap_up.set_forceidle = omap_uart_set_smartidle;
omap_up.set_noidle = omap_uart_set_noidle;
omap_up.enable_wakeup = omap_uart_enable_wakeup;
omap_up.dma_rx_buf_size = info->dma_rx_buf_size;
......
arch/arm/mach-omap2/sr_device.c
浏览文件 @ 015f1e42
......@@ -69,7 +69,7 @@ static void __init sr_set_nvalues(struct omap_volt_data *volt_data,
sr_data->nvalue_count = count;
}
static int sr_dev_init(struct omap_hwmod *oh, void *user)
static int __init sr_dev_init(struct omap_hwmod *oh, void *user)
{
struct omap_sr_data *sr_data;
struct platform_device *pdev;
......
arch/arm/mach-omap2/vc.c
浏览文件 @ 015f1e42
......@@ -247,7 +247,7 @@ static void __init omap4_vc_init_channel(struct voltagedomain *voltdm)
* omap_vc_i2c_init - initialize I2C interface to PMIC
* @voltdm: voltage domain containing VC data
*
* Use PMIC supplied seetings for I2C high-speed mode and
* Use PMIC supplied settings for I2C high-speed mode and
* master code (if set) and program the VC I2C configuration
* register.
*
......@@ -265,8 +265,8 @@ static void __init omap_vc_i2c_init(struct voltagedomain *voltdm)
if (initialized) {
if (voltdm->pmic->i2c_high_speed != i2c_high_speed)
pr_warn("%s: I2C config for all channels must match.",
__func__);
pr_warn("%s: I2C config for vdd_%s does not match other channels (%u).",
__func__, voltdm->name, i2c_high_speed);
return;
}
......@@ -292,9 +292,7 @@ void __init omap_vc_init_channel(struct voltagedomain *voltdm)
u32 val;
if (!voltdm->pmic || !voltdm->pmic->uv_to_vsel) {
pr_err("%s: PMIC info requried to configure vc for"
"vdd_%s not populated.Hence cannot initialize vc\n",
__func__, voltdm->name);
pr_err("%s: No PMIC info for vdd_%s\n", __func__, voltdm->name);
return;
}
......
arch/arm/mach-omap2/vp.c
浏览文件 @ 015f1e42
......@@ -41,6 +41,11 @@ void __init omap_vp_init(struct voltagedomain *voltdm)
u32 val, sys_clk_rate, timeout, waittime;
u32 vddmin, vddmax, vstepmin, vstepmax;
if (!voltdm->pmic || !voltdm->pmic->uv_to_vsel) {
pr_err("%s: No PMIC info for vdd_%s\n", __func__, voltdm->name);
return;
}
if (!voltdm->read || !voltdm->write) {
pr_err("%s: No read/write API for accessing vdd_%s regs\n",
__func__, voltdm->name);
......
arch/arm/mach-orion5x/common.c
浏览文件 @ 015f1e42
......@@ -29,6 +29,7 @@
#include <mach/hardware.h>
#include <mach/orion5x.h>
#include <plat/orion_nand.h>
#include <plat/ehci-orion.h>
#include <plat/time.h>
#include <plat/common.h>
#include <plat/addr-map.h>
......@@ -72,7 +73,8 @@ void __init orion5x_map_io(void)
****************************************************************************/
void __init orion5x_ehci0_init(void)
{
orion_ehci_init(ORION5X_USB0_PHYS_BASE, IRQ_ORION5X_USB0_CTRL);
orion_ehci_init(ORION5X_USB0_PHYS_BASE, IRQ_ORION5X_USB0_CTRL,
EHCI_PHY_ORION);
}
......
arch/arm/mach-s3c2410/cpu-freq.c
浏览文件 @ 015f1e42
......@@ -115,7 +115,8 @@ static struct s3c_cpufreq_info s3c2410_cpufreq_info = {
.debug_io_show = s3c_cpufreq_debugfs_call(s3c2410_iotiming_debugfs),
};
static int s3c2410_cpufreq_add(struct device *dev)
static int s3c2410_cpufreq_add(struct device *dev,
struct subsys_interface *sif)
{
return s3c_cpufreq_register(&s3c2410_cpufreq_info);
}
......@@ -133,7 +134,8 @@ static int __init s3c2410_cpufreq_init(void)
arch_initcall(s3c2410_cpufreq_init);
static int s3c2410a_cpufreq_add(struct device *dev)
static int s3c2410a_cpufreq_add(struct device *dev,
struct subsys_interface *sif)
{
/* alter the maximum freq settings for S3C2410A. If a board knows
* it only has a maximum of 200, then it should register its own
......@@ -144,7 +146,7 @@ static int s3c2410a_cpufreq_add(struct device *dev)
s3c2410_cpufreq_info.max.pclk = 66500000;
s3c2410_cpufreq_info.name = "s3c2410a";
return s3c2410_cpufreq_add(dev);
return s3c2410_cpufreq_add(dev, sif);
}
static struct subsys_interface s3c2410a_cpufreq_interface = {
......
arch/arm/mach-s3c2410/dma.c
浏览文件 @ 015f1e42
......@@ -132,7 +132,8 @@ static struct s3c24xx_dma_order __initdata s3c2410_dma_order = {
},
};
static int __init s3c2410_dma_add(struct device *dev)
static int __init s3c2410_dma_add(struct device *dev,
struct subsys_interface *sif)
{
s3c2410_dma_init();
s3c24xx_dma_order_set(&s3c2410_dma_order);
......@@ -148,7 +149,7 @@ static struct subsys_interface s3c2410_dma_interface = {
static int __init s3c2410_dma_drvinit(void)
{
return subsys_interface_register(&s3c2410_interface);
return subsys_interface_register(&s3c2410_dma_interface);
}
arch_initcall(s3c2410_dma_drvinit);
......
arch/arm/mach-s3c2410/pll.c
浏览文件 @ 015f1e42
......@@ -66,7 +66,7 @@ static struct cpufreq_frequency_table pll_vals_12MHz[] = {
{ .frequency = 270000000, .index = PLLVAL(127, 1, 1), },
};
static int s3c2410_plls_add(struct device *dev)
static int s3c2410_plls_add(struct device *dev, struct subsys_interface *sif)
{
return s3c_plltab_register(pll_vals_12MHz, ARRAY_SIZE(pll_vals_12MHz));
}
......
arch/arm/mach-s3c2410/pm.c
浏览文件 @ 015f1e42
......@@ -111,7 +111,7 @@ struct syscore_ops s3c2410_pm_syscore_ops = {
.resume = s3c2410_pm_resume,
};
static int s3c2410_pm_add(struct device *dev)
static int s3c2410_pm_add(struct device *dev, struct subsys_interface *sif)
{
pm_cpu_prep = s3c2410_pm_prepare;
pm_cpu_sleep = s3c2410_cpu_suspend;
......
arch/arm/mach-s3c2412/cpu-freq.c
浏览文件 @ 015f1e42
......@@ -194,7 +194,8 @@ static struct s3c_cpufreq_info s3c2412_cpufreq_info = {
.debug_io_show = s3c_cpufreq_debugfs_call(s3c2412_iotiming_debugfs),
};
static int s3c2412_cpufreq_add(struct device *dev)
static int s3c2412_cpufreq_add(struct device *dev,
struct subsys_interface *sif)
{
unsigned long fclk_rate;
......
arch/arm/mach-s3c2412/dma.c
浏览文件 @ 015f1e42
......@@ -159,7 +159,8 @@ static struct s3c24xx_dma_selection __initdata s3c2412_dma_sel = {
.map_size = ARRAY_SIZE(s3c2412_dma_mappings),
};
static int __init s3c2412_dma_add(struct device *dev)
static int __init s3c2412_dma_add(struct device *dev,
struct subsys_interface *sif)
{
s3c2410_dma_init();
return s3c24xx_dma_init_map(&s3c2412_dma_sel);
......
arch/arm/mach-s3c2412/irq.c
浏览文件 @ 015f1e42
......@@ -170,7 +170,7 @@ static int s3c2412_irq_rtc_wake(struct irq_data *data, unsigned int state)
static struct irq_chip s3c2412_irq_rtc_chip;
static int s3c2412_irq_add(struct device *dev)
static int s3c2412_irq_add(struct device *dev, struct subsys_interface *sif)
{
unsigned int irqno;
......
arch/arm/mach-s3c2412/pm.c
浏览文件 @ 015f1e42
......@@ -56,7 +56,7 @@ static void s3c2412_pm_prepare(void)
{
}
static int s3c2412_pm_add(struct device *dev)
static int s3c2412_pm_add(struct device *dev, struct subsys_interface *sif)
{
pm_cpu_prep = s3c2412_pm_prepare;
pm_cpu_sleep = s3c2412_cpu_suspend;
......
arch/arm/mach-s3c2416/irq.c
浏览文件 @ 015f1e42
......@@ -213,7 +213,8 @@ static int __init s3c2416_add_sub(unsigned int base,
return 0;
}
static int __init s3c2416_irq_add(struct device *dev)
static int __init s3c2416_irq_add(struct device *dev,
struct subsys_interface *sif)
{
printk(KERN_INFO "S3C2416: IRQ Support\n");
......
arch/arm/mach-s3c2416/pm.c
浏览文件 @ 015f1e42
......@@ -48,7 +48,7 @@ static void s3c2416_pm_prepare(void)
__raw_writel(virt_to_phys(s3c_cpu_resume), S3C2412_INFORM1);
}
static int s3c2416_pm_add(struct device *dev)
static int s3c2416_pm_add(struct device *dev, struct subsys_interface *sif)
{
pm_cpu_prep = s3c2416_pm_prepare;
pm_cpu_sleep = s3c2416_cpu_suspend;
......
arch/arm/mach-s3c2440/clock.c
浏览文件 @ 015f1e42
......@@ -149,7 +149,7 @@ static struct clk_lookup s3c2440_clk_lookup[] = {
CLKDEV_INIT(NULL, "clk_uart_baud3", &s3c2440_clk_fclk_n),
};
static int s3c2440_clk_add(struct device *dev)
static int s3c2440_clk_add(struct device *dev, struct subsys_interface *sif)
{
struct clk *clock_upll;
struct clk *clock_h;
......
arch/arm/mach-s3c2440/dma.c
浏览文件 @ 015f1e42
......@@ -174,7 +174,8 @@ static struct s3c24xx_dma_order __initdata s3c2440_dma_order = {
},
};
static int __init s3c2440_dma_add(struct device *dev)
static int __init s3c2440_dma_add(struct device *dev,
struct subsys_interface *sif)
{
s3c2410_dma_init();
s3c24xx_dma_order_set(&s3c2440_dma_order);
......
arch/arm/mach-s3c2440/irq.c
浏览文件 @ 015f1e42
......@@ -92,7 +92,7 @@ static struct irq_chip s3c_irq_wdtac97 = {
.irq_ack = s3c_irq_wdtac97_ack,
};
static int s3c2440_irq_add(struct device *dev)
static int s3c2440_irq_add(struct device *dev, struct subsys_interface *sif)
{
unsigned int irqno;
......
arch/arm/mach-s3c2440/s3c2440-cpufreq.c
浏览文件 @ 015f1e42
......@@ -270,7 +270,8 @@ struct s3c_cpufreq_info s3c2440_cpufreq_info = {
.debug_io_show = s3c_cpufreq_debugfs_call(s3c2410_iotiming_debugfs),
};
static int s3c2440_cpufreq_add(struct device *dev)
static int s3c2440_cpufreq_add(struct device *dev,
struct subsys_interface *sif)
{
xtal = s3c_cpufreq_clk_get(NULL, "xtal");
hclk = s3c_cpufreq_clk_get(NULL, "hclk");
......
arch/arm/mach-s3c2440/s3c2440-pll-12000000.c
浏览文件 @ 015f1e42
......@@ -51,7 +51,7 @@ static struct cpufreq_frequency_table s3c2440_plls_12[] __initdata = {
{ .frequency = 400000000, .index = PLLVAL(0x5c, 1, 1), }, /* FVco 800.000000 */
};
static int s3c2440_plls12_add(struct device *dev)
static int s3c2440_plls12_add(struct device *dev, struct subsys_interface *sif)
{
struct clk *xtal_clk;
unsigned long xtal;
......
arch/arm/mach-s3c2440/s3c2440-pll-16934400.c
浏览文件 @ 015f1e42
......@@ -79,7 +79,8 @@ static struct cpufreq_frequency_table s3c2440_plls_169344[] __initdata = {
{ .frequency = 402192000, .index = PLLVAL(87, 2, 1), }, /* FVco 804.384000 */
};
static int s3c2440_plls169344_add(struct device *dev)
static int s3c2440_plls169344_add(struct device *dev,
struct subsys_interface *sif)
{
struct clk *xtal_clk;
unsigned long xtal;
......
arch/arm/mach-s3c2440/s3c2442.c
浏览文件 @ 015f1e42
......@@ -122,7 +122,7 @@ static struct clk s3c2442_clk_cam_upll = {
},
};
static int s3c2442_clk_add(struct device *dev)
static int s3c2442_clk_add(struct device *dev, struct subsys_interface *sif)
{
struct clk *clock_upll;
struct clk *clock_h;
......
arch/arm/mach-s3c2440/s3c244x-clock.c
浏览文件 @ 015f1e42
......@@ -72,7 +72,7 @@ static struct clk clk_arm = {
},
};
static int s3c244x_clk_add(struct device *dev)
static int s3c244x_clk_add(struct device *dev, struct subsys_interface *sif)
{
unsigned long camdivn = __raw_readl(S3C2440_CAMDIVN);
unsigned long clkdivn;
......
arch/arm/mach-s3c2440/s3c244x-irq.c
浏览文件 @ 015f1e42
......@@ -91,7 +91,7 @@ static struct irq_chip s3c_irq_cam = {
.irq_ack = s3c_irq_cam_ack,
};
static int s3c244x_irq_add(struct device *dev)
static int s3c244x_irq_add(struct device *dev, struct subsys_interface *sif)
{
unsigned int irqno;
......
arch/arm/mach-s3c2443/dma.c
浏览文件 @ 015f1e42
......@@ -135,7 +135,8 @@ static struct s3c24xx_dma_selection __initdata s3c2443_dma_sel = {
.map_size = ARRAY_SIZE(s3c2443_dma_mappings),
};
static int __init s3c2443_dma_add(struct device *dev)
static int __init s3c2443_dma_add(struct device *dev,
struct subsys_interface *sif)
{
s3c24xx_dma_init(6, IRQ_S3C2443_DMA0, 0x100);
return s3c24xx_dma_init_map(&s3c2443_dma_sel);
......
arch/arm/mach-s3c2443/irq.c
浏览文件 @ 015f1e42
......@@ -241,7 +241,8 @@ static int __init s3c2443_add_sub(unsigned int base,
return 0;
}
static int __init s3c2443_irq_add(struct device *dev)
static int __init s3c2443_irq_add(struct device *dev,
struct subsys_interface *sif)
{
printk("S3C2443: IRQ Support\n");
......
arch/arm/mach-s3c64xx/clock.c
浏览文件 @ 015f1e42
......@@ -138,6 +138,11 @@ static struct clk init_clocks_off[] = {
.ctrlbit = S3C_CLKCON_PCLK_TSADC,
}, {
.name = "i2c",
#ifdef CONFIG_S3C_DEV_I2C1
.devname = "s3c2440-i2c.0",
#else
.devname = "s3c2440-i2c",
#endif
.parent = &clk_p,
.enable = s3c64xx_pclk_ctrl,
.ctrlbit = S3C_CLKCON_PCLK_IIC,
......
arch/arm/mach-s3c64xx/common.c
浏览文件 @ 015f1e42
......@@ -49,7 +49,7 @@
/* uart registration process */
void __init s3c64xx_init_uarts(struct s3c2410_uartcfg *cfg, int no)
static void __init s3c64xx_init_uarts(struct s3c2410_uartcfg *cfg, int no)
{
s3c24xx_init_uartdevs("s3c6400-uart", s3c64xx_uart_resources, cfg, no);
}
......
arch/arm/mach-s5p64x0/pm.c
浏览文件 @ 015f1e42
......@@ -160,7 +160,7 @@ static void s5p64x0_pm_prepare(void)
}
static int s5p64x0_pm_add(struct device *dev)
static int s5p64x0_pm_add(struct device *dev, struct subsys_interface *sif)
{
pm_cpu_prep = s5p64x0_pm_prepare;
pm_cpu_sleep = s5p64x0_cpu_suspend;
......
arch/arm/mach-s5pv210/clock.c
浏览文件 @ 015f1e42
......@@ -175,7 +175,7 @@ static int s5pv210_clk_mask1_ctrl(struct clk *clk, int enable)
return s5p_gatectrl(S5P_CLK_SRC_MASK1, clk, enable);
}
static int exynos4_clk_hdmiphy_ctrl(struct clk *clk, int enable)
static int s5pv210_clk_hdmiphy_ctrl(struct clk *clk, int enable)
{
return s5p_gatectrl(S5P_HDMI_PHY_CONTROL, clk, enable);
}
......@@ -372,7 +372,7 @@ static struct clk init_clocks_off[] = {
}, {
.name = "hdmiphy",
.devname = "s5pv210-hdmi",
.enable = exynos4_clk_hdmiphy_ctrl,
.enable = s5pv210_clk_hdmiphy_ctrl,
.ctrlbit = (1 << 0),
}, {
.name = "dacphy",
......
arch/arm/mach-s5pv210/pm.c
浏览文件 @ 015f1e42
......@@ -133,7 +133,7 @@ static void s5pv210_pm_prepare(void)
s3c_pm_do_save(s5pv210_core_save, ARRAY_SIZE(s5pv210_core_save));
}
static int s5pv210_pm_add(struct device *dev)
static int s5pv210_pm_add(struct device *dev, struct subsys_interface *sif)
{
pm_cpu_prep = s5pv210_pm_prepare;
pm_cpu_sleep = s5pv210_cpu_suspend;
......
arch/arm/mach-tegra/board-paz00.c
浏览文件 @ 015f1e42
......@@ -60,9 +60,9 @@ static struct plat_serial8250_port debug_uart_platform_data[] = {
.uartclk = 216000000,
}, {
/* serial port on mini-pcie */
.membase = IO_ADDRESS(TEGRA_UARTD_BASE),
.mapbase = TEGRA_UARTD_BASE,
.irq = INT_UARTD,
.membase = IO_ADDRESS(TEGRA_UARTC_BASE),
.mapbase = TEGRA_UARTC_BASE,
.irq = INT_UARTC,
.flags = UPF_BOOT_AUTOCONF | UPF_FIXED_TYPE,
.type = PORT_TEGRA,
.iotype = UPIO_MEM,
......@@ -174,7 +174,7 @@ static void __init tegra_paz00_fixup(struct tag *tags, char **cmdline,
static __initdata struct tegra_clk_init_table paz00_clk_init_table[] = {
/* name parent rate enabled */
{ "uarta", "pll_p", 216000000, true },
{ "uartd", "pll_p", 216000000, true },
{ "uartc", "pll_p", 216000000, true },
{ "pll_p_out4", "pll_p", 24000000, true },
{ "usbd", "clk_m", 12000000, false },
......
arch/arm/mach-tegra/board-paz00.h
浏览文件 @ 015f1e42
......@@ -22,7 +22,7 @@
/* SDCARD */
#define TEGRA_GPIO_SD1_CD TEGRA_GPIO_PV5
#define TEGRA_GPIO_SD1_WP TEGRA_GPIO_PH1
#define TEGRA_GPIO_SD1_POWER TEGRA_GPIO_PT3
#define TEGRA_GPIO_SD1_POWER TEGRA_GPIO_PV1
/* ULPI */
#define TEGRA_ULPI_RST TEGRA_GPIO_PV0
......
arch/arm/mach-tegra/include/mach/dma.h
浏览文件 @ 015f1e42
......@@ -23,11 +23,6 @@
#include <linux/list.h>
#if defined(CONFIG_TEGRA_SYSTEM_DMA)
struct tegra_dma_req;
struct tegra_dma_channel;
#define TEGRA_DMA_REQ_SEL_CNTR 0
#define TEGRA_DMA_REQ_SEL_I2S_2 1
#define TEGRA_DMA_REQ_SEL_I2S_1 2
......@@ -56,6 +51,11 @@ struct tegra_dma_channel;
#define TEGRA_DMA_REQ_SEL_OWR 25
#define TEGRA_DMA_REQ_SEL_INVALID 31
#if defined(CONFIG_TEGRA_SYSTEM_DMA)
struct tegra_dma_req;
struct tegra_dma_channel;
enum tegra_dma_mode {
TEGRA_DMA_SHARED = 1,
TEGRA_DMA_MODE_CONTINOUS = 2,
......
arch/arm/mm/cache-v7.S
浏览文件 @ 015f1e42
......@@ -54,9 +54,15 @@ loop1:
and r1, r1, #7 @ mask of the bits for current cache only
cmp r1, #2 @ see what cache we have at this level
blt skip @ skip if no cache, or just i-cache
#ifdef CONFIG_PREEMPT
save_and_disable_irqs r9 @ make cssr&csidr read atomic
#endif
mcr p15, 2, r10, c0, c0, 0 @ select current cache level in cssr
isb @ isb to sych the new cssr&csidr
mrc p15, 1, r1, c0, c0, 0 @ read the new csidr
#ifdef CONFIG_PREEMPT
restore_irqs_notrace r9
#endif
and r2, r1, #7 @ extract the length of the cache lines
add r2, r2, #4 @ add 4 (line length offset)
ldr r4, =0x3ff
......
arch/arm/plat-omap/include/plat/omap-secure.h
浏览文件 @ 015f1e42
......@@ -3,7 +3,7 @@
#include <linux/types.h>
#ifdef CONFIG_ARCH_OMAP2PLUS
#if defined(CONFIG_ARCH_OMAP3) || defined(CONFIG_ARCH_OMAP4)
extern int omap_secure_ram_reserve_memblock(void);
#else
static inline void omap_secure_ram_reserve_memblock(void)
......
arch/arm/plat-omap/include/plat/omap_device.h
浏览文件 @ 015f1e42
......@@ -100,6 +100,13 @@ struct platform_device *omap_device_build_ss(const char *pdev_name, int pdev_id,
struct omap_device_pm_latency *pm_lats,
int pm_lats_cnt, int is_early_device);
struct omap_device *omap_device_alloc(struct platform_device *pdev,
struct omap_hwmod **ohs, int oh_cnt,
struct omap_device_pm_latency *pm_lats,
int pm_lats_cnt);
void omap_device_delete(struct omap_device *od);
int omap_device_register(struct platform_device *pdev);
void __iomem *omap_device_get_rt_va(struct omap_device *od);
struct device *omap_device_get_by_hwmod_name(const char *oh_name);
......
arch/arm/plat-omap/omap_device.c
浏览文件 @ 015f1e42
/*
* omap_device implementation
*
......@@ -97,14 +98,7 @@
#define USE_WAKEUP_LAT 0
#define IGNORE_WAKEUP_LAT 1
static int omap_device_register(struct platform_device *pdev);
static int omap_early_device_register(struct platform_device *pdev);
static struct omap_device *omap_device_alloc(struct platform_device *pdev,
struct omap_hwmod **ohs, int oh_cnt,
struct omap_device_pm_latency *pm_lats,
int pm_lats_cnt);
static void omap_device_delete(struct omap_device *od);
static struct omap_device_pm_latency omap_default_latency[] = {
{
......@@ -509,7 +503,7 @@ static int omap_device_fill_resources(struct omap_device *od,
*
* Returns an struct omap_device pointer or ERR_PTR() on error;
*/
static struct omap_device *omap_device_alloc(struct platform_device *pdev,
struct omap_device *omap_device_alloc(struct platform_device *pdev,
struct omap_hwmod **ohs, int oh_cnt,
struct omap_device_pm_latency *pm_lats,
int pm_lats_cnt)
......@@ -591,7 +585,7 @@ static struct omap_device *omap_device_alloc(struct platform_device *pdev,
return ERR_PTR(ret);
}
static void omap_device_delete(struct omap_device *od)
void omap_device_delete(struct omap_device *od)
{
if (!od)
return;
......@@ -619,7 +613,7 @@ static void omap_device_delete(struct omap_device *od)
* information. Returns ERR_PTR(-EINVAL) if @oh is NULL; otherwise,
* passes along the return value of omap_device_build_ss().
*/
struct platform_device *omap_device_build(const char *pdev_name, int pdev_id,
struct platform_device __init *omap_device_build(const char *pdev_name, int pdev_id,
struct omap_hwmod *oh, void *pdata,
int pdata_len,
struct omap_device_pm_latency *pm_lats,
......@@ -652,7 +646,7 @@ struct platform_device *omap_device_build(const char *pdev_name, int pdev_id,
* platform_device record. Returns an ERR_PTR() on error, or passes
* along the return value of omap_device_register().
*/
struct platform_device *omap_device_build_ss(const char *pdev_name, int pdev_id,
struct platform_device __init *omap_device_build_ss(const char *pdev_name, int pdev_id,
struct omap_hwmod **ohs, int oh_cnt,
void *pdata, int pdata_len,
struct omap_device_pm_latency *pm_lats,
......@@ -717,7 +711,7 @@ struct platform_device *omap_device_build_ss(const char *pdev_name, int pdev_id,
* platform_early_add_device() on the underlying platform_device.
* Returns 0 by default.
*/
static int omap_early_device_register(struct platform_device *pdev)
static int __init omap_early_device_register(struct platform_device *pdev)
{
struct platform_device *devices[1];
......@@ -817,7 +811,7 @@ static struct dev_pm_domain omap_device_pm_domain = {
* platform_device_register() on the underlying platform_device.
* Returns the return value of platform_device_register().
*/
static int omap_device_register(struct platform_device *pdev)
int omap_device_register(struct platform_device *pdev)
{
pr_debug("omap_device: %s: registering\n", pdev->name);
......
arch/arm/plat-orion/common.c
浏览文件 @ 015f1e42
......@@ -789,10 +789,7 @@ void __init orion_xor1_init(unsigned long mapbase_low,
/*****************************************************************************
* EHCI
****************************************************************************/
static struct orion_ehci_data orion_ehci_data = {
.phy_version = EHCI_PHY_NA,
};
static struct orion_ehci_data orion_ehci_data;
static u64 ehci_dmamask = DMA_BIT_MASK(32);
......@@ -812,8 +809,10 @@ static struct platform_device orion_ehci = {
};
void __init orion_ehci_init(unsigned long mapbase,
unsigned long irq)
unsigned long irq,
enum orion_ehci_phy_ver phy_version)
{
orion_ehci_data.phy_version = phy_version;
fill_resources(&orion_ehci, orion_ehci_resources, mapbase, SZ_4K - 1,
irq);
......
arch/arm/plat-orion/mpp.c
浏览文件 @ 015f1e42
此差异已折叠。
arch/arm/plat-samsung/devs.c
浏览文件 @ 015f1e42
此差异已折叠。
arch/powerpc/include/asm/ppc-pci.h
浏览文件 @ 015f1e42
此差异已折叠。
arch/powerpc/include/asm/ptrace.h
浏览文件 @ 015f1e42
此差异已折叠。
arch/powerpc/kernel/irq.c
浏览文件 @ 015f1e42
此差异已折叠。
arch/powerpc/kernel/perf_event.c
浏览文件 @ 015f1e42
此差异已折叠。
arch/powerpc/kernel/process.c
浏览文件 @ 015f1e42
此差异已折叠。
arch/powerpc/kernel/rtas.c
浏览文件 @ 015f1e42
此差异已折叠。
arch/powerpc/platforms/wsp/ics.c
浏览文件 @ 015f1e42
此差异已折叠。
arch/powerpc/sysdev/fsl_pci.c
浏览文件 @ 015f1e42
此差异已折叠。
arch/x86/include/asm/i387.h
浏览文件 @ 015f1e42
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arch/x86/include/asm/processor.h
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arch/x86/include/asm/thread_info.h
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arch/x86/kernel/process_32.c
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arch/x86/kernel/process_64.c
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arch/x86/kernel/traps.c
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arch/x86/kernel/xsave.c
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arch/x86/kvm/vmx.c
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arch/x86/pci/xen.c
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arch/x86/xen/smp.c
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block/blk-cgroup.c
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drivers/ata/pata_at91.c
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drivers/base/regmap/regcache.c
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drivers/bcma/main.c
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drivers/bcma/scan.c
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drivers/block/floppy.c
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drivers/block/loop.c
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drivers/block/mtip32xx/mtip32xx.c
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drivers/block/mtip32xx/mtip32xx.h
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drivers/cdrom/cdrom.c
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drivers/gpu/drm/i915/intel_lvds.c
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drivers/gpu/drm/radeon/evergreen.c
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drivers/gpu/drm/radeon/r100.c
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drivers/gpu/drm/radeon/rs600.c
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drivers/hwmon/f75375s.c
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drivers/hwmon/w83627ehf.c
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drivers/i2c/busses/i2c-tegra.c
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drivers/ide/Makefile
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drivers/ide/at91_ide.c 已删除 100644 → 0
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drivers/isdn/i4l/isdn_net.c
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drivers/macintosh/adb.c
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drivers/mfd/Kconfig
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drivers/mfd/twl-core.c
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drivers/mfd/twl4030-power.c
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drivers/misc/Kconfig
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drivers/misc/cb710/core.c
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drivers/misc/cs5535-mfgpt.c
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drivers/misc/vmw_balloon.c
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drivers/mmc/card/block.c
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drivers/mmc/core/core.c
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drivers/mmc/core/host.h
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drivers/mmc/core/mmc.c
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drivers/mmc/core/sd.c
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drivers/mmc/core/sdio.c
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drivers/mmc/core/sdio_irq.c
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drivers/mmc/host/Kconfig
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drivers/mmc/host/atmel-mci.c
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drivers/mmc/host/dw_mmc.c
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drivers/mmc/host/of_mmc_spi.c
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drivers/mmc/host/sdhci-of-esdhc.c
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drivers/mmc/host/sdhci-pci.c
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drivers/mmc/host/sdhci-pltfm.c
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drivers/mmc/host/sh_mmcif.c
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drivers/mmc/host/tmio_mmc.h
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drivers/mmc/host/tmio_mmc_dma.c
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drivers/mmc/host/tmio_mmc_pio.c
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drivers/net/can/cc770/cc770.c
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drivers/net/can/cc770/cc770_isa.c
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drivers/net/can/flexcan.c
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drivers/net/can/pch_can.c
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drivers/net/can/sja1000/peak_pci.c
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drivers/net/can/ti_hecc.c
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drivers/net/can/usb/ems_usb.c
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drivers/net/ethernet/3com/3c59x.c
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drivers/net/ethernet/marvell/skge.c
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drivers/net/ethernet/micrel/Kconfig
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drivers/net/ethernet/ti/cpmac.c
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drivers/net/hyperv/netvsc_drv.c
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drivers/net/hyperv/rndis_filter.c
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drivers/net/tokenring/Kconfig
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drivers/net/usb/ipheth.c
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drivers/net/veth.c
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drivers/net/wireless/ath/ath9k/hw.c
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drivers/net/wireless/ath/ath9k/rc.c
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drivers/net/wireless/mwifiex/init.c
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drivers/net/wireless/mwifiex/main.c
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drivers/net/wireless/rtlwifi/pci.c
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drivers/pci/iov.c
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drivers/pci/probe.c
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drivers/pci/remove.c
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drivers/pci/xen-pcifront.c
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drivers/pinctrl/core.c
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drivers/power/bq27x00_battery.c
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drivers/power/charger-manager.c
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drivers/power/lp8727_charger.c
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drivers/regulator/max8649.c
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drivers/rtc/rtc-at91sam9.c
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drivers/ssb/driver_pcicore.c
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drivers/staging/Kconfig
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drivers/staging/Makefile
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drivers/staging/android/Kconfig
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drivers/staging/android/Makefile
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drivers/staging/android/android_pmem.h 已删除 100644 → 0
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drivers/staging/android/binder.c
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drivers/staging/android/pmem.c 已删除 100644 → 0
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drivers/staging/gma500/Kconfig 已删除 100644 → 0
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drivers/staging/gma500/Makefile 已删除 100644 → 0
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drivers/staging/gma500/TODO 已删除 100644 → 0
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drivers/staging/gma500/accel_2d.c 已删除 100644 → 0
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drivers/staging/gma500/backlight.c 已删除 100644 → 0
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drivers/staging/gma500/cdv_device.c 已删除 100644 → 0
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drivers/staging/gma500/cdv_device.h 已删除 100644 → 0
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drivers/staging/gma500/cdv_intel_crt.c 已删除 100644 → 0
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drivers/staging/gma500/cdv_intel_display.c 已删除 100644 → 0
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drivers/staging/gma500/cdv_intel_hdmi.c 已删除 100644 → 0
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drivers/staging/gma500/cdv_intel_lvds.c 已删除 100644 → 0
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drivers/staging/gma500/displays/hdmi.h 已删除 100644 → 0
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drivers/staging/gma500/displays/pyr_cmd.h 已删除 100644 → 0
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drivers/staging/gma500/displays/pyr_vid.h 已删除 100644 → 0
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drivers/staging/gma500/displays/tmd_cmd.h 已删除 100644 → 0
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drivers/staging/gma500/displays/tmd_vid.h 已删除 100644 → 0
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drivers/staging/gma500/displays/tpo_cmd.h 已删除 100644 → 0
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drivers/staging/gma500/displays/tpo_vid.h 已删除 100644 → 0
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drivers/staging/gma500/framebuffer.c 已删除 100644 → 0
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drivers/staging/gma500/framebuffer.h 已删除 100644 → 0
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drivers/staging/gma500/gem.c 已删除 100644 → 0
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drivers/staging/gma500/gem_glue.c 已删除 100644 → 0
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drivers/staging/gma500/gem_glue.h 已删除 100644 → 0
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drivers/staging/gma500/gtt.c 已删除 100644 → 0
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drivers/staging/gma500/gtt.h 已删除 100644 → 0
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drivers/staging/gma500/intel_bios.c 已删除 100644 → 0
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drivers/staging/gma500/intel_bios.h 已删除 100644 → 0
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drivers/staging/gma500/intel_i2c.c 已删除 100644 → 0
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drivers/staging/gma500/intel_opregion.c 已删除 100644 → 0
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drivers/staging/gma500/mdfld_device.c 已删除 100644 → 0
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drivers/staging/gma500/mdfld_dsi_dbi.c 已删除 100644 → 0
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drivers/staging/gma500/mdfld_dsi_dbi.h 已删除 100644 → 0
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drivers/staging/gma500/mdfld_dsi_dbi_dpu.c 已删除 100644 → 0
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drivers/staging/gma500/mdfld_dsi_dbi_dpu.h 已删除 100644 → 0
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drivers/staging/gma500/mdfld_dsi_dpi.c 已删除 100644 → 0
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drivers/staging/gma500/mdfld_dsi_dpi.h 已删除 100644 → 0
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drivers/staging/gma500/mdfld_dsi_output.c 已删除 100644 → 0
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drivers/staging/gma500/mdfld_dsi_output.h 已删除 100644 → 0
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drivers/staging/gma500/mdfld_dsi_pkg_sender.c 已删除 100644 → 0
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drivers/staging/gma500/mdfld_dsi_pkg_sender.h 已删除 100644 → 0
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drivers/staging/gma500/mdfld_intel_display.c 已删除 100644 → 0
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drivers/staging/gma500/mdfld_msic.h 已删除 100644 → 0
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drivers/staging/gma500/mdfld_output.c 已删除 100644 → 0
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drivers/staging/gma500/mdfld_output.h 已删除 100644 → 0
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drivers/staging/gma500/mdfld_pyr_cmd.c 已删除 100644 → 0
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drivers/staging/gma500/mdfld_tmd_vid.c 已删除 100644 → 0
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drivers/staging/gma500/mdfld_tpo_cmd.c 已删除 100644 → 0
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drivers/staging/gma500/mdfld_tpo_vid.c 已删除 100644 → 0
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drivers/staging/gma500/medfield.h 已删除 100644 → 0
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drivers/staging/gma500/mid_bios.c 已删除 100644 → 0
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drivers/staging/gma500/mid_bios.h 已删除 100644 → 0
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drivers/staging/gma500/mmu.c 已删除 100644 → 0
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drivers/staging/gma500/mrst.h 已删除 100644 → 0
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drivers/staging/gma500/mrst_crtc.c 已删除 100644 → 0
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drivers/staging/gma500/mrst_device.c 已删除 100644 → 0
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drivers/staging/gma500/mrst_hdmi.c 已删除 100644 → 0
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drivers/staging/gma500/mrst_hdmi_i2c.c 已删除 100644 → 0
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drivers/staging/gma500/mrst_lvds.c 已删除 100644 → 0
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drivers/staging/gma500/power.c 已删除 100644 → 0
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drivers/staging/gma500/power.h 已删除 100644 → 0
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drivers/staging/gma500/psb_device.c 已删除 100644 → 0
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drivers/staging/gma500/psb_drm.h 已删除 100644 → 0
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drivers/staging/gma500/psb_drv.c 已删除 100644 → 0
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drivers/staging/gma500/psb_drv.h 已删除 100644 → 0
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drivers/staging/gma500/psb_intel_display.c 已删除 100644 → 0
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drivers/staging/gma500/psb_intel_display.h 已删除 100644 → 0
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drivers/staging/gma500/psb_intel_drv.h 已删除 100644 → 0
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drivers/staging/gma500/psb_intel_lvds.c 已删除 100644 → 0
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drivers/staging/gma500/psb_intel_modes.c 已删除 100644 → 0
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drivers/staging/gma500/psb_intel_reg.h 已删除 100644 → 0
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drivers/staging/gma500/psb_intel_sdvo.c 已删除 100644 → 0
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drivers/staging/gma500/psb_intel_sdvo_regs.h 已删除 100644 → 0
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drivers/staging/gma500/psb_irq.c 已删除 100644 → 0
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drivers/staging/gma500/psb_irq.h 已删除 100644 → 0
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drivers/staging/gma500/psb_reg.h 已删除 100644 → 0
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drivers/staging/omapdrm/Makefile
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drivers/staging/omapdrm/omap_crtc.c
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drivers/staging/omapdrm/omap_drv.c
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drivers/staging/omapdrm/omap_drv.h
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drivers/staging/omapdrm/omap_fb.c
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drivers/staging/omapdrm/omap_gem.c
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drivers/staging/omapdrm/omap_plane.c 0 → 100644
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drivers/staging/omapdrm/omap_priv.h
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drivers/staging/pohmelfs/Kconfig 已删除 100644 → 0
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drivers/staging/pohmelfs/Makefile 已删除 100644 → 0
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drivers/staging/pohmelfs/config.c 已删除 100644 → 0
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drivers/staging/pohmelfs/crypto.c 已删除 100644 → 0
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drivers/staging/pohmelfs/dir.c 已删除 100644 → 0
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drivers/staging/pohmelfs/inode.c 已删除 100644 → 0
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drivers/staging/pohmelfs/lock.c 已删除 100644 → 0
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drivers/staging/pohmelfs/mcache.c 已删除 100644 → 0
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drivers/staging/pohmelfs/net.c 已删除 100644 → 0
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drivers/staging/pohmelfs/netfs.h 已删除 100644 → 0
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drivers/staging/pohmelfs/path_entry.c 已删除 100644 → 0
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drivers/staging/pohmelfs/trans.c 已删除 100644 → 0
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drivers/staging/rtl8712/drv_types.h
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drivers/staging/rtl8712/hal_init.c
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drivers/staging/rtl8712/os_intfs.c
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drivers/staging/rtl8712/usb_intf.c
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drivers/staging/usbip/stub_main.c
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drivers/tty/serial/8250/8250.c
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drivers/tty/serial/omap-serial.c
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drivers/tty/serial/samsung.c
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drivers/usb/gadget/f_loopback.c
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drivers/usb/host/Kconfig
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drivers/usb/host/ehci-fsl.c
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drivers/usb/host/ehci-fsl.h
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drivers/usb/host/pci-quirks.c
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drivers/usb/musb/musb_io.h
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drivers/usb/otg/Kconfig
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drivers/usb/serial/ftdi_sio.c
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drivers/usb/serial/ftdi_sio_ids.h
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drivers/usb/serial/option.c
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drivers/usb/serial/qcserial.c
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drivers/video/omap2/dss/dpi.c
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drivers/xen/cpu_hotplug.c
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drivers/xen/xen-pciback/pci_stub.c
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drivers/xen/xen-pciback/xenbus.c
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fs/bio.c
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fs/cifs/connect.c
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fs/cifs/dir.c
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fs/ecryptfs/crypto.c
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fs/ecryptfs/ecryptfs_kernel.h
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fs/ecryptfs/inode.c
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fs/ecryptfs/keystore.c
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fs/ecryptfs/mmap.c
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fs/ecryptfs/read_write.c
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fs/ecryptfs/super.c
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fs/fs-writeback.c
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fs/ioprio.c
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fs/xfs/kmem.h
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fs/xfs/xfs_dquot.c
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fs/xfs/xfs_log_recover.c
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fs/xfs/xfs_qm.c
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fs/xfs/xfs_qm.h
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fs/xfs/xfs_qm_stats.c
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fs/xfs/xfs_trace.h
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include/linux/bitops.h
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include/linux/blkdev.h
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include/linux/cdrom.h
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include/linux/elevator.h
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include/linux/hyperv.h
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include/linux/iocontext.h
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include/linux/mmc/card.h
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include/linux/mmc/dw_mmc.h
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include/linux/mmc/host.h
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include/linux/proportions.h
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include/linux/usb/ch9.h
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include/net/flow.h
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include/net/netprio_cgroup.h
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include/net/route.h
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include/net/sch_generic.h
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include/net/tcp.h
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include/trace/events/writeback.h
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kernel/events/core.c
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kernel/fork.c
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kernel/params.c
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kernel/relay.c
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lib/kstrtox.c
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mm/backing-dev.c
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net/caif/caif_socket.c
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net/caif/cfmuxl.c
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net/core/dev.c
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net/core/ethtool.c
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net/core/netpoll.c
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net/core/netprio_cgroup.c
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net/core/sock.c
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net/ipv4/Kconfig
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net/ipv4/arp.c
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net/ipv4/ip_options.c
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net/ipv4/sysctl_net_ipv4.c
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net/ipv4/tcp.c
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net/ipv4/tcp_input.c
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net/ipv4/tcp_ipv4.c
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net/ipv4/tcp_timer.c
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net/mac80211/main.c
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net/mac80211/rx.c
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net/rxrpc/ar-key.c
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net/sched/sch_choke.c
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net/sched/sch_netem.c
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net/sched/sch_sfb.c
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net/sched/sch_sfq.c
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scripts/mod/file2alias.c
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sound/pci/hda/patch_realtek.c
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sound/pci/hda/patch_sigmatel.c
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sound/pci/hda/patch_via.c
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sound/pci/intel8x0.c
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sound/soc/sh/fsi.c
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tools/perf/util/event.c
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tools/perf/util/evsel.c
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