mt2063.c 151.4 KB
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#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/string.h>
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#include "mt2063.h"

/*  Version of this module                          */
#define MT2063_VERSION 10018	/*  Version 01.18 */

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static unsigned int verbose;
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module_param(verbose, int, 0644);

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/* Prototypes */
static void MT2063_AddExclZone(struct MT2063_AvoidSpursData_t *pAS_Info,
                        u32 f_min, u32 f_max);
static u32 MT2063_ReInit(void *h);
static u32 MT2063_Close(void *hMT2063);
static u32 MT2063_GetReg(void *h, u8 reg, u8 * val);
static u32 MT2063_GetParam(void *h, enum MT2063_Param param, u32 * pValue);
static u32 MT2063_SetReg(void *h, u8 reg, u8 val);
static u32 MT2063_SetParam(void *h, enum MT2063_Param param, u32 nValue);

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/*****************/
/* From drivers/media/common/tuners/mt2063_cfg.h */

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static unsigned int mt2063_setTune(struct dvb_frontend *fe, u32 f_in,
				   u32 bw_in,
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				   enum MTTune_atv_standard tv_type)
{
	//return (int)MT_Tune_atv(h, f_in, bw_in, tv_type);

	struct dvb_frontend_ops *frontend_ops = NULL;
	struct dvb_tuner_ops *tuner_ops = NULL;
	struct tuner_state t_state;
	struct mt2063_state *mt2063State = fe->tuner_priv;
	int err = 0;

	t_state.frequency = f_in;
	t_state.bandwidth = bw_in;
	mt2063State->tv_type = tv_type;
	if (&fe->ops)
		frontend_ops = &fe->ops;
	if (&frontend_ops->tuner_ops)
		tuner_ops = &frontend_ops->tuner_ops;
	if (tuner_ops->set_state) {
		if ((err =
		     tuner_ops->set_state(fe, DVBFE_TUNER_FREQUENCY,
					  &t_state)) < 0) {
			printk("%s: Invalid parameter\n", __func__);
			return err;
		}
	}

	return err;
}

static unsigned int mt2063_lockStatus(struct dvb_frontend *fe)
{
	struct dvb_frontend_ops *frontend_ops = &fe->ops;
	struct dvb_tuner_ops *tuner_ops = &frontend_ops->tuner_ops;
	struct tuner_state t_state;
	int err = 0;

	if (&fe->ops)
		frontend_ops = &fe->ops;
	if (&frontend_ops->tuner_ops)
		tuner_ops = &frontend_ops->tuner_ops;
	if (tuner_ops->get_state) {
		if ((err =
		     tuner_ops->get_state(fe, DVBFE_TUNER_REFCLOCK,
					  &t_state)) < 0) {
			printk("%s: Invalid parameter\n", __func__);
			return err;
		}
	}
	return err;
}

static unsigned int tuner_MT2063_Open(struct dvb_frontend *fe)
{
	struct dvb_frontend_ops *frontend_ops = &fe->ops;
	struct dvb_tuner_ops *tuner_ops = &frontend_ops->tuner_ops;
	struct tuner_state t_state;
	int err = 0;

	if (&fe->ops)
		frontend_ops = &fe->ops;
	if (&frontend_ops->tuner_ops)
		tuner_ops = &frontend_ops->tuner_ops;
	if (tuner_ops->set_state) {
		if ((err =
		     tuner_ops->set_state(fe, DVBFE_TUNER_OPEN,
					  &t_state)) < 0) {
			printk("%s: Invalid parameter\n", __func__);
			return err;
		}
	}

	return err;
}

static unsigned int tuner_MT2063_SoftwareShutdown(struct dvb_frontend *fe)
{
	struct dvb_frontend_ops *frontend_ops = &fe->ops;
	struct dvb_tuner_ops *tuner_ops = &frontend_ops->tuner_ops;
	struct tuner_state t_state;
	int err = 0;

	if (&fe->ops)
		frontend_ops = &fe->ops;
	if (&frontend_ops->tuner_ops)
		tuner_ops = &frontend_ops->tuner_ops;
	if (tuner_ops->set_state) {
		if ((err =
		     tuner_ops->set_state(fe, DVBFE_TUNER_SOFTWARE_SHUTDOWN,
					  &t_state)) < 0) {
			printk("%s: Invalid parameter\n", __func__);
			return err;
		}
	}

	return err;
}

static unsigned int tuner_MT2063_ClearPowerMaskBits(struct dvb_frontend *fe)
{
	struct dvb_frontend_ops *frontend_ops = &fe->ops;
	struct dvb_tuner_ops *tuner_ops = &frontend_ops->tuner_ops;
	struct tuner_state t_state;
	int err = 0;

	if (&fe->ops)
		frontend_ops = &fe->ops;
	if (&frontend_ops->tuner_ops)
		tuner_ops = &frontend_ops->tuner_ops;
	if (tuner_ops->set_state) {
		if ((err =
		     tuner_ops->set_state(fe, DVBFE_TUNER_CLEAR_POWER_MASKBITS,
					  &t_state)) < 0) {
			printk("%s: Invalid parameter\n", __func__);
			return err;
		}
	}

	return err;
}

/*****************/


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//i2c operation
static int mt2063_writeregs(struct mt2063_state *state, u8 reg1,
			    u8 * data, int len)
{
	int ret;
	u8 buf[60];		/* = { reg1, data }; */

	struct i2c_msg msg = {
		.addr = state->config->tuner_address,
		.flags = 0,
		.buf = buf,
		.len = len + 1
	};

	msg.buf[0] = reg1;
	memcpy(msg.buf + 1, data, len);

	//printk("mt2063_writeregs state->i2c=%p\n", state->i2c);
	ret = i2c_transfer(state->i2c, &msg, 1);

	if (ret < 0)
		printk("mt2063_writeregs error ret=%d\n", ret);

	return ret;
}

static int mt2063_read_regs(struct mt2063_state *state, u8 reg1, u8 * b, u8 len)
{
	int ret;
	u8 b0[] = { reg1 };
	struct i2c_msg msg[] = {
		{
		 .addr = state->config->tuner_address,
		 .flags = I2C_M_RD,
		 .buf = b0,
		 .len = 1}, {
			     .addr = state->config->tuner_address,
			     .flags = I2C_M_RD,
			     .buf = b,
			     .len = len}
	};

	//printk("mt2063_read_regs state->i2c=%p\n", state->i2c);
	ret = i2c_transfer(state->i2c, msg, 2);
	if (ret < 0)
		printk("mt2063_readregs error ret=%d\n", ret);

	return ret;
}

//context of mt2063_userdef.c   <Henry> ======================================
//#################################################################
//=================================================================
/*****************************************************************************
**
**  Name: MT_WriteSub
**
**  Description:    Write values to device using a two-wire serial bus.
**
**  Parameters:     hUserData  - User-specific I/O parameter that was
**                               passed to tuner's Open function.
**                  addr       - device serial bus address  (value passed
**                               as parameter to MTxxxx_Open)
**                  subAddress - serial bus sub-address (Register Address)
**                  pData      - pointer to the Data to be written to the
**                               device
**                  cnt        - number of bytes/registers to be written
**
**  Returns:        status:
**                      MT_OK            - No errors
**                      MT_COMM_ERR      - Serial bus communications error
**                      user-defined
**
**  Notes:          This is a callback function that is called from the
**                  the tuning algorithm.  You MUST provide code for this
**                  function to write data using the tuner's 2-wire serial
**                  bus.
**
**                  The hUserData parameter is a user-specific argument.
**                  If additional arguments are needed for the user's
**                  serial bus read/write functions, this argument can be
**                  used to supply the necessary information.
**                  The hUserData parameter is initialized in the tuner's Open
**                  function.
**
**  Revision History:
**
**   SCR      Date      Author  Description
**  -------------------------------------------------------------------------
**   N/A   03-25-2004    DAD    Original
**
*****************************************************************************/
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static u32 MT2063_WriteSub(void *hUserData,
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			u32 addr,
			u8 subAddress, u8 * pData, u32 cnt)
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{
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	u32 status = MT2063_OK;	/* Status to be returned        */
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	struct dvb_frontend *fe = hUserData;
	struct mt2063_state *state = fe->tuner_priv;
	/*
	 **  ToDo:  Add code here to implement a serial-bus write
	 **         operation to the MTxxxx tuner.  If successful,
	 **         return MT_OK.
	 */
/*  return status;  */

	fe->ops.i2c_gate_ctrl(fe, 1);	//I2C bypass drxk3926 close i2c bridge

	if (mt2063_writeregs(state, subAddress, pData, cnt) < 0) {
		status = MT2063_ERROR;
	}
	fe->ops.i2c_gate_ctrl(fe, 0);	//I2C bypass drxk3926 close i2c bridge

	return (status);
}

/*****************************************************************************
**
**  Name: MT_ReadSub
**
**  Description:    Read values from device using a two-wire serial bus.
**
**  Parameters:     hUserData  - User-specific I/O parameter that was
**                               passed to tuner's Open function.
**                  addr       - device serial bus address  (value passed
**                               as parameter to MTxxxx_Open)
**                  subAddress - serial bus sub-address (Register Address)
**                  pData      - pointer to the Data to be written to the
**                               device
**                  cnt        - number of bytes/registers to be written
**
**  Returns:        status:
**                      MT_OK            - No errors
**                      MT_COMM_ERR      - Serial bus communications error
**                      user-defined
**
**  Notes:          This is a callback function that is called from the
**                  the tuning algorithm.  You MUST provide code for this
**                  function to read data using the tuner's 2-wire serial
**                  bus.
**
**                  The hUserData parameter is a user-specific argument.
**                  If additional arguments are needed for the user's
**                  serial bus read/write functions, this argument can be
**                  used to supply the necessary information.
**                  The hUserData parameter is initialized in the tuner's Open
**                  function.
**
**  Revision History:
**
**   SCR      Date      Author  Description
**  -------------------------------------------------------------------------
**   N/A   03-25-2004    DAD    Original
**
*****************************************************************************/
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static u32 MT2063_ReadSub(void *hUserData,
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		       u32 addr,
		       u8 subAddress, u8 * pData, u32 cnt)
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{
	/*
	 **  ToDo:  Add code here to implement a serial-bus read
	 **         operation to the MTxxxx tuner.  If successful,
	 **         return MT_OK.
	 */
/*  return status;  */
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	u32 status = MT2063_OK;	/* Status to be returned        */
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	struct dvb_frontend *fe = hUserData;
	struct mt2063_state *state = fe->tuner_priv;
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	u32 i = 0;
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	fe->ops.i2c_gate_ctrl(fe, 1);	//I2C bypass drxk3926 close i2c bridge

	for (i = 0; i < cnt; i++) {
		if (mt2063_read_regs(state, subAddress + i, pData + i, 1) < 0) {
			status = MT2063_ERROR;
			break;
		}
	}

	fe->ops.i2c_gate_ctrl(fe, 0);	//I2C bypass drxk3926 close i2c bridge

	return (status);
}

/*****************************************************************************
**
**  Name: MT_Sleep
**
**  Description:    Delay execution for "nMinDelayTime" milliseconds
**
**  Parameters:     hUserData     - User-specific I/O parameter that was
**                                  passed to tuner's Open function.
**                  nMinDelayTime - Delay time in milliseconds
**
**  Returns:        None.
**
**  Notes:          This is a callback function that is called from the
**                  the tuning algorithm.  You MUST provide code that
**                  blocks execution for the specified period of time.
**
**  Revision History:
**
**   SCR      Date      Author  Description
**  -------------------------------------------------------------------------
**   N/A   03-25-2004    DAD    Original
**
*****************************************************************************/
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static void MT2063_Sleep(void *hUserData, u32 nMinDelayTime)
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{
	/*
	 **  ToDo:  Add code here to implement a OS blocking
	 **         for a period of "nMinDelayTime" milliseconds.
	 */
	msleep(nMinDelayTime);
}

/*****************************************************************************
**
**  Name: MT_TunerGain  (MT2060 only)
**
**  Description:    Measure the relative tuner gain using the demodulator
**
**  Parameters:     hUserData  - User-specific I/O parameter that was
**                               passed to tuner's Open function.
**                  pMeas      - Tuner gain (1/100 of dB scale).
**                               ie. 1234 = 12.34 (dB)
**
**  Returns:        status:
**                      MT_OK  - No errors
**                      user-defined errors could be set
**
**  Notes:          This is a callback function that is called from the
**                  the 1st IF location routine.  You MUST provide
**                  code that measures the relative tuner gain in a dB
**                  (not linear) scale.  The return value is an integer
**                  value scaled to 1/100 of a dB.
**
**  Revision History:
**
**   SCR      Date      Author  Description
**  -------------------------------------------------------------------------
**   N/A   06-16-2004    DAD    Original
**   N/A   11-30-2004    DAD    Renamed from MT_DemodInputPower.  This name
**                              better describes what this function does.
**
*****************************************************************************/
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static u32 MT2060_TunerGain(void *hUserData, s32 * pMeas)
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{
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	u32 status = MT2063_OK;	/* Status to be returned        */
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	/*
	 **  ToDo:  Add code here to return the gain / power level measured
	 **         at the input to the demodulator.
	 */

	return (status);
}
//end of mt2063_userdef.c
//=================================================================
//#################################################################
//=================================================================

//context of mt2063_spuravoid.c <Henry> ======================================
//#################################################################
//=================================================================

/*****************************************************************************
**
**  Name: mt_spuravoid.c
**
**  Description:    Microtune spur avoidance software module.
**                  Supports Microtune tuner drivers.
**
**  CVS ID:         $Id: mt_spuravoid.c,v 1.3 2008/06/26 15:39:52 software Exp $
**  CVS Source:     $Source: /export/home/cvsroot/software/tuners/MT2063/mt_spuravoid.c,v $
**
**  Revision History:
**
**   SCR      Date      Author  Description
**  -------------------------------------------------------------------------
**   082   03-25-2005    JWS    Original multi-tuner support - requires
**                              MTxxxx_CNT declarations
**   096   04-06-2005    DAD    Ver 1.11: Fix divide by 0 error if maxH==0.
**   094   04-06-2005    JWS    Ver 1.11 Added uceil and ufloor to get rid
**                              of compiler warnings
**   N/A   04-07-2005    DAD    Ver 1.13: Merged single- and multi-tuner spur
**                              avoidance into a single module.
**   103   01-31-2005    DAD    Ver 1.14: In MT_AddExclZone(), if the range
**                              (f_min, f_max) < 0, ignore the entry.
**   115   03-23-2007    DAD    Fix declaration of spur due to truncation
**                              errors.
**   117   03-29-2007    RSK    Ver 1.15: Re-wrote to match search order from
**                              tuner DLL.
**   137   06-18-2007    DAD    Ver 1.16: Fix possible divide-by-0 error for
**                              multi-tuners that have
**                              (delta IF1) > (f_out-f_outbw/2).
**   147   07-27-2007    RSK    Ver 1.17: Corrected calculation (-) to (+)
**                              Added logic to force f_Center within 1/2 f_Step.
**   177 S 02-26-2008    RSK    Ver 1.18: Corrected calculation using LO1 > MAX/2
**                              Type casts added to preserve correct sign.
**   N/A I 06-17-2008    RSK    Ver 1.19: Refactoring avoidance of DECT
**                              frequencies into MT_ResetExclZones().
**   N/A I 06-20-2008    RSK    Ver 1.21: New VERSION number for ver checking.
**
*****************************************************************************/

/*  Version of this module                         */
#define MT2063_SPUR_VERSION 10201	/*  Version 01.21 */

/*  Implement ceiling, floor functions.  */
#define ceil(n, d) (((n) < 0) ? (-((-(n))/(d))) : (n)/(d) + ((n)%(d) != 0))
#define uceil(n, d) ((n)/(d) + ((n)%(d) != 0))
#define floor(n, d) (((n) < 0) ? (-((-(n))/(d))) - ((n)%(d) != 0) : (n)/(d))
#define ufloor(n, d) ((n)/(d))

struct MT2063_FIFZone_t {
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	s32 min_;
	s32 max_;
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};

#if MT2063_TUNER_CNT > 1
static struct MT2063_AvoidSpursData_t *TunerList[MT2063_TUNER_CNT];
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static u32 TunerCount = 0;
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#endif

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static u32 MT2063_RegisterTuner(struct MT2063_AvoidSpursData_t *pAS_Info)
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{
#if MT2063_TUNER_CNT == 1
	pAS_Info->nAS_Algorithm = 1;
	return MT2063_OK;
#else
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	u32 index;
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	pAS_Info->nAS_Algorithm = 2;

	/*
	 **  Check to see if tuner is already registered
	 */
	for (index = 0; index < TunerCount; index++) {
		if (TunerList[index] == pAS_Info) {
			return MT2063_OK;	/* Already here - no problem  */
		}
	}

	/*
	 ** Add tuner to list - if there is room.
	 */
	if (TunerCount < MT2063_TUNER_CNT) {
		TunerList[TunerCount] = pAS_Info;
		TunerCount++;
		return MT2063_OK;
	} else
		return MT2063_TUNER_CNT_ERR;
#endif
}

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static void MT2063_UnRegisterTuner(struct MT2063_AvoidSpursData_t *pAS_Info)
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{
#if MT2063_TUNER_CNT == 1
	pAS_Info;
#else

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	u32 index;
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	for (index = 0; index < TunerCount; index++) {
		if (TunerList[index] == pAS_Info) {
			TunerList[index] = TunerList[--TunerCount];
		}
	}
#endif
}

/*
**  Reset all exclusion zones.
**  Add zones to protect the PLL FracN regions near zero
**
**   N/A I 06-17-2008    RSK    Ver 1.19: Refactoring avoidance of DECT
**                              frequencies into MT_ResetExclZones().
*/
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static void MT2063_ResetExclZones(struct MT2063_AvoidSpursData_t *pAS_Info)
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{
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	u32 center;
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#if MT2063_TUNER_CNT > 1
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	u32 index;
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	struct MT2063_AvoidSpursData_t *adj;
#endif

	pAS_Info->nZones = 0;	/*  this clears the used list  */
	pAS_Info->usedZones = NULL;	/*  reset ptr                  */
	pAS_Info->freeZones = NULL;	/*  reset ptr                  */

	center =
	    pAS_Info->f_ref *
	    ((pAS_Info->f_if1_Center - pAS_Info->f_if1_bw / 2 +
	      pAS_Info->f_in) / pAS_Info->f_ref) - pAS_Info->f_in;
	while (center <
	       pAS_Info->f_if1_Center + pAS_Info->f_if1_bw / 2 +
	       pAS_Info->f_LO1_FracN_Avoid) {
		/*  Exclude LO1 FracN  */
		MT2063_AddExclZone(pAS_Info,
				   center - pAS_Info->f_LO1_FracN_Avoid,
				   center - 1);
		MT2063_AddExclZone(pAS_Info, center + 1,
				   center + pAS_Info->f_LO1_FracN_Avoid);
		center += pAS_Info->f_ref;
	}

	center =
	    pAS_Info->f_ref *
	    ((pAS_Info->f_if1_Center - pAS_Info->f_if1_bw / 2 -
	      pAS_Info->f_out) / pAS_Info->f_ref) + pAS_Info->f_out;
	while (center <
	       pAS_Info->f_if1_Center + pAS_Info->f_if1_bw / 2 +
	       pAS_Info->f_LO2_FracN_Avoid) {
		/*  Exclude LO2 FracN  */
		MT2063_AddExclZone(pAS_Info,
				   center - pAS_Info->f_LO2_FracN_Avoid,
				   center - 1);
		MT2063_AddExclZone(pAS_Info, center + 1,
				   center + pAS_Info->f_LO2_FracN_Avoid);
		center += pAS_Info->f_ref;
	}

	if (MT2063_EXCLUDE_US_DECT_FREQUENCIES(pAS_Info->avoidDECT)) {
		/*  Exclude LO1 values that conflict with DECT channels */
		MT2063_AddExclZone(pAS_Info, 1920836000 - pAS_Info->f_in, 1922236000 - pAS_Info->f_in);	/* Ctr = 1921.536 */
		MT2063_AddExclZone(pAS_Info, 1922564000 - pAS_Info->f_in, 1923964000 - pAS_Info->f_in);	/* Ctr = 1923.264 */
		MT2063_AddExclZone(pAS_Info, 1924292000 - pAS_Info->f_in, 1925692000 - pAS_Info->f_in);	/* Ctr = 1924.992 */
		MT2063_AddExclZone(pAS_Info, 1926020000 - pAS_Info->f_in, 1927420000 - pAS_Info->f_in);	/* Ctr = 1926.720 */
		MT2063_AddExclZone(pAS_Info, 1927748000 - pAS_Info->f_in, 1929148000 - pAS_Info->f_in);	/* Ctr = 1928.448 */
	}

	if (MT2063_EXCLUDE_EURO_DECT_FREQUENCIES(pAS_Info->avoidDECT)) {
		MT2063_AddExclZone(pAS_Info, 1896644000 - pAS_Info->f_in, 1898044000 - pAS_Info->f_in);	/* Ctr = 1897.344 */
		MT2063_AddExclZone(pAS_Info, 1894916000 - pAS_Info->f_in, 1896316000 - pAS_Info->f_in);	/* Ctr = 1895.616 */
		MT2063_AddExclZone(pAS_Info, 1893188000 - pAS_Info->f_in, 1894588000 - pAS_Info->f_in);	/* Ctr = 1893.888 */
		MT2063_AddExclZone(pAS_Info, 1891460000 - pAS_Info->f_in, 1892860000 - pAS_Info->f_in);	/* Ctr = 1892.16  */
		MT2063_AddExclZone(pAS_Info, 1889732000 - pAS_Info->f_in, 1891132000 - pAS_Info->f_in);	/* Ctr = 1890.432 */
		MT2063_AddExclZone(pAS_Info, 1888004000 - pAS_Info->f_in, 1889404000 - pAS_Info->f_in);	/* Ctr = 1888.704 */
		MT2063_AddExclZone(pAS_Info, 1886276000 - pAS_Info->f_in, 1887676000 - pAS_Info->f_in);	/* Ctr = 1886.976 */
		MT2063_AddExclZone(pAS_Info, 1884548000 - pAS_Info->f_in, 1885948000 - pAS_Info->f_in);	/* Ctr = 1885.248 */
		MT2063_AddExclZone(pAS_Info, 1882820000 - pAS_Info->f_in, 1884220000 - pAS_Info->f_in);	/* Ctr = 1883.52  */
		MT2063_AddExclZone(pAS_Info, 1881092000 - pAS_Info->f_in, 1882492000 - pAS_Info->f_in);	/* Ctr = 1881.792 */
	}
#if MT2063_TUNER_CNT > 1
	/*
	 ** Iterate through all adjacent tuners and exclude frequencies related to them
	 */
	for (index = 0; index < TunerCount; ++index) {
		adj = TunerList[index];
		if (pAS_Info == adj)	/* skip over our own data, don't process it */
			continue;

		/*
		 **  Add 1st IF exclusion zone covering adjacent tuner's LO2
		 **  at "adjfLO2 + f_out" +/- m_MinLOSpacing
		 */
		if (adj->f_LO2 != 0)
			MT2063_AddExclZone(pAS_Info,
					   (adj->f_LO2 + pAS_Info->f_out) -
					   pAS_Info->f_min_LO_Separation,
					   (adj->f_LO2 + pAS_Info->f_out) +
					   pAS_Info->f_min_LO_Separation);

		/*
		 **  Add 1st IF exclusion zone covering adjacent tuner's LO1
		 **  at "adjfLO1 - f_in" +/- m_MinLOSpacing
		 */
		if (adj->f_LO1 != 0)
			MT2063_AddExclZone(pAS_Info,
					   (adj->f_LO1 - pAS_Info->f_in) -
					   pAS_Info->f_min_LO_Separation,
					   (adj->f_LO1 - pAS_Info->f_in) +
					   pAS_Info->f_min_LO_Separation);
	}
#endif
}

static struct MT2063_ExclZone_t *InsertNode(struct MT2063_AvoidSpursData_t
					    *pAS_Info,
					    struct MT2063_ExclZone_t *pPrevNode)
{
	struct MT2063_ExclZone_t *pNode;
	/*  Check for a node in the free list  */
	if (pAS_Info->freeZones != NULL) {
		/*  Use one from the free list  */
		pNode = pAS_Info->freeZones;
		pAS_Info->freeZones = pNode->next_;
	} else {
		/*  Grab a node from the array  */
		pNode = &pAS_Info->MT2063_ExclZones[pAS_Info->nZones];
	}

	if (pPrevNode != NULL) {
		pNode->next_ = pPrevNode->next_;
		pPrevNode->next_ = pNode;
	} else {		/*  insert at the beginning of the list  */

		pNode->next_ = pAS_Info->usedZones;
		pAS_Info->usedZones = pNode;
	}

	pAS_Info->nZones++;
	return pNode;
}

static struct MT2063_ExclZone_t *RemoveNode(struct MT2063_AvoidSpursData_t
					    *pAS_Info,
					    struct MT2063_ExclZone_t *pPrevNode,
					    struct MT2063_ExclZone_t
					    *pNodeToRemove)
{
	struct MT2063_ExclZone_t *pNext = pNodeToRemove->next_;

	/*  Make previous node point to the subsequent node  */
	if (pPrevNode != NULL)
		pPrevNode->next_ = pNext;

	/*  Add pNodeToRemove to the beginning of the freeZones  */
	pNodeToRemove->next_ = pAS_Info->freeZones;
	pAS_Info->freeZones = pNodeToRemove;

	/*  Decrement node count  */
	pAS_Info->nZones--;

	return pNext;
}

/*****************************************************************************
**
**  Name: MT_AddExclZone
**
**  Description:    Add (and merge) an exclusion zone into the list.
**                  If the range (f_min, f_max) is totally outside the
**                  1st IF BW, ignore the entry.
**                  If the range (f_min, f_max) is negative, ignore the entry.
**
**  Revision History:
**
**   SCR      Date      Author  Description
**  -------------------------------------------------------------------------
**   103   01-31-2005    DAD    Ver 1.14: In MT_AddExclZone(), if the range
**                              (f_min, f_max) < 0, ignore the entry.
**
*****************************************************************************/
698
static void MT2063_AddExclZone(struct MT2063_AvoidSpursData_t *pAS_Info,
699
			u32 f_min, u32 f_max)
700 701 702 703 704 705 706 707 708 709 710 711 712 713 714 715 716 717 718 719 720 721 722 723 724 725 726 727 728 729 730 731 732 733 734 735 736 737 738 739 740 741 742 743 744 745 746 747 748 749 750 751 752 753 754 755 756 757 758 759 760 761 762 763
{
	struct MT2063_ExclZone_t *pNode = pAS_Info->usedZones;
	struct MT2063_ExclZone_t *pPrev = NULL;
	struct MT2063_ExclZone_t *pNext = NULL;

	/*  Check to see if this overlaps the 1st IF filter  */
	if ((f_max > (pAS_Info->f_if1_Center - (pAS_Info->f_if1_bw / 2)))
	    && (f_min < (pAS_Info->f_if1_Center + (pAS_Info->f_if1_bw / 2)))
	    && (f_min < f_max)) {
		/*
		 **                1           2          3        4         5          6
		 **
		 **   New entry:  |---|    |--|        |--|       |-|      |---|         |--|
		 **                     or          or        or       or        or
		 **   Existing:  |--|          |--|      |--|    |---|      |-|      |--|
		 */

		/*  Check for our place in the list  */
		while ((pNode != NULL) && (pNode->max_ < f_min)) {
			pPrev = pNode;
			pNode = pNode->next_;
		}

		if ((pNode != NULL) && (pNode->min_ < f_max)) {
			/*  Combine me with pNode  */
			if (f_min < pNode->min_)
				pNode->min_ = f_min;
			if (f_max > pNode->max_)
				pNode->max_ = f_max;
		} else {
			pNode = InsertNode(pAS_Info, pPrev);
			pNode->min_ = f_min;
			pNode->max_ = f_max;
		}

		/*  Look for merging possibilities  */
		pNext = pNode->next_;
		while ((pNext != NULL) && (pNext->min_ < pNode->max_)) {
			if (pNext->max_ > pNode->max_)
				pNode->max_ = pNext->max_;
			pNext = RemoveNode(pAS_Info, pNode, pNext);	/*  Remove pNext, return ptr to pNext->next  */
		}
	}
}

/*****************************************************************************
**
**  Name: MT_ChooseFirstIF
**
**  Description:    Choose the best available 1st IF
**                  If f_Desired is not excluded, choose that first.
**                  Otherwise, return the value closest to f_Center that is
**                  not excluded
**
**  Revision History:
**
**   SCR      Date      Author  Description
**  -------------------------------------------------------------------------
**   117   03-29-2007    RSK    Ver 1.15: Re-wrote to match search order from
**                              tuner DLL.
**   147   07-27-2007    RSK    Ver 1.17: Corrected calculation (-) to (+)
**                              Added logic to force f_Center within 1/2 f_Step.
**
*****************************************************************************/
764
static u32 MT2063_ChooseFirstIF(struct MT2063_AvoidSpursData_t *pAS_Info)
765 766 767 768 769 770 771
{
	/*
	 ** Update "f_Desired" to be the nearest "combinational-multiple" of "f_LO1_Step".
	 ** The resulting number, F_LO1 must be a multiple of f_LO1_Step.  And F_LO1 is the arithmetic sum
	 ** of f_in + f_Center.  Neither f_in, nor f_Center must be a multiple of f_LO1_Step.
	 ** However, the sum must be.
	 */
772
	const u32 f_Desired =
773 774 775 776
	    pAS_Info->f_LO1_Step *
	    ((pAS_Info->f_if1_Request + pAS_Info->f_in +
	      pAS_Info->f_LO1_Step / 2) / pAS_Info->f_LO1_Step) -
	    pAS_Info->f_in;
777
	const u32 f_Step =
778 779 780
	    (pAS_Info->f_LO1_Step >
	     pAS_Info->f_LO2_Step) ? pAS_Info->f_LO1_Step : pAS_Info->
	    f_LO2_Step;
781 782 783 784 785 786 787 788
	u32 f_Center;

	s32 i;
	s32 j = 0;
	u32 bDesiredExcluded = 0;
	u32 bZeroExcluded = 0;
	s32 tmpMin, tmpMax;
	s32 bestDiff;
789 790 791 792 793 794 795 796 797 798 799 800 801 802 803 804 805 806 807 808 809
	struct MT2063_ExclZone_t *pNode = pAS_Info->usedZones;
	struct MT2063_FIFZone_t zones[MT2063_MAX_ZONES];

	if (pAS_Info->nZones == 0)
		return f_Desired;

	/*  f_Center needs to be an integer multiple of f_Step away from f_Desired */
	if (pAS_Info->f_if1_Center > f_Desired)
		f_Center =
		    f_Desired +
		    f_Step *
		    ((pAS_Info->f_if1_Center - f_Desired +
		      f_Step / 2) / f_Step);
	else
		f_Center =
		    f_Desired -
		    f_Step *
		    ((f_Desired - pAS_Info->f_if1_Center +
		      f_Step / 2) / f_Step);

	//assert;
810
	//if (!abs((s32) f_Center - (s32) pAS_Info->f_if1_Center) <= (s32) (f_Step/2))
811 812 813 814 815 816
	//          return 0;

	/*  Take MT_ExclZones, center around f_Center and change the resolution to f_Step  */
	while (pNode != NULL) {
		/*  floor function  */
		tmpMin =
817
		    floor((s32) (pNode->min_ - f_Center), (s32) f_Step);
818 819 820

		/*  ceil function  */
		tmpMax =
821
		    ceil((s32) (pNode->max_ - f_Center), (s32) f_Step);
822 823 824 825 826 827 828 829 830 831 832 833 834 835 836 837 838 839 840 841 842 843 844 845 846 847 848 849 850 851 852 853 854 855 856 857 858 859 860 861 862 863 864 865 866

		if ((pNode->min_ < f_Desired) && (pNode->max_ > f_Desired))
			bDesiredExcluded = 1;

		if ((tmpMin < 0) && (tmpMax > 0))
			bZeroExcluded = 1;

		/*  See if this zone overlaps the previous  */
		if ((j > 0) && (tmpMin < zones[j - 1].max_))
			zones[j - 1].max_ = tmpMax;
		else {
			/*  Add new zone  */
			//assert(j<MT2063_MAX_ZONES);
			//if (j>=MT2063_MAX_ZONES)
			//break;

			zones[j].min_ = tmpMin;
			zones[j].max_ = tmpMax;
			j++;
		}
		pNode = pNode->next_;
	}

	/*
	 **  If the desired is okay, return with it
	 */
	if (bDesiredExcluded == 0)
		return f_Desired;

	/*
	 **  If the desired is excluded and the center is okay, return with it
	 */
	if (bZeroExcluded == 0)
		return f_Center;

	/*  Find the value closest to 0 (f_Center)  */
	bestDiff = zones[0].min_;
	for (i = 0; i < j; i++) {
		if (abs(zones[i].min_) < abs(bestDiff))
			bestDiff = zones[i].min_;
		if (abs(zones[i].max_) < abs(bestDiff))
			bestDiff = zones[i].max_;
	}

	if (bestDiff < 0)
867
		return f_Center - ((u32) (-bestDiff) * f_Step);
868 869 870 871 872 873 874 875 876 877 878 879 880 881 882 883 884 885 886 887 888 889 890 891 892 893 894 895

	return f_Center + (bestDiff * f_Step);
}

/****************************************************************************
**
**  Name: gcd
**
**  Description:    Uses Euclid's algorithm
**
**  Parameters:     u, v     - unsigned values whose GCD is desired.
**
**  Global:         None
**
**  Returns:        greatest common divisor of u and v, if either value
**                  is 0, the other value is returned as the result.
**
**  Dependencies:   None.
**
**  Revision History:
**
**   SCR      Date      Author  Description
**  -------------------------------------------------------------------------
**   N/A   06-01-2004    JWS    Original
**   N/A   08-03-2004    DAD    Changed to Euclid's since it can handle
**                              unsigned numbers.
**
****************************************************************************/
896
static u32 MT2063_gcd(u32 u, u32 v)
897
{
898
	u32 r;
899 900 901 902 903 904 905 906 907 908 909 910 911 912 913 914 915 916 917 918 919 920 921 922 923 924 925 926 927 928 929 930 931

	while (v != 0) {
		r = u % v;
		u = v;
		v = r;
	}

	return u;
}

/****************************************************************************
**
**  Name: umax
**
**  Description:    Implements a simple maximum function for unsigned numbers.
**                  Implemented as a function rather than a macro to avoid
**                  multiple evaluation of the calling parameters.
**
**  Parameters:     a, b     - Values to be compared
**
**  Global:         None
**
**  Returns:        larger of the input values.
**
**  Dependencies:   None.
**
**  Revision History:
**
**   SCR      Date      Author  Description
**  -------------------------------------------------------------------------
**   N/A   06-02-2004    JWS    Original
**
****************************************************************************/
932
static u32 MT2063_umax(u32 a, u32 b)
933 934 935 936 937
{
	return (a >= b) ? a : b;
}

#if MT2063_TUNER_CNT > 1
938
static s32 RoundAwayFromZero(s32 n, s32 d)
939 940 941 942 943 944 945 946 947 948 949 950 951 952 953 954 955 956 957 958 959 960 961 962 963 964 965 966 967 968 969 970 971 972 973 974 975 976 977 978 979 980 981 982 983 984 985 986 987 988 989 990 991 992 993 994 995
{
	return (n < 0) ? floor(n, d) : ceil(n, d);
}

/****************************************************************************
**
**  Name: IsSpurInAdjTunerBand
**
**  Description:    Checks to see if a spur will be present within the IF's
**                  bandwidth or near the zero IF.
**                  (fIFOut +/- fIFBW/2, -fIFOut +/- fIFBW/2)
**                                  and
**                  (0 +/- fZIFBW/2)
**
**                    ma   mb               me   mf               mc   md
**                  <--+-+-+-----------------+-+-+-----------------+-+-+-->
**                     |   ^                   0                   ^   |
**                     ^   b=-fIFOut+fIFBW/2      -b=+fIFOut-fIFBW/2   ^
**                     a=-fIFOut-fIFBW/2              -a=+fIFOut+fIFBW/2
**
**                  Note that some equations are doubled to prevent round-off
**                  problems when calculating fIFBW/2
**
**                  The spur frequencies are computed as:
**
**                     fSpur = n * f1 - m * f2 - fOffset
**
**  Parameters:     f1      - The 1st local oscillator (LO) frequency
**                            of the tuner whose output we are examining
**                  f2      - The 1st local oscillator (LO) frequency
**                            of the adjacent tuner
**                  fOffset - The 2nd local oscillator of the tuner whose
**                            output we are examining
**                  fIFOut  - Output IF center frequency
**                  fIFBW   - Output IF Bandwidth
**                  nMaxH   - max # of LO harmonics to search
**                  fp      - If spur, positive distance to spur-free band edge (returned)
**                  fm      - If spur, negative distance to spur-free band edge (returned)
**
**  Returns:        1 if an LO spur would be present, otherwise 0.
**
**  Dependencies:   None.
**
**  Revision History:
**
**   SCR      Date      Author  Description
**  -------------------------------------------------------------------------
**   N/A   01-21-2005    JWS    Original, adapted from MT_DoubleConversion.
**   115   03-23-2007    DAD    Fix declaration of spur due to truncation
**                              errors.
**   137   06-18-2007    DAD    Ver 1.16: Fix possible divide-by-0 error for
**                              multi-tuners that have
**                              (delta IF1) > (f_out-f_outbw/2).
**   177 S 02-26-2008    RSK    Ver 1.18: Corrected calculation using LO1 > MAX/2
**                              Type casts added to preserve correct sign.
**
****************************************************************************/
996 997 998 999 1000 1001 1002 1003
static u32 IsSpurInAdjTunerBand(u32 bIsMyOutput,
				    u32 f1,
				    u32 f2,
				    u32 fOffset,
				    u32 fIFOut,
				    u32 fIFBW,
				    u32 fZIFBW,
				    u32 nMaxH, u32 * fp, u32 * fm)
1004
{
1005
	u32 bSpurFound = 0;
1006

1007 1008
	const u32 fHalf_IFBW = fIFBW / 2;
	const u32 fHalf_ZIFBW = fZIFBW / 2;
1009 1010 1011

	/* Calculate a scale factor for all frequencies, so that our
	   calculations all stay within 31 bits */
1012
	const u32 f_Scale =
1013 1014 1015 1016 1017 1018 1019 1020
	    ((f1 +
	      (fOffset + fIFOut +
	       fHalf_IFBW) / nMaxH) / (MAX_UDATA / 2 / nMaxH)) + 1;

	/*
	 **  After this scaling, _f1, _f2, and _f3 are guaranteed to fit into
	 **  signed data types (smaller than MAX_UDATA/2)
	 */
1021 1022 1023
	const s32 _f1 = (s32) (f1 / f_Scale);
	const s32 _f2 = (s32) (f2 / f_Scale);
	const s32 _f3 = (s32) (fOffset / f_Scale);
1024

1025 1026 1027
	const s32 c = (s32) (fIFOut - fHalf_IFBW) / (s32) f_Scale;
	const s32 d = (s32) ((fIFOut + fHalf_IFBW) / f_Scale);
	const s32 f = (s32) (fHalf_ZIFBW / f_Scale);
1028

1029
	s32 ma, mb, mc, md, me, mf;
1030

1031 1032 1033
	s32 fp_ = 0;
	s32 fm_ = 0;
	s32 n;
1034 1035 1036 1037 1038 1039 1040 1041 1042

	/*
	 **  If the other tuner does not have an LO frequency defined,
	 **  assume that we cannot interfere with it
	 */
	if (f2 == 0)
		return 0;

	/* Check out all multiples of f1 from -nMaxH to +nMaxH */
1043 1044
	for (n = -(s32) nMaxH; n <= (s32) nMaxH; ++n) {
		const s32 nf1 = n * _f1;
1045 1046 1047
		md = (_f3 + d - nf1) / _f2;

		/* If # f2 harmonics > nMaxH, then no spurs present */
1048
		if (md <= -(s32) nMaxH)
1049 1050 1051
			break;

		ma = (_f3 - d - nf1) / _f2;
1052
		if ((ma == md) || (ma >= (s32) (nMaxH)))
1053 1054 1055 1056
			continue;

		mc = (_f3 + c - nf1) / _f2;
		if (mc != md) {
1057 1058 1059
			const s32 m = (n < 0) ? md : mc;
			const s32 fspur = (nf1 + m * _f2 - _f3);
			const s32 den = (bIsMyOutput ? n - 1 : n);
1060 1061 1062 1063 1064
			if (den == 0) {
				fp_ = (d - fspur) * f_Scale;
				fm_ = (fspur - c) * f_Scale;
			} else {
				fp_ =
1065
				    (s32) RoundAwayFromZero((d - fspur) *
1066 1067
								f_Scale, den);
				fm_ =
1068
				    (s32) RoundAwayFromZero((fspur - c) *
1069 1070
								f_Scale, den);
			}
1071 1072
			if (((u32) abs(fm_) >= f_Scale)
			    && ((u32) abs(fp_) >= f_Scale)) {
1073 1074 1075 1076 1077 1078 1079 1080 1081
				bSpurFound = 1;
				break;
			}
		}

		/* Location of Zero-IF-spur to be checked */
		mf = (_f3 + f - nf1) / _f2;
		me = (_f3 - f - nf1) / _f2;
		if (me != mf) {
1082 1083 1084
			const s32 m = (n < 0) ? mf : me;
			const s32 fspur = (nf1 + m * _f2 - _f3);
			const s32 den = (bIsMyOutput ? n - 1 : n);
1085 1086 1087 1088 1089
			if (den == 0) {
				fp_ = (d - fspur) * f_Scale;
				fm_ = (fspur - c) * f_Scale;
			} else {
				fp_ =
1090
				    (s32) RoundAwayFromZero((f - fspur) *
1091 1092
								f_Scale, den);
				fm_ =
1093
				    (s32) RoundAwayFromZero((fspur + f) *
1094 1095
								f_Scale, den);
			}
1096 1097
			if (((u32) abs(fm_) >= f_Scale)
			    && ((u32) abs(fp_) >= f_Scale)) {
1098 1099 1100 1101 1102 1103 1104
				bSpurFound = 1;
				break;
			}
		}

		mb = (_f3 - c - nf1) / _f2;
		if (ma != mb) {
1105 1106 1107
			const s32 m = (n < 0) ? mb : ma;
			const s32 fspur = (nf1 + m * _f2 - _f3);
			const s32 den = (bIsMyOutput ? n - 1 : n);
1108 1109 1110 1111 1112
			if (den == 0) {
				fp_ = (d - fspur) * f_Scale;
				fm_ = (fspur - c) * f_Scale;
			} else {
				fp_ =
1113
				    (s32) RoundAwayFromZero((-c - fspur) *
1114 1115
								f_Scale, den);
				fm_ =
1116
				    (s32) RoundAwayFromZero((fspur + d) *
1117 1118
								f_Scale, den);
			}
1119 1120
			if (((u32) abs(fm_) >= f_Scale)
			    && ((u32) abs(fp_) >= f_Scale)) {
1121 1122 1123 1124 1125 1126 1127 1128 1129 1130 1131 1132 1133 1134 1135 1136 1137 1138 1139 1140 1141 1142 1143 1144 1145 1146 1147 1148 1149 1150 1151 1152 1153 1154 1155 1156 1157 1158 1159 1160 1161 1162 1163 1164 1165 1166 1167 1168 1169 1170 1171 1172 1173 1174 1175 1176 1177 1178
				bSpurFound = 1;
				break;
			}
		}
	}

	/*
	 **  Verify that fm & fp are both positive
	 **  Add one to ensure next 1st IF choice is not right on the edge
	 */
	if (fp_ < 0) {
		*fp = -fm_ + 1;
		*fm = -fp_ + 1;
	} else if (fp_ > 0) {
		*fp = fp_ + 1;
		*fm = fm_ + 1;
	} else {
		*fp = 1;
		*fm = abs(fm_) + 1;
	}

	return bSpurFound;
}
#endif

/****************************************************************************
**
**  Name: IsSpurInBand
**
**  Description:    Checks to see if a spur will be present within the IF's
**                  bandwidth. (fIFOut +/- fIFBW, -fIFOut +/- fIFBW)
**
**                    ma   mb                                     mc   md
**                  <--+-+-+-------------------+-------------------+-+-+-->
**                     |   ^                   0                   ^   |
**                     ^   b=-fIFOut+fIFBW/2      -b=+fIFOut-fIFBW/2   ^
**                     a=-fIFOut-fIFBW/2              -a=+fIFOut+fIFBW/2
**
**                  Note that some equations are doubled to prevent round-off
**                  problems when calculating fIFBW/2
**
**  Parameters:     pAS_Info - Avoid Spurs information block
**                  fm       - If spur, amount f_IF1 has to move negative
**                  fp       - If spur, amount f_IF1 has to move positive
**
**  Global:         None
**
**  Returns:        1 if an LO spur would be present, otherwise 0.
**
**  Dependencies:   None.
**
**  Revision History:
**
**   SCR      Date      Author  Description
**  -------------------------------------------------------------------------
**   N/A   11-28-2002    DAD    Implemented algorithm from applied patent
**
****************************************************************************/
1179 1180
static u32 IsSpurInBand(struct MT2063_AvoidSpursData_t *pAS_Info,
			    u32 * fm, u32 * fp)
1181 1182 1183 1184
{
	/*
	 **  Calculate LO frequency settings.
	 */
1185 1186 1187 1188 1189 1190 1191 1192 1193 1194 1195
	u32 n, n0;
	const u32 f_LO1 = pAS_Info->f_LO1;
	const u32 f_LO2 = pAS_Info->f_LO2;
	const u32 d = pAS_Info->f_out + pAS_Info->f_out_bw / 2;
	const u32 c = d - pAS_Info->f_out_bw;
	const u32 f = pAS_Info->f_zif_bw / 2;
	const u32 f_Scale = (f_LO1 / (MAX_UDATA / 2 / pAS_Info->maxH1)) + 1;
	s32 f_nsLO1, f_nsLO2;
	s32 f_Spur;
	u32 ma, mb, mc, md, me, mf;
	u32 lo_gcd, gd_Scale, gc_Scale, gf_Scale, hgds, hgfs, hgcs;
1196
#if MT2063_TUNER_CNT > 1
1197
	u32 index;
1198 1199 1200 1201 1202 1203 1204 1205 1206 1207 1208

	struct MT2063_AvoidSpursData_t *adj;
#endif
	*fm = 0;

	/*
	 ** For each edge (d, c & f), calculate a scale, based on the gcd
	 ** of f_LO1, f_LO2 and the edge value.  Use the larger of this
	 ** gcd-based scale factor or f_Scale.
	 */
	lo_gcd = MT2063_gcd(f_LO1, f_LO2);
1209
	gd_Scale = MT2063_umax((u32) MT2063_gcd(lo_gcd, d), f_Scale);
1210
	hgds = gd_Scale / 2;
1211
	gc_Scale = MT2063_umax((u32) MT2063_gcd(lo_gcd, c), f_Scale);
1212
	hgcs = gc_Scale / 2;
1213
	gf_Scale = MT2063_umax((u32) MT2063_gcd(lo_gcd, f), f_Scale);
1214 1215 1216 1217 1218 1219 1220 1221 1222 1223 1224 1225 1226 1227 1228 1229 1230 1231 1232 1233 1234 1235 1236
	hgfs = gf_Scale / 2;

	n0 = uceil(f_LO2 - d, f_LO1 - f_LO2);

	/*  Check out all multiples of LO1 from n0 to m_maxLOSpurHarmonic  */
	for (n = n0; n <= pAS_Info->maxH1; ++n) {
		md = (n * ((f_LO1 + hgds) / gd_Scale) -
		      ((d + hgds) / gd_Scale)) / ((f_LO2 + hgds) / gd_Scale);

		/*  If # fLO2 harmonics > m_maxLOSpurHarmonic, then no spurs present  */
		if (md >= pAS_Info->maxH1)
			break;

		ma = (n * ((f_LO1 + hgds) / gd_Scale) +
		      ((d + hgds) / gd_Scale)) / ((f_LO2 + hgds) / gd_Scale);

		/*  If no spurs between +/- (f_out + f_IFBW/2), then try next harmonic  */
		if (md == ma)
			continue;

		mc = (n * ((f_LO1 + hgcs) / gc_Scale) -
		      ((c + hgcs) / gc_Scale)) / ((f_LO2 + hgcs) / gc_Scale);
		if (mc != md) {
1237 1238
			f_nsLO1 = (s32) (n * (f_LO1 / gc_Scale));
			f_nsLO2 = (s32) (mc * (f_LO2 / gc_Scale));
1239 1240 1241 1242
			f_Spur =
			    (gc_Scale * (f_nsLO1 - f_nsLO2)) +
			    n * (f_LO1 % gc_Scale) - mc * (f_LO2 % gc_Scale);

1243 1244
			*fp = ((f_Spur - (s32) c) / (mc - n)) + 1;
			*fm = (((s32) d - f_Spur) / (mc - n)) + 1;
1245 1246 1247 1248 1249 1250 1251 1252 1253 1254 1255 1256 1257 1258 1259
			return 1;
		}

		/*  Location of Zero-IF-spur to be checked  */
		me = (n * ((f_LO1 + hgfs) / gf_Scale) +
		      ((f + hgfs) / gf_Scale)) / ((f_LO2 + hgfs) / gf_Scale);
		mf = (n * ((f_LO1 + hgfs) / gf_Scale) -
		      ((f + hgfs) / gf_Scale)) / ((f_LO2 + hgfs) / gf_Scale);
		if (me != mf) {
			f_nsLO1 = n * (f_LO1 / gf_Scale);
			f_nsLO2 = me * (f_LO2 / gf_Scale);
			f_Spur =
			    (gf_Scale * (f_nsLO1 - f_nsLO2)) +
			    n * (f_LO1 % gf_Scale) - me * (f_LO2 % gf_Scale);

1260 1261
			*fp = ((f_Spur + (s32) f) / (me - n)) + 1;
			*fm = (((s32) f - f_Spur) / (me - n)) + 1;
1262 1263 1264 1265 1266 1267 1268 1269 1270 1271 1272 1273
			return 1;
		}

		mb = (n * ((f_LO1 + hgcs) / gc_Scale) +
		      ((c + hgcs) / gc_Scale)) / ((f_LO2 + hgcs) / gc_Scale);
		if (ma != mb) {
			f_nsLO1 = n * (f_LO1 / gc_Scale);
			f_nsLO2 = ma * (f_LO2 / gc_Scale);
			f_Spur =
			    (gc_Scale * (f_nsLO1 - f_nsLO2)) +
			    n * (f_LO1 % gc_Scale) - ma * (f_LO2 % gc_Scale);

1274 1275
			*fp = (((s32) d + f_Spur) / (ma - n)) + 1;
			*fm = (-(f_Spur + (s32) c) / (ma - n)) + 1;
1276 1277 1278 1279 1280 1281 1282 1283 1284 1285 1286 1287 1288 1289 1290 1291 1292 1293 1294 1295 1296 1297 1298 1299 1300 1301 1302 1303 1304 1305 1306 1307 1308 1309 1310 1311 1312 1313 1314 1315 1316 1317 1318 1319 1320 1321 1322 1323 1324 1325 1326 1327 1328 1329 1330
			return 1;
		}
	}

#if MT2063_TUNER_CNT > 1
	/*  If no spur found, see if there are more tuners on the same board  */
	for (index = 0; index < TunerCount; ++index) {
		adj = TunerList[index];
		if (pAS_Info == adj)	/* skip over our own data, don't process it */
			continue;

		/*  Look for LO-related spurs from the adjacent tuner generated into my IF output  */
		if (IsSpurInAdjTunerBand(1,	/*  check my IF output                     */
					 pAS_Info->f_LO1,	/*  my fLO1                                */
					 adj->f_LO1,	/*  the other tuner's fLO1                 */
					 pAS_Info->f_LO2,	/*  my fLO2                                */
					 pAS_Info->f_out,	/*  my fOut                                */
					 pAS_Info->f_out_bw,	/*  my output IF bandwidth                 */
					 pAS_Info->f_zif_bw,	/*  my Zero-IF bandwidth                   */
					 pAS_Info->maxH2, fp,	/*  minimum amount to move LO's positive   */
					 fm))	/*  miminum amount to move LO's negative   */
			return 1;
		/*  Look for LO-related spurs from my tuner generated into the adjacent tuner's IF output  */
		if (IsSpurInAdjTunerBand(0,	/*  check his IF output                    */
					 pAS_Info->f_LO1,	/*  my fLO1                                */
					 adj->f_LO1,	/*  the other tuner's fLO1                 */
					 adj->f_LO2,	/*  the other tuner's fLO2                 */
					 adj->f_out,	/*  the other tuner's fOut                 */
					 adj->f_out_bw,	/*  the other tuner's output IF bandwidth  */
					 pAS_Info->f_zif_bw,	/*  the other tuner's Zero-IF bandwidth    */
					 adj->maxH2, fp,	/*  minimum amount to move LO's positive   */
					 fm))	/*  miminum amount to move LO's negative   */
			return 1;
	}
#endif
	/*  No spurs found  */
	return 0;
}

/*****************************************************************************
**
**  Name: MT_AvoidSpurs
**
**  Description:    Main entry point to avoid spurs.
**                  Checks for existing spurs in present LO1, LO2 freqs
**                  and if present, chooses spur-free LO1, LO2 combination
**                  that tunes the same input/output frequencies.
**
**  Revision History:
**
**   SCR      Date      Author  Description
**  -------------------------------------------------------------------------
**   096   04-06-2005    DAD    Ver 1.11: Fix divide by 0 error if maxH==0.
**
*****************************************************************************/
1331
static u32 MT2063_AvoidSpurs(void *h, struct MT2063_AvoidSpursData_t * pAS_Info)
1332
{
1333 1334
	u32 status = MT2063_OK;
	u32 fm, fp;		/*  restricted range on LO's        */
1335 1336 1337 1338 1339 1340 1341 1342 1343 1344 1345 1346 1347 1348 1349 1350 1351 1352 1353
	pAS_Info->bSpurAvoided = 0;
	pAS_Info->nSpursFound = 0;

	if (pAS_Info->maxH1 == 0)
		return MT2063_OK;

	/*
	 **  Avoid LO Generated Spurs
	 **
	 **  Make sure that have no LO-related spurs within the IF output
	 **  bandwidth.
	 **
	 **  If there is an LO spur in this band, start at the current IF1 frequency
	 **  and work out until we find a spur-free frequency or run up against the
	 **  1st IF SAW band edge.  Use temporary copies of fLO1 and fLO2 so that they
	 **  will be unchanged if a spur-free setting is not found.
	 */
	pAS_Info->bSpurPresent = IsSpurInBand(pAS_Info, &fm, &fp);
	if (pAS_Info->bSpurPresent) {
1354 1355 1356 1357 1358
		u32 zfIF1 = pAS_Info->f_LO1 - pAS_Info->f_in;	/*  current attempt at a 1st IF  */
		u32 zfLO1 = pAS_Info->f_LO1;	/*  current attempt at an LO1 freq  */
		u32 zfLO2 = pAS_Info->f_LO2;	/*  current attempt at an LO2 freq  */
		u32 delta_IF1;
		u32 new_IF1;
1359 1360 1361 1362 1363 1364 1365 1366 1367 1368 1369 1370 1371 1372 1373 1374 1375 1376 1377 1378 1379 1380 1381 1382 1383 1384 1385 1386 1387 1388 1389 1390 1391 1392 1393 1394 1395 1396 1397 1398 1399 1400 1401 1402 1403 1404 1405 1406 1407 1408 1409 1410 1411 1412 1413 1414

		/*
		 **  Spur was found, attempt to find a spur-free 1st IF
		 */
		do {
			pAS_Info->nSpursFound++;

			/*  Raise f_IF1_upper, if needed  */
			MT2063_AddExclZone(pAS_Info, zfIF1 - fm, zfIF1 + fp);

			/*  Choose next IF1 that is closest to f_IF1_CENTER              */
			new_IF1 = MT2063_ChooseFirstIF(pAS_Info);

			if (new_IF1 > zfIF1) {
				pAS_Info->f_LO1 += (new_IF1 - zfIF1);
				pAS_Info->f_LO2 += (new_IF1 - zfIF1);
			} else {
				pAS_Info->f_LO1 -= (zfIF1 - new_IF1);
				pAS_Info->f_LO2 -= (zfIF1 - new_IF1);
			}
			zfIF1 = new_IF1;

			if (zfIF1 > pAS_Info->f_if1_Center)
				delta_IF1 = zfIF1 - pAS_Info->f_if1_Center;
			else
				delta_IF1 = pAS_Info->f_if1_Center - zfIF1;
		}
		/*
		 **  Continue while the new 1st IF is still within the 1st IF bandwidth
		 **  and there is a spur in the band (again)
		 */
		while ((2 * delta_IF1 + pAS_Info->f_out_bw <=
			pAS_Info->f_if1_bw)
		       && (pAS_Info->bSpurPresent =
			   IsSpurInBand(pAS_Info, &fm, &fp)));

		/*
		 ** Use the LO-spur free values found.  If the search went all the way to
		 ** the 1st IF band edge and always found spurs, just leave the original
		 ** choice.  It's as "good" as any other.
		 */
		if (pAS_Info->bSpurPresent == 1) {
			status |= MT2063_SPUR_PRESENT_ERR;
			pAS_Info->f_LO1 = zfLO1;
			pAS_Info->f_LO2 = zfLO2;
		} else
			pAS_Info->bSpurAvoided = 1;
	}

	status |=
	    ((pAS_Info->
	      nSpursFound << MT2063_SPUR_SHIFT) & MT2063_SPUR_CNT_MASK);

	return (status);
}

1415
static u32 MT2063_AvoidSpursVersion(void)
1416 1417 1418 1419 1420 1421 1422 1423 1424 1425 1426 1427 1428 1429 1430 1431 1432 1433 1434 1435 1436 1437 1438 1439 1440 1441 1442 1443 1444 1445 1446 1447 1448 1449 1450 1451 1452 1453 1454 1455 1456 1457 1458 1459 1460 1461 1462 1463 1464 1465 1466 1467 1468 1469 1470
{
	return (MT2063_SPUR_VERSION);
}

//end of mt2063_spuravoid.c
//=================================================================
//#################################################################
//=================================================================

/*
**  The expected version of MT_AvoidSpursData_t
**  If the version is different, an updated file is needed from Microtune
*/
/* Expecting version 1.21 of the Spur Avoidance API */

typedef enum {
	MT2063_SET_ATTEN,
	MT2063_INCR_ATTEN,
	MT2063_DECR_ATTEN
} MT2063_ATTEN_CNTL_MODE;

//#define TUNER_MT2063_OPTIMIZATION
/*
** Constants used by the tuning algorithm
*/
#define MT2063_REF_FREQ          (16000000UL)	/* Reference oscillator Frequency (in Hz) */
#define MT2063_IF1_BW            (22000000UL)	/* The IF1 filter bandwidth (in Hz) */
#define MT2063_TUNE_STEP_SIZE       (50000UL)	/* Tune in steps of 50 kHz */
#define MT2063_SPUR_STEP_HZ        (250000UL)	/* Step size (in Hz) to move IF1 when avoiding spurs */
#define MT2063_ZIF_BW             (2000000UL)	/* Zero-IF spur-free bandwidth (in Hz) */
#define MT2063_MAX_HARMONICS_1         (15UL)	/* Highest intra-tuner LO Spur Harmonic to be avoided */
#define MT2063_MAX_HARMONICS_2          (5UL)	/* Highest inter-tuner LO Spur Harmonic to be avoided */
#define MT2063_MIN_LO_SEP         (1000000UL)	/* Minimum inter-tuner LO frequency separation */
#define MT2063_LO1_FRACN_AVOID          (0UL)	/* LO1 FracN numerator avoid region (in Hz) */
#define MT2063_LO2_FRACN_AVOID     (199999UL)	/* LO2 FracN numerator avoid region (in Hz) */
#define MT2063_MIN_FIN_FREQ      (44000000UL)	/* Minimum input frequency (in Hz) */
#define MT2063_MAX_FIN_FREQ    (1100000000UL)	/* Maximum input frequency (in Hz) */
#define MT2063_MIN_FOUT_FREQ     (36000000UL)	/* Minimum output frequency (in Hz) */
#define MT2063_MAX_FOUT_FREQ     (57000000UL)	/* Maximum output frequency (in Hz) */
#define MT2063_MIN_DNC_FREQ    (1293000000UL)	/* Minimum LO2 frequency (in Hz) */
#define MT2063_MAX_DNC_FREQ    (1614000000UL)	/* Maximum LO2 frequency (in Hz) */
#define MT2063_MIN_UPC_FREQ    (1396000000UL)	/* Minimum LO1 frequency (in Hz) */
#define MT2063_MAX_UPC_FREQ    (2750000000UL)	/* Maximum LO1 frequency (in Hz) */

/*
**  Define the supported Part/Rev codes for the MT2063
*/
#define MT2063_B0       (0x9B)
#define MT2063_B1       (0x9C)
#define MT2063_B2       (0x9D)
#define MT2063_B3       (0x9E)

/*
**  The number of Tuner Registers
*/
1471
static const u32 MT2063_Num_Registers = MT2063_REG_END_REGS;
1472 1473 1474

#define USE_GLOBAL_TUNER			0

1475 1476 1477
static u32 nMT2063MaxTuners = 1;
static struct MT2063_Info_t MT2063_Info[1];
static struct MT2063_Info_t *MT2063_Avail[1];
1478
static u32 nMT2063OpenTuners = 0;
1479 1480 1481 1482 1483 1484 1485 1486 1487 1488 1489 1490 1491 1492 1493 1494 1495 1496 1497 1498 1499 1500 1501

/*
**  Constants for setting receiver modes.
**  (6 modes defined at this time, enumerated by MT2063_RCVR_MODES)
**  (DNC1GC & DNC2GC are the values, which are used, when the specific
**   DNC Output is selected, the other is always off)
**
**   If PAL-L or L' is received, set:
**       MT2063_SetParam(hMT2063,MT2063_TAGC,1);
**
**                --------------+----------------------------------------------
**                 Mode 0 :     | MT2063_CABLE_QAM
**                 Mode 1 :     | MT2063_CABLE_ANALOG
**                 Mode 2 :     | MT2063_OFFAIR_COFDM
**                 Mode 3 :     | MT2063_OFFAIR_COFDM_SAWLESS
**                 Mode 4 :     | MT2063_OFFAIR_ANALOG
**                 Mode 5 :     | MT2063_OFFAIR_8VSB
**                --------------+----+----+----+----+-----+-----+--------------
**                 Mode         |  0 |  1 |  2 |  3 |  4  |  5  |
**                --------------+----+----+----+----+-----+-----+
**
**
*/
1502 1503 1504 1505 1506 1507 1508 1509 1510 1511 1512 1513 1514 1515
static const u8 RFAGCEN[] = { 0, 0, 0, 0, 0, 0 };
static const u8 LNARIN[] = { 0, 0, 3, 3, 3, 3 };
static const u8 FIFFQEN[] = { 1, 1, 1, 1, 1, 1 };
static const u8 FIFFQ[] = { 0, 0, 0, 0, 0, 0 };
static const u8 DNC1GC[] = { 0, 0, 0, 0, 0, 0 };
static const u8 DNC2GC[] = { 0, 0, 0, 0, 0, 0 };
static const u8 ACLNAMAX[] = { 31, 31, 31, 31, 31, 31 };
static const u8 LNATGT[] = { 44, 43, 43, 43, 43, 43 };
static const u8 RFOVDIS[] = { 0, 0, 0, 0, 0, 0 };
static const u8 ACRFMAX[] = { 31, 31, 31, 31, 31, 31 };
static const u8 PD1TGT[] = { 36, 36, 38, 38, 36, 38 };
static const u8 FIFOVDIS[] = { 0, 0, 0, 0, 0, 0 };
static const u8 ACFIFMAX[] = { 29, 29, 29, 29, 29, 29 };
static const u8 PD2TGT[] = { 40, 33, 38, 42, 30, 38 };
1516 1517 1518 1519 1520 1521

/*
**  Local Function Prototypes - not available for external access.
*/

/*  Forward declaration(s):  */
1522 1523 1524 1525 1526 1527
static u32 MT2063_CalcLO1Mult(u32 * Div, u32 * FracN, u32 f_LO,
				  u32 f_LO_Step, u32 f_Ref);
static u32 MT2063_CalcLO2Mult(u32 * Div, u32 * FracN, u32 f_LO,
				  u32 f_LO_Step, u32 f_Ref);
static u32 MT2063_fLO_FractionalTerm(u32 f_ref, u32 num,
					 u32 denom);
1528 1529 1530 1531 1532 1533 1534 1535 1536 1537 1538 1539 1540 1541 1542 1543 1544 1545 1546 1547 1548 1549 1550 1551 1552 1553 1554 1555 1556 1557

/******************************************************************************
**
**  Name: MT2063_Open
**
**  Description:    Initialize the tuner's register values.
**
**  Parameters:     MT2063_Addr  - Serial bus address of the tuner.
**                  hMT2063      - Tuner handle passed back.
**                  hUserData    - User-defined data, if needed for the
**                                 MT_ReadSub() & MT_WriteSub functions.
**
**  Returns:        status:
**                      MT_OK             - No errors
**                      MT_TUNER_ID_ERR   - Tuner Part/Rev code mismatch
**                      MT_TUNER_INIT_ERR - Tuner initialization failed
**                      MT_COMM_ERR       - Serial bus communications error
**                      MT_ARG_NULL       - Null pointer argument passed
**                      MT_TUNER_CNT_ERR  - Too many tuners open
**
**  Dependencies:   MT_ReadSub  - Read byte(s) of data from the two-wire bus
**                  MT_WriteSub - Write byte(s) of data to the two-wire bus
**
**  Revision History:
**
**   SCR      Date      Author  Description
**  -------------------------------------------------------------------------
**   138   06-19-2007    DAD    Ver 1.00: Initial, derived from mt2067_b.
**
******************************************************************************/
1558
static u32 MT2063_Open(u32 MT2063_Addr, void ** hMT2063, void *hUserData)
1559
{
1560 1561
	u32 status = MT2063_OK;	/*  Status to be returned.  */
	s32 i;
1562 1563 1564 1565 1566 1567 1568 1569 1570 1571 1572
	struct MT2063_Info_t *pInfo = NULL;
	struct dvb_frontend *fe = (struct dvb_frontend *)hUserData;
	struct mt2063_state *state = fe->tuner_priv;

	/*  Check the argument before using  */
	if (hMT2063 == NULL) {
		return MT2063_ARG_NULL;
	}

	/*  Default tuner handle to NULL.  If successful, it will be reassigned  */

1573
	if (state->MT2063_init == false) {
1574 1575 1576 1577 1578 1579 1580 1581 1582 1583 1584 1585 1586 1587 1588 1589 1590
		pInfo = kzalloc(sizeof(struct MT2063_Info_t), GFP_KERNEL);
		if (pInfo == NULL) {
			return MT2063_TUNER_OPEN_ERR;
		}
		pInfo->handle = NULL;
		pInfo->address = MAX_UDATA;
		pInfo->rcvr_mode = MT2063_CABLE_QAM;
		pInfo->hUserData = NULL;
	} else {
		pInfo = *hMT2063;
	}

	if (MT2063_NO_ERROR(status)) {
		status |= MT2063_RegisterTuner(&pInfo->AS_Data);
	}

	if (MT2063_NO_ERROR(status)) {
1591
		pInfo->handle = (void *) pInfo;
1592 1593 1594 1595

		pInfo->hUserData = hUserData;
		pInfo->address = MT2063_Addr;
		pInfo->rcvr_mode = MT2063_CABLE_QAM;
1596
		status |= MT2063_ReInit((void *) pInfo);
1597 1598 1599 1600
	}

	if (MT2063_IS_ERROR(status))
		/*  MT2063_Close handles the un-registration of the tuner  */
1601
		MT2063_Close((void *) pInfo);
1602
	else {
1603
		state->MT2063_init = true;
1604 1605 1606 1607 1608 1609 1610
		*hMT2063 = pInfo->handle;

	}

	return (status);
}

1611
static u32 MT2063_IsValidHandle(struct MT2063_Info_t *handle)
1612 1613 1614 1615 1616 1617 1618 1619 1620 1621 1622 1623 1624 1625 1626 1627 1628 1629 1630 1631 1632 1633 1634 1635 1636
{
	return ((handle != NULL) && (handle->handle == handle)) ? 1 : 0;
}

/******************************************************************************
**
**  Name: MT2063_Close
**
**  Description:    Release the handle to the tuner.
**
**  Parameters:     hMT2063      - Handle to the MT2063 tuner
**
**  Returns:        status:
**                      MT_OK         - No errors
**                      MT_INV_HANDLE - Invalid tuner handle
**
**  Dependencies:   mt_errordef.h - definition of error codes
**
**  Revision History:
**
**   SCR      Date      Author  Description
**  -------------------------------------------------------------------------
**   138   06-19-2007    DAD    Ver 1.00: Initial, derived from mt2067_b.
**
******************************************************************************/
1637
static u32 MT2063_Close(void *hMT2063)
1638 1639 1640 1641 1642 1643 1644 1645 1646 1647 1648 1649 1650 1651
{
	struct MT2063_Info_t *pInfo = (struct MT2063_Info_t *)hMT2063;

	if (!MT2063_IsValidHandle(pInfo))
		return MT2063_INV_HANDLE;

	/* Unregister tuner with SpurAvoidance routines (if needed) */
	MT2063_UnRegisterTuner(&pInfo->AS_Data);
	/* Now remove the tuner from our own list of tuners */
	pInfo->handle = NULL;
	pInfo->address = MAX_UDATA;
	pInfo->hUserData = NULL;
	//kfree(pInfo);
	//pInfo = NULL;
1652

1653 1654 1655 1656 1657 1658 1659 1660 1661 1662 1663 1664 1665 1666 1667 1668 1669 1670 1671 1672 1673 1674 1675 1676 1677 1678 1679 1680 1681 1682 1683 1684
	return MT2063_OK;
}

/******************************************************************************
**
**  Name: MT2063_GetGPIO
**
**  Description:    Get the current MT2063 GPIO value.
**
**  Parameters:     h            - Open handle to the tuner (from MT2063_Open).
**                  gpio_id      - Selects GPIO0, GPIO1 or GPIO2
**                  attr         - Selects input readback, I/O direction or
**                                 output value
**                  *value       - current setting of GPIO pin
**
**  Usage:          status = MT2063_GetGPIO(hMT2063, MT2063_GPIO_OUT, &value);
**
**  Returns:        status:
**                      MT_OK            - No errors
**                      MT_COMM_ERR      - Serial bus communications error
**                      MT_INV_HANDLE    - Invalid tuner handle
**                      MT_ARG_NULL      - Null pointer argument passed
**
**  Dependencies:   MT_ReadSub  - Read byte(s) of data from the serial bus
**
**  Revision History:
**
**   SCR      Date      Author  Description
**  -------------------------------------------------------------------------
**   138   06-19-2007    DAD    Ver 1.00: Initial, derived from mt2067_b.
**
******************************************************************************/
1685
static u32 MT2063_GetGPIO(void *h, enum MT2063_GPIO_ID gpio_id,
1686
		       enum MT2063_GPIO_Attr attr, u32 * value)
1687
{
1688 1689 1690 1691
	u32 status = MT2063_OK;	/* Status to be returned        */
	u8 regno;
	s32 shift;
	static u8 GPIOreg[3] =
1692 1693 1694 1695 1696 1697 1698 1699 1700 1701 1702 1703 1704 1705 1706 1707 1708 1709 1710 1711 1712 1713 1714 1715 1716 1717 1718 1719 1720 1721 1722 1723 1724 1725 1726 1727 1728 1729 1730 1731 1732 1733 1734 1735 1736 1737 1738
	    { MT2063_REG_RF_STATUS, MT2063_REG_FIF_OV, MT2063_REG_RF_OV };
	struct MT2063_Info_t *pInfo = (struct MT2063_Info_t *)h;

	if (MT2063_IsValidHandle(pInfo) == 0)
		return MT2063_INV_HANDLE;

	if (value == NULL)
		return MT2063_ARG_NULL;

	regno = GPIOreg[attr];

	/*  We'll read the register just in case the write didn't work last time */
	status =
	    MT2063_ReadSub(pInfo->hUserData, pInfo->address, regno,
			   &pInfo->reg[regno], 1);

	shift = (gpio_id - MT2063_GPIO0 + 5);
	*value = (pInfo->reg[regno] >> shift) & 1;

	return (status);
}

/****************************************************************************
**
**  Name: MT2063_GetLocked
**
**  Description:    Checks to see if LO1 and LO2 are locked.
**
**  Parameters:     h            - Open handle to the tuner (from MT2063_Open).
**
**  Returns:        status:
**                      MT_OK            - No errors
**                      MT_UPC_UNLOCK    - Upconverter PLL unlocked
**                      MT_DNC_UNLOCK    - Downconverter PLL unlocked
**                      MT_COMM_ERR      - Serial bus communications error
**                      MT_INV_HANDLE    - Invalid tuner handle
**
**  Dependencies:   MT_ReadSub    - Read byte(s) of data from the serial bus
**                  MT_Sleep      - Delay execution for x milliseconds
**
**  Revision History:
**
**   SCR      Date      Author  Description
**  -------------------------------------------------------------------------
**   138   06-19-2007    DAD    Ver 1.00: Initial, derived from mt2067_b.
**
****************************************************************************/
1739
static u32 MT2063_GetLocked(void *h)
1740
{
1741 1742 1743 1744 1745 1746 1747
	const u32 nMaxWait = 100;	/*  wait a maximum of 100 msec   */
	const u32 nPollRate = 2;	/*  poll status bits every 2 ms */
	const u32 nMaxLoops = nMaxWait / nPollRate;
	const u8 LO1LK = 0x80;
	u8 LO2LK = 0x08;
	u32 status = MT2063_OK;	/* Status to be returned        */
	u32 nDelays = 0;
1748 1749 1750 1751 1752 1753 1754 1755 1756 1757 1758 1759 1760 1761 1762 1763 1764 1765 1766 1767 1768 1769
	struct MT2063_Info_t *pInfo = (struct MT2063_Info_t *)h;

	if (MT2063_IsValidHandle(pInfo) == 0)
		return MT2063_INV_HANDLE;

	/*  LO2 Lock bit was in a different place for B0 version  */
	if (pInfo->tuner_id == MT2063_B0)
		LO2LK = 0x40;

	do {
		status |=
		    MT2063_ReadSub(pInfo->hUserData, pInfo->address,
				   MT2063_REG_LO_STATUS,
				   &pInfo->reg[MT2063_REG_LO_STATUS], 1);

		if (MT2063_IS_ERROR(status))
			return (status);

		if ((pInfo->reg[MT2063_REG_LO_STATUS] & (LO1LK | LO2LK)) ==
		    (LO1LK | LO2LK)) {
			return (status);
		}
1770
		msleep(nPollRate);	/*  Wait between retries  */
1771 1772 1773 1774 1775 1776 1777 1778 1779 1780 1781 1782 1783 1784 1785 1786 1787 1788 1789 1790 1791 1792 1793 1794 1795 1796 1797 1798 1799 1800 1801 1802 1803 1804 1805 1806 1807 1808 1809 1810 1811 1812 1813 1814 1815 1816 1817 1818 1819 1820 1821 1822 1823 1824 1825 1826 1827 1828 1829 1830 1831 1832 1833 1834 1835 1836 1837 1838 1839 1840 1841 1842 1843 1844 1845 1846 1847 1848 1849 1850 1851 1852 1853 1854 1855 1856 1857 1858 1859 1860 1861 1862 1863 1864 1865 1866 1867 1868 1869 1870 1871 1872 1873
	}
	while (++nDelays < nMaxLoops);

	if ((pInfo->reg[MT2063_REG_LO_STATUS] & LO1LK) == 0x00)
		status |= MT2063_UPC_UNLOCK;
	if ((pInfo->reg[MT2063_REG_LO_STATUS] & LO2LK) == 0x00)
		status |= MT2063_DNC_UNLOCK;

	return (status);
}

/****************************************************************************
**
**  Name: MT2063_GetParam
**
**  Description:    Gets a tuning algorithm parameter.
**
**                  This function provides access to the internals of the
**                  tuning algorithm - mostly for testing purposes.
**
**  Parameters:     h           - Tuner handle (returned by MT2063_Open)
**                  param       - Tuning algorithm parameter
**                                (see enum MT2063_Param)
**                  pValue      - ptr to returned value
**
**                  param                     Description
**                  ----------------------    --------------------------------
**                  MT2063_IC_ADDR            Serial Bus address of this tuner
**                  MT2063_MAX_OPEN           Max # of MT2063's allowed open
**                  MT2063_NUM_OPEN           # of MT2063's open
**                  MT2063_SRO_FREQ           crystal frequency
**                  MT2063_STEPSIZE           minimum tuning step size
**                  MT2063_INPUT_FREQ         input center frequency
**                  MT2063_LO1_FREQ           LO1 Frequency
**                  MT2063_LO1_STEPSIZE       LO1 minimum step size
**                  MT2063_LO1_FRACN_AVOID    LO1 FracN keep-out region
**                  MT2063_IF1_ACTUAL         Current 1st IF in use
**                  MT2063_IF1_REQUEST        Requested 1st IF
**                  MT2063_IF1_CENTER         Center of 1st IF SAW filter
**                  MT2063_IF1_BW             Bandwidth of 1st IF SAW filter
**                  MT2063_ZIF_BW             zero-IF bandwidth
**                  MT2063_LO2_FREQ           LO2 Frequency
**                  MT2063_LO2_STEPSIZE       LO2 minimum step size
**                  MT2063_LO2_FRACN_AVOID    LO2 FracN keep-out region
**                  MT2063_OUTPUT_FREQ        output center frequency
**                  MT2063_OUTPUT_BW          output bandwidth
**                  MT2063_LO_SEPARATION      min inter-tuner LO separation
**                  MT2063_AS_ALG             ID of avoid-spurs algorithm in use
**                  MT2063_MAX_HARM1          max # of intra-tuner harmonics
**                  MT2063_MAX_HARM2          max # of inter-tuner harmonics
**                  MT2063_EXCL_ZONES         # of 1st IF exclusion zones
**                  MT2063_NUM_SPURS          # of spurs found/avoided
**                  MT2063_SPUR_AVOIDED       >0 spurs avoided
**                  MT2063_SPUR_PRESENT       >0 spurs in output (mathematically)
**                  MT2063_RCVR_MODE          Predefined modes.
**                  MT2063_ACLNA              LNA attenuator gain code
**                  MT2063_ACRF               RF attenuator gain code
**                  MT2063_ACFIF              FIF attenuator gain code
**                  MT2063_ACLNA_MAX          LNA attenuator limit
**                  MT2063_ACRF_MAX           RF attenuator limit
**                  MT2063_ACFIF_MAX          FIF attenuator limit
**                  MT2063_PD1                Actual value of PD1
**                  MT2063_PD2                Actual value of PD2
**                  MT2063_DNC_OUTPUT_ENABLE  DNC output selection
**                  MT2063_VGAGC              VGA gain code
**                  MT2063_VGAOI              VGA output current
**                  MT2063_TAGC               TAGC setting
**                  MT2063_AMPGC              AMP gain code
**                  MT2063_AVOID_DECT         Avoid DECT Frequencies
**                  MT2063_CTFILT_SW          Cleartune filter selection
**
**  Usage:          status |= MT2063_GetParam(hMT2063,
**                                            MT2063_IF1_ACTUAL,
**                                            &f_IF1_Actual);
**
**  Returns:        status:
**                      MT_OK            - No errors
**                      MT_INV_HANDLE    - Invalid tuner handle
**                      MT_ARG_NULL      - Null pointer argument passed
**                      MT_ARG_RANGE     - Invalid parameter requested
**
**  Dependencies:   USERS MUST CALL MT2063_Open() FIRST!
**
**  See Also:       MT2063_SetParam, MT2063_Open
**
**  Revision History:
**
**   SCR      Date      Author  Description
**  -------------------------------------------------------------------------
**   138   06-19-2007    DAD    Ver 1.00: Initial, derived from mt2067_b.
**   154   09-13-2007    RSK    Ver 1.05: Get/SetParam changes for LOx_FREQ
**         10-31-2007    PINZ   Ver 1.08: Get/SetParam add VGAGC, VGAOI, AMPGC, TAGC
**   173 M 01-23-2008    RSK    Ver 1.12: Read LO1C and LO2C registers from HW
**                                        in GetParam.
**         04-18-2008    PINZ   Ver 1.15: Add SetParam LNARIN & PDxTGT
**                                        Split SetParam up to ACLNA / ACLNA_MAX
**                                        removed ACLNA_INRC/DECR (+RF & FIF)
**                                        removed GCUAUTO / BYPATNDN/UP
**   175 I 16-06-2008    PINZ   Ver 1.16: Add control to avoid US DECT freqs.
**   175 I 06-19-2008    RSK    Ver 1.17: Refactor DECT control to SpurAvoid.
**         06-24-2008    PINZ   Ver 1.18: Add Get/SetParam CTFILT_SW
**
****************************************************************************/
1874
static u32 MT2063_GetParam(void *h, enum MT2063_Param param, u32 * pValue)
1875
{
1876
	u32 status = MT2063_OK;	/* Status to be returned        */
1877
	struct MT2063_Info_t *pInfo = (struct MT2063_Info_t *)h;
1878 1879
	u32 Div;
	u32 Num;
1880 1881 1882 1883 1884 1885 1886 1887 1888 1889 1890 1891 1892 1893 1894 1895 1896 1897 1898 1899 1900 1901 1902 1903 1904 1905 1906 1907 1908 1909 1910 1911 1912 1913 1914 1915 1916 1917 1918 1919 1920 1921 1922 1923 1924 1925 1926 1927 1928 1929 1930 1931 1932 1933 1934 1935 1936 1937 1938 1939 1940 1941 1942 1943 1944 1945 1946 1947 1948 1949 1950 1951 1952 1953 1954 1955 1956 1957 1958 1959 1960 1961 1962 1963 1964 1965 1966 1967 1968 1969 1970 1971 1972 1973 1974 1975 1976 1977 1978 1979 1980 1981 1982 1983 1984 1985 1986 1987 1988 1989 1990 1991 1992 1993 1994 1995 1996 1997 1998 1999 2000 2001 2002 2003 2004 2005 2006 2007 2008 2009 2010 2011 2012 2013 2014 2015 2016 2017 2018 2019 2020 2021 2022 2023 2024 2025 2026 2027 2028 2029 2030 2031 2032 2033 2034 2035 2036 2037 2038 2039 2040 2041 2042 2043 2044 2045 2046 2047 2048 2049 2050 2051 2052 2053 2054 2055 2056 2057 2058 2059 2060 2061 2062 2063 2064 2065 2066 2067 2068 2069 2070

	if (pValue == NULL)
		status |= MT2063_ARG_NULL;

	/*  Verify that the handle passed points to a valid tuner         */
	if (MT2063_IsValidHandle(pInfo) == 0)
		status |= MT2063_INV_HANDLE;

	if (MT2063_NO_ERROR(status)) {
		switch (param) {
			/*  Serial Bus address of this tuner      */
		case MT2063_IC_ADDR:
			*pValue = pInfo->address;
			break;

			/*  Max # of MT2063's allowed to be open  */
		case MT2063_MAX_OPEN:
			*pValue = nMT2063MaxTuners;
			break;

			/*  # of MT2063's open                    */
		case MT2063_NUM_OPEN:
			*pValue = nMT2063OpenTuners;
			break;

			/*  crystal frequency                     */
		case MT2063_SRO_FREQ:
			*pValue = pInfo->AS_Data.f_ref;
			break;

			/*  minimum tuning step size              */
		case MT2063_STEPSIZE:
			*pValue = pInfo->AS_Data.f_LO2_Step;
			break;

			/*  input center frequency                */
		case MT2063_INPUT_FREQ:
			*pValue = pInfo->AS_Data.f_in;
			break;

			/*  LO1 Frequency                         */
		case MT2063_LO1_FREQ:
			{
				/* read the actual tuner register values for LO1C_1 and LO1C_2 */
				status |=
				    MT2063_ReadSub(pInfo->hUserData,
						   pInfo->address,
						   MT2063_REG_LO1C_1,
						   &pInfo->
						   reg[MT2063_REG_LO1C_1], 2);
				Div = pInfo->reg[MT2063_REG_LO1C_1];
				Num = pInfo->reg[MT2063_REG_LO1C_2] & 0x3F;
				pInfo->AS_Data.f_LO1 =
				    (pInfo->AS_Data.f_ref * Div) +
				    MT2063_fLO_FractionalTerm(pInfo->AS_Data.
							      f_ref, Num, 64);
			}
			*pValue = pInfo->AS_Data.f_LO1;
			break;

			/*  LO1 minimum step size                 */
		case MT2063_LO1_STEPSIZE:
			*pValue = pInfo->AS_Data.f_LO1_Step;
			break;

			/*  LO1 FracN keep-out region             */
		case MT2063_LO1_FRACN_AVOID_PARAM:
			*pValue = pInfo->AS_Data.f_LO1_FracN_Avoid;
			break;

			/*  Current 1st IF in use                 */
		case MT2063_IF1_ACTUAL:
			*pValue = pInfo->f_IF1_actual;
			break;

			/*  Requested 1st IF                      */
		case MT2063_IF1_REQUEST:
			*pValue = pInfo->AS_Data.f_if1_Request;
			break;

			/*  Center of 1st IF SAW filter           */
		case MT2063_IF1_CENTER:
			*pValue = pInfo->AS_Data.f_if1_Center;
			break;

			/*  Bandwidth of 1st IF SAW filter        */
		case MT2063_IF1_BW:
			*pValue = pInfo->AS_Data.f_if1_bw;
			break;

			/*  zero-IF bandwidth                     */
		case MT2063_ZIF_BW:
			*pValue = pInfo->AS_Data.f_zif_bw;
			break;

			/*  LO2 Frequency                         */
		case MT2063_LO2_FREQ:
			{
				/* Read the actual tuner register values for LO2C_1, LO2C_2 and LO2C_3 */
				status |=
				    MT2063_ReadSub(pInfo->hUserData,
						   pInfo->address,
						   MT2063_REG_LO2C_1,
						   &pInfo->
						   reg[MT2063_REG_LO2C_1], 3);
				Div =
				    (pInfo->reg[MT2063_REG_LO2C_1] & 0xFE) >> 1;
				Num =
				    ((pInfo->
				      reg[MT2063_REG_LO2C_1] & 0x01) << 12) |
				    (pInfo->
				     reg[MT2063_REG_LO2C_2] << 4) | (pInfo->
								     reg
								     [MT2063_REG_LO2C_3]
								     & 0x00F);
				pInfo->AS_Data.f_LO2 =
				    (pInfo->AS_Data.f_ref * Div) +
				    MT2063_fLO_FractionalTerm(pInfo->AS_Data.
							      f_ref, Num, 8191);
			}
			*pValue = pInfo->AS_Data.f_LO2;
			break;

			/*  LO2 minimum step size                 */
		case MT2063_LO2_STEPSIZE:
			*pValue = pInfo->AS_Data.f_LO2_Step;
			break;

			/*  LO2 FracN keep-out region             */
		case MT2063_LO2_FRACN_AVOID:
			*pValue = pInfo->AS_Data.f_LO2_FracN_Avoid;
			break;

			/*  output center frequency               */
		case MT2063_OUTPUT_FREQ:
			*pValue = pInfo->AS_Data.f_out;
			break;

			/*  output bandwidth                      */
		case MT2063_OUTPUT_BW:
			*pValue = pInfo->AS_Data.f_out_bw - 750000;
			break;

			/*  min inter-tuner LO separation         */
		case MT2063_LO_SEPARATION:
			*pValue = pInfo->AS_Data.f_min_LO_Separation;
			break;

			/*  ID of avoid-spurs algorithm in use    */
		case MT2063_AS_ALG:
			*pValue = pInfo->AS_Data.nAS_Algorithm;
			break;

			/*  max # of intra-tuner harmonics        */
		case MT2063_MAX_HARM1:
			*pValue = pInfo->AS_Data.maxH1;
			break;

			/*  max # of inter-tuner harmonics        */
		case MT2063_MAX_HARM2:
			*pValue = pInfo->AS_Data.maxH2;
			break;

			/*  # of 1st IF exclusion zones           */
		case MT2063_EXCL_ZONES:
			*pValue = pInfo->AS_Data.nZones;
			break;

			/*  # of spurs found/avoided              */
		case MT2063_NUM_SPURS:
			*pValue = pInfo->AS_Data.nSpursFound;
			break;

			/*  >0 spurs avoided                      */
		case MT2063_SPUR_AVOIDED:
			*pValue = pInfo->AS_Data.bSpurAvoided;
			break;

			/*  >0 spurs in output (mathematically)   */
		case MT2063_SPUR_PRESENT:
			*pValue = pInfo->AS_Data.bSpurPresent;
			break;

			/*  Predefined receiver setup combination */
		case MT2063_RCVR_MODE:
			*pValue = pInfo->rcvr_mode;
			break;

		case MT2063_PD1:
		case MT2063_PD2:
			{
2071 2072 2073
				u8 mask = (param == MT2063_PD1 ? 0x01 : 0x03);	/* PD1 vs PD2 */
				u8 orig = (pInfo->reg[MT2063_REG_BYP_CTRL]);
				u8 reg = (orig & 0xF1) | mask;	/* Only set 3 bits (not 5) */
2074 2075 2076 2077 2078 2079 2080 2081 2082 2083 2084 2085 2086 2087 2088 2089 2090 2091 2092 2093 2094 2095 2096 2097 2098 2099 2100 2101 2102 2103 2104 2105 2106 2107 2108 2109 2110 2111 2112 2113 2114 2115 2116 2117 2118 2119 2120 2121 2122 2123 2124
				int i;

				*pValue = 0;

				/* Initiate ADC output to reg 0x0A */
				if (reg != orig)
					status |=
					    MT2063_WriteSub(pInfo->hUserData,
							    pInfo->address,
							    MT2063_REG_BYP_CTRL,
							    &reg, 1);

				if (MT2063_IS_ERROR(status))
					return (status);

				for (i = 0; i < 8; i++) {
					status |=
					    MT2063_ReadSub(pInfo->hUserData,
							   pInfo->address,
							   MT2063_REG_ADC_OUT,
							   &pInfo->
							   reg
							   [MT2063_REG_ADC_OUT],
							   1);

					if (MT2063_NO_ERROR(status))
						*pValue +=
						    pInfo->
						    reg[MT2063_REG_ADC_OUT];
					else {
						if (i)
							*pValue /= i;
						return (status);
					}
				}
				*pValue /= 8;	/*  divide by number of reads  */
				*pValue >>= 2;	/*  only want 6 MSB's out of 8  */

				/* Restore value of Register BYP_CTRL */
				if (reg != orig)
					status |=
					    MT2063_WriteSub(pInfo->hUserData,
							    pInfo->address,
							    MT2063_REG_BYP_CTRL,
							    &orig, 1);
			}
			break;

			/*  Get LNA attenuator code                */
		case MT2063_ACLNA:
			{
2125
				u8 val;
2126 2127 2128 2129 2130 2131 2132 2133 2134 2135
				status |=
				    MT2063_GetReg(pInfo, MT2063_REG_XO_STATUS,
						  &val);
				*pValue = val & 0x1f;
			}
			break;

			/*  Get RF attenuator code                */
		case MT2063_ACRF:
			{
2136
				u8 val;
2137 2138 2139 2140 2141 2142 2143 2144 2145 2146
				status |=
				    MT2063_GetReg(pInfo, MT2063_REG_RF_STATUS,
						  &val);
				*pValue = val & 0x1f;
			}
			break;

			/*  Get FIF attenuator code               */
		case MT2063_ACFIF:
			{
2147
				u8 val;
2148 2149 2150 2151 2152 2153 2154 2155 2156 2157
				status |=
				    MT2063_GetReg(pInfo, MT2063_REG_FIF_STATUS,
						  &val);
				*pValue = val & 0x1f;
			}
			break;

			/*  Get LNA attenuator limit              */
		case MT2063_ACLNA_MAX:
			{
2158
				u8 val;
2159 2160 2161 2162 2163 2164 2165 2166 2167 2168
				status |=
				    MT2063_GetReg(pInfo, MT2063_REG_LNA_OV,
						  &val);
				*pValue = val & 0x1f;
			}
			break;

			/*  Get RF attenuator limit               */
		case MT2063_ACRF_MAX:
			{
2169
				u8 val;
2170 2171 2172 2173 2174 2175 2176 2177 2178 2179
				status |=
				    MT2063_GetReg(pInfo, MT2063_REG_RF_OV,
						  &val);
				*pValue = val & 0x1f;
			}
			break;

			/*  Get FIF attenuator limit               */
		case MT2063_ACFIF_MAX:
			{
2180
				u8 val;
2181 2182 2183 2184 2185 2186 2187 2188 2189 2190 2191 2192 2193
				status |=
				    MT2063_GetReg(pInfo, MT2063_REG_FIF_OV,
						  &val);
				*pValue = val & 0x1f;
			}
			break;

			/*  Get current used DNC output */
		case MT2063_DNC_OUTPUT_ENABLE:
			{
				if ((pInfo->reg[MT2063_REG_DNC_GAIN] & 0x03) == 0x03) {	/* if DNC1 is off */
					if ((pInfo->reg[MT2063_REG_VGA_GAIN] & 0x03) == 0x03)	/* if DNC2 is off */
						*pValue =
2194
						    (u32) MT2063_DNC_NONE;
2195 2196
					else
						*pValue =
2197
						    (u32) MT2063_DNC_2;
2198 2199 2200 2201
				} else {	/* DNC1 is on */

					if ((pInfo->reg[MT2063_REG_VGA_GAIN] & 0x03) == 0x03)	/* if DNC2 is off */
						*pValue =
2202
						    (u32) MT2063_DNC_1;
2203 2204
					else
						*pValue =
2205
						    (u32) MT2063_DNC_BOTH;
2206 2207 2208 2209 2210 2211 2212 2213 2214 2215 2216 2217 2218 2219 2220 2221 2222 2223 2224 2225 2226 2227 2228 2229 2230 2231 2232 2233 2234 2235 2236 2237 2238 2239 2240 2241 2242 2243 2244 2245 2246 2247 2248 2249 2250 2251 2252 2253 2254 2255 2256 2257 2258 2259 2260 2261 2262 2263 2264 2265 2266 2267 2268 2269 2270 2271 2272 2273 2274 2275 2276 2277
				}
			}
			break;

			/*  Get VGA Gain Code */
		case MT2063_VGAGC:
			*pValue =
			    ((pInfo->reg[MT2063_REG_VGA_GAIN] & 0x0C) >> 2);
			break;

			/*  Get VGA bias current */
		case MT2063_VGAOI:
			*pValue = (pInfo->reg[MT2063_REG_RSVD_31] & 0x07);
			break;

			/*  Get TAGC setting */
		case MT2063_TAGC:
			*pValue = (pInfo->reg[MT2063_REG_RSVD_1E] & 0x03);
			break;

			/*  Get AMP Gain Code */
		case MT2063_AMPGC:
			*pValue = (pInfo->reg[MT2063_REG_TEMP_SEL] & 0x03);
			break;

			/*  Avoid DECT Frequencies  */
		case MT2063_AVOID_DECT:
			*pValue = pInfo->AS_Data.avoidDECT;
			break;

			/*  Cleartune filter selection: 0 - by IC (default), 1 - by software  */
		case MT2063_CTFILT_SW:
			*pValue = pInfo->ctfilt_sw;
			break;

		case MT2063_EOP:
		default:
			status |= MT2063_ARG_RANGE;
		}
	}
	return (status);
}

/****************************************************************************
**
**  Name: MT2063_GetReg
**
**  Description:    Gets an MT2063 register.
**
**  Parameters:     h           - Tuner handle (returned by MT2063_Open)
**                  reg         - MT2063 register/subaddress location
**                  *val        - MT2063 register/subaddress value
**
**  Returns:        status:
**                      MT_OK            - No errors
**                      MT_COMM_ERR      - Serial bus communications error
**                      MT_INV_HANDLE    - Invalid tuner handle
**                      MT_ARG_NULL      - Null pointer argument passed
**                      MT_ARG_RANGE     - Argument out of range
**
**  Dependencies:   USERS MUST CALL MT2063_Open() FIRST!
**
**                  Use this function if you need to read a register from
**                  the MT2063.
**
**  Revision History:
**
**   SCR      Date      Author  Description
**  -------------------------------------------------------------------------
**   138   06-19-2007    DAD    Ver 1.00: Initial, derived from mt2067_b.
**
****************************************************************************/
2278
static u32 MT2063_GetReg(void *h, u8 reg, u8 * val)
2279
{
2280
	u32 status = MT2063_OK;	/* Status to be returned        */
2281 2282 2283 2284 2285 2286 2287 2288 2289 2290 2291 2292 2293 2294 2295 2296 2297 2298 2299 2300 2301 2302 2303 2304 2305 2306 2307 2308 2309 2310 2311 2312 2313 2314 2315 2316 2317 2318 2319 2320 2321 2322 2323 2324 2325 2326 2327 2328 2329 2330 2331 2332 2333 2334 2335 2336 2337 2338 2339 2340 2341 2342 2343 2344 2345 2346 2347 2348 2349
	struct MT2063_Info_t *pInfo = (struct MT2063_Info_t *)h;

	/*  Verify that the handle passed points to a valid tuner         */
	if (MT2063_IsValidHandle(pInfo) == 0)
		status |= MT2063_INV_HANDLE;

	if (val == NULL)
		status |= MT2063_ARG_NULL;

	if (reg >= MT2063_REG_END_REGS)
		status |= MT2063_ARG_RANGE;

	if (MT2063_NO_ERROR(status)) {
		status |=
		    MT2063_ReadSub(pInfo->hUserData, pInfo->address, reg,
				   &pInfo->reg[reg], 1);
		if (MT2063_NO_ERROR(status))
			*val = pInfo->reg[reg];
	}

	return (status);
}

/******************************************************************************
**
**  Name: MT2063_GetTemp
**
**  Description:    Get the MT2063 Temperature register.
**
**  Parameters:     h            - Open handle to the tuner (from MT2063_Open).
**                  *value       - value read from the register
**
**                                    Binary
**                  Value Returned    Value    Approx Temp
**                  ---------------------------------------------
**                  MT2063_T_0C       0000         0C
**                  MT2063_T_10C      0001        10C
**                  MT2063_T_20C      0010        20C
**                  MT2063_T_30C      0011        30C
**                  MT2063_T_40C      0100        40C
**                  MT2063_T_50C      0101        50C
**                  MT2063_T_60C      0110        60C
**                  MT2063_T_70C      0111        70C
**                  MT2063_T_80C      1000        80C
**                  MT2063_T_90C      1001        90C
**                  MT2063_T_100C     1010       100C
**                  MT2063_T_110C     1011       110C
**                  MT2063_T_120C     1100       120C
**                  MT2063_T_130C     1101       130C
**                  MT2063_T_140C     1110       140C
**                  MT2063_T_150C     1111       150C
**
**  Returns:        status:
**                      MT_OK            - No errors
**                      MT_COMM_ERR      - Serial bus communications error
**                      MT_INV_HANDLE    - Invalid tuner handle
**                      MT_ARG_NULL      - Null pointer argument passed
**                      MT_ARG_RANGE     - Argument out of range
**
**  Dependencies:   MT_ReadSub  - Read byte(s) of data from the two-wire bus
**                  MT_WriteSub - Write byte(s) of data to the two-wire bus
**
**  Revision History:
**
**   SCR      Date      Author  Description
**  -------------------------------------------------------------------------
**   138   06-19-2007    DAD    Ver 1.00: Initial, derived from mt2067_b.
**
******************************************************************************/
2350
static u32 MT2063_GetTemp(void *h, enum MT2063_Temperature * value)
2351
{
2352
	u32 status = MT2063_OK;	/* Status to be returned        */
2353 2354 2355 2356 2357 2358 2359 2360 2361 2362 2363 2364 2365 2366 2367 2368 2369 2370 2371 2372 2373 2374 2375 2376 2377 2378 2379 2380 2381 2382 2383 2384 2385 2386 2387 2388 2389 2390 2391 2392 2393 2394 2395 2396 2397 2398 2399 2400 2401 2402 2403 2404 2405 2406 2407 2408 2409 2410 2411 2412 2413 2414 2415 2416 2417 2418 2419 2420
	struct MT2063_Info_t *pInfo = (struct MT2063_Info_t *)h;

	if (MT2063_IsValidHandle(pInfo) == 0)
		return MT2063_INV_HANDLE;

	if (value == NULL)
		return MT2063_ARG_NULL;

	if ((MT2063_NO_ERROR(status))
	    && ((pInfo->reg[MT2063_REG_TEMP_SEL] & 0xE0) != 0x00)) {
		pInfo->reg[MT2063_REG_TEMP_SEL] &= (0x1F);
		status |= MT2063_WriteSub(pInfo->hUserData,
					  pInfo->address,
					  MT2063_REG_TEMP_SEL,
					  &pInfo->reg[MT2063_REG_TEMP_SEL], 1);
	}

	if (MT2063_NO_ERROR(status))
		status |= MT2063_ReadSub(pInfo->hUserData,
					 pInfo->address,
					 MT2063_REG_TEMP_STATUS,
					 &pInfo->reg[MT2063_REG_TEMP_STATUS],
					 1);

	if (MT2063_NO_ERROR(status))
		*value =
		    (enum MT2063_Temperature)(pInfo->
					      reg[MT2063_REG_TEMP_STATUS] >> 4);

	return (status);
}

/****************************************************************************
**
**  Name: MT2063_GetUserData
**
**  Description:    Gets the user-defined data item.
**
**  Parameters:     h           - Tuner handle (returned by MT2063_Open)
**
**  Returns:        status:
**                      MT_OK            - No errors
**                      MT_INV_HANDLE    - Invalid tuner handle
**                      MT_ARG_NULL      - Null pointer argument passed
**
**  Dependencies:   USERS MUST CALL MT2063_Open() FIRST!
**
**                  The hUserData parameter is a user-specific argument
**                  that is stored internally with the other tuner-
**                  specific information.
**
**                  For example, if additional arguments are needed
**                  for the user to identify the device communicating
**                  with the tuner, this argument can be used to supply
**                  the necessary information.
**
**                  The hUserData parameter is initialized in the tuner's
**                  Open function to NULL.
**
**  See Also:       MT2063_Open
**
**  Revision History:
**
**   SCR      Date      Author  Description
**  -------------------------------------------------------------------------
**   138   06-19-2007    DAD    Ver 1.00: Initial, derived from mt2067_b.
**
****************************************************************************/
2421
static u32 MT2063_GetUserData(void *h, void ** hUserData)
2422
{
2423
	u32 status = MT2063_OK;	/* Status to be returned        */
2424 2425 2426 2427 2428 2429 2430 2431 2432 2433 2434 2435 2436 2437 2438 2439 2440 2441 2442 2443 2444 2445 2446 2447 2448 2449 2450 2451 2452 2453 2454 2455 2456 2457 2458 2459 2460 2461 2462 2463 2464 2465 2466 2467 2468 2469 2470 2471 2472 2473 2474 2475 2476 2477 2478 2479 2480 2481 2482 2483 2484 2485 2486 2487 2488 2489 2490 2491 2492 2493 2494 2495 2496 2497 2498 2499 2500 2501 2502 2503 2504 2505 2506 2507 2508 2509 2510 2511 2512 2513 2514 2515 2516 2517 2518 2519 2520 2521
	struct MT2063_Info_t *pInfo = (struct MT2063_Info_t *)h;

	/*  Verify that the handle passed points to a valid tuner         */
	if (MT2063_IsValidHandle(pInfo) == 0)
		status = MT2063_INV_HANDLE;

	if (hUserData == NULL)
		status |= MT2063_ARG_NULL;

	if (MT2063_NO_ERROR(status))
		*hUserData = pInfo->hUserData;

	return (status);
}

/******************************************************************************
**
**  Name: MT2063_SetReceiverMode
**
**  Description:    Set the MT2063 receiver mode
**
**   --------------+----------------------------------------------
**    Mode 0 :     | MT2063_CABLE_QAM
**    Mode 1 :     | MT2063_CABLE_ANALOG
**    Mode 2 :     | MT2063_OFFAIR_COFDM
**    Mode 3 :     | MT2063_OFFAIR_COFDM_SAWLESS
**    Mode 4 :     | MT2063_OFFAIR_ANALOG
**    Mode 5 :     | MT2063_OFFAIR_8VSB
**   --------------+----+----+----+----+-----+--------------------
**  (DNC1GC & DNC2GC are the values, which are used, when the specific
**   DNC Output is selected, the other is always off)
**
**                |<----------   Mode  -------------->|
**    Reg Field   |  0  |  1  |  2  |  3  |  4  |  5  |
**    ------------+-----+-----+-----+-----+-----+-----+
**    RFAGCen     | OFF | OFF | OFF | OFF | OFF | OFF
**    LNARin      |   0 |   0 |   3 |   3 |  3  |  3
**    FIFFQen     |   1 |   1 |   1 |   1 |  1  |  1
**    FIFFq       |   0 |   0 |   0 |   0 |  0  |  0
**    DNC1gc      |   0 |   0 |   0 |   0 |  0  |  0
**    DNC2gc      |   0 |   0 |   0 |   0 |  0  |  0
**    GCU Auto    |   1 |   1 |   1 |   1 |  1  |  1
**    LNA max Atn |  31 |  31 |  31 |  31 | 31  | 31
**    LNA Target  |  44 |  43 |  43 |  43 | 43  | 43
**    ign  RF Ovl |   0 |   0 |   0 |   0 |  0  |  0
**    RF  max Atn |  31 |  31 |  31 |  31 | 31  | 31
**    PD1 Target  |  36 |  36 |  38 |  38 | 36  | 38
**    ign FIF Ovl |   0 |   0 |   0 |   0 |  0  |  0
**    FIF max Atn |   5 |   5 |   5 |   5 |  5  |  5
**    PD2 Target  |  40 |  33 |  42 |  42 | 33  | 42
**
**
**  Parameters:     pInfo       - ptr to MT2063_Info_t structure
**                  Mode        - desired reciever mode
**
**  Usage:          status = MT2063_SetReceiverMode(hMT2063, Mode);
**
**  Returns:        status:
**                      MT_OK             - No errors
**                      MT_COMM_ERR       - Serial bus communications error
**
**  Dependencies:   MT2063_SetReg - Write a byte of data to a HW register.
**                  Assumes that the tuner cache is valid.
**
**  Revision History:
**
**   SCR      Date      Author  Description
**  -------------------------------------------------------------------------
**   138   06-19-2007    DAD    Ver 1.00: Initial, derived from mt2067_b.
**   N/A   01-10-2007    PINZ   Added additional GCU Settings, FIFF Calib will be triggered
**   155   10-01-2007    DAD    Ver 1.06: Add receiver mode for SECAM positive
**                                        modulation
**                                        (MT2063_ANALOG_TV_POS_NO_RFAGC_MODE)
**   N/A   10-22-2007    PINZ   Ver 1.07: Changed some Registers at init to have
**                                        the same settings as with MT Launcher
**   N/A   10-30-2007    PINZ             Add SetParam VGAGC & VGAOI
**                                        Add SetParam DNC_OUTPUT_ENABLE
**                                        Removed VGAGC from receiver mode,
**                                        default now 1
**   N/A   10-31-2007    PINZ   Ver 1.08: Add SetParam TAGC, removed from rcvr-mode
**                                        Add SetParam AMPGC, removed from rcvr-mode
**                                        Corrected names of GCU values
**                                        reorganized receiver modes, removed,
**                                        (MT2063_ANALOG_TV_POS_NO_RFAGC_MODE)
**                                        Actualized Receiver-Mode values
**   N/A   11-12-2007    PINZ   Ver 1.09: Actualized Receiver-Mode values
**   N/A   11-27-2007    PINZ             Improved buffered writing
**         01-03-2008    PINZ   Ver 1.10: Added a trigger of BYPATNUP for
**                                        correct wakeup of the LNA after shutdown
**                                        Set AFCsd = 1 as default
**                                        Changed CAP1sel default
**         01-14-2008    PINZ   Ver 1.11: Updated gain settings
**         04-18-2008    PINZ   Ver 1.15: Add SetParam LNARIN & PDxTGT
**                                        Split SetParam up to ACLNA / ACLNA_MAX
**                                        removed ACLNA_INRC/DECR (+RF & FIF)
**                                        removed GCUAUTO / BYPATNDN/UP
**
******************************************************************************/
2522
static u32 MT2063_SetReceiverMode(struct MT2063_Info_t *pInfo,
2523 2524
				      enum MT2063_RCVR_MODES Mode)
{
2525 2526 2527
	u32 status = MT2063_OK;	/* Status to be returned        */
	u8 val;
	u32 longval;
2528 2529 2530 2531 2532 2533 2534 2535

	if (Mode >= MT2063_NUM_RCVR_MODES)
		status = MT2063_ARG_RANGE;

	/* RFAGCen */
	if (MT2063_NO_ERROR(status)) {
		val =
		    (pInfo->
2536
		     reg[MT2063_REG_PD1_TGT] & (u8) ~ 0x40) | (RFAGCEN[Mode]
2537 2538 2539 2540 2541 2542 2543 2544 2545 2546 2547 2548 2549 2550 2551 2552
								   ? 0x40 :
								   0x00);
		if (pInfo->reg[MT2063_REG_PD1_TGT] != val) {
			status |= MT2063_SetReg(pInfo, MT2063_REG_PD1_TGT, val);
		}
	}

	/* LNARin */
	if (MT2063_NO_ERROR(status)) {
		status |= MT2063_SetParam(pInfo, MT2063_LNA_RIN, LNARIN[Mode]);
	}

	/* FIFFQEN and FIFFQ */
	if (MT2063_NO_ERROR(status)) {
		val =
		    (pInfo->
2553
		     reg[MT2063_REG_FIFF_CTRL2] & (u8) ~ 0xF0) |
2554 2555 2556 2557 2558 2559
		    (FIFFQEN[Mode] << 7) | (FIFFQ[Mode] << 4);
		if (pInfo->reg[MT2063_REG_FIFF_CTRL2] != val) {
			status |=
			    MT2063_SetReg(pInfo, MT2063_REG_FIFF_CTRL2, val);
			/* trigger FIFF calibration, needed after changing FIFFQ */
			val =
2560
			    (pInfo->reg[MT2063_REG_FIFF_CTRL] | (u8) 0x01);
2561 2562 2563 2564
			status |=
			    MT2063_SetReg(pInfo, MT2063_REG_FIFF_CTRL, val);
			val =
			    (pInfo->
2565
			     reg[MT2063_REG_FIFF_CTRL] & (u8) ~ 0x01);
2566 2567 2568 2569 2570 2571 2572 2573 2574 2575 2576 2577 2578 2579 2580 2581 2582 2583 2584 2585 2586 2587 2588 2589 2590 2591 2592 2593 2594 2595 2596 2597 2598 2599 2600 2601 2602 2603 2604 2605 2606 2607 2608 2609 2610 2611
			status |=
			    MT2063_SetReg(pInfo, MT2063_REG_FIFF_CTRL, val);
		}
	}

	/* DNC1GC & DNC2GC */
	status |= MT2063_GetParam(pInfo, MT2063_DNC_OUTPUT_ENABLE, &longval);
	status |= MT2063_SetParam(pInfo, MT2063_DNC_OUTPUT_ENABLE, longval);

	/* acLNAmax */
	if (MT2063_NO_ERROR(status)) {
		status |=
		    MT2063_SetParam(pInfo, MT2063_ACLNA_MAX, ACLNAMAX[Mode]);
	}

	/* LNATGT */
	if (MT2063_NO_ERROR(status)) {
		status |= MT2063_SetParam(pInfo, MT2063_LNA_TGT, LNATGT[Mode]);
	}

	/* ACRF */
	if (MT2063_NO_ERROR(status)) {
		status |=
		    MT2063_SetParam(pInfo, MT2063_ACRF_MAX, ACRFMAX[Mode]);
	}

	/* PD1TGT */
	if (MT2063_NO_ERROR(status)) {
		status |= MT2063_SetParam(pInfo, MT2063_PD1_TGT, PD1TGT[Mode]);
	}

	/* FIFATN */
	if (MT2063_NO_ERROR(status)) {
		status |=
		    MT2063_SetParam(pInfo, MT2063_ACFIF_MAX, ACFIFMAX[Mode]);
	}

	/* PD2TGT */
	if (MT2063_NO_ERROR(status)) {
		status |= MT2063_SetParam(pInfo, MT2063_PD2_TGT, PD2TGT[Mode]);
	}

	/* Ignore ATN Overload */
	if (MT2063_NO_ERROR(status)) {
		val =
		    (pInfo->
2612
		     reg[MT2063_REG_LNA_TGT] & (u8) ~ 0x80) | (RFOVDIS[Mode]
2613 2614 2615 2616 2617 2618 2619 2620 2621 2622 2623
								   ? 0x80 :
								   0x00);
		if (pInfo->reg[MT2063_REG_LNA_TGT] != val) {
			status |= MT2063_SetReg(pInfo, MT2063_REG_LNA_TGT, val);
		}
	}

	/* Ignore FIF Overload */
	if (MT2063_NO_ERROR(status)) {
		val =
		    (pInfo->
2624
		     reg[MT2063_REG_PD1_TGT] & (u8) ~ 0x80) |
2625 2626 2627 2628 2629 2630 2631 2632 2633 2634 2635 2636 2637 2638 2639 2640 2641 2642 2643 2644 2645 2646 2647 2648 2649 2650 2651 2652 2653 2654 2655 2656 2657 2658 2659 2660 2661 2662 2663 2664 2665 2666 2667 2668 2669 2670
		    (FIFOVDIS[Mode] ? 0x80 : 0x00);
		if (pInfo->reg[MT2063_REG_PD1_TGT] != val) {
			status |= MT2063_SetReg(pInfo, MT2063_REG_PD1_TGT, val);
		}
	}

	if (MT2063_NO_ERROR(status))
		pInfo->rcvr_mode = Mode;

	return (status);
}

/******************************************************************************
**
**  Name: MT2063_ReInit
**
**  Description:    Initialize the tuner's register values.
**
**  Parameters:     h           - Tuner handle (returned by MT2063_Open)
**
**  Returns:        status:
**                      MT_OK            - No errors
**                      MT_TUNER_ID_ERR   - Tuner Part/Rev code mismatch
**                      MT_INV_HANDLE    - Invalid tuner handle
**                      MT_COMM_ERR      - Serial bus communications error
**
**  Dependencies:   MT_ReadSub  - Read byte(s) of data from the two-wire bus
**                  MT_WriteSub - Write byte(s) of data to the two-wire bus
**
**  Revision History:
**
**   SCR      Date      Author  Description
**  -------------------------------------------------------------------------
**   138   06-19-2007    DAD    Ver 1.00: Initial, derived from mt2067_b.
**   148   09-04-2007    RSK    Ver 1.02: Corrected logic of Reg 3B Reference
**   153   09-07-2007    RSK    Ver 1.03: Lock Time improvements
**   N/A   10-31-2007    PINZ   Ver 1.08: Changed values suitable to rcvr-mode 0
**   N/A   11-12-2007    PINZ   Ver 1.09: Changed values suitable to rcvr-mode 0
**   N/A   01-03-2007    PINZ   Ver 1.10: Added AFCsd = 1 into defaults
**   N/A   01-04-2007    PINZ   Ver 1.10: Changed CAP1sel default
**         01-14-2008    PINZ   Ver 1.11: Updated gain settings
**         03-18-2008    PINZ   Ver 1.13: Added Support for B3
**   175 I 06-19-2008    RSK    Ver 1.17: Refactor DECT control to SpurAvoid.
**         06-24-2008    PINZ   Ver 1.18: Add Get/SetParam CTFILT_SW
**
******************************************************************************/
2671
static u32 MT2063_ReInit(void *h)
2672
{
2673 2674
	u8 all_resets = 0xF0;	/* reset/load bits */
	u32 status = MT2063_OK;	/* Status to be returned */
2675
	struct MT2063_Info_t *pInfo = (struct MT2063_Info_t *)h;
2676
	u8 *def;
2677

2678
	u8 MT2063B0_defaults[] = {	/* Reg,  Value */
2679 2680 2681 2682 2683 2684 2685 2686 2687 2688 2689 2690 2691 2692 2693 2694 2695 2696 2697 2698 2699 2700 2701
		0x19, 0x05,
		0x1B, 0x1D,
		0x1C, 0x1F,
		0x1D, 0x0F,
		0x1E, 0x3F,
		0x1F, 0x0F,
		0x20, 0x3F,
		0x22, 0x21,
		0x23, 0x3F,
		0x24, 0x20,
		0x25, 0x3F,
		0x27, 0xEE,
		0x2C, 0x27,	/*  bit at 0x20 is cleared below  */
		0x30, 0x03,
		0x2C, 0x07,	/*  bit at 0x20 is cleared here   */
		0x2D, 0x87,
		0x2E, 0xAA,
		0x28, 0xE1,	/*  Set the FIFCrst bit here      */
		0x28, 0xE0,	/*  Clear the FIFCrst bit here    */
		0x00
	};

	/* writing 0x05 0xf0 sw-resets all registers, so we write only needed changes */
2702
	u8 MT2063B1_defaults[] = {	/* Reg,  Value */
2703 2704 2705 2706 2707 2708 2709 2710 2711 2712 2713 2714 2715 2716 2717 2718 2719 2720 2721 2722 2723 2724 2725 2726 2727
		0x05, 0xF0,
		0x11, 0x10,	/* New Enable AFCsd */
		0x19, 0x05,
		0x1A, 0x6C,
		0x1B, 0x24,
		0x1C, 0x28,
		0x1D, 0x8F,
		0x1E, 0x14,
		0x1F, 0x8F,
		0x20, 0x57,
		0x22, 0x21,	/* New - ver 1.03 */
		0x23, 0x3C,	/* New - ver 1.10 */
		0x24, 0x20,	/* New - ver 1.03 */
		0x2C, 0x24,	/*  bit at 0x20 is cleared below  */
		0x2D, 0x87,	/*  FIFFQ=0  */
		0x2F, 0xF3,
		0x30, 0x0C,	/* New - ver 1.11 */
		0x31, 0x1B,	/* New - ver 1.11 */
		0x2C, 0x04,	/*  bit at 0x20 is cleared here  */
		0x28, 0xE1,	/*  Set the FIFCrst bit here      */
		0x28, 0xE0,	/*  Clear the FIFCrst bit here    */
		0x00
	};

	/* writing 0x05 0xf0 sw-resets all registers, so we write only needed changes */
2728
	u8 MT2063B3_defaults[] = {	/* Reg,  Value */
2729 2730 2731 2732 2733 2734 2735 2736 2737 2738 2739 2740 2741 2742 2743 2744 2745 2746 2747 2748 2749 2750 2751 2752 2753 2754 2755 2756 2757 2758 2759 2760 2761 2762 2763 2764 2765 2766 2767 2768 2769 2770 2771 2772 2773 2774 2775 2776 2777 2778 2779 2780 2781 2782 2783 2784 2785 2786 2787 2788 2789 2790 2791 2792
		0x05, 0xF0,
		0x19, 0x3D,
		0x2C, 0x24,	/*  bit at 0x20 is cleared below  */
		0x2C, 0x04,	/*  bit at 0x20 is cleared here  */
		0x28, 0xE1,	/*  Set the FIFCrst bit here      */
		0x28, 0xE0,	/*  Clear the FIFCrst bit here    */
		0x00
	};

	/*  Verify that the handle passed points to a valid tuner         */
	if (MT2063_IsValidHandle(pInfo) == 0)
		status |= MT2063_INV_HANDLE;

	/*  Read the Part/Rev code from the tuner */
	if (MT2063_NO_ERROR(status)) {
		status |=
		    MT2063_ReadSub(pInfo->hUserData, pInfo->address,
				   MT2063_REG_PART_REV, pInfo->reg, 1);
	}

	if (MT2063_NO_ERROR(status)	/* Check the part/rev code */
	    &&((pInfo->reg[MT2063_REG_PART_REV] != MT2063_B0)	/*  MT2063 B0  */
	       &&(pInfo->reg[MT2063_REG_PART_REV] != MT2063_B1)	/*  MT2063 B1  */
	       &&(pInfo->reg[MT2063_REG_PART_REV] != MT2063_B3)))	/*  MT2063 B3  */
		status |= MT2063_TUNER_ID_ERR;	/*  Wrong tuner Part/Rev code */

	/*  Read the Part/Rev code (2nd byte) from the tuner */
	if (MT2063_NO_ERROR(status))
		status |=
		    MT2063_ReadSub(pInfo->hUserData, pInfo->address,
				   MT2063_REG_RSVD_3B,
				   &pInfo->reg[MT2063_REG_RSVD_3B], 1);

	if (MT2063_NO_ERROR(status)	/* Check the 2nd part/rev code */
	    &&((pInfo->reg[MT2063_REG_RSVD_3B] & 0x80) != 0x00))	/* b7 != 0 ==> NOT MT2063 */
		status |= MT2063_TUNER_ID_ERR;	/*  Wrong tuner Part/Rev code */

	/*  Reset the tuner  */
	if (MT2063_NO_ERROR(status))
		status |= MT2063_WriteSub(pInfo->hUserData,
					  pInfo->address,
					  MT2063_REG_LO2CQ_3, &all_resets, 1);

	/* change all of the default values that vary from the HW reset values */
	/*  def = (pInfo->reg[PART_REV] == MT2063_B0) ? MT2063B0_defaults : MT2063B1_defaults; */
	switch (pInfo->reg[MT2063_REG_PART_REV]) {
	case MT2063_B3:
		def = MT2063B3_defaults;
		break;

	case MT2063_B1:
		def = MT2063B1_defaults;
		break;

	case MT2063_B0:
		def = MT2063B0_defaults;
		break;

	default:
		status |= MT2063_TUNER_ID_ERR;
		break;
	}

	while (MT2063_NO_ERROR(status) && *def) {
2793 2794
		u8 reg = *def++;
		u8 val = *def++;
2795 2796 2797 2798 2799 2800 2801
		status |=
		    MT2063_WriteSub(pInfo->hUserData, pInfo->address, reg, &val,
				    1);
	}

	/*  Wait for FIFF location to complete.  */
	if (MT2063_NO_ERROR(status)) {
2802 2803
		u32 FCRUN = 1;
		s32 maxReads = 10;
2804 2805
		while (MT2063_NO_ERROR(status) && (FCRUN != 0)
		       && (maxReads-- > 0)) {
2806
			msleep(2);
2807 2808 2809 2810 2811 2812 2813 2814 2815 2816 2817 2818 2819 2820 2821 2822 2823 2824 2825 2826 2827 2828 2829 2830 2831 2832 2833 2834 2835 2836 2837 2838
			status |= MT2063_ReadSub(pInfo->hUserData,
						 pInfo->address,
						 MT2063_REG_XO_STATUS,
						 &pInfo->
						 reg[MT2063_REG_XO_STATUS], 1);
			FCRUN = (pInfo->reg[MT2063_REG_XO_STATUS] & 0x40) >> 6;
		}

		if (FCRUN != 0)
			status |= MT2063_TUNER_INIT_ERR | MT2063_TUNER_TIMEOUT;

		if (MT2063_NO_ERROR(status))	/* Re-read FIFFC value */
			status |=
			    MT2063_ReadSub(pInfo->hUserData, pInfo->address,
					   MT2063_REG_FIFFC,
					   &pInfo->reg[MT2063_REG_FIFFC], 1);
	}

	/* Read back all the registers from the tuner */
	if (MT2063_NO_ERROR(status))
		status |= MT2063_ReadSub(pInfo->hUserData,
					 pInfo->address,
					 MT2063_REG_PART_REV,
					 pInfo->reg, MT2063_REG_END_REGS);

	if (MT2063_NO_ERROR(status)) {
		/*  Initialize the tuner state.  */
		pInfo->version = MT2063_VERSION;
		pInfo->tuner_id = pInfo->reg[MT2063_REG_PART_REV];
		pInfo->AS_Data.f_ref = MT2063_REF_FREQ;
		pInfo->AS_Data.f_if1_Center =
		    (pInfo->AS_Data.f_ref / 8) *
2839
		    ((u32) pInfo->reg[MT2063_REG_FIFFC] + 640);
2840 2841 2842 2843 2844 2845 2846 2847 2848 2849 2850 2851 2852 2853 2854 2855 2856 2857 2858 2859 2860 2861 2862 2863 2864 2865 2866 2867 2868 2869 2870 2871 2872 2873 2874 2875 2876 2877 2878 2879 2880 2881 2882 2883 2884 2885 2886 2887 2888 2889 2890 2891 2892 2893 2894 2895 2896 2897 2898 2899 2900
		pInfo->AS_Data.f_if1_bw = MT2063_IF1_BW;
		pInfo->AS_Data.f_out = 43750000UL;
		pInfo->AS_Data.f_out_bw = 6750000UL;
		pInfo->AS_Data.f_zif_bw = MT2063_ZIF_BW;
		pInfo->AS_Data.f_LO1_Step = pInfo->AS_Data.f_ref / 64;
		pInfo->AS_Data.f_LO2_Step = MT2063_TUNE_STEP_SIZE;
		pInfo->AS_Data.maxH1 = MT2063_MAX_HARMONICS_1;
		pInfo->AS_Data.maxH2 = MT2063_MAX_HARMONICS_2;
		pInfo->AS_Data.f_min_LO_Separation = MT2063_MIN_LO_SEP;
		pInfo->AS_Data.f_if1_Request = pInfo->AS_Data.f_if1_Center;
		pInfo->AS_Data.f_LO1 = 2181000000UL;
		pInfo->AS_Data.f_LO2 = 1486249786UL;
		pInfo->f_IF1_actual = pInfo->AS_Data.f_if1_Center;
		pInfo->AS_Data.f_in =
		    pInfo->AS_Data.f_LO1 - pInfo->f_IF1_actual;
		pInfo->AS_Data.f_LO1_FracN_Avoid = MT2063_LO1_FRACN_AVOID;
		pInfo->AS_Data.f_LO2_FracN_Avoid = MT2063_LO2_FRACN_AVOID;
		pInfo->num_regs = MT2063_REG_END_REGS;
		pInfo->AS_Data.avoidDECT = MT2063_AVOID_BOTH;
		pInfo->ctfilt_sw = 0;
	}

	if (MT2063_NO_ERROR(status)) {
		pInfo->CTFiltMax[0] = 69230000;
		pInfo->CTFiltMax[1] = 105770000;
		pInfo->CTFiltMax[2] = 140350000;
		pInfo->CTFiltMax[3] = 177110000;
		pInfo->CTFiltMax[4] = 212860000;
		pInfo->CTFiltMax[5] = 241130000;
		pInfo->CTFiltMax[6] = 274370000;
		pInfo->CTFiltMax[7] = 309820000;
		pInfo->CTFiltMax[8] = 342450000;
		pInfo->CTFiltMax[9] = 378870000;
		pInfo->CTFiltMax[10] = 416210000;
		pInfo->CTFiltMax[11] = 456500000;
		pInfo->CTFiltMax[12] = 495790000;
		pInfo->CTFiltMax[13] = 534530000;
		pInfo->CTFiltMax[14] = 572610000;
		pInfo->CTFiltMax[15] = 598970000;
		pInfo->CTFiltMax[16] = 635910000;
		pInfo->CTFiltMax[17] = 672130000;
		pInfo->CTFiltMax[18] = 714840000;
		pInfo->CTFiltMax[19] = 739660000;
		pInfo->CTFiltMax[20] = 770410000;
		pInfo->CTFiltMax[21] = 814660000;
		pInfo->CTFiltMax[22] = 846950000;
		pInfo->CTFiltMax[23] = 867820000;
		pInfo->CTFiltMax[24] = 915980000;
		pInfo->CTFiltMax[25] = 947450000;
		pInfo->CTFiltMax[26] = 983110000;
		pInfo->CTFiltMax[27] = 1021630000;
		pInfo->CTFiltMax[28] = 1061870000;
		pInfo->CTFiltMax[29] = 1098330000;
		pInfo->CTFiltMax[30] = 1138990000;
	}

	/*
	 **   Fetch the FCU osc value and use it and the fRef value to
	 **   scale all of the Band Max values
	 */
	if (MT2063_NO_ERROR(status)) {
2901 2902
		u32 fcu_osc;
		u32 i;
2903 2904 2905 2906 2907 2908 2909 2910 2911 2912 2913 2914 2915 2916 2917 2918 2919 2920 2921 2922 2923 2924 2925 2926 2927 2928 2929 2930 2931 2932 2933 2934 2935 2936 2937 2938 2939 2940 2941 2942 2943 2944 2945 2946 2947 2948 2949 2950 2951 2952 2953 2954 2955 2956 2957 2958 2959

		pInfo->reg[MT2063_REG_CTUNE_CTRL] = 0x0A;
		status |=
		    MT2063_WriteSub(pInfo->hUserData, pInfo->address,
				    MT2063_REG_CTUNE_CTRL,
				    &pInfo->reg[MT2063_REG_CTUNE_CTRL], 1);
		/*  Read the ClearTune filter calibration value  */
		status |=
		    MT2063_ReadSub(pInfo->hUserData, pInfo->address,
				   MT2063_REG_FIFFC,
				   &pInfo->reg[MT2063_REG_FIFFC], 1);
		fcu_osc = pInfo->reg[MT2063_REG_FIFFC];

		pInfo->reg[MT2063_REG_CTUNE_CTRL] = 0x00;
		status |=
		    MT2063_WriteSub(pInfo->hUserData, pInfo->address,
				    MT2063_REG_CTUNE_CTRL,
				    &pInfo->reg[MT2063_REG_CTUNE_CTRL], 1);

		/*  Adjust each of the values in the ClearTune filter cross-over table  */
		for (i = 0; i < 31; i++) {
			pInfo->CTFiltMax[i] =
			    (pInfo->CTFiltMax[i] / 768) * (fcu_osc + 640);
		}
	}

	return (status);
}

/******************************************************************************
**
**  Name: MT2063_SetGPIO
**
**  Description:    Modify the MT2063 GPIO value.
**
**  Parameters:     h            - Open handle to the tuner (from MT2063_Open).
**                  gpio_id      - Selects GPIO0, GPIO1 or GPIO2
**                  attr         - Selects input readback, I/O direction or
**                                 output value
**                  value        - value to set GPIO pin 15, 14 or 19
**
**  Usage:          status = MT2063_SetGPIO(hMT2063, MT2063_GPIO1, MT2063_GPIO_OUT, 1);
**
**  Returns:        status:
**                      MT_OK            - No errors
**                      MT_COMM_ERR      - Serial bus communications error
**                      MT_INV_HANDLE    - Invalid tuner handle
**
**  Dependencies:   MT_WriteSub - Write byte(s) of data to the two-wire-bus
**
**  Revision History:
**
**   SCR      Date      Author  Description
**  -------------------------------------------------------------------------
**   138   06-19-2007    DAD    Ver 1.00: Initial, derived from mt2067_b.
**
******************************************************************************/
2960
static u32 MT2063_SetGPIO(void *h, enum MT2063_GPIO_ID gpio_id,
2961
		       enum MT2063_GPIO_Attr attr, u32 value)
2962
{
2963 2964 2965 2966
	u32 status = MT2063_OK;	/* Status to be returned        */
	u8 regno;
	s32 shift;
	static u8 GPIOreg[3] = { 0x15, 0x19, 0x18 };
2967
	struct MT2063_Info_t *pInfo = (struct MT2063_Info_t *)h;
2968

2969 2970
	if (MT2063_IsValidHandle(pInfo) == 0)
		return MT2063_INV_HANDLE;
2971

2972
	regno = GPIOreg[attr];
2973

2974 2975 2976 2977 2978 2979 2980 2981 2982 2983 2984 2985 2986 2987 2988 2989 2990 2991 2992 2993 2994 2995 2996 2997 2998 2999 3000 3001 3002 3003 3004 3005 3006 3007 3008 3009 3010 3011 3012 3013 3014 3015 3016 3017 3018 3019 3020 3021 3022 3023 3024 3025 3026 3027 3028 3029 3030 3031 3032 3033 3034 3035 3036 3037 3038 3039 3040 3041 3042 3043 3044 3045 3046 3047 3048 3049 3050 3051 3052 3053 3054 3055 3056 3057 3058 3059 3060 3061 3062 3063 3064 3065 3066 3067 3068 3069
	shift = (gpio_id - MT2063_GPIO0 + 5);

	if (value & 0x01)
		pInfo->reg[regno] |= (0x01 << shift);
	else
		pInfo->reg[regno] &= ~(0x01 << shift);
	status =
	    MT2063_WriteSub(pInfo->hUserData, pInfo->address, regno,
			    &pInfo->reg[regno], 1);

	return (status);
}

/****************************************************************************
**
**  Name: MT2063_SetParam
**
**  Description:    Sets a tuning algorithm parameter.
**
**                  This function provides access to the internals of the
**                  tuning algorithm.  You can override many of the tuning
**                  algorithm defaults using this function.
**
**  Parameters:     h           - Tuner handle (returned by MT2063_Open)
**                  param       - Tuning algorithm parameter
**                                (see enum MT2063_Param)
**                  nValue      - value to be set
**
**                  param                     Description
**                  ----------------------    --------------------------------
**                  MT2063_SRO_FREQ           crystal frequency
**                  MT2063_STEPSIZE           minimum tuning step size
**                  MT2063_LO1_FREQ           LO1 frequency
**                  MT2063_LO1_STEPSIZE       LO1 minimum step size
**                  MT2063_LO1_FRACN_AVOID    LO1 FracN keep-out region
**                  MT2063_IF1_REQUEST        Requested 1st IF
**                  MT2063_ZIF_BW             zero-IF bandwidth
**                  MT2063_LO2_FREQ           LO2 frequency
**                  MT2063_LO2_STEPSIZE       LO2 minimum step size
**                  MT2063_LO2_FRACN_AVOID    LO2 FracN keep-out region
**                  MT2063_OUTPUT_FREQ        output center frequency
**                  MT2063_OUTPUT_BW          output bandwidth
**                  MT2063_LO_SEPARATION      min inter-tuner LO separation
**                  MT2063_MAX_HARM1          max # of intra-tuner harmonics
**                  MT2063_MAX_HARM2          max # of inter-tuner harmonics
**                  MT2063_RCVR_MODE          Predefined modes
**                  MT2063_LNA_RIN            Set LNA Rin (*)
**                  MT2063_LNA_TGT            Set target power level at LNA (*)
**                  MT2063_PD1_TGT            Set target power level at PD1 (*)
**                  MT2063_PD2_TGT            Set target power level at PD2 (*)
**                  MT2063_ACLNA_MAX          LNA attenuator limit (*)
**                  MT2063_ACRF_MAX           RF attenuator limit (*)
**                  MT2063_ACFIF_MAX          FIF attenuator limit (*)
**                  MT2063_DNC_OUTPUT_ENABLE  DNC output selection
**                  MT2063_VGAGC              VGA gain code
**                  MT2063_VGAOI              VGA output current
**                  MT2063_TAGC               TAGC setting
**                  MT2063_AMPGC              AMP gain code
**                  MT2063_AVOID_DECT         Avoid DECT Frequencies
**                  MT2063_CTFILT_SW          Cleartune filter selection
**
**                  (*) This parameter is set by MT2063_RCVR_MODE, do not call
**                      additionally.
**
**  Usage:          status |= MT2063_SetParam(hMT2063,
**                                            MT2063_STEPSIZE,
**                                            50000);
**
**  Returns:        status:
**                      MT_OK            - No errors
**                      MT_INV_HANDLE    - Invalid tuner handle
**                      MT_ARG_NULL      - Null pointer argument passed
**                      MT_ARG_RANGE     - Invalid parameter requested
**                                         or set value out of range
**                                         or non-writable parameter
**
**  Dependencies:   USERS MUST CALL MT2063_Open() FIRST!
**
**  See Also:       MT2063_GetParam, MT2063_Open
**
**  Revision History:
**
**   SCR      Date      Author  Description
**  -------------------------------------------------------------------------
**   138   06-19-2007    DAD    Ver 1.00: Initial, derived from mt2067_b.
**   154   09-13-2007    RSK    Ver 1.05: Get/SetParam changes for LOx_FREQ
**         10-31-2007    PINZ   Ver 1.08: Get/SetParam add VGAGC, VGAOI, AMPGC, TAGC
**         04-18-2008    PINZ   Ver 1.15: Add SetParam LNARIN & PDxTGT
**                                        Split SetParam up to ACLNA / ACLNA_MAX
**                                        removed ACLNA_INRC/DECR (+RF & FIF)
**                                        removed GCUAUTO / BYPATNDN/UP
**   175 I 06-06-2008    PINZ   Ver 1.16: Add control to avoid US DECT freqs.
**   175 I 06-19-2008    RSK    Ver 1.17: Refactor DECT control to SpurAvoid.
**         06-24-2008    PINZ   Ver 1.18: Add Get/SetParam CTFILT_SW
**
****************************************************************************/
3070
static u32 MT2063_SetParam(void *h, enum MT2063_Param param, u32 nValue)
3071
{
3072 3073
	u32 status = MT2063_OK;	/* Status to be returned        */
	u8 val = 0;
3074 3075 3076 3077 3078 3079 3080 3081 3082 3083 3084 3085 3086 3087 3088 3089 3090 3091 3092 3093 3094 3095 3096 3097 3098 3099 3100 3101 3102
	struct MT2063_Info_t *pInfo = (struct MT2063_Info_t *)h;

	/*  Verify that the handle passed points to a valid tuner         */
	if (MT2063_IsValidHandle(pInfo) == 0)
		status |= MT2063_INV_HANDLE;

	if (MT2063_NO_ERROR(status)) {
		switch (param) {
			/*  crystal frequency                     */
		case MT2063_SRO_FREQ:
			pInfo->AS_Data.f_ref = nValue;
			pInfo->AS_Data.f_LO1_FracN_Avoid = 0;
			pInfo->AS_Data.f_LO2_FracN_Avoid = nValue / 80 - 1;
			pInfo->AS_Data.f_LO1_Step = nValue / 64;
			pInfo->AS_Data.f_if1_Center =
			    (pInfo->AS_Data.f_ref / 8) *
			    (pInfo->reg[MT2063_REG_FIFFC] + 640);
			break;

			/*  minimum tuning step size              */
		case MT2063_STEPSIZE:
			pInfo->AS_Data.f_LO2_Step = nValue;
			break;

			/*  LO1 frequency                         */
		case MT2063_LO1_FREQ:
			{
				/* Note: LO1 and LO2 are BOTH written at toggle of LDLOos  */
				/* Capture the Divider and Numerator portions of other LO  */
3103 3104 3105 3106 3107
				u8 tempLO2CQ[3];
				u8 tempLO2C[3];
				u8 tmpOneShot;
				u32 Div, FracN;
				u8 restore = 0;
3108 3109 3110 3111 3112 3113 3114 3115 3116 3117 3118 3119 3120 3121 3122 3123 3124 3125 3126 3127 3128 3129 3130 3131 3132 3133 3134 3135 3136 3137 3138 3139 3140 3141 3142 3143 3144 3145 3146 3147 3148 3149 3150 3151 3152 3153 3154

				/* Buffer the queue for restoration later and get actual LO2 values. */
				status |=
				    MT2063_ReadSub(pInfo->hUserData,
						   pInfo->address,
						   MT2063_REG_LO2CQ_1,
						   &(tempLO2CQ[0]), 3);
				status |=
				    MT2063_ReadSub(pInfo->hUserData,
						   pInfo->address,
						   MT2063_REG_LO2C_1,
						   &(tempLO2C[0]), 3);

				/* clear the one-shot bits */
				tempLO2CQ[2] = tempLO2CQ[2] & 0x0F;
				tempLO2C[2] = tempLO2C[2] & 0x0F;

				/* only write the queue values if they are different from the actual. */
				if ((tempLO2CQ[0] != tempLO2C[0]) ||
				    (tempLO2CQ[1] != tempLO2C[1]) ||
				    (tempLO2CQ[2] != tempLO2C[2])) {
					/* put actual LO2 value into queue (with 0 in one-shot bits) */
					status |=
					    MT2063_WriteSub(pInfo->hUserData,
							    pInfo->address,
							    MT2063_REG_LO2CQ_1,
							    &(tempLO2C[0]), 3);

					if (status == MT2063_OK) {
						/* cache the bytes just written. */
						pInfo->reg[MT2063_REG_LO2CQ_1] =
						    tempLO2C[0];
						pInfo->reg[MT2063_REG_LO2CQ_2] =
						    tempLO2C[1];
						pInfo->reg[MT2063_REG_LO2CQ_3] =
						    tempLO2C[2];
					}
					restore = 1;
				}

				/* Calculate the Divider and Numberator components of LO1 */
				status =
				    MT2063_CalcLO1Mult(&Div, &FracN, nValue,
						       pInfo->AS_Data.f_ref /
						       64,
						       pInfo->AS_Data.f_ref);
				pInfo->reg[MT2063_REG_LO1CQ_1] =
3155
				    (u8) (Div & 0x00FF);
3156
				pInfo->reg[MT2063_REG_LO1CQ_2] =
3157
				    (u8) (FracN);
3158 3159 3160 3161 3162 3163 3164 3165 3166 3167 3168 3169 3170 3171 3172 3173 3174 3175 3176 3177 3178 3179 3180 3181 3182 3183 3184 3185 3186 3187 3188 3189 3190 3191 3192 3193 3194 3195 3196 3197 3198 3199 3200 3201 3202 3203 3204 3205 3206 3207 3208 3209 3210 3211 3212 3213 3214 3215 3216 3217 3218 3219 3220 3221
				status |=
				    MT2063_WriteSub(pInfo->hUserData,
						    pInfo->address,
						    MT2063_REG_LO1CQ_1,
						    &pInfo->
						    reg[MT2063_REG_LO1CQ_1], 2);

				/* set the one-shot bit to load the pair of LO values */
				tmpOneShot = tempLO2CQ[2] | 0xE0;
				status |=
				    MT2063_WriteSub(pInfo->hUserData,
						    pInfo->address,
						    MT2063_REG_LO2CQ_3,
						    &tmpOneShot, 1);

				/* only restore the queue values if they were different from the actual. */
				if (restore) {
					/* put actual LO2 value into queue (0 in one-shot bits) */
					status |=
					    MT2063_WriteSub(pInfo->hUserData,
							    pInfo->address,
							    MT2063_REG_LO2CQ_1,
							    &(tempLO2CQ[0]), 3);

					/* cache the bytes just written. */
					pInfo->reg[MT2063_REG_LO2CQ_1] =
					    tempLO2CQ[0];
					pInfo->reg[MT2063_REG_LO2CQ_2] =
					    tempLO2CQ[1];
					pInfo->reg[MT2063_REG_LO2CQ_3] =
					    tempLO2CQ[2];
				}

				MT2063_GetParam(pInfo->hUserData,
						MT2063_LO1_FREQ,
						&pInfo->AS_Data.f_LO1);
			}
			break;

			/*  LO1 minimum step size                 */
		case MT2063_LO1_STEPSIZE:
			pInfo->AS_Data.f_LO1_Step = nValue;
			break;

			/*  LO1 FracN keep-out region             */
		case MT2063_LO1_FRACN_AVOID_PARAM:
			pInfo->AS_Data.f_LO1_FracN_Avoid = nValue;
			break;

			/*  Requested 1st IF                      */
		case MT2063_IF1_REQUEST:
			pInfo->AS_Data.f_if1_Request = nValue;
			break;

			/*  zero-IF bandwidth                     */
		case MT2063_ZIF_BW:
			pInfo->AS_Data.f_zif_bw = nValue;
			break;

			/*  LO2 frequency                         */
		case MT2063_LO2_FREQ:
			{
				/* Note: LO1 and LO2 are BOTH written at toggle of LDLOos  */
				/* Capture the Divider and Numerator portions of other LO  */
3222 3223 3224 3225 3226 3227
				u8 tempLO1CQ[2];
				u8 tempLO1C[2];
				u32 Div2;
				u32 FracN2;
				u8 tmpOneShot;
				u8 restore = 0;
3228 3229 3230 3231 3232 3233 3234 3235 3236 3237 3238 3239 3240 3241 3242 3243 3244 3245 3246 3247 3248 3249 3250 3251 3252 3253 3254 3255 3256 3257 3258 3259 3260 3261 3262 3263 3264 3265

				/* Buffer the queue for restoration later and get actual LO2 values. */
				status |=
				    MT2063_ReadSub(pInfo->hUserData,
						   pInfo->address,
						   MT2063_REG_LO1CQ_1,
						   &(tempLO1CQ[0]), 2);
				status |=
				    MT2063_ReadSub(pInfo->hUserData,
						   pInfo->address,
						   MT2063_REG_LO1C_1,
						   &(tempLO1C[0]), 2);

				/* only write the queue values if they are different from the actual. */
				if ((tempLO1CQ[0] != tempLO1C[0])
				    || (tempLO1CQ[1] != tempLO1C[1])) {
					/* put actual LO1 value into queue */
					status |=
					    MT2063_WriteSub(pInfo->hUserData,
							    pInfo->address,
							    MT2063_REG_LO1CQ_1,
							    &(tempLO1C[0]), 2);

					/* cache the bytes just written. */
					pInfo->reg[MT2063_REG_LO1CQ_1] =
					    tempLO1C[0];
					pInfo->reg[MT2063_REG_LO1CQ_2] =
					    tempLO1C[1];
					restore = 1;
				}

				/* Calculate the Divider and Numberator components of LO2 */
				status =
				    MT2063_CalcLO2Mult(&Div2, &FracN2, nValue,
						       pInfo->AS_Data.f_ref /
						       8191,
						       pInfo->AS_Data.f_ref);
				pInfo->reg[MT2063_REG_LO2CQ_1] =
3266
				    (u8) ((Div2 << 1) |
3267 3268
					      ((FracN2 >> 12) & 0x01)) & 0xFF;
				pInfo->reg[MT2063_REG_LO2CQ_2] =
3269
				    (u8) ((FracN2 >> 4) & 0xFF);
3270
				pInfo->reg[MT2063_REG_LO2CQ_3] =
3271
				    (u8) ((FracN2 & 0x0F));
3272 3273 3274 3275 3276 3277 3278 3279 3280 3281 3282 3283 3284 3285 3286 3287 3288 3289 3290 3291 3292 3293 3294 3295 3296 3297 3298 3299 3300 3301 3302 3303 3304 3305 3306 3307 3308 3309 3310 3311 3312 3313 3314 3315 3316 3317 3318 3319 3320 3321 3322 3323 3324 3325 3326 3327 3328 3329 3330 3331 3332 3333 3334 3335 3336 3337 3338 3339 3340 3341 3342 3343 3344 3345 3346 3347 3348 3349 3350 3351 3352 3353 3354 3355
				status |=
				    MT2063_WriteSub(pInfo->hUserData,
						    pInfo->address,
						    MT2063_REG_LO1CQ_1,
						    &pInfo->
						    reg[MT2063_REG_LO1CQ_1], 3);

				/* set the one-shot bit to load the LO values */
				tmpOneShot =
				    pInfo->reg[MT2063_REG_LO2CQ_3] | 0xE0;
				status |=
				    MT2063_WriteSub(pInfo->hUserData,
						    pInfo->address,
						    MT2063_REG_LO2CQ_3,
						    &tmpOneShot, 1);

				/* only restore LO1 queue value if they were different from the actual. */
				if (restore) {
					/* put previous LO1 queue value back into queue */
					status |=
					    MT2063_WriteSub(pInfo->hUserData,
							    pInfo->address,
							    MT2063_REG_LO1CQ_1,
							    &(tempLO1CQ[0]), 2);

					/* cache the bytes just written. */
					pInfo->reg[MT2063_REG_LO1CQ_1] =
					    tempLO1CQ[0];
					pInfo->reg[MT2063_REG_LO1CQ_2] =
					    tempLO1CQ[1];
				}

				MT2063_GetParam(pInfo->hUserData,
						MT2063_LO2_FREQ,
						&pInfo->AS_Data.f_LO2);
			}
			break;

			/*  LO2 minimum step size                 */
		case MT2063_LO2_STEPSIZE:
			pInfo->AS_Data.f_LO2_Step = nValue;
			break;

			/*  LO2 FracN keep-out region             */
		case MT2063_LO2_FRACN_AVOID:
			pInfo->AS_Data.f_LO2_FracN_Avoid = nValue;
			break;

			/*  output center frequency               */
		case MT2063_OUTPUT_FREQ:
			pInfo->AS_Data.f_out = nValue;
			break;

			/*  output bandwidth                      */
		case MT2063_OUTPUT_BW:
			pInfo->AS_Data.f_out_bw = nValue + 750000;
			break;

			/*  min inter-tuner LO separation         */
		case MT2063_LO_SEPARATION:
			pInfo->AS_Data.f_min_LO_Separation = nValue;
			break;

			/*  max # of intra-tuner harmonics        */
		case MT2063_MAX_HARM1:
			pInfo->AS_Data.maxH1 = nValue;
			break;

			/*  max # of inter-tuner harmonics        */
		case MT2063_MAX_HARM2:
			pInfo->AS_Data.maxH2 = nValue;
			break;

		case MT2063_RCVR_MODE:
			status |=
			    MT2063_SetReceiverMode(pInfo,
						   (enum MT2063_RCVR_MODES)
						   nValue);
			break;

			/* Set LNA Rin -- nValue is desired value */
		case MT2063_LNA_RIN:
			val =
			    (pInfo->
3356
			     reg[MT2063_REG_CTRL_2C] & (u8) ~ 0x03) |
3357 3358 3359 3360 3361 3362 3363 3364 3365 3366 3367 3368
			    (nValue & 0x03);
			if (pInfo->reg[MT2063_REG_CTRL_2C] != val) {
				status |=
				    MT2063_SetReg(pInfo, MT2063_REG_CTRL_2C,
						  val);
			}
			break;

			/* Set target power level at LNA -- nValue is desired value */
		case MT2063_LNA_TGT:
			val =
			    (pInfo->
3369
			     reg[MT2063_REG_LNA_TGT] & (u8) ~ 0x3F) |
3370 3371 3372 3373 3374 3375 3376 3377 3378 3379 3380 3381
			    (nValue & 0x3F);
			if (pInfo->reg[MT2063_REG_LNA_TGT] != val) {
				status |=
				    MT2063_SetReg(pInfo, MT2063_REG_LNA_TGT,
						  val);
			}
			break;

			/* Set target power level at PD1 -- nValue is desired value */
		case MT2063_PD1_TGT:
			val =
			    (pInfo->
3382
			     reg[MT2063_REG_PD1_TGT] & (u8) ~ 0x3F) |
3383 3384 3385 3386 3387 3388 3389 3390 3391 3392 3393 3394
			    (nValue & 0x3F);
			if (pInfo->reg[MT2063_REG_PD1_TGT] != val) {
				status |=
				    MT2063_SetReg(pInfo, MT2063_REG_PD1_TGT,
						  val);
			}
			break;

			/* Set target power level at PD2 -- nValue is desired value */
		case MT2063_PD2_TGT:
			val =
			    (pInfo->
3395
			     reg[MT2063_REG_PD2_TGT] & (u8) ~ 0x3F) |
3396 3397 3398 3399 3400 3401 3402 3403 3404 3405 3406 3407
			    (nValue & 0x3F);
			if (pInfo->reg[MT2063_REG_PD2_TGT] != val) {
				status |=
				    MT2063_SetReg(pInfo, MT2063_REG_PD2_TGT,
						  val);
			}
			break;

			/* Set LNA atten limit -- nValue is desired value */
		case MT2063_ACLNA_MAX:
			val =
			    (pInfo->
3408
			     reg[MT2063_REG_LNA_OV] & (u8) ~ 0x1F) | (nValue
3409 3410 3411 3412 3413 3414 3415 3416 3417 3418 3419 3420 3421
									  &
									  0x1F);
			if (pInfo->reg[MT2063_REG_LNA_OV] != val) {
				status |=
				    MT2063_SetReg(pInfo, MT2063_REG_LNA_OV,
						  val);
			}
			break;

			/* Set RF atten limit -- nValue is desired value */
		case MT2063_ACRF_MAX:
			val =
			    (pInfo->
3422
			     reg[MT2063_REG_RF_OV] & (u8) ~ 0x1F) | (nValue
3423 3424 3425 3426 3427 3428 3429 3430 3431 3432 3433 3434 3435 3436 3437
									 &
									 0x1F);
			if (pInfo->reg[MT2063_REG_RF_OV] != val) {
				status |=
				    MT2063_SetReg(pInfo, MT2063_REG_RF_OV, val);
			}
			break;

			/* Set FIF atten limit -- nValue is desired value, max. 5 if no B3 */
		case MT2063_ACFIF_MAX:
			if (pInfo->reg[MT2063_REG_PART_REV] != MT2063_B3
			    && nValue > 5)
				nValue = 5;
			val =
			    (pInfo->
3438
			     reg[MT2063_REG_FIF_OV] & (u8) ~ 0x1F) | (nValue
3439 3440 3441 3442 3443 3444 3445 3446 3447 3448 3449 3450 3451 3452 3453 3454 3455 3456 3457 3458 3459 3460 3461 3462 3463 3464 3465 3466 3467 3468 3469 3470 3471 3472 3473 3474 3475 3476 3477 3478 3479 3480 3481 3482 3483 3484 3485 3486 3487 3488 3489 3490 3491 3492 3493 3494 3495 3496 3497 3498 3499 3500 3501 3502 3503 3504 3505 3506 3507 3508 3509 3510 3511 3512 3513 3514 3515 3516 3517 3518 3519 3520 3521 3522 3523 3524 3525 3526 3527 3528 3529 3530 3531 3532 3533 3534 3535 3536 3537 3538 3539 3540 3541 3542 3543 3544 3545 3546 3547 3548 3549 3550 3551 3552 3553 3554 3555 3556 3557 3558 3559 3560 3561 3562 3563 3564 3565 3566 3567 3568 3569 3570 3571
									  &
									  0x1F);
			if (pInfo->reg[MT2063_REG_FIF_OV] != val) {
				status |=
				    MT2063_SetReg(pInfo, MT2063_REG_FIF_OV,
						  val);
			}
			break;

		case MT2063_DNC_OUTPUT_ENABLE:
			/* selects, which DNC output is used */
			switch ((enum MT2063_DNC_Output_Enable)nValue) {
			case MT2063_DNC_NONE:
				{
					val = (pInfo->reg[MT2063_REG_DNC_GAIN] & 0xFC) | 0x03;	/* Set DNC1GC=3 */
					if (pInfo->reg[MT2063_REG_DNC_GAIN] !=
					    val)
						status |=
						    MT2063_SetReg(h,
								  MT2063_REG_DNC_GAIN,
								  val);

					val = (pInfo->reg[MT2063_REG_VGA_GAIN] & 0xFC) | 0x03;	/* Set DNC2GC=3 */
					if (pInfo->reg[MT2063_REG_VGA_GAIN] !=
					    val)
						status |=
						    MT2063_SetReg(h,
								  MT2063_REG_VGA_GAIN,
								  val);

					val = (pInfo->reg[MT2063_REG_RSVD_20] & ~0x40);	/* Set PD2MUX=0 */
					if (pInfo->reg[MT2063_REG_RSVD_20] !=
					    val)
						status |=
						    MT2063_SetReg(h,
								  MT2063_REG_RSVD_20,
								  val);

					break;
				}
			case MT2063_DNC_1:
				{
					val = (pInfo->reg[MT2063_REG_DNC_GAIN] & 0xFC) | (DNC1GC[pInfo->rcvr_mode] & 0x03);	/* Set DNC1GC=x */
					if (pInfo->reg[MT2063_REG_DNC_GAIN] !=
					    val)
						status |=
						    MT2063_SetReg(h,
								  MT2063_REG_DNC_GAIN,
								  val);

					val = (pInfo->reg[MT2063_REG_VGA_GAIN] & 0xFC) | 0x03;	/* Set DNC2GC=3 */
					if (pInfo->reg[MT2063_REG_VGA_GAIN] !=
					    val)
						status |=
						    MT2063_SetReg(h,
								  MT2063_REG_VGA_GAIN,
								  val);

					val = (pInfo->reg[MT2063_REG_RSVD_20] & ~0x40);	/* Set PD2MUX=0 */
					if (pInfo->reg[MT2063_REG_RSVD_20] !=
					    val)
						status |=
						    MT2063_SetReg(h,
								  MT2063_REG_RSVD_20,
								  val);

					break;
				}
			case MT2063_DNC_2:
				{
					val = (pInfo->reg[MT2063_REG_DNC_GAIN] & 0xFC) | 0x03;	/* Set DNC1GC=3 */
					if (pInfo->reg[MT2063_REG_DNC_GAIN] !=
					    val)
						status |=
						    MT2063_SetReg(h,
								  MT2063_REG_DNC_GAIN,
								  val);

					val = (pInfo->reg[MT2063_REG_VGA_GAIN] & 0xFC) | (DNC2GC[pInfo->rcvr_mode] & 0x03);	/* Set DNC2GC=x */
					if (pInfo->reg[MT2063_REG_VGA_GAIN] !=
					    val)
						status |=
						    MT2063_SetReg(h,
								  MT2063_REG_VGA_GAIN,
								  val);

					val = (pInfo->reg[MT2063_REG_RSVD_20] | 0x40);	/* Set PD2MUX=1 */
					if (pInfo->reg[MT2063_REG_RSVD_20] !=
					    val)
						status |=
						    MT2063_SetReg(h,
								  MT2063_REG_RSVD_20,
								  val);

					break;
				}
			case MT2063_DNC_BOTH:
				{
					val = (pInfo->reg[MT2063_REG_DNC_GAIN] & 0xFC) | (DNC1GC[pInfo->rcvr_mode] & 0x03);	/* Set DNC1GC=x */
					if (pInfo->reg[MT2063_REG_DNC_GAIN] !=
					    val)
						status |=
						    MT2063_SetReg(h,
								  MT2063_REG_DNC_GAIN,
								  val);

					val = (pInfo->reg[MT2063_REG_VGA_GAIN] & 0xFC) | (DNC2GC[pInfo->rcvr_mode] & 0x03);	/* Set DNC2GC=x */
					if (pInfo->reg[MT2063_REG_VGA_GAIN] !=
					    val)
						status |=
						    MT2063_SetReg(h,
								  MT2063_REG_VGA_GAIN,
								  val);

					val = (pInfo->reg[MT2063_REG_RSVD_20] | 0x40);	/* Set PD2MUX=1 */
					if (pInfo->reg[MT2063_REG_RSVD_20] !=
					    val)
						status |=
						    MT2063_SetReg(h,
								  MT2063_REG_RSVD_20,
								  val);

					break;
				}
			default:
				break;
			}
			break;

		case MT2063_VGAGC:
			/* Set VGA gain code */
			val =
			    (pInfo->
3572
			     reg[MT2063_REG_VGA_GAIN] & (u8) ~ 0x0C) |
3573 3574 3575 3576 3577 3578 3579 3580 3581 3582 3583 3584
			    ((nValue & 0x03) << 2);
			if (pInfo->reg[MT2063_REG_VGA_GAIN] != val) {
				status |=
				    MT2063_SetReg(pInfo, MT2063_REG_VGA_GAIN,
						  val);
			}
			break;

		case MT2063_VGAOI:
			/* Set VGA bias current */
			val =
			    (pInfo->
3585
			     reg[MT2063_REG_RSVD_31] & (u8) ~ 0x07) |
3586 3587 3588 3589 3590 3591 3592 3593 3594 3595 3596 3597
			    (nValue & 0x07);
			if (pInfo->reg[MT2063_REG_RSVD_31] != val) {
				status |=
				    MT2063_SetReg(pInfo, MT2063_REG_RSVD_31,
						  val);
			}
			break;

		case MT2063_TAGC:
			/* Set TAGC */
			val =
			    (pInfo->
3598
			     reg[MT2063_REG_RSVD_1E] & (u8) ~ 0x03) |
3599 3600 3601 3602 3603 3604 3605 3606 3607 3608 3609 3610
			    (nValue & 0x03);
			if (pInfo->reg[MT2063_REG_RSVD_1E] != val) {
				status |=
				    MT2063_SetReg(pInfo, MT2063_REG_RSVD_1E,
						  val);
			}
			break;

		case MT2063_AMPGC:
			/* Set Amp gain code */
			val =
			    (pInfo->
3611
			     reg[MT2063_REG_TEMP_SEL] & (u8) ~ 0x03) |
3612 3613 3614 3615 3616 3617 3618 3619 3620 3621 3622 3623 3624 3625 3626 3627 3628 3629 3630 3631 3632 3633 3634 3635 3636 3637 3638 3639 3640 3641 3642 3643 3644 3645 3646 3647 3648 3649 3650 3651 3652 3653 3654 3655 3656 3657
			    (nValue & 0x03);
			if (pInfo->reg[MT2063_REG_TEMP_SEL] != val) {
				status |=
				    MT2063_SetReg(pInfo, MT2063_REG_TEMP_SEL,
						  val);
			}
			break;

			/*  Avoid DECT Frequencies                */
		case MT2063_AVOID_DECT:
			{
				enum MT2063_DECT_Avoid_Type newAvoidSetting =
				    (enum MT2063_DECT_Avoid_Type)nValue;
				if ((newAvoidSetting >=
				     MT2063_NO_DECT_AVOIDANCE)
				    && (newAvoidSetting <= MT2063_AVOID_BOTH)) {
					pInfo->AS_Data.avoidDECT =
					    newAvoidSetting;
				}
			}
			break;

			/*  Cleartune filter selection: 0 - by IC (default), 1 - by software  */
		case MT2063_CTFILT_SW:
			pInfo->ctfilt_sw = (nValue & 0x01);
			break;

			/*  These parameters are read-only  */
		case MT2063_IC_ADDR:
		case MT2063_MAX_OPEN:
		case MT2063_NUM_OPEN:
		case MT2063_INPUT_FREQ:
		case MT2063_IF1_ACTUAL:
		case MT2063_IF1_CENTER:
		case MT2063_IF1_BW:
		case MT2063_AS_ALG:
		case MT2063_EXCL_ZONES:
		case MT2063_SPUR_AVOIDED:
		case MT2063_NUM_SPURS:
		case MT2063_SPUR_PRESENT:
		case MT2063_ACLNA:
		case MT2063_ACRF:
		case MT2063_ACFIF:
		case MT2063_EOP:
		default:
			status |= MT2063_ARG_RANGE;
3658
		}
3659 3660 3661 3662 3663 3664 3665 3666 3667 3668 3669 3670 3671 3672 3673 3674 3675 3676 3677 3678 3679 3680 3681 3682 3683 3684 3685 3686 3687 3688 3689
	}
	return (status);
}

/****************************************************************************
**
**  Name: MT2063_SetPowerMaskBits
**
**  Description:    Sets the power-down mask bits for various sections of
**                  the MT2063
**
**  Parameters:     h           - Tuner handle (returned by MT2063_Open)
**                  Bits        - Mask bits to be set.
**
**                  See definition of MT2063_Mask_Bits type for description
**                  of each of the power bits.
**
**  Returns:        status:
**                      MT_OK            - No errors
**                      MT_INV_HANDLE    - Invalid tuner handle
**                      MT_COMM_ERR      - Serial bus communications error
**
**  Dependencies:   USERS MUST CALL MT2063_Open() FIRST!
**
**  Revision History:
**
**   SCR      Date      Author  Description
**  -------------------------------------------------------------------------
**   138   06-19-2007    DAD    Ver 1.00: Initial, derived from mt2067_b.
**
****************************************************************************/
3690
static u32 MT2063_SetPowerMaskBits(void *h, enum MT2063_Mask_Bits Bits)
3691
{
3692
	u32 status = MT2063_OK;	/* Status to be returned        */
3693 3694 3695 3696 3697 3698 3699 3700 3701
	struct MT2063_Info_t *pInfo = (struct MT2063_Info_t *)h;

	/*  Verify that the handle passed points to a valid tuner         */
	if (MT2063_IsValidHandle(pInfo) == 0)
		status = MT2063_INV_HANDLE;
	else {
		Bits = (enum MT2063_Mask_Bits)(Bits & MT2063_ALL_SD);	/* Only valid bits for this tuner */
		if ((Bits & 0xFF00) != 0) {
			pInfo->reg[MT2063_REG_PWR_2] |=
3702
			    (u8) ((Bits & 0xFF00) >> 8);
3703 3704 3705 3706 3707 3708
			status |=
			    MT2063_WriteSub(pInfo->hUserData, pInfo->address,
					    MT2063_REG_PWR_2,
					    &pInfo->reg[MT2063_REG_PWR_2], 1);
		}
		if ((Bits & 0xFF) != 0) {
3709
			pInfo->reg[MT2063_REG_PWR_1] |= ((u8) Bits & 0xFF);
3710 3711 3712 3713 3714 3715 3716 3717 3718 3719 3720 3721 3722 3723 3724 3725 3726 3727 3728 3729 3730 3731 3732 3733 3734 3735 3736 3737 3738 3739 3740 3741 3742 3743 3744 3745 3746
			status |=
			    MT2063_WriteSub(pInfo->hUserData, pInfo->address,
					    MT2063_REG_PWR_1,
					    &pInfo->reg[MT2063_REG_PWR_1], 1);
		}
	}

	return (status);
}

/****************************************************************************
**
**  Name: MT2063_ClearPowerMaskBits
**
**  Description:    Clears the power-down mask bits for various sections of
**                  the MT2063
**
**  Parameters:     h           - Tuner handle (returned by MT2063_Open)
**                  Bits        - Mask bits to be cleared.
**
**                  See definition of MT2063_Mask_Bits type for description
**                  of each of the power bits.
**
**  Returns:        status:
**                      MT_OK            - No errors
**                      MT_INV_HANDLE    - Invalid tuner handle
**                      MT_COMM_ERR      - Serial bus communications error
**
**  Dependencies:   USERS MUST CALL MT2063_Open() FIRST!
**
**  Revision History:
**
**   SCR      Date      Author  Description
**  -------------------------------------------------------------------------
**   138   06-19-2007    DAD    Ver 1.00: Initial, derived from mt2067_b.
**
****************************************************************************/
3747
static u32 MT2063_ClearPowerMaskBits(void *h, enum MT2063_Mask_Bits Bits)
3748
{
3749
	u32 status = MT2063_OK;	/* Status to be returned        */
3750 3751 3752 3753 3754 3755 3756 3757
	struct MT2063_Info_t *pInfo = (struct MT2063_Info_t *)h;

	/*  Verify that the handle passed points to a valid tuner         */
	if (MT2063_IsValidHandle(pInfo) == 0)
		status = MT2063_INV_HANDLE;
	else {
		Bits = (enum MT2063_Mask_Bits)(Bits & MT2063_ALL_SD);	/* Only valid bits for this tuner */
		if ((Bits & 0xFF00) != 0) {
3758
			pInfo->reg[MT2063_REG_PWR_2] &= ~(u8) (Bits >> 8);
3759 3760 3761 3762 3763 3764
			status |=
			    MT2063_WriteSub(pInfo->hUserData, pInfo->address,
					    MT2063_REG_PWR_2,
					    &pInfo->reg[MT2063_REG_PWR_2], 1);
		}
		if ((Bits & 0xFF) != 0) {
3765
			pInfo->reg[MT2063_REG_PWR_1] &= ~(u8) (Bits & 0xFF);
3766 3767 3768 3769 3770 3771 3772 3773 3774 3775 3776 3777 3778 3779 3780 3781 3782 3783 3784 3785 3786 3787 3788 3789 3790 3791 3792 3793 3794 3795 3796 3797 3798 3799 3800 3801 3802
			status |=
			    MT2063_WriteSub(pInfo->hUserData, pInfo->address,
					    MT2063_REG_PWR_1,
					    &pInfo->reg[MT2063_REG_PWR_1], 1);
		}
	}

	return (status);
}

/****************************************************************************
**
**  Name: MT2063_GetPowerMaskBits
**
**  Description:    Returns a mask of the enabled power shutdown bits
**
**  Parameters:     h           - Tuner handle (returned by MT2063_Open)
**                  Bits        - Mask bits to currently set.
**
**                  See definition of MT2063_Mask_Bits type for description
**                  of each of the power bits.
**
**  Returns:        status:
**                      MT_OK            - No errors
**                      MT_INV_HANDLE    - Invalid tuner handle
**                      MT_ARG_NULL      - Output argument is NULL
**                      MT_COMM_ERR      - Serial bus communications error
**
**  Dependencies:   USERS MUST CALL MT2063_Open() FIRST!
**
**  Revision History:
**
**   SCR      Date      Author  Description
**  -------------------------------------------------------------------------
**   138   06-19-2007    DAD    Ver 1.00: Initial, derived from mt2067_b.
**
****************************************************************************/
3803
static u32 MT2063_GetPowerMaskBits(void *h, enum MT2063_Mask_Bits * Bits)
3804
{
3805
	u32 status = MT2063_OK;	/* Status to be returned        */
3806 3807 3808 3809 3810 3811 3812 3813 3814 3815 3816 3817 3818 3819 3820 3821 3822 3823
	struct MT2063_Info_t *pInfo = (struct MT2063_Info_t *)h;

	/*  Verify that the handle passed points to a valid tuner         */
	if (MT2063_IsValidHandle(pInfo) == 0)
		status = MT2063_INV_HANDLE;
	else {
		if (Bits == NULL)
			status |= MT2063_ARG_NULL;

		if (MT2063_NO_ERROR(status))
			status |=
			    MT2063_ReadSub(pInfo->hUserData, pInfo->address,
					   MT2063_REG_PWR_1,
					   &pInfo->reg[MT2063_REG_PWR_1], 2);

		if (MT2063_NO_ERROR(status)) {
			*Bits =
			    (enum
3824
			     MT2063_Mask_Bits)(((s32) pInfo->
3825 3826 3827 3828 3829 3830 3831 3832 3833 3834 3835 3836 3837 3838 3839 3840 3841 3842 3843 3844 3845 3846 3847 3848 3849 3850 3851 3852 3853 3854 3855 3856 3857
						reg[MT2063_REG_PWR_2] << 8) +
					       pInfo->reg[MT2063_REG_PWR_1]);
			*Bits = (enum MT2063_Mask_Bits)(*Bits & MT2063_ALL_SD);	/* Only valid bits for this tuner */
		}
	}

	return (status);
}

/****************************************************************************
**
**  Name: MT2063_EnableExternalShutdown
**
**  Description:    Enables or disables the operation of the external
**                  shutdown pin
**
**  Parameters:     h           - Tuner handle (returned by MT2063_Open)
**                  Enabled     - 0 = disable the pin, otherwise enable it
**
**  Returns:        status:
**                      MT_OK            - No errors
**                      MT_INV_HANDLE    - Invalid tuner handle
**                      MT_COMM_ERR      - Serial bus communications error
**
**  Dependencies:   USERS MUST CALL MT2063_Open() FIRST!
**
**  Revision History:
**
**   SCR      Date      Author  Description
**  -------------------------------------------------------------------------
**   138   06-19-2007    DAD    Ver 1.00: Initial, derived from mt2067_b.
**
****************************************************************************/
3858
static u32 MT2063_EnableExternalShutdown(void *h, u8 Enabled)
3859
{
3860
	u32 status = MT2063_OK;	/* Status to be returned        */
3861 3862 3863 3864 3865 3866 3867 3868 3869 3870 3871 3872 3873 3874 3875 3876 3877 3878 3879 3880 3881 3882 3883 3884 3885 3886 3887 3888 3889 3890 3891 3892 3893 3894 3895 3896 3897 3898 3899 3900 3901 3902 3903 3904 3905 3906 3907 3908
	struct MT2063_Info_t *pInfo = (struct MT2063_Info_t *)h;

	/*  Verify that the handle passed points to a valid tuner         */
	if (MT2063_IsValidHandle(pInfo) == 0)
		status = MT2063_INV_HANDLE;
	else {
		if (Enabled == 0)
			pInfo->reg[MT2063_REG_PWR_1] &= ~0x08;	/* Turn off the bit */
		else
			pInfo->reg[MT2063_REG_PWR_1] |= 0x08;	/* Turn the bit on */

		status |=
		    MT2063_WriteSub(pInfo->hUserData, pInfo->address,
				    MT2063_REG_PWR_1,
				    &pInfo->reg[MT2063_REG_PWR_1], 1);
	}

	return (status);
}

/****************************************************************************
**
**  Name: MT2063_SoftwareShutdown
**
**  Description:    Enables or disables software shutdown function.  When
**                  Shutdown==1, any section whose power mask is set will be
**                  shutdown.
**
**  Parameters:     h           - Tuner handle (returned by MT2063_Open)
**                  Shutdown    - 1 = shutdown the masked sections, otherwise
**                                power all sections on
**
**  Returns:        status:
**                      MT_OK            - No errors
**                      MT_INV_HANDLE    - Invalid tuner handle
**                      MT_COMM_ERR      - Serial bus communications error
**
**  Dependencies:   USERS MUST CALL MT2063_Open() FIRST!
**
**  Revision History:
**
**   SCR      Date      Author  Description
**  -------------------------------------------------------------------------
**   138   06-19-2007    DAD    Ver 1.00: Initial, derived from mt2067_b.
**         01-03-2008    PINZ   Ver 1.xx: Added a trigger of BYPATNUP for
**                              correct wakeup of the LNA
**
****************************************************************************/
3909
static u32 MT2063_SoftwareShutdown(void *h, u8 Shutdown)
3910
{
3911
	u32 status = MT2063_OK;	/* Status to be returned        */
3912 3913 3914 3915 3916 3917 3918 3919 3920 3921 3922 3923 3924 3925 3926 3927 3928 3929 3930 3931 3932 3933 3934 3935 3936 3937 3938 3939 3940 3941 3942 3943 3944 3945 3946 3947 3948 3949 3950 3951 3952 3953 3954 3955 3956 3957 3958 3959 3960 3961 3962 3963 3964 3965 3966 3967 3968 3969 3970 3971 3972 3973 3974 3975 3976 3977 3978 3979 3980
	struct MT2063_Info_t *pInfo = (struct MT2063_Info_t *)h;

	/*  Verify that the handle passed points to a valid tuner         */
	if (MT2063_IsValidHandle(pInfo) == 0) {
		status = MT2063_INV_HANDLE;
	} else {
		if (Shutdown == 1)
			pInfo->reg[MT2063_REG_PWR_1] |= 0x04;	/* Turn the bit on */
		else
			pInfo->reg[MT2063_REG_PWR_1] &= ~0x04;	/* Turn off the bit */

		status |=
		    MT2063_WriteSub(pInfo->hUserData, pInfo->address,
				    MT2063_REG_PWR_1,
				    &pInfo->reg[MT2063_REG_PWR_1], 1);

		if (Shutdown != 1) {
			pInfo->reg[MT2063_REG_BYP_CTRL] =
			    (pInfo->reg[MT2063_REG_BYP_CTRL] & 0x9F) | 0x40;
			status |=
			    MT2063_WriteSub(pInfo->hUserData, pInfo->address,
					    MT2063_REG_BYP_CTRL,
					    &pInfo->reg[MT2063_REG_BYP_CTRL],
					    1);
			pInfo->reg[MT2063_REG_BYP_CTRL] =
			    (pInfo->reg[MT2063_REG_BYP_CTRL] & 0x9F);
			status |=
			    MT2063_WriteSub(pInfo->hUserData, pInfo->address,
					    MT2063_REG_BYP_CTRL,
					    &pInfo->reg[MT2063_REG_BYP_CTRL],
					    1);
		}
	}

	return (status);
}

/****************************************************************************
**
**  Name: MT2063_SetExtSRO
**
**  Description:    Sets the external SRO driver.
**
**  Parameters:     h           - Tuner handle (returned by MT2063_Open)
**                  Ext_SRO_Setting - external SRO drive setting
**
**       (default)    MT2063_EXT_SRO_OFF  - ext driver off
**                    MT2063_EXT_SRO_BY_1 - ext driver = SRO frequency
**                    MT2063_EXT_SRO_BY_2 - ext driver = SRO/2 frequency
**                    MT2063_EXT_SRO_BY_4 - ext driver = SRO/4 frequency
**
**  Returns:        status:
**                      MT_OK            - No errors
**                      MT_COMM_ERR      - Serial bus communications error
**                      MT_INV_HANDLE    - Invalid tuner handle
**
**  Dependencies:   USERS MUST CALL MT2063_Open() FIRST!
**
**                  The Ext_SRO_Setting settings default to OFF
**                  Use this function if you need to override the default
**
**  Revision History:
**
**   SCR      Date      Author  Description
**  -------------------------------------------------------------------------
**   138   06-19-2007    DAD    Ver 1.00: Initial, derived from mt2067_b.
**   189 S 05-13-2008    RSK    Ver 1.16: Correct location for ExtSRO control.
**
****************************************************************************/
3981
static u32 MT2063_SetExtSRO(void *h, enum MT2063_Ext_SRO Ext_SRO_Setting)
3982
{
3983
	u32 status = MT2063_OK;	/* Status to be returned        */
3984 3985 3986 3987 3988 3989 3990 3991
	struct MT2063_Info_t *pInfo = (struct MT2063_Info_t *)h;

	/*  Verify that the handle passed points to a valid tuner         */
	if (MT2063_IsValidHandle(pInfo) == 0)
		status = MT2063_INV_HANDLE;
	else {
		pInfo->reg[MT2063_REG_CTRL_2C] =
		    (pInfo->
3992
		     reg[MT2063_REG_CTRL_2C] & 0x3F) | ((u8) Ext_SRO_Setting
3993 3994 3995 3996 3997 3998 3999 4000 4001 4002 4003 4004 4005 4006 4007 4008 4009 4010 4011 4012 4013 4014 4015 4016 4017 4018 4019 4020 4021 4022 4023 4024 4025 4026 4027 4028 4029 4030
							<< 6);
		status =
		    MT2063_WriteSub(pInfo->hUserData, pInfo->address,
				    MT2063_REG_CTRL_2C,
				    &pInfo->reg[MT2063_REG_CTRL_2C], 1);
	}

	return (status);
}

/****************************************************************************
**
**  Name: MT2063_SetReg
**
**  Description:    Sets an MT2063 register.
**
**  Parameters:     h           - Tuner handle (returned by MT2063_Open)
**                  reg         - MT2063 register/subaddress location
**                  val         - MT2063 register/subaddress value
**
**  Returns:        status:
**                      MT_OK            - No errors
**                      MT_COMM_ERR      - Serial bus communications error
**                      MT_INV_HANDLE    - Invalid tuner handle
**                      MT_ARG_RANGE     - Argument out of range
**
**  Dependencies:   USERS MUST CALL MT2063_Open() FIRST!
**
**                  Use this function if you need to override a default
**                  register value
**
**  Revision History:
**
**   SCR      Date      Author  Description
**  -------------------------------------------------------------------------
**   138   06-19-2007    DAD    Ver 1.00: Initial, derived from mt2067_b.
**
****************************************************************************/
4031
static u32 MT2063_SetReg(void *h, u8 reg, u8 val)
4032
{
4033
	u32 status = MT2063_OK;	/* Status to be returned        */
4034 4035 4036 4037 4038 4039 4040 4041 4042 4043 4044 4045 4046 4047 4048 4049 4050 4051 4052 4053
	struct MT2063_Info_t *pInfo = (struct MT2063_Info_t *)h;

	/*  Verify that the handle passed points to a valid tuner         */
	if (MT2063_IsValidHandle(pInfo) == 0)
		status |= MT2063_INV_HANDLE;

	if (reg >= MT2063_REG_END_REGS)
		status |= MT2063_ARG_RANGE;

	if (MT2063_NO_ERROR(status)) {
		status |=
		    MT2063_WriteSub(pInfo->hUserData, pInfo->address, reg, &val,
				    1);
		if (MT2063_NO_ERROR(status))
			pInfo->reg[reg] = val;
	}

	return (status);
}

4054
static u32 MT2063_Round_fLO(u32 f_LO, u32 f_LO_Step, u32 f_ref)
4055 4056 4057 4058 4059 4060 4061 4062 4063 4064 4065 4066 4067 4068 4069 4070 4071 4072 4073 4074 4075 4076 4077 4078 4079 4080 4081 4082 4083 4084 4085 4086 4087 4088 4089
{
	return f_ref * (f_LO / f_ref)
	    + f_LO_Step * (((f_LO % f_ref) + (f_LO_Step / 2)) / f_LO_Step);
}

/****************************************************************************
**
**  Name: fLO_FractionalTerm
**
**  Description:    Calculates the portion contributed by FracN / denom.
**
**                  This function preserves maximum precision without
**                  risk of overflow.  It accurately calculates
**                  f_ref * num / denom to within 1 HZ with fixed math.
**
**  Parameters:     num       - Fractional portion of the multiplier
**                  denom     - denominator portion of the ratio
**                              This routine successfully handles denom values
**                              up to and including 2^18.
**                  f_Ref     - SRO frequency.  This calculation handles
**                              f_ref as two separate 14-bit fields.
**                              Therefore, a maximum value of 2^28-1
**                              may safely be used for f_ref.  This is
**                              the genesis of the magic number "14" and the
**                              magic mask value of 0x03FFF.
**
**  Returns:        f_ref * num / denom
**
**  Revision History:
**
**   SCR      Date      Author  Description
**  -------------------------------------------------------------------------
**   138   06-19-2007    DAD    Ver 1.00: Initial, derived from mt2067_b.
**
****************************************************************************/
4090 4091
static u32 MT2063_fLO_FractionalTerm(u32 f_ref,
					 u32 num, u32 denom)
4092
{
4093 4094 4095 4096
	u32 t1 = (f_ref >> 14) * num;
	u32 term1 = t1 / denom;
	u32 loss = t1 % denom;
	u32 term2 =
4097 4098 4099 4100 4101 4102 4103 4104 4105 4106 4107 4108 4109 4110 4111 4112 4113 4114 4115 4116 4117 4118 4119 4120 4121 4122 4123 4124 4125 4126 4127
	    (((f_ref & 0x00003FFF) * num + (loss << 14)) + (denom / 2)) / denom;
	return ((term1 << 14) + term2);
}

/****************************************************************************
**
**  Name: CalcLO1Mult
**
**  Description:    Calculates Integer divider value and the numerator
**                  value for a FracN PLL.
**
**                  This function assumes that the f_LO and f_Ref are
**                  evenly divisible by f_LO_Step.
**
**  Parameters:     Div       - OUTPUT: Whole number portion of the multiplier
**                  FracN     - OUTPUT: Fractional portion of the multiplier
**                  f_LO      - desired LO frequency.
**                  f_LO_Step - Minimum step size for the LO (in Hz).
**                  f_Ref     - SRO frequency.
**                  f_Avoid   - Range of PLL frequencies to avoid near
**                              integer multiples of f_Ref (in Hz).
**
**  Returns:        Recalculated LO frequency.
**
**  Revision History:
**
**   SCR      Date      Author  Description
**  -------------------------------------------------------------------------
**   138   06-19-2007    DAD    Ver 1.00: Initial, derived from mt2067_b.
**
****************************************************************************/
4128 4129 4130 4131
static u32 MT2063_CalcLO1Mult(u32 * Div,
				  u32 * FracN,
				  u32 f_LO,
				  u32 f_LO_Step, u32 f_Ref)
4132 4133 4134 4135 4136 4137 4138 4139 4140 4141 4142 4143 4144 4145 4146 4147 4148 4149 4150 4151 4152 4153 4154 4155 4156 4157 4158 4159 4160 4161 4162 4163 4164 4165 4166 4167 4168 4169 4170
{
	/*  Calculate the whole number portion of the divider */
	*Div = f_LO / f_Ref;

	/*  Calculate the numerator value (round to nearest f_LO_Step) */
	*FracN =
	    (64 * (((f_LO % f_Ref) + (f_LO_Step / 2)) / f_LO_Step) +
	     (f_Ref / f_LO_Step / 2)) / (f_Ref / f_LO_Step);

	return (f_Ref * (*Div)) + MT2063_fLO_FractionalTerm(f_Ref, *FracN, 64);
}

/****************************************************************************
**
**  Name: CalcLO2Mult
**
**  Description:    Calculates Integer divider value and the numerator
**                  value for a FracN PLL.
**
**                  This function assumes that the f_LO and f_Ref are
**                  evenly divisible by f_LO_Step.
**
**  Parameters:     Div       - OUTPUT: Whole number portion of the multiplier
**                  FracN     - OUTPUT: Fractional portion of the multiplier
**                  f_LO      - desired LO frequency.
**                  f_LO_Step - Minimum step size for the LO (in Hz).
**                  f_Ref     - SRO frequency.
**                  f_Avoid   - Range of PLL frequencies to avoid near
**                              integer multiples of f_Ref (in Hz).
**
**  Returns:        Recalculated LO frequency.
**
**  Revision History:
**
**   SCR      Date      Author  Description
**  -------------------------------------------------------------------------
**   138   06-19-2007    DAD    Ver 1.00: Initial, derived from mt2067_b.
**
****************************************************************************/
4171 4172 4173 4174
static u32 MT2063_CalcLO2Mult(u32 * Div,
				  u32 * FracN,
				  u32 f_LO,
				  u32 f_LO_Step, u32 f_Ref)
4175 4176 4177 4178 4179 4180 4181 4182 4183 4184 4185 4186 4187 4188 4189 4190 4191 4192 4193 4194 4195 4196 4197 4198 4199 4200 4201 4202 4203 4204 4205 4206 4207 4208 4209
{
	/*  Calculate the whole number portion of the divider */
	*Div = f_LO / f_Ref;

	/*  Calculate the numerator value (round to nearest f_LO_Step) */
	*FracN =
	    (8191 * (((f_LO % f_Ref) + (f_LO_Step / 2)) / f_LO_Step) +
	     (f_Ref / f_LO_Step / 2)) / (f_Ref / f_LO_Step);

	return (f_Ref * (*Div)) + MT2063_fLO_FractionalTerm(f_Ref, *FracN,
							    8191);
}

/****************************************************************************
**
**  Name: FindClearTuneFilter
**
**  Description:    Calculate the corrrect ClearTune filter to be used for
**                  a given input frequency.
**
**  Parameters:     pInfo       - ptr to tuner data structure
**                  f_in        - RF input center frequency (in Hz).
**
**  Returns:        ClearTune filter number (0-31)
**
**  Dependencies:   MUST CALL MT2064_Open BEFORE FindClearTuneFilter!
**
**  Revision History:
**
**   SCR      Date      Author  Description
**  -------------------------------------------------------------------------
**         04-10-2008   PINZ    Ver 1.14: Use software-controlled ClearTune
**                                        cross-over frequency values.
**
****************************************************************************/
4210
static u32 FindClearTuneFilter(struct MT2063_Info_t *pInfo, u32 f_in)
4211
{
4212 4213
	u32 RFBand;
	u32 idx;		/*  index loop                      */
4214 4215 4216 4217 4218 4219 4220 4221 4222 4223 4224 4225 4226 4227 4228 4229 4230 4231 4232 4233 4234 4235 4236 4237 4238 4239 4240 4241 4242 4243 4244 4245 4246 4247 4248 4249 4250 4251 4252 4253 4254 4255 4256 4257 4258 4259 4260 4261 4262 4263 4264 4265 4266 4267 4268

	/*
	 **  Find RF Band setting
	 */
	RFBand = 31;		/*  def when f_in > all    */
	for (idx = 0; idx < 31; ++idx) {
		if (pInfo->CTFiltMax[idx] >= f_in) {
			RFBand = idx;
			break;
		}
	}
	return (RFBand);
}

/****************************************************************************
**
**  Name: MT2063_Tune
**
**  Description:    Change the tuner's tuned frequency to RFin.
**
**  Parameters:     h           - Open handle to the tuner (from MT2063_Open).
**                  f_in        - RF input center frequency (in Hz).
**
**  Returns:        status:
**                      MT_OK            - No errors
**                      MT_INV_HANDLE    - Invalid tuner handle
**                      MT_UPC_UNLOCK    - Upconverter PLL unlocked
**                      MT_DNC_UNLOCK    - Downconverter PLL unlocked
**                      MT_COMM_ERR      - Serial bus communications error
**                      MT_SPUR_CNT_MASK - Count of avoided LO spurs
**                      MT_SPUR_PRESENT  - LO spur possible in output
**                      MT_FIN_RANGE     - Input freq out of range
**                      MT_FOUT_RANGE    - Output freq out of range
**                      MT_UPC_RANGE     - Upconverter freq out of range
**                      MT_DNC_RANGE     - Downconverter freq out of range
**
**  Dependencies:   MUST CALL MT2063_Open BEFORE MT2063_Tune!
**
**                  MT_ReadSub       - Read data from the two-wire serial bus
**                  MT_WriteSub      - Write data to the two-wire serial bus
**                  MT_Sleep         - Delay execution for x milliseconds
**                  MT2063_GetLocked - Checks to see if LO1 and LO2 are locked
**
**  Revision History:
**
**   SCR      Date      Author  Description
**  -------------------------------------------------------------------------
**   138   06-19-2007    DAD    Ver 1.00: Initial, derived from mt2067_b.
**         04-10-2008   PINZ    Ver 1.05: Use software-controlled ClearTune
**                                        cross-over frequency values.
**   175 I 16-06-2008   PINZ    Ver 1.16: Add control to avoid US DECT freqs.
**   175 I 06-19-2008    RSK    Ver 1.17: Refactor DECT control to SpurAvoid.
**         06-24-2008    PINZ   Ver 1.18: Add Get/SetParam CTFILT_SW
**
****************************************************************************/
4269
static u32 MT2063_Tune(void *h, u32 f_in)
4270 4271 4272
{				/* RF input center frequency   */
	struct MT2063_Info_t *pInfo = (struct MT2063_Info_t *)h;

4273 4274 4275 4276 4277 4278 4279 4280 4281 4282 4283 4284 4285 4286
	u32 status = MT2063_OK;	/*  status of operation             */
	u32 LO1;		/*  1st LO register value           */
	u32 Num1;		/*  Numerator for LO1 reg. value    */
	u32 f_IF1;		/*  1st IF requested                */
	u32 LO2;		/*  2nd LO register value           */
	u32 Num2;		/*  Numerator for LO2 reg. value    */
	u32 ofLO1, ofLO2;	/*  last time's LO frequencies      */
	u32 ofin, ofout;	/*  last time's I/O frequencies     */
	u8 fiffc = 0x80;	/*  FIFF center freq from tuner     */
	u32 fiffof;		/*  Offset from FIFF center freq    */
	const u8 LO1LK = 0x80;	/*  Mask for LO1 Lock bit           */
	u8 LO2LK = 0x08;	/*  Mask for LO2 Lock bit           */
	u8 val;
	u32 RFBand;
4287 4288 4289 4290 4291 4292 4293 4294 4295 4296 4297 4298 4299 4300 4301 4302 4303 4304 4305 4306 4307 4308 4309 4310 4311 4312 4313 4314 4315 4316 4317 4318 4319

	/*  Verify that the handle passed points to a valid tuner         */
	if (MT2063_IsValidHandle(pInfo) == 0)
		return MT2063_INV_HANDLE;

	/*  Check the input and output frequency ranges                   */
	if ((f_in < MT2063_MIN_FIN_FREQ) || (f_in > MT2063_MAX_FIN_FREQ))
		status |= MT2063_FIN_RANGE;

	if ((pInfo->AS_Data.f_out < MT2063_MIN_FOUT_FREQ)
	    || (pInfo->AS_Data.f_out > MT2063_MAX_FOUT_FREQ))
		status |= MT2063_FOUT_RANGE;

	/*
	 **  Save original LO1 and LO2 register values
	 */
	ofLO1 = pInfo->AS_Data.f_LO1;
	ofLO2 = pInfo->AS_Data.f_LO2;
	ofin = pInfo->AS_Data.f_in;
	ofout = pInfo->AS_Data.f_out;

	/*
	 **  Find and set RF Band setting
	 */
	if (pInfo->ctfilt_sw == 1) {
		val = (pInfo->reg[MT2063_REG_CTUNE_CTRL] | 0x08);
		if (pInfo->reg[MT2063_REG_CTUNE_CTRL] != val) {
			status |=
			    MT2063_SetReg(pInfo, MT2063_REG_CTUNE_CTRL, val);
		}
		val = pInfo->reg[MT2063_REG_CTUNE_OV];
		RFBand = FindClearTuneFilter(pInfo, f_in);
		pInfo->reg[MT2063_REG_CTUNE_OV] =
4320
		    (u8) ((pInfo->reg[MT2063_REG_CTUNE_OV] & ~0x1F)
4321 4322 4323 4324 4325 4326 4327 4328 4329 4330 4331 4332 4333 4334 4335 4336 4337 4338 4339 4340 4341 4342 4343 4344 4345 4346 4347 4348 4349 4350 4351 4352 4353 4354 4355 4356 4357 4358 4359 4360 4361 4362 4363 4364 4365 4366 4367 4368 4369 4370 4371 4372 4373 4374 4375 4376 4377 4378 4379 4380 4381 4382 4383 4384 4385 4386 4387 4388 4389 4390 4391 4392 4393 4394 4395 4396 4397 4398 4399 4400 4401 4402 4403 4404 4405 4406 4407 4408 4409 4410 4411 4412 4413
			      | RFBand);
		if (pInfo->reg[MT2063_REG_CTUNE_OV] != val) {
			status |=
			    MT2063_SetReg(pInfo, MT2063_REG_CTUNE_OV, val);
		}
	}

	/*
	 **  Read the FIFF Center Frequency from the tuner
	 */
	if (MT2063_NO_ERROR(status)) {
		status |=
		    MT2063_ReadSub(pInfo->hUserData, pInfo->address,
				   MT2063_REG_FIFFC,
				   &pInfo->reg[MT2063_REG_FIFFC], 1);
		fiffc = pInfo->reg[MT2063_REG_FIFFC];
	}
	/*
	 **  Assign in the requested values
	 */
	pInfo->AS_Data.f_in = f_in;
	/*  Request a 1st IF such that LO1 is on a step size */
	pInfo->AS_Data.f_if1_Request =
	    MT2063_Round_fLO(pInfo->AS_Data.f_if1_Request + f_in,
			     pInfo->AS_Data.f_LO1_Step,
			     pInfo->AS_Data.f_ref) - f_in;

	/*
	 **  Calculate frequency settings.  f_IF1_FREQ + f_in is the
	 **  desired LO1 frequency
	 */
	MT2063_ResetExclZones(&pInfo->AS_Data);

	f_IF1 = MT2063_ChooseFirstIF(&pInfo->AS_Data);

	pInfo->AS_Data.f_LO1 =
	    MT2063_Round_fLO(f_IF1 + f_in, pInfo->AS_Data.f_LO1_Step,
			     pInfo->AS_Data.f_ref);

	pInfo->AS_Data.f_LO2 =
	    MT2063_Round_fLO(pInfo->AS_Data.f_LO1 - pInfo->AS_Data.f_out - f_in,
			     pInfo->AS_Data.f_LO2_Step, pInfo->AS_Data.f_ref);

	/*
	 ** Check for any LO spurs in the output bandwidth and adjust
	 ** the LO settings to avoid them if needed
	 */
	status |= MT2063_AvoidSpurs(h, &pInfo->AS_Data);
	/*
	 ** MT_AvoidSpurs spurs may have changed the LO1 & LO2 values.
	 ** Recalculate the LO frequencies and the values to be placed
	 ** in the tuning registers.
	 */
	pInfo->AS_Data.f_LO1 =
	    MT2063_CalcLO1Mult(&LO1, &Num1, pInfo->AS_Data.f_LO1,
			       pInfo->AS_Data.f_LO1_Step, pInfo->AS_Data.f_ref);
	pInfo->AS_Data.f_LO2 =
	    MT2063_Round_fLO(pInfo->AS_Data.f_LO1 - pInfo->AS_Data.f_out - f_in,
			     pInfo->AS_Data.f_LO2_Step, pInfo->AS_Data.f_ref);
	pInfo->AS_Data.f_LO2 =
	    MT2063_CalcLO2Mult(&LO2, &Num2, pInfo->AS_Data.f_LO2,
			       pInfo->AS_Data.f_LO2_Step, pInfo->AS_Data.f_ref);

	/*
	 **  Check the upconverter and downconverter frequency ranges
	 */
	if ((pInfo->AS_Data.f_LO1 < MT2063_MIN_UPC_FREQ)
	    || (pInfo->AS_Data.f_LO1 > MT2063_MAX_UPC_FREQ))
		status |= MT2063_UPC_RANGE;
	if ((pInfo->AS_Data.f_LO2 < MT2063_MIN_DNC_FREQ)
	    || (pInfo->AS_Data.f_LO2 > MT2063_MAX_DNC_FREQ))
		status |= MT2063_DNC_RANGE;
	/*  LO2 Lock bit was in a different place for B0 version  */
	if (pInfo->tuner_id == MT2063_B0)
		LO2LK = 0x40;

	/*
	 **  If we have the same LO frequencies and we're already locked,
	 **  then skip re-programming the LO registers.
	 */
	if ((ofLO1 != pInfo->AS_Data.f_LO1)
	    || (ofLO2 != pInfo->AS_Data.f_LO2)
	    || ((pInfo->reg[MT2063_REG_LO_STATUS] & (LO1LK | LO2LK)) !=
		(LO1LK | LO2LK))) {
		/*
		 **  Calculate the FIFFOF register value
		 **
		 **            IF1_Actual
		 **  FIFFOF = ------------ - 8 * FIFFC - 4992
		 **             f_ref/64
		 */
		fiffof =
		    (pInfo->AS_Data.f_LO1 -
4414
		     f_in) / (pInfo->AS_Data.f_ref / 64) - 8 * (u32) fiffc -
4415 4416 4417 4418 4419 4420 4421 4422 4423
		    4992;
		if (fiffof > 0xFF)
			fiffof = 0xFF;

		/*
		 **  Place all of the calculated values into the local tuner
		 **  register fields.
		 */
		if (MT2063_NO_ERROR(status)) {
4424 4425 4426
			pInfo->reg[MT2063_REG_LO1CQ_1] = (u8) (LO1 & 0xFF);	/* DIV1q */
			pInfo->reg[MT2063_REG_LO1CQ_2] = (u8) (Num1 & 0x3F);	/* NUM1q */
			pInfo->reg[MT2063_REG_LO2CQ_1] = (u8) (((LO2 & 0x7F) << 1)	/* DIV2q */
4427
								   |(Num2 >> 12));	/* NUM2q (hi) */
4428 4429
			pInfo->reg[MT2063_REG_LO2CQ_2] = (u8) ((Num2 & 0x0FF0) >> 4);	/* NUM2q (mid) */
			pInfo->reg[MT2063_REG_LO2CQ_3] = (u8) (0xE0 | (Num2 & 0x000F));	/* NUM2q (lo) */
4430 4431 4432 4433 4434 4435 4436 4437 4438 4439 4440 4441 4442

			/*
			 ** Now write out the computed register values
			 ** IMPORTANT: There is a required order for writing
			 **            (0x05 must follow all the others).
			 */
			status |= MT2063_WriteSub(pInfo->hUserData, pInfo->address, MT2063_REG_LO1CQ_1, &pInfo->reg[MT2063_REG_LO1CQ_1], 5);	/* 0x01 - 0x05 */
			if (pInfo->tuner_id == MT2063_B0) {
				/* Re-write the one-shot bits to trigger the tune operation */
				status |= MT2063_WriteSub(pInfo->hUserData, pInfo->address, MT2063_REG_LO2CQ_3, &pInfo->reg[MT2063_REG_LO2CQ_3], 1);	/* 0x05 */
			}
			/* Write out the FIFF offset only if it's changing */
			if (pInfo->reg[MT2063_REG_FIFF_OFFSET] !=
4443
			    (u8) fiffof) {
4444
				pInfo->reg[MT2063_REG_FIFF_OFFSET] =
4445
				    (u8) fiffof;
4446 4447 4448 4449 4450 4451 4452 4453 4454 4455 4456 4457 4458 4459 4460 4461 4462 4463 4464 4465 4466 4467 4468 4469 4470 4471 4472 4473
				status |=
				    MT2063_WriteSub(pInfo->hUserData,
						    pInfo->address,
						    MT2063_REG_FIFF_OFFSET,
						    &pInfo->
						    reg[MT2063_REG_FIFF_OFFSET],
						    1);
			}
		}

		/*
		 **  Check for LO's locking
		 */

		if (MT2063_NO_ERROR(status)) {
			status |= MT2063_GetLocked(h);
		}
		/*
		 **  If we locked OK, assign calculated data to MT2063_Info_t structure
		 */
		if (MT2063_NO_ERROR(status)) {
			pInfo->f_IF1_actual = pInfo->AS_Data.f_LO1 - f_in;
		}
	}

	return (status);
}

4474
static u32 MT_Tune_atv(void *h, u32 f_in, u32 bw_in,
4475 4476 4477
		    enum MTTune_atv_standard tv_type)
{

4478
	u32 status = MT2063_OK;
4479 4480 4481 4482
	struct MT2063_Info_t *pInfo = (struct MT2063_Info_t *)h;
	struct dvb_frontend *fe = (struct dvb_frontend *)pInfo->hUserData;
	struct mt2063_state *state = fe->tuner_priv;

4483 4484 4485 4486 4487 4488
	s32 pict_car = 0;
	s32 pict2chanb_vsb = 0;
	s32 pict2chanb_snd = 0;
	s32 pict2snd1 = 0;
	s32 pict2snd2 = 0;
	s32 ch_bw = 0;
4489

4490 4491 4492
	s32 if_mid = 0;
	s32 rcvr_mode = 0;
	u32 mode_get = 0;
4493 4494 4495 4496 4497 4498 4499 4500 4501 4502 4503 4504 4505 4506 4507 4508 4509 4510 4511 4512 4513 4514 4515 4516 4517 4518 4519 4520 4521 4522 4523 4524 4525 4526 4527 4528 4529 4530 4531 4532 4533 4534 4535 4536 4537 4538 4539 4540 4541 4542 4543 4544 4545 4546 4547 4548 4549 4550 4551 4552 4553 4554 4555 4556 4557 4558 4559 4560 4561 4562 4563 4564 4565 4566 4567 4568 4569 4570 4571 4572 4573 4574 4575 4576 4577 4578 4579 4580 4581 4582 4583 4584 4585 4586 4587 4588 4589 4590 4591 4592 4593 4594 4595 4596 4597 4598 4599 4600 4601 4602 4603

	switch (tv_type) {
	case MTTUNEA_PAL_B:{
			pict_car = 38900000;
			ch_bw = 8000000;
			pict2chanb_vsb = -1250000;
			pict2snd1 = 5500000;
			pict2snd2 = 5742000;
			rcvr_mode = 1;
			break;
		}
	case MTTUNEA_PAL_G:{
			pict_car = 38900000;
			ch_bw = 7000000;
			pict2chanb_vsb = -1250000;
			pict2snd1 = 5500000;
			pict2snd2 = 0;
			rcvr_mode = 1;
			break;
		}
	case MTTUNEA_PAL_I:{
			pict_car = 38900000;
			ch_bw = 8000000;
			pict2chanb_vsb = -1250000;
			pict2snd1 = 6000000;
			pict2snd2 = 0;
			rcvr_mode = 1;
			break;
		}
	case MTTUNEA_PAL_L:{
			pict_car = 38900000;
			ch_bw = 8000000;
			pict2chanb_vsb = -1250000;
			pict2snd1 = 6500000;
			pict2snd2 = 0;
			rcvr_mode = 1;
			break;
		}
	case MTTUNEA_PAL_MN:{
			pict_car = 38900000;
			ch_bw = 6000000;
			pict2chanb_vsb = -1250000;
			pict2snd1 = 4500000;
			pict2snd2 = 0;
			rcvr_mode = 1;
			break;
		}
	case MTTUNEA_PAL_DK:{
			pict_car = 38900000;
			ch_bw = 8000000;
			pict2chanb_vsb = -1250000;
			pict2snd1 = 6500000;
			pict2snd2 = 0;
			rcvr_mode = 1;
			break;
		}
	case MTTUNEA_DIGITAL:{
			pict_car = 36125000;
			ch_bw = 8000000;
			pict2chanb_vsb = -(ch_bw / 2);
			pict2snd1 = 0;
			pict2snd2 = 0;
			rcvr_mode = 2;
			break;
		}
	case MTTUNEA_FMRADIO:{
			pict_car = 38900000;
			ch_bw = 8000000;
			pict2chanb_vsb = -(ch_bw / 2);
			pict2snd1 = 0;
			pict2snd2 = 0;
			rcvr_mode = 4;
			//f_in -= 2900000;
			break;
		}
	case MTTUNEA_DVBC:{
			pict_car = 36125000;
			ch_bw = 8000000;
			pict2chanb_vsb = -(ch_bw / 2);
			pict2snd1 = 0;
			pict2snd2 = 0;
			rcvr_mode = MT2063_CABLE_QAM;
			break;
		}
	case MTTUNEA_DVBT:{
			pict_car = 36125000;
			ch_bw = bw_in;	//8000000
			pict2chanb_vsb = -(ch_bw / 2);
			pict2snd1 = 0;
			pict2snd2 = 0;
			rcvr_mode = MT2063_OFFAIR_COFDM;
			break;
		}
	case MTTUNEA_UNKNOWN:
		break;
	default:
		break;
	}

	pict2chanb_snd = pict2chanb_vsb - ch_bw;
	if_mid = pict_car - (pict2chanb_vsb + (ch_bw / 2));

	status |= MT2063_SetParam(h, MT2063_STEPSIZE, 125000);
	status |= MT2063_SetParam(h, MT2063_OUTPUT_FREQ, if_mid);
	status |= MT2063_SetParam(h, MT2063_OUTPUT_BW, ch_bw);
	status |= MT2063_GetParam(h, MT2063_RCVR_MODE, &mode_get);

	status |= MT2063_SetParam(h, MT2063_RCVR_MODE, rcvr_mode);
	status |= MT2063_Tune(h, (f_in + (pict2chanb_vsb + (ch_bw / 2))));
	status |= MT2063_GetParam(h, MT2063_RCVR_MODE, &mode_get);

4604
	return (u32) status;
4605 4606 4607 4608
}

static int mt2063_init(struct dvb_frontend *fe)
{
4609
	u32 status = MT2063_ERROR;
4610 4611 4612 4613 4614 4615 4616 4617 4618 4619 4620 4621 4622 4623 4624 4625
	struct mt2063_state *state = fe->tuner_priv;

	status = MT2063_Open(0xC0, &(state->MT2063_ht), fe);
	status |= MT2063_SoftwareShutdown(state->MT2063_ht, 1);
	status |= MT2063_ClearPowerMaskBits(state->MT2063_ht, MT2063_ALL_SD);

	if (MT2063_OK != status) {
		printk("%s %d error status = 0x%x!!\n", __func__, __LINE__,
		       status);
		return -1;
	}

	return 0;
}

static int mt2063_get_status(struct dvb_frontend *fe, u32 * status)
4626
{
4627 4628 4629 4630 4631
	int rc = 0;

	//get tuner lock status

	return rc;
4632
}
4633 4634 4635 4636 4637 4638

static int mt2063_get_state(struct dvb_frontend *fe,
			    enum tuner_param param, struct tuner_state *state)
{
	struct mt2063_state *mt2063State = fe->tuner_priv;

4639 4640
	switch (param) {
	case DVBFE_TUNER_FREQUENCY:
4641
		//get frequency
4642 4643 4644 4645 4646 4647
		break;
	case DVBFE_TUNER_TUNERSTEP:
		break;
	case DVBFE_TUNER_IFFREQ:
		break;
	case DVBFE_TUNER_BANDWIDTH:
4648
		//get bandwidth
4649
		break;
4650 4651
	case DVBFE_TUNER_REFCLOCK:
		state->refclock =
4652 4653
		    (u32)
		    MT2063_GetLocked((void *) (mt2063State->MT2063_ht));
4654 4655 4656 4657 4658
		break;
	default:
		break;
	}

4659 4660 4661 4662 4663
	return (int)state->refclock;
}

static int mt2063_set_state(struct dvb_frontend *fe,
			    enum tuner_param param, struct tuner_state *state)
4664
{
4665
	struct mt2063_state *mt2063State = fe->tuner_priv;
4666
	u32 status = MT2063_OK;
4667

4668 4669
	switch (param) {
	case DVBFE_TUNER_FREQUENCY:
4670 4671 4672
		//set frequency

		status =
4673
		    MT_Tune_atv((void *) (mt2063State->MT2063_ht),
4674 4675 4676 4677
				state->frequency, state->bandwidth,
				mt2063State->tv_type);

		mt2063State->frequency = state->frequency;
4678 4679 4680 4681 4682 4683
		break;
	case DVBFE_TUNER_TUNERSTEP:
		break;
	case DVBFE_TUNER_IFFREQ:
		break;
	case DVBFE_TUNER_BANDWIDTH:
4684 4685 4686 4687 4688 4689 4690 4691 4692 4693 4694 4695 4696 4697 4698 4699
		//set bandwidth
		mt2063State->bandwidth = state->bandwidth;
		break;
	case DVBFE_TUNER_REFCLOCK:

		break;
	case DVBFE_TUNER_OPEN:
		status = MT2063_Open(MT2063_I2C, &(mt2063State->MT2063_ht), fe);
		break;
	case DVBFE_TUNER_SOFTWARE_SHUTDOWN:
		status = MT2063_SoftwareShutdown(mt2063State->MT2063_ht, 1);
		break;
	case DVBFE_TUNER_CLEAR_POWER_MASKBITS:
		status =
		    MT2063_ClearPowerMaskBits(mt2063State->MT2063_ht,
					      MT2063_ALL_SD);
4700 4701 4702 4703 4704
		break;
	default:
		break;
	}

4705 4706 4707 4708
	return (int)status;
}

static int mt2063_release(struct dvb_frontend *fe)
4709
{
4710
	struct mt2063_state *state = fe->tuner_priv;
4711 4712 4713 4714 4715

	fe->tuner_priv = NULL;
	kfree(state);

	return 0;
4716 4717 4718
}

static struct dvb_tuner_ops mt2063_ops = {
4719
	.info = {
4720 4721 4722 4723 4724 4725 4726
		 .name = "MT2063 Silicon Tuner",
		 .frequency_min = 45000000,
		 .frequency_max = 850000000,
		 .frequency_step = 0,
		 },

	.init = mt2063_init,
4727
	.sleep = MT2063_Sleep,
4728 4729 4730 4731
	.get_status = mt2063_get_status,
	.get_state = mt2063_get_state,
	.set_state = mt2063_set_state,
	.release = mt2063_release
4732 4733
};

4734 4735 4736
struct dvb_frontend *mt2063_attach(struct dvb_frontend *fe,
				   struct mt2063_config *config,
				   struct i2c_adapter *i2c)
4737
{
4738
	struct mt2063_state *state = NULL;
4739

4740
	state = kzalloc(sizeof(struct mt2063_state), GFP_KERNEL);
4741 4742 4743
	if (state == NULL)
		goto error;

4744 4745 4746 4747
	state->config = config;
	state->i2c = i2c;
	state->frontend = fe;
	state->reference = config->refclock / 1000;	/* kHz */
4748
	state->MT2063_init = false;
4749 4750
	fe->tuner_priv = state;
	fe->ops.tuner_ops = mt2063_ops;
4751

4752
	printk("%s: Attaching MT2063 \n", __func__);
4753 4754 4755 4756 4757 4758 4759
	return fe;

error:
	kfree(state);
	return NULL;
}

4760
EXPORT_SYMBOL(mt2063_attach);
4761 4762
MODULE_PARM_DESC(verbose, "Set Verbosity level");

4763 4764 4765
MODULE_AUTHOR("Henry");
MODULE_DESCRIPTION("MT2063 Silicon tuner");
MODULE_LICENSE("GPL");