intel_panel.c 56.8 KB
Newer Older
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30
/*
 * Copyright © 2006-2010 Intel Corporation
 * Copyright (c) 2006 Dave Airlie <airlied@linux.ie>
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
 * to deal in the Software without restriction, including without limitation
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 * and/or sell copies of the Software, and to permit persons to whom the
 * Software is furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice (including the next
 * paragraph) shall be included in all copies or substantial portions of the
 * Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
 * DEALINGS IN THE SOFTWARE.
 *
 * Authors:
 *	Eric Anholt <eric@anholt.net>
 *      Dave Airlie <airlied@linux.ie>
 *      Jesse Barnes <jesse.barnes@intel.com>
 *      Chris Wilson <chris@chris-wilson.co.uk>
 */

31 32
#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt

33
#include <linux/kernel.h>
34
#include <linux/moduleparam.h>
35
#include <linux/pwm.h>
36 37
#include "intel_drv.h"

38 39
#define CRC_PMIC_PWM_PERIOD_NS	21333

40
void
41
intel_fixed_panel_mode(const struct drm_display_mode *fixed_mode,
42 43
		       struct drm_display_mode *adjusted_mode)
{
44
	drm_mode_copy(adjusted_mode, fixed_mode);
45 46

	drm_mode_set_crtcinfo(adjusted_mode, 0);
47 48
}

J
Jani Nikula 已提交
49 50
/**
 * intel_find_panel_downclock - find the reduced downclock for LVDS in EDID
51
 * @dev_priv: i915 device instance
J
Jani Nikula 已提交
52 53 54 55 56 57 58
 * @fixed_mode : panel native mode
 * @connector: LVDS/eDP connector
 *
 * Return downclock_avail
 * Find the reduced downclock for LVDS/eDP in EDID.
 */
struct drm_display_mode *
59
intel_find_panel_downclock(struct drm_i915_private *dev_priv,
J
Jani Nikula 已提交
60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96
			struct drm_display_mode *fixed_mode,
			struct drm_connector *connector)
{
	struct drm_display_mode *scan, *tmp_mode;
	int temp_downclock;

	temp_downclock = fixed_mode->clock;
	tmp_mode = NULL;

	list_for_each_entry(scan, &connector->probed_modes, head) {
		/*
		 * If one mode has the same resolution with the fixed_panel
		 * mode while they have the different refresh rate, it means
		 * that the reduced downclock is found. In such
		 * case we can set the different FPx0/1 to dynamically select
		 * between low and high frequency.
		 */
		if (scan->hdisplay == fixed_mode->hdisplay &&
		    scan->hsync_start == fixed_mode->hsync_start &&
		    scan->hsync_end == fixed_mode->hsync_end &&
		    scan->htotal == fixed_mode->htotal &&
		    scan->vdisplay == fixed_mode->vdisplay &&
		    scan->vsync_start == fixed_mode->vsync_start &&
		    scan->vsync_end == fixed_mode->vsync_end &&
		    scan->vtotal == fixed_mode->vtotal) {
			if (scan->clock < temp_downclock) {
				/*
				 * The downclock is already found. But we
				 * expect to find the lower downclock.
				 */
				temp_downclock = scan->clock;
				tmp_mode = scan;
			}
		}
	}

	if (temp_downclock < fixed_mode->clock)
97
		return drm_mode_duplicate(&dev_priv->drm, tmp_mode);
J
Jani Nikula 已提交
98 99 100 101
	else
		return NULL;
}

102 103
/* adjusted_mode has been preset to be the panel's fixed mode */
void
104
intel_pch_panel_fitting(struct intel_crtc *intel_crtc,
105
			struct intel_crtc_state *pipe_config,
106
			int fitting_mode)
107
{
108 109
	const struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode;
	int x = 0, y = 0, width = 0, height = 0;
110 111

	/* Native modes don't need fitting */
112 113
	if (adjusted_mode->crtc_hdisplay == pipe_config->pipe_src_w &&
	    adjusted_mode->crtc_vdisplay == pipe_config->pipe_src_h)
114 115 116 117
		goto done;

	switch (fitting_mode) {
	case DRM_MODE_SCALE_CENTER:
118 119
		width = pipe_config->pipe_src_w;
		height = pipe_config->pipe_src_h;
120 121
		x = (adjusted_mode->crtc_hdisplay - width + 1)/2;
		y = (adjusted_mode->crtc_vdisplay - height + 1)/2;
122 123 124 125 126
		break;

	case DRM_MODE_SCALE_ASPECT:
		/* Scale but preserve the aspect ratio */
		{
127
			u32 scaled_width = adjusted_mode->crtc_hdisplay
128 129
				* pipe_config->pipe_src_h;
			u32 scaled_height = pipe_config->pipe_src_w
130
				* adjusted_mode->crtc_vdisplay;
131
			if (scaled_width > scaled_height) { /* pillar */
132
				width = scaled_height / pipe_config->pipe_src_h;
133
				if (width & 1)
134
					width++;
135
				x = (adjusted_mode->crtc_hdisplay - width + 1) / 2;
136
				y = 0;
137
				height = adjusted_mode->crtc_vdisplay;
138
			} else if (scaled_width < scaled_height) { /* letter */
139
				height = scaled_width / pipe_config->pipe_src_w;
140 141
				if (height & 1)
				    height++;
142
				y = (adjusted_mode->crtc_vdisplay - height + 1) / 2;
143
				x = 0;
144
				width = adjusted_mode->crtc_hdisplay;
145 146
			} else {
				x = y = 0;
147 148
				width = adjusted_mode->crtc_hdisplay;
				height = adjusted_mode->crtc_vdisplay;
149 150 151 152 153 154
			}
		}
		break;

	case DRM_MODE_SCALE_FULLSCREEN:
		x = y = 0;
155 156
		width = adjusted_mode->crtc_hdisplay;
		height = adjusted_mode->crtc_vdisplay;
157
		break;
158 159 160 161

	default:
		WARN(1, "bad panel fit mode: %d\n", fitting_mode);
		return;
162 163 164
	}

done:
165 166
	pipe_config->pch_pfit.pos = (x << 16) | y;
	pipe_config->pch_pfit.size = (width << 16) | height;
167
	pipe_config->pch_pfit.enabled = pipe_config->pch_pfit.size != 0;
168
}
169

170
static void
171
centre_horizontally(struct drm_display_mode *adjusted_mode,
172 173 174 175 176
		    int width)
{
	u32 border, sync_pos, blank_width, sync_width;

	/* keep the hsync and hblank widths constant */
177 178
	sync_width = adjusted_mode->crtc_hsync_end - adjusted_mode->crtc_hsync_start;
	blank_width = adjusted_mode->crtc_hblank_end - adjusted_mode->crtc_hblank_start;
179 180
	sync_pos = (blank_width - sync_width + 1) / 2;

181
	border = (adjusted_mode->crtc_hdisplay - width + 1) / 2;
182 183
	border += border & 1; /* make the border even */

184 185 186
	adjusted_mode->crtc_hdisplay = width;
	adjusted_mode->crtc_hblank_start = width + border;
	adjusted_mode->crtc_hblank_end = adjusted_mode->crtc_hblank_start + blank_width;
187

188 189
	adjusted_mode->crtc_hsync_start = adjusted_mode->crtc_hblank_start + sync_pos;
	adjusted_mode->crtc_hsync_end = adjusted_mode->crtc_hsync_start + sync_width;
190 191 192
}

static void
193
centre_vertically(struct drm_display_mode *adjusted_mode,
194 195 196 197 198
		  int height)
{
	u32 border, sync_pos, blank_width, sync_width;

	/* keep the vsync and vblank widths constant */
199 200
	sync_width = adjusted_mode->crtc_vsync_end - adjusted_mode->crtc_vsync_start;
	blank_width = adjusted_mode->crtc_vblank_end - adjusted_mode->crtc_vblank_start;
201 202
	sync_pos = (blank_width - sync_width + 1) / 2;

203
	border = (adjusted_mode->crtc_vdisplay - height + 1) / 2;
204

205 206 207
	adjusted_mode->crtc_vdisplay = height;
	adjusted_mode->crtc_vblank_start = height + border;
	adjusted_mode->crtc_vblank_end = adjusted_mode->crtc_vblank_start + blank_width;
208

209 210
	adjusted_mode->crtc_vsync_start = adjusted_mode->crtc_vblank_start + sync_pos;
	adjusted_mode->crtc_vsync_end = adjusted_mode->crtc_vsync_start + sync_width;
211 212 213 214 215 216 217 218 219 220 221 222 223 224 225
}

static inline u32 panel_fitter_scaling(u32 source, u32 target)
{
	/*
	 * Floating point operation is not supported. So the FACTOR
	 * is defined, which can avoid the floating point computation
	 * when calculating the panel ratio.
	 */
#define ACCURACY 12
#define FACTOR (1 << ACCURACY)
	u32 ratio = source * FACTOR / target;
	return (FACTOR * ratio + FACTOR/2) / FACTOR;
}

226
static void i965_scale_aspect(struct intel_crtc_state *pipe_config,
227 228
			      u32 *pfit_control)
{
229
	const struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode;
230
	u32 scaled_width = adjusted_mode->crtc_hdisplay *
231 232
		pipe_config->pipe_src_h;
	u32 scaled_height = pipe_config->pipe_src_w *
233
		adjusted_mode->crtc_vdisplay;
234 235 236 237 238 239 240 241

	/* 965+ is easy, it does everything in hw */
	if (scaled_width > scaled_height)
		*pfit_control |= PFIT_ENABLE |
			PFIT_SCALING_PILLAR;
	else if (scaled_width < scaled_height)
		*pfit_control |= PFIT_ENABLE |
			PFIT_SCALING_LETTER;
242
	else if (adjusted_mode->crtc_hdisplay != pipe_config->pipe_src_w)
243 244 245
		*pfit_control |= PFIT_ENABLE | PFIT_SCALING_AUTO;
}

246
static void i9xx_scale_aspect(struct intel_crtc_state *pipe_config,
247 248 249
			      u32 *pfit_control, u32 *pfit_pgm_ratios,
			      u32 *border)
{
250
	struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode;
251
	u32 scaled_width = adjusted_mode->crtc_hdisplay *
252 253
		pipe_config->pipe_src_h;
	u32 scaled_height = pipe_config->pipe_src_w *
254
		adjusted_mode->crtc_vdisplay;
255 256 257 258 259 260 261 262 263 264 265 266 267
	u32 bits;

	/*
	 * For earlier chips we have to calculate the scaling
	 * ratio by hand and program it into the
	 * PFIT_PGM_RATIO register
	 */
	if (scaled_width > scaled_height) { /* pillar */
		centre_horizontally(adjusted_mode,
				    scaled_height /
				    pipe_config->pipe_src_h);

		*border = LVDS_BORDER_ENABLE;
268
		if (pipe_config->pipe_src_h != adjusted_mode->crtc_vdisplay) {
269
			bits = panel_fitter_scaling(pipe_config->pipe_src_h,
270
						    adjusted_mode->crtc_vdisplay);
271 272 273 274 275 276 277 278 279 280 281 282 283

			*pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT |
					     bits << PFIT_VERT_SCALE_SHIFT);
			*pfit_control |= (PFIT_ENABLE |
					  VERT_INTERP_BILINEAR |
					  HORIZ_INTERP_BILINEAR);
		}
	} else if (scaled_width < scaled_height) { /* letter */
		centre_vertically(adjusted_mode,
				  scaled_width /
				  pipe_config->pipe_src_w);

		*border = LVDS_BORDER_ENABLE;
284
		if (pipe_config->pipe_src_w != adjusted_mode->crtc_hdisplay) {
285
			bits = panel_fitter_scaling(pipe_config->pipe_src_w,
286
						    adjusted_mode->crtc_hdisplay);
287 288 289 290 291 292 293 294 295 296 297 298 299 300 301 302

			*pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT |
					     bits << PFIT_VERT_SCALE_SHIFT);
			*pfit_control |= (PFIT_ENABLE |
					  VERT_INTERP_BILINEAR |
					  HORIZ_INTERP_BILINEAR);
		}
	} else {
		/* Aspects match, Let hw scale both directions */
		*pfit_control |= (PFIT_ENABLE |
				  VERT_AUTO_SCALE | HORIZ_AUTO_SCALE |
				  VERT_INTERP_BILINEAR |
				  HORIZ_INTERP_BILINEAR);
	}
}

303
void intel_gmch_panel_fitting(struct intel_crtc *intel_crtc,
304
			      struct intel_crtc_state *pipe_config,
305 306
			      int fitting_mode)
{
307
	struct drm_i915_private *dev_priv = to_i915(intel_crtc->base.dev);
308
	u32 pfit_control = 0, pfit_pgm_ratios = 0, border = 0;
309
	struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode;
310 311

	/* Native modes don't need fitting */
312 313
	if (adjusted_mode->crtc_hdisplay == pipe_config->pipe_src_w &&
	    adjusted_mode->crtc_vdisplay == pipe_config->pipe_src_h)
314 315 316 317 318 319 320 321
		goto out;

	switch (fitting_mode) {
	case DRM_MODE_SCALE_CENTER:
		/*
		 * For centered modes, we have to calculate border widths &
		 * heights and modify the values programmed into the CRTC.
		 */
322 323
		centre_horizontally(adjusted_mode, pipe_config->pipe_src_w);
		centre_vertically(adjusted_mode, pipe_config->pipe_src_h);
324 325 326 327
		border = LVDS_BORDER_ENABLE;
		break;
	case DRM_MODE_SCALE_ASPECT:
		/* Scale but preserve the aspect ratio */
328
		if (INTEL_GEN(dev_priv) >= 4)
329 330 331 332
			i965_scale_aspect(pipe_config, &pfit_control);
		else
			i9xx_scale_aspect(pipe_config, &pfit_control,
					  &pfit_pgm_ratios, &border);
333 334 335 336 337 338
		break;
	case DRM_MODE_SCALE_FULLSCREEN:
		/*
		 * Full scaling, even if it changes the aspect ratio.
		 * Fortunately this is all done for us in hw.
		 */
339 340
		if (pipe_config->pipe_src_h != adjusted_mode->crtc_vdisplay ||
		    pipe_config->pipe_src_w != adjusted_mode->crtc_hdisplay) {
341
			pfit_control |= PFIT_ENABLE;
342
			if (INTEL_GEN(dev_priv) >= 4)
343 344 345 346 347 348 349 350
				pfit_control |= PFIT_SCALING_AUTO;
			else
				pfit_control |= (VERT_AUTO_SCALE |
						 VERT_INTERP_BILINEAR |
						 HORIZ_AUTO_SCALE |
						 HORIZ_INTERP_BILINEAR);
		}
		break;
351 352 353
	default:
		WARN(1, "bad panel fit mode: %d\n", fitting_mode);
		return;
354 355 356 357
	}

	/* 965+ wants fuzzy fitting */
	/* FIXME: handle multiple panels by failing gracefully */
358
	if (INTEL_GEN(dev_priv) >= 4)
359 360 361 362 363 364 365 366 367
		pfit_control |= ((intel_crtc->pipe << PFIT_PIPE_SHIFT) |
				 PFIT_FILTER_FUZZY);

out:
	if ((pfit_control & PFIT_ENABLE) == 0) {
		pfit_control = 0;
		pfit_pgm_ratios = 0;
	}

368
	/* Make sure pre-965 set dither correctly for 18bpp panels. */
369
	if (INTEL_GEN(dev_priv) < 4 && pipe_config->pipe_bpp == 18)
370 371
		pfit_control |= PANEL_8TO6_DITHER_ENABLE;

372 373
	pipe_config->gmch_pfit.control = pfit_control;
	pipe_config->gmch_pfit.pgm_ratios = pfit_pgm_ratios;
374
	pipe_config->gmch_pfit.lvds_border_bits = border;
375 376
}

J
Jani Nikula 已提交
377
enum drm_connector_status
378
intel_panel_detect(struct drm_i915_private *dev_priv)
J
Jani Nikula 已提交
379 380 381
{
	/* Assume that the BIOS does not lie through the OpRegion... */
	if (!i915.panel_ignore_lid && dev_priv->opregion.lid_state) {
382
		return *dev_priv->opregion.lid_state & 0x1 ?
J
Jani Nikula 已提交
383 384 385 386 387 388 389 390 391 392 393 394 395 396
			connector_status_connected :
			connector_status_disconnected;
	}

	switch (i915.panel_ignore_lid) {
	case -2:
		return connector_status_connected;
	case -1:
		return connector_status_disconnected;
	default:
		return connector_status_unknown;
	}
}

397 398 399 400 401 402 403 404 405 406 407 408 409 410 411 412 413 414 415 416 417
/**
 * scale - scale values from one range to another
 *
 * @source_val: value in range [@source_min..@source_max]
 *
 * Return @source_val in range [@source_min..@source_max] scaled to range
 * [@target_min..@target_max].
 */
static uint32_t scale(uint32_t source_val,
		      uint32_t source_min, uint32_t source_max,
		      uint32_t target_min, uint32_t target_max)
{
	uint64_t target_val;

	WARN_ON(source_min > source_max);
	WARN_ON(target_min > target_max);

	/* defensive */
	source_val = clamp(source_val, source_min, source_max);

	/* avoid overflows */
418 419
	target_val = DIV_ROUND_CLOSEST_ULL((uint64_t)(source_val - source_min) *
			(target_max - target_min), source_max - source_min);
420 421 422 423 424 425 426 427 428 429 430 431 432 433 434 435 436 437 438 439 440 441 442 443 444 445 446 447 448 449 450 451 452 453 454 455 456 457 458
	target_val += target_min;

	return target_val;
}

/* Scale user_level in range [0..user_max] to [hw_min..hw_max]. */
static inline u32 scale_user_to_hw(struct intel_connector *connector,
				   u32 user_level, u32 user_max)
{
	struct intel_panel *panel = &connector->panel;

	return scale(user_level, 0, user_max,
		     panel->backlight.min, panel->backlight.max);
}

/* Scale user_level in range [0..user_max] to [0..hw_max], clamping the result
 * to [hw_min..hw_max]. */
static inline u32 clamp_user_to_hw(struct intel_connector *connector,
				   u32 user_level, u32 user_max)
{
	struct intel_panel *panel = &connector->panel;
	u32 hw_level;

	hw_level = scale(user_level, 0, user_max, 0, panel->backlight.max);
	hw_level = clamp(hw_level, panel->backlight.min, panel->backlight.max);

	return hw_level;
}

/* Scale hw_level in range [hw_min..hw_max] to [0..user_max]. */
static inline u32 scale_hw_to_user(struct intel_connector *connector,
				   u32 hw_level, u32 user_max)
{
	struct intel_panel *panel = &connector->panel;

	return scale(hw_level, panel->backlight.min, panel->backlight.max,
		     0, user_max);
}

459 460
static u32 intel_panel_compute_brightness(struct intel_connector *connector,
					  u32 val)
461
{
462
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
463 464 465
	struct intel_panel *panel = &connector->panel;

	WARN_ON(panel->backlight.max == 0);
466

467
	if (i915.invert_brightness < 0)
468 469
		return val;

470
	if (i915.invert_brightness > 0 ||
471
	    dev_priv->quirks & QUIRK_INVERT_BRIGHTNESS) {
472
		return panel->backlight.max - val;
473
	}
474 475 476 477

	return val;
}

478
static u32 lpt_get_backlight(struct intel_connector *connector)
479
{
480
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
481

482 483
	return I915_READ(BLC_PWM_PCH_CTL2) & BACKLIGHT_DUTY_CYCLE_MASK;
}
484

485
static u32 pch_get_backlight(struct intel_connector *connector)
486
{
487
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
488

489 490
	return I915_READ(BLC_PWM_CPU_CTL) & BACKLIGHT_DUTY_CYCLE_MASK;
}
491

492 493
static u32 i9xx_get_backlight(struct intel_connector *connector)
{
494
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
495
	struct intel_panel *panel = &connector->panel;
496
	u32 val;
497

498
	val = I915_READ(BLC_PWM_CTL) & BACKLIGHT_DUTY_CYCLE_MASK;
499
	if (INTEL_INFO(dev_priv)->gen < 4)
500
		val >>= 1;
501

502
	if (panel->backlight.combination_mode) {
503
		u8 lbpc;
504

505
		pci_read_config_byte(dev_priv->drm.pdev, LBPC, &lbpc);
506
		val *= lbpc;
507 508
	}

509 510 511
	return val;
}

512
static u32 _vlv_get_backlight(struct drm_i915_private *dev_priv, enum pipe pipe)
513
{
514 515 516
	if (WARN_ON(pipe != PIPE_A && pipe != PIPE_B))
		return 0;

517 518 519 520 521
	return I915_READ(VLV_BLC_PWM_CTL(pipe)) & BACKLIGHT_DUTY_CYCLE_MASK;
}

static u32 vlv_get_backlight(struct intel_connector *connector)
{
522
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
523 524
	enum pipe pipe = intel_get_pipe_from_connector(connector);

525
	return _vlv_get_backlight(dev_priv, pipe);
526 527
}

528 529
static u32 bxt_get_backlight(struct intel_connector *connector)
{
530
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
531
	struct intel_panel *panel = &connector->panel;
532

533
	return I915_READ(BXT_BLC_PWM_DUTY(panel->backlight.controller));
534 535
}

536 537 538 539 540 541 542 543 544
static u32 pwm_get_backlight(struct intel_connector *connector)
{
	struct intel_panel *panel = &connector->panel;
	int duty_ns;

	duty_ns = pwm_get_duty_cycle(panel->backlight.pwm);
	return DIV_ROUND_UP(duty_ns * 100, CRC_PMIC_PWM_PERIOD_NS);
}

545 546
static u32 intel_panel_get_backlight(struct intel_connector *connector)
{
547
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
548 549
	struct intel_panel *panel = &connector->panel;
	u32 val = 0;
550

551
	mutex_lock(&dev_priv->backlight_lock);
552

553
	if (panel->backlight.enabled) {
554
		val = panel->backlight.get(connector);
555 556
		val = intel_panel_compute_brightness(connector, val);
	}
557

558
	mutex_unlock(&dev_priv->backlight_lock);
559

560 561 562 563
	DRM_DEBUG_DRIVER("get backlight PWM = %d\n", val);
	return val;
}

564
static void lpt_set_backlight(struct intel_connector *connector, u32 level)
565
{
566
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
567 568 569 570
	u32 val = I915_READ(BLC_PWM_PCH_CTL2) & ~BACKLIGHT_DUTY_CYCLE_MASK;
	I915_WRITE(BLC_PWM_PCH_CTL2, val | level);
}

571
static void pch_set_backlight(struct intel_connector *connector, u32 level)
572
{
573
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
574 575 576 577
	u32 tmp;

	tmp = I915_READ(BLC_PWM_CPU_CTL) & ~BACKLIGHT_DUTY_CYCLE_MASK;
	I915_WRITE(BLC_PWM_CPU_CTL, tmp | level);
578 579
}

580
static void i9xx_set_backlight(struct intel_connector *connector, u32 level)
581
{
582
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
583
	struct intel_panel *panel = &connector->panel;
584
	u32 tmp, mask;
585

586 587
	WARN_ON(panel->backlight.max == 0);

588
	if (panel->backlight.combination_mode) {
589 590
		u8 lbpc;

591
		lbpc = level * 0xfe / panel->backlight.max + 1;
592
		level /= lbpc;
593
		pci_write_config_byte(dev_priv->drm.pdev, LBPC, lbpc);
594 595
	}

596
	if (IS_GEN4(dev_priv)) {
597 598
		mask = BACKLIGHT_DUTY_CYCLE_MASK;
	} else {
599
		level <<= 1;
600 601
		mask = BACKLIGHT_DUTY_CYCLE_MASK_PNV;
	}
602

603
	tmp = I915_READ(BLC_PWM_CTL) & ~mask;
604 605 606 607 608
	I915_WRITE(BLC_PWM_CTL, tmp | level);
}

static void vlv_set_backlight(struct intel_connector *connector, u32 level)
{
609
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
610 611 612
	enum pipe pipe = intel_get_pipe_from_connector(connector);
	u32 tmp;

613 614 615
	if (WARN_ON(pipe != PIPE_A && pipe != PIPE_B))
		return;

616 617 618 619
	tmp = I915_READ(VLV_BLC_PWM_CTL(pipe)) & ~BACKLIGHT_DUTY_CYCLE_MASK;
	I915_WRITE(VLV_BLC_PWM_CTL(pipe), tmp | level);
}

620 621
static void bxt_set_backlight(struct intel_connector *connector, u32 level)
{
622
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
623
	struct intel_panel *panel = &connector->panel;
624

625
	I915_WRITE(BXT_BLC_PWM_DUTY(panel->backlight.controller), level);
626 627
}

628 629 630 631 632 633 634 635
static void pwm_set_backlight(struct intel_connector *connector, u32 level)
{
	struct intel_panel *panel = &connector->panel;
	int duty_ns = DIV_ROUND_UP(level * CRC_PMIC_PWM_PERIOD_NS, 100);

	pwm_config(panel->backlight.pwm, duty_ns, CRC_PMIC_PWM_PERIOD_NS);
}

636 637 638
static void
intel_panel_actually_set_backlight(struct intel_connector *connector, u32 level)
{
639
	struct intel_panel *panel = &connector->panel;
640 641 642 643

	DRM_DEBUG_DRIVER("set backlight PWM = %d\n", level);

	level = intel_panel_compute_brightness(connector, level);
644
	panel->backlight.set(connector, level);
645
}
646

647 648 649
/* set backlight brightness to level in range [0..max], scaling wrt hw min */
static void intel_panel_set_backlight(struct intel_connector *connector,
				      u32 user_level, u32 user_max)
650
{
651
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
652
	struct intel_panel *panel = &connector->panel;
653
	u32 hw_level;
654

655
	if (!panel->backlight.present)
656 657
		return;

658
	mutex_lock(&dev_priv->backlight_lock);
659

660
	WARN_ON(panel->backlight.max == 0);
661

662 663 664 665 666 667
	hw_level = scale_user_to_hw(connector, user_level, user_max);
	panel->backlight.level = hw_level;

	if (panel->backlight.enabled)
		intel_panel_actually_set_backlight(connector, hw_level);

668
	mutex_unlock(&dev_priv->backlight_lock);
669 670 671 672 673 674 675 676
}

/* set backlight brightness to level in range [0..max], assuming hw min is
 * respected.
 */
void intel_panel_set_backlight_acpi(struct intel_connector *connector,
				    u32 user_level, u32 user_max)
{
677
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
678 679 680 681
	struct intel_panel *panel = &connector->panel;
	enum pipe pipe = intel_get_pipe_from_connector(connector);
	u32 hw_level;

682 683 684 685 686 687
	/*
	 * INVALID_PIPE may occur during driver init because
	 * connection_mutex isn't held across the entire backlight
	 * setup + modeset readout, and the BIOS can issue the
	 * requests at any time.
	 */
688 689 690
	if (!panel->backlight.present || pipe == INVALID_PIPE)
		return;

691
	mutex_lock(&dev_priv->backlight_lock);
692 693 694 695 696

	WARN_ON(panel->backlight.max == 0);

	hw_level = clamp_user_to_hw(connector, user_level, user_max);
	panel->backlight.level = hw_level;
697

698
	if (panel->backlight.device)
699 700 701 702
		panel->backlight.device->props.brightness =
			scale_hw_to_user(connector,
					 panel->backlight.level,
					 panel->backlight.device->props.max_brightness);
703

704
	if (panel->backlight.enabled)
705
		intel_panel_actually_set_backlight(connector, hw_level);
706

707
	mutex_unlock(&dev_priv->backlight_lock);
708 709
}

710 711
static void lpt_disable_backlight(struct intel_connector *connector)
{
712
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
713 714 715 716
	u32 tmp;

	intel_panel_actually_set_backlight(connector, 0);

717 718 719 720 721 722 723 724 725 726 727 728 729 730
	/*
	 * Although we don't support or enable CPU PWM with LPT/SPT based
	 * systems, it may have been enabled prior to loading the
	 * driver. Disable to avoid warnings on LCPLL disable.
	 *
	 * This needs rework if we need to add support for CPU PWM on PCH split
	 * platforms.
	 */
	tmp = I915_READ(BLC_PWM_CPU_CTL2);
	if (tmp & BLM_PWM_ENABLE) {
		DRM_DEBUG_KMS("cpu backlight was enabled, disabling\n");
		I915_WRITE(BLC_PWM_CPU_CTL2, tmp & ~BLM_PWM_ENABLE);
	}

731 732 733 734
	tmp = I915_READ(BLC_PWM_PCH_CTL1);
	I915_WRITE(BLC_PWM_PCH_CTL1, tmp & ~BLM_PCH_PWM_ENABLE);
}

735 736
static void pch_disable_backlight(struct intel_connector *connector)
{
737
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
738 739
	u32 tmp;

740 741
	intel_panel_actually_set_backlight(connector, 0);

742 743 744 745 746 747 748
	tmp = I915_READ(BLC_PWM_CPU_CTL2);
	I915_WRITE(BLC_PWM_CPU_CTL2, tmp & ~BLM_PWM_ENABLE);

	tmp = I915_READ(BLC_PWM_PCH_CTL1);
	I915_WRITE(BLC_PWM_PCH_CTL1, tmp & ~BLM_PCH_PWM_ENABLE);
}

749 750 751 752 753
static void i9xx_disable_backlight(struct intel_connector *connector)
{
	intel_panel_actually_set_backlight(connector, 0);
}

754 755
static void i965_disable_backlight(struct intel_connector *connector)
{
756
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
757 758
	u32 tmp;

759 760
	intel_panel_actually_set_backlight(connector, 0);

761 762 763 764 765 766
	tmp = I915_READ(BLC_PWM_CTL2);
	I915_WRITE(BLC_PWM_CTL2, tmp & ~BLM_PWM_ENABLE);
}

static void vlv_disable_backlight(struct intel_connector *connector)
{
767
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
768 769 770
	enum pipe pipe = intel_get_pipe_from_connector(connector);
	u32 tmp;

771 772 773
	if (WARN_ON(pipe != PIPE_A && pipe != PIPE_B))
		return;

774 775
	intel_panel_actually_set_backlight(connector, 0);

776 777 778 779
	tmp = I915_READ(VLV_BLC_PWM_CTL2(pipe));
	I915_WRITE(VLV_BLC_PWM_CTL2(pipe), tmp & ~BLM_PWM_ENABLE);
}

780 781
static void bxt_disable_backlight(struct intel_connector *connector)
{
782
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
783 784
	struct intel_panel *panel = &connector->panel;
	u32 tmp, val;
785 786 787

	intel_panel_actually_set_backlight(connector, 0);

788 789 790 791 792 793 794 795 796
	tmp = I915_READ(BXT_BLC_PWM_CTL(panel->backlight.controller));
	I915_WRITE(BXT_BLC_PWM_CTL(panel->backlight.controller),
			tmp & ~BXT_BLC_PWM_ENABLE);

	if (panel->backlight.controller == 1) {
		val = I915_READ(UTIL_PIN_CTL);
		val &= ~UTIL_PIN_ENABLE;
		I915_WRITE(UTIL_PIN_CTL, val);
	}
797 798
}

799 800 801 802 803 804 805 806 807 808 809 810 811
static void cnp_disable_backlight(struct intel_connector *connector)
{
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
	struct intel_panel *panel = &connector->panel;
	u32 tmp;

	intel_panel_actually_set_backlight(connector, 0);

	tmp = I915_READ(BXT_BLC_PWM_CTL(panel->backlight.controller));
	I915_WRITE(BXT_BLC_PWM_CTL(panel->backlight.controller),
		   tmp & ~BXT_BLC_PWM_ENABLE);
}

812 813 814 815 816 817 818 819 820 821
static void pwm_disable_backlight(struct intel_connector *connector)
{
	struct intel_panel *panel = &connector->panel;

	/* Disable the backlight */
	pwm_config(panel->backlight.pwm, 0, CRC_PMIC_PWM_PERIOD_NS);
	usleep_range(2000, 3000);
	pwm_disable(panel->backlight.pwm);
}

822
void intel_panel_disable_backlight(const struct drm_connector_state *old_conn_state)
823
{
824
	struct intel_connector *connector = to_intel_connector(old_conn_state->connector);
825
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
826
	struct intel_panel *panel = &connector->panel;
827

828
	if (!panel->backlight.present)
829 830
		return;

831
	/*
832
	 * Do not disable backlight on the vga_switcheroo path. When switching
833 834 835 836
	 * away from i915, the other client may depend on i915 to handle the
	 * backlight. This will leave the backlight on unnecessarily when
	 * another client is not activated.
	 */
837
	if (dev_priv->drm.switch_power_state == DRM_SWITCH_POWER_CHANGING) {
838 839 840 841
		DRM_DEBUG_DRIVER("Skipping backlight disable on vga switch\n");
		return;
	}

842
	mutex_lock(&dev_priv->backlight_lock);
843

844 845
	if (panel->backlight.device)
		panel->backlight.device->props.power = FB_BLANK_POWERDOWN;
846
	panel->backlight.enabled = false;
847
	panel->backlight.disable(connector);
848

849
	mutex_unlock(&dev_priv->backlight_lock);
850
}
851

852
static void lpt_enable_backlight(struct intel_connector *connector)
853
{
854
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
855
	struct intel_panel *panel = &connector->panel;
856
	u32 pch_ctl1, pch_ctl2, schicken;
857 858 859 860 861 862 863

	pch_ctl1 = I915_READ(BLC_PWM_PCH_CTL1);
	if (pch_ctl1 & BLM_PCH_PWM_ENABLE) {
		DRM_DEBUG_KMS("pch backlight already enabled\n");
		pch_ctl1 &= ~BLM_PCH_PWM_ENABLE;
		I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1);
	}
864

865 866 867 868 869 870 871 872 873 874 875 876 877 878 879 880
	if (HAS_PCH_LPT(dev_priv)) {
		schicken = I915_READ(SOUTH_CHICKEN2);
		if (panel->backlight.alternate_pwm_increment)
			schicken |= LPT_PWM_GRANULARITY;
		else
			schicken &= ~LPT_PWM_GRANULARITY;
		I915_WRITE(SOUTH_CHICKEN2, schicken);
	} else {
		schicken = I915_READ(SOUTH_CHICKEN1);
		if (panel->backlight.alternate_pwm_increment)
			schicken |= SPT_PWM_GRANULARITY;
		else
			schicken &= ~SPT_PWM_GRANULARITY;
		I915_WRITE(SOUTH_CHICKEN1, schicken);
	}

881 882
	pch_ctl2 = panel->backlight.max << 16;
	I915_WRITE(BLC_PWM_PCH_CTL2, pch_ctl2);
883

884 885 886
	pch_ctl1 = 0;
	if (panel->backlight.active_low_pwm)
		pch_ctl1 |= BLM_PCH_POLARITY;
887

888 889 890
	/* After LPT, override is the default. */
	if (HAS_PCH_LPT(dev_priv))
		pch_ctl1 |= BLM_PCH_OVERRIDE_ENABLE;
891 892 893 894 895 896 897

	I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1);
	POSTING_READ(BLC_PWM_PCH_CTL1);
	I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1 | BLM_PCH_PWM_ENABLE);

	/* This won't stick until the above enable. */
	intel_panel_actually_set_backlight(connector, panel->backlight.level);
898 899
}

900 901
static void pch_enable_backlight(struct intel_connector *connector)
{
902
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
903
	struct intel_panel *panel = &connector->panel;
904
	enum pipe pipe = intel_get_pipe_from_connector(connector);
905
	enum transcoder cpu_transcoder;
906
	u32 cpu_ctl2, pch_ctl1, pch_ctl2;
907

908 909 910 911 912
	if (!WARN_ON_ONCE(pipe == INVALID_PIPE))
		cpu_transcoder = intel_pipe_to_cpu_transcoder(dev_priv, pipe);
	else
		cpu_transcoder = TRANSCODER_EDP;

913 914
	cpu_ctl2 = I915_READ(BLC_PWM_CPU_CTL2);
	if (cpu_ctl2 & BLM_PWM_ENABLE) {
915
		DRM_DEBUG_KMS("cpu backlight already enabled\n");
916 917 918
		cpu_ctl2 &= ~BLM_PWM_ENABLE;
		I915_WRITE(BLC_PWM_CPU_CTL2, cpu_ctl2);
	}
919

920 921 922 923 924 925
	pch_ctl1 = I915_READ(BLC_PWM_PCH_CTL1);
	if (pch_ctl1 & BLM_PCH_PWM_ENABLE) {
		DRM_DEBUG_KMS("pch backlight already enabled\n");
		pch_ctl1 &= ~BLM_PCH_PWM_ENABLE;
		I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1);
	}
926 927

	if (cpu_transcoder == TRANSCODER_EDP)
928
		cpu_ctl2 = BLM_TRANSCODER_EDP;
929
	else
930 931
		cpu_ctl2 = BLM_PIPE(cpu_transcoder);
	I915_WRITE(BLC_PWM_CPU_CTL2, cpu_ctl2);
932
	POSTING_READ(BLC_PWM_CPU_CTL2);
933
	I915_WRITE(BLC_PWM_CPU_CTL2, cpu_ctl2 | BLM_PWM_ENABLE);
934

935
	/* This won't stick until the above enable. */
936
	intel_panel_actually_set_backlight(connector, panel->backlight.level);
937 938 939 940 941 942 943

	pch_ctl2 = panel->backlight.max << 16;
	I915_WRITE(BLC_PWM_PCH_CTL2, pch_ctl2);

	pch_ctl1 = 0;
	if (panel->backlight.active_low_pwm)
		pch_ctl1 |= BLM_PCH_POLARITY;
944

945 946 947
	I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1);
	POSTING_READ(BLC_PWM_PCH_CTL1);
	I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1 | BLM_PCH_PWM_ENABLE);
948 949 950 951
}

static void i9xx_enable_backlight(struct intel_connector *connector)
{
952
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
953
	struct intel_panel *panel = &connector->panel;
954 955 956 957
	u32 ctl, freq;

	ctl = I915_READ(BLC_PWM_CTL);
	if (ctl & BACKLIGHT_DUTY_CYCLE_MASK_PNV) {
958
		DRM_DEBUG_KMS("backlight already enabled\n");
959 960
		I915_WRITE(BLC_PWM_CTL, 0);
	}
961

962 963 964 965 966
	freq = panel->backlight.max;
	if (panel->backlight.combination_mode)
		freq /= 0xff;

	ctl = freq << 17;
967
	if (panel->backlight.combination_mode)
968
		ctl |= BLM_LEGACY_MODE;
969
	if (IS_PINEVIEW(dev_priv) && panel->backlight.active_low_pwm)
970 971 972 973 974 975
		ctl |= BLM_POLARITY_PNV;

	I915_WRITE(BLC_PWM_CTL, ctl);
	POSTING_READ(BLC_PWM_CTL);

	/* XXX: combine this into above write? */
976
	intel_panel_actually_set_backlight(connector, panel->backlight.level);
977 978 979 980 981 982

	/*
	 * Needed to enable backlight on some 855gm models. BLC_HIST_CTL is
	 * 855gm only, but checking for gen2 is safe, as 855gm is the only gen2
	 * that has backlight.
	 */
983
	if (IS_GEN2(dev_priv))
984
		I915_WRITE(BLC_HIST_CTL, BLM_HISTOGRAM_ENABLE);
985
}
986

987 988
static void i965_enable_backlight(struct intel_connector *connector)
{
989
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
990
	struct intel_panel *panel = &connector->panel;
991
	enum pipe pipe = intel_get_pipe_from_connector(connector);
992
	u32 ctl, ctl2, freq;
993

994 995 996
	if (WARN_ON_ONCE(pipe == INVALID_PIPE))
		pipe = PIPE_A;

997 998
	ctl2 = I915_READ(BLC_PWM_CTL2);
	if (ctl2 & BLM_PWM_ENABLE) {
999
		DRM_DEBUG_KMS("backlight already enabled\n");
1000 1001 1002
		ctl2 &= ~BLM_PWM_ENABLE;
		I915_WRITE(BLC_PWM_CTL2, ctl2);
	}
1003

1004 1005 1006
	freq = panel->backlight.max;
	if (panel->backlight.combination_mode)
		freq /= 0xff;
1007

1008 1009
	ctl = freq << 16;
	I915_WRITE(BLC_PWM_CTL, ctl);
1010

1011 1012 1013 1014 1015 1016 1017 1018
	ctl2 = BLM_PIPE(pipe);
	if (panel->backlight.combination_mode)
		ctl2 |= BLM_COMBINATION_MODE;
	if (panel->backlight.active_low_pwm)
		ctl2 |= BLM_POLARITY_I965;
	I915_WRITE(BLC_PWM_CTL2, ctl2);
	POSTING_READ(BLC_PWM_CTL2);
	I915_WRITE(BLC_PWM_CTL2, ctl2 | BLM_PWM_ENABLE);
1019 1020

	intel_panel_actually_set_backlight(connector, panel->backlight.level);
1021 1022 1023 1024
}

static void vlv_enable_backlight(struct intel_connector *connector)
{
1025
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1026
	struct intel_panel *panel = &connector->panel;
1027
	enum pipe pipe = intel_get_pipe_from_connector(connector);
1028
	u32 ctl, ctl2;
1029

1030 1031 1032
	if (WARN_ON(pipe != PIPE_A && pipe != PIPE_B))
		return;

1033 1034
	ctl2 = I915_READ(VLV_BLC_PWM_CTL2(pipe));
	if (ctl2 & BLM_PWM_ENABLE) {
1035
		DRM_DEBUG_KMS("backlight already enabled\n");
1036 1037 1038
		ctl2 &= ~BLM_PWM_ENABLE;
		I915_WRITE(VLV_BLC_PWM_CTL2(pipe), ctl2);
	}
1039

1040 1041
	ctl = panel->backlight.max << 16;
	I915_WRITE(VLV_BLC_PWM_CTL(pipe), ctl);
1042

1043 1044
	/* XXX: combine this into above write? */
	intel_panel_actually_set_backlight(connector, panel->backlight.level);
1045

1046 1047 1048 1049
	ctl2 = 0;
	if (panel->backlight.active_low_pwm)
		ctl2 |= BLM_POLARITY_I965;
	I915_WRITE(VLV_BLC_PWM_CTL2(pipe), ctl2);
1050
	POSTING_READ(VLV_BLC_PWM_CTL2(pipe));
1051
	I915_WRITE(VLV_BLC_PWM_CTL2(pipe), ctl2 | BLM_PWM_ENABLE);
1052 1053
}

1054 1055
static void bxt_enable_backlight(struct intel_connector *connector)
{
1056
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1057
	struct intel_panel *panel = &connector->panel;
1058 1059 1060
	enum pipe pipe = intel_get_pipe_from_connector(connector);
	u32 pwm_ctl, val;

1061 1062 1063
	if (WARN_ON_ONCE(pipe == INVALID_PIPE))
		pipe = PIPE_A;

1064
	/* Controller 1 uses the utility pin. */
1065 1066 1067 1068 1069 1070 1071
	if (panel->backlight.controller == 1) {
		val = I915_READ(UTIL_PIN_CTL);
		if (val & UTIL_PIN_ENABLE) {
			DRM_DEBUG_KMS("util pin already enabled\n");
			val &= ~UTIL_PIN_ENABLE;
			I915_WRITE(UTIL_PIN_CTL, val);
		}
1072

1073 1074 1075 1076 1077 1078 1079 1080
		val = 0;
		if (panel->backlight.util_pin_active_low)
			val |= UTIL_PIN_POLARITY;
		I915_WRITE(UTIL_PIN_CTL, val | UTIL_PIN_PIPE(pipe) |
				UTIL_PIN_MODE_PWM | UTIL_PIN_ENABLE);
	}

	pwm_ctl = I915_READ(BXT_BLC_PWM_CTL(panel->backlight.controller));
1081 1082 1083
	if (pwm_ctl & BXT_BLC_PWM_ENABLE) {
		DRM_DEBUG_KMS("backlight already enabled\n");
		pwm_ctl &= ~BXT_BLC_PWM_ENABLE;
1084 1085
		I915_WRITE(BXT_BLC_PWM_CTL(panel->backlight.controller),
				pwm_ctl);
1086 1087
	}

1088 1089
	I915_WRITE(BXT_BLC_PWM_FREQ(panel->backlight.controller),
			panel->backlight.max);
1090 1091 1092 1093 1094 1095 1096

	intel_panel_actually_set_backlight(connector, panel->backlight.level);

	pwm_ctl = 0;
	if (panel->backlight.active_low_pwm)
		pwm_ctl |= BXT_BLC_PWM_POLARITY;

1097 1098 1099 1100
	I915_WRITE(BXT_BLC_PWM_CTL(panel->backlight.controller), pwm_ctl);
	POSTING_READ(BXT_BLC_PWM_CTL(panel->backlight.controller));
	I915_WRITE(BXT_BLC_PWM_CTL(panel->backlight.controller),
			pwm_ctl | BXT_BLC_PWM_ENABLE);
1101 1102
}

1103 1104 1105 1106 1107 1108 1109 1110 1111 1112 1113 1114 1115 1116 1117 1118 1119 1120 1121 1122 1123 1124 1125 1126 1127 1128 1129 1130 1131
static void cnp_enable_backlight(struct intel_connector *connector)
{
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
	struct intel_panel *panel = &connector->panel;
	u32 pwm_ctl;

	pwm_ctl = I915_READ(BXT_BLC_PWM_CTL(panel->backlight.controller));
	if (pwm_ctl & BXT_BLC_PWM_ENABLE) {
		DRM_DEBUG_KMS("backlight already enabled\n");
		pwm_ctl &= ~BXT_BLC_PWM_ENABLE;
		I915_WRITE(BXT_BLC_PWM_CTL(panel->backlight.controller),
			   pwm_ctl);
	}

	I915_WRITE(BXT_BLC_PWM_FREQ(panel->backlight.controller),
		   panel->backlight.max);

	intel_panel_actually_set_backlight(connector, panel->backlight.level);

	pwm_ctl = 0;
	if (panel->backlight.active_low_pwm)
		pwm_ctl |= BXT_BLC_PWM_POLARITY;

	I915_WRITE(BXT_BLC_PWM_CTL(panel->backlight.controller), pwm_ctl);
	POSTING_READ(BXT_BLC_PWM_CTL(panel->backlight.controller));
	I915_WRITE(BXT_BLC_PWM_CTL(panel->backlight.controller),
		   pwm_ctl | BXT_BLC_PWM_ENABLE);
}

1132 1133 1134 1135 1136 1137 1138 1139
static void pwm_enable_backlight(struct intel_connector *connector)
{
	struct intel_panel *panel = &connector->panel;

	pwm_enable(panel->backlight.pwm);
	intel_panel_actually_set_backlight(connector, panel->backlight.level);
}

1140 1141
void intel_panel_enable_backlight(const struct intel_crtc_state *crtc_state,
				  const struct drm_connector_state *conn_state)
1142
{
1143
	struct intel_connector *connector = to_intel_connector(conn_state->connector);
1144
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1145
	struct intel_panel *panel = &connector->panel;
1146
	enum pipe pipe = to_intel_crtc(crtc_state->base.crtc)->pipe;
1147

1148
	if (!panel->backlight.present)
1149 1150
		return;

1151
	DRM_DEBUG_KMS("pipe %c\n", pipe_name(pipe));
1152

1153
	mutex_lock(&dev_priv->backlight_lock);
1154

1155 1156
	WARN_ON(panel->backlight.max == 0);

1157
	if (panel->backlight.level <= panel->backlight.min) {
1158
		panel->backlight.level = panel->backlight.max;
1159 1160
		if (panel->backlight.device)
			panel->backlight.device->props.brightness =
1161 1162 1163
				scale_hw_to_user(connector,
						 panel->backlight.level,
						 panel->backlight.device->props.max_brightness);
1164
	}
1165

1166
	panel->backlight.enable(connector);
1167
	panel->backlight.enabled = true;
1168 1169
	if (panel->backlight.device)
		panel->backlight.device->props.power = FB_BLANK_UNBLANK;
1170

1171
	mutex_unlock(&dev_priv->backlight_lock);
1172 1173
}

1174
#if IS_ENABLED(CONFIG_BACKLIGHT_CLASS_DEVICE)
1175
static int intel_backlight_device_update_status(struct backlight_device *bd)
1176
{
1177
	struct intel_connector *connector = bl_get_data(bd);
1178
	struct intel_panel *panel = &connector->panel;
1179 1180
	struct drm_device *dev = connector->base.dev;

1181
	drm_modeset_lock(&dev->mode_config.connection_mutex, NULL);
1182 1183
	DRM_DEBUG_KMS("updating intel_backlight, brightness=%d/%d\n",
		      bd->props.brightness, bd->props.max_brightness);
1184
	intel_panel_set_backlight(connector, bd->props.brightness,
1185
				  bd->props.max_brightness);
1186 1187 1188 1189 1190 1191 1192 1193

	/*
	 * Allow flipping bl_power as a sub-state of enabled. Sadly the
	 * backlight class device does not make it easy to to differentiate
	 * between callbacks for brightness and bl_power, so our backlight_power
	 * callback needs to take this into account.
	 */
	if (panel->backlight.enabled) {
1194
		if (panel->backlight.power) {
1195 1196
			bool enable = bd->props.power == FB_BLANK_UNBLANK &&
				bd->props.brightness != 0;
1197
			panel->backlight.power(connector, enable);
1198 1199 1200 1201 1202
		}
	} else {
		bd->props.power = FB_BLANK_POWERDOWN;
	}

1203
	drm_modeset_unlock(&dev->mode_config.connection_mutex);
1204 1205 1206
	return 0;
}

1207
static int intel_backlight_device_get_brightness(struct backlight_device *bd)
1208
{
1209 1210
	struct intel_connector *connector = bl_get_data(bd);
	struct drm_device *dev = connector->base.dev;
1211
	struct drm_i915_private *dev_priv = to_i915(dev);
1212
	u32 hw_level;
1213
	int ret;
1214

1215
	intel_runtime_pm_get(dev_priv);
1216
	drm_modeset_lock(&dev->mode_config.connection_mutex, NULL);
1217 1218 1219 1220

	hw_level = intel_panel_get_backlight(connector);
	ret = scale_hw_to_user(connector, hw_level, bd->props.max_brightness);

1221
	drm_modeset_unlock(&dev->mode_config.connection_mutex);
1222
	intel_runtime_pm_put(dev_priv);
1223

1224
	return ret;
1225 1226
}

1227 1228 1229
static const struct backlight_ops intel_backlight_device_ops = {
	.update_status = intel_backlight_device_update_status,
	.get_brightness = intel_backlight_device_get_brightness,
1230 1231
};

1232
int intel_backlight_device_register(struct intel_connector *connector)
1233
{
1234
	struct intel_panel *panel = &connector->panel;
1235 1236
	struct backlight_properties props;

1237
	if (WARN_ON(panel->backlight.device))
1238 1239
		return -ENODEV;

1240 1241 1242
	if (!panel->backlight.present)
		return 0;

1243
	WARN_ON(panel->backlight.max == 0);
1244

1245
	memset(&props, 0, sizeof(props));
1246
	props.type = BACKLIGHT_RAW;
1247 1248 1249 1250 1251

	/*
	 * Note: Everything should work even if the backlight device max
	 * presented to the userspace is arbitrarily chosen.
	 */
1252
	props.max_brightness = panel->backlight.max;
1253 1254 1255
	props.brightness = scale_hw_to_user(connector,
					    panel->backlight.level,
					    props.max_brightness);
1256

1257 1258 1259 1260 1261
	if (panel->backlight.enabled)
		props.power = FB_BLANK_UNBLANK;
	else
		props.power = FB_BLANK_POWERDOWN;

1262 1263 1264 1265 1266
	/*
	 * Note: using the same name independent of the connector prevents
	 * registration of multiple backlight devices in the driver.
	 */
	panel->backlight.device =
1267
		backlight_device_register("intel_backlight",
1268 1269 1270
					  connector->base.kdev,
					  connector,
					  &intel_backlight_device_ops, &props);
1271

1272
	if (IS_ERR(panel->backlight.device)) {
1273
		DRM_ERROR("Failed to register backlight: %ld\n",
1274 1275
			  PTR_ERR(panel->backlight.device));
		panel->backlight.device = NULL;
1276 1277
		return -ENODEV;
	}
1278 1279 1280 1281

	DRM_DEBUG_KMS("Connector %s backlight sysfs interface registered\n",
		      connector->base.name);

1282 1283 1284
	return 0;
}

1285
void intel_backlight_device_unregister(struct intel_connector *connector)
1286
{
1287 1288 1289 1290 1291
	struct intel_panel *panel = &connector->panel;

	if (panel->backlight.device) {
		backlight_device_unregister(panel->backlight.device);
		panel->backlight.device = NULL;
1292
	}
1293
}
1294 1295
#endif /* CONFIG_BACKLIGHT_CLASS_DEVICE */

1296 1297 1298 1299 1300 1301 1302 1303 1304 1305 1306
/*
 * CNP: PWM clock frequency is 19.2 MHz or 24 MHz.
 *      PWM increment = 1
 */
static u32 cnp_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz)
{
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);

	return DIV_ROUND_CLOSEST(KHz(dev_priv->rawclk_freq), pwm_freq_hz);
}

1307 1308 1309 1310 1311
/*
 * BXT: PWM clock frequency = 19.2 MHz.
 */
static u32 bxt_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz)
{
1312
	return DIV_ROUND_CLOSEST(KHz(19200), pwm_freq_hz);
1313 1314
}

1315
/*
1316 1317 1318 1319 1320 1321
 * SPT: This value represents the period of the PWM stream in clock periods
 * multiplied by 16 (default increment) or 128 (alternate increment selected in
 * SCHICKEN_1 bit 0). PWM clock is 24 MHz.
 */
static u32 spt_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz)
{
1322
	struct intel_panel *panel = &connector->panel;
1323
	u32 mul;
1324

1325
	if (panel->backlight.alternate_pwm_increment)
1326 1327 1328 1329
		mul = 128;
	else
		mul = 16;

1330
	return DIV_ROUND_CLOSEST(MHz(24), pwm_freq_hz * mul);
1331 1332 1333 1334 1335 1336 1337 1338 1339
}

/*
 * LPT: This value represents the period of the PWM stream in clock periods
 * multiplied by 128 (default increment) or 16 (alternate increment, selected in
 * LPT SOUTH_CHICKEN2 register bit 5).
 */
static u32 lpt_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz)
{
1340
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1341
	struct intel_panel *panel = &connector->panel;
1342 1343
	u32 mul, clock;

1344
	if (panel->backlight.alternate_pwm_increment)
1345 1346 1347 1348
		mul = 16;
	else
		mul = 128;

V
Ville Syrjälä 已提交
1349
	if (HAS_PCH_LPT_H(dev_priv))
1350 1351 1352 1353
		clock = MHz(135); /* LPT:H */
	else
		clock = MHz(24); /* LPT:LP */

1354
	return DIV_ROUND_CLOSEST(clock, pwm_freq_hz * mul);
1355 1356 1357 1358 1359 1360 1361 1362
}

/*
 * ILK/SNB/IVB: This value represents the period of the PWM stream in PCH
 * display raw clocks multiplied by 128.
 */
static u32 pch_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz)
{
1363
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1364

1365
	return DIV_ROUND_CLOSEST(KHz(dev_priv->rawclk_freq), pwm_freq_hz * 128);
1366 1367 1368 1369 1370 1371
}

/*
 * Gen2: This field determines the number of time base events (display core
 * clock frequency/32) in total for a complete cycle of modulated backlight
 * control.
1372
 *
1373 1374 1375 1376 1377
 * Gen3: A time base event equals the display core clock ([DevPNV] HRAW clock)
 * divided by 32.
 */
static u32 i9xx_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz)
{
1378
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1379 1380
	int clock;

1381 1382
	if (IS_PINEVIEW(dev_priv))
		clock = KHz(dev_priv->rawclk_freq);
1383
	else
1384
		clock = KHz(dev_priv->cdclk.hw.cdclk);
1385

1386
	return DIV_ROUND_CLOSEST(clock, pwm_freq_hz * 32);
1387 1388 1389 1390
}

/*
 * Gen4: This value represents the period of the PWM stream in display core
1391 1392
 * clocks ([DevCTG] HRAW clocks) multiplied by 128.
 *
1393 1394 1395
 */
static u32 i965_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz)
{
1396
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1397 1398 1399
	int clock;

	if (IS_G4X(dev_priv))
1400
		clock = KHz(dev_priv->rawclk_freq);
1401
	else
1402
		clock = KHz(dev_priv->cdclk.hw.cdclk);
1403

1404
	return DIV_ROUND_CLOSEST(clock, pwm_freq_hz * 128);
1405 1406 1407 1408 1409 1410 1411 1412 1413
}

/*
 * VLV: This value represents the period of the PWM stream in display core
 * clocks ([DevCTG] 200MHz HRAW clocks) multiplied by 128 or 25MHz S0IX clocks
 * multiplied by 16. CHV uses a 19.2MHz S0IX clock.
 */
static u32 vlv_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz)
{
1414 1415
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
	int mul, clock;
1416 1417

	if ((I915_READ(CBR1_VLV) & CBR_PWM_CLOCK_MUX_SELECT) == 0) {
1418 1419
		if (IS_CHERRYVIEW(dev_priv))
			clock = KHz(19200);
1420
		else
1421 1422
			clock = MHz(25);
		mul = 16;
1423
	} else {
1424 1425
		clock = KHz(dev_priv->rawclk_freq);
		mul = 128;
1426
	}
1427

1428
	return DIV_ROUND_CLOSEST(clock, pwm_freq_hz * mul);
1429 1430 1431 1432
}

static u32 get_backlight_max_vbt(struct intel_connector *connector)
{
1433
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1434
	struct intel_panel *panel = &connector->panel;
1435 1436 1437
	u16 pwm_freq_hz = dev_priv->vbt.backlight.pwm_freq_hz;
	u32 pwm;

1438 1439
	if (!panel->backlight.hz_to_pwm) {
		DRM_DEBUG_KMS("backlight frequency conversion not supported\n");
1440 1441 1442
		return 0;
	}

1443 1444 1445 1446 1447 1448 1449
	if (pwm_freq_hz) {
		DRM_DEBUG_KMS("VBT defined backlight frequency %u Hz\n",
			      pwm_freq_hz);
	} else {
		pwm_freq_hz = 200;
		DRM_DEBUG_KMS("default backlight frequency %u Hz\n",
			      pwm_freq_hz);
1450 1451
	}

1452
	pwm = panel->backlight.hz_to_pwm(connector, pwm_freq_hz);
1453 1454 1455 1456 1457 1458 1459 1460 1461 1462
	if (!pwm) {
		DRM_DEBUG_KMS("backlight frequency conversion failed\n");
		return 0;
	}

	return pwm;
}

/*
 * Note: The setup hooks can't assume pipe is set!
1463
 */
1464 1465
static u32 get_backlight_min_vbt(struct intel_connector *connector)
{
1466
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1467
	struct intel_panel *panel = &connector->panel;
1468
	int min;
1469 1470 1471

	WARN_ON(panel->backlight.max == 0);

1472 1473 1474 1475 1476 1477 1478 1479 1480 1481 1482 1483 1484
	/*
	 * XXX: If the vbt value is 255, it makes min equal to max, which leads
	 * to problems. There are such machines out there. Either our
	 * interpretation is wrong or the vbt has bogus data. Or both. Safeguard
	 * against this by letting the minimum be at most (arbitrarily chosen)
	 * 25% of the max.
	 */
	min = clamp_t(int, dev_priv->vbt.backlight.min_brightness, 0, 64);
	if (min != dev_priv->vbt.backlight.min_brightness) {
		DRM_DEBUG_KMS("clamping VBT min backlight %d/255 to %d/255\n",
			      dev_priv->vbt.backlight.min_brightness, min);
	}

1485
	/* vbt value is a coefficient in range [0..255] */
1486
	return scale(min, 0, 255, 0, panel->backlight.max);
1487 1488
}

1489
static int lpt_setup_backlight(struct intel_connector *connector, enum pipe unused)
1490
{
1491
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1492 1493
	struct intel_panel *panel = &connector->panel;
	u32 pch_ctl1, pch_ctl2, val;
1494 1495 1496 1497 1498 1499 1500
	bool alt;

	if (HAS_PCH_LPT(dev_priv))
		alt = I915_READ(SOUTH_CHICKEN2) & LPT_PWM_GRANULARITY;
	else
		alt = I915_READ(SOUTH_CHICKEN1) & SPT_PWM_GRANULARITY;
	panel->backlight.alternate_pwm_increment = alt;
1501 1502 1503 1504 1505 1506

	pch_ctl1 = I915_READ(BLC_PWM_PCH_CTL1);
	panel->backlight.active_low_pwm = pch_ctl1 & BLM_PCH_POLARITY;

	pch_ctl2 = I915_READ(BLC_PWM_PCH_CTL2);
	panel->backlight.max = pch_ctl2 >> 16;
1507 1508 1509 1510

	if (!panel->backlight.max)
		panel->backlight.max = get_backlight_max_vbt(connector);

1511 1512 1513
	if (!panel->backlight.max)
		return -ENODEV;

1514 1515
	panel->backlight.min = get_backlight_min_vbt(connector);

1516
	val = lpt_get_backlight(connector);
1517 1518 1519
	val = intel_panel_compute_brightness(connector, val);
	panel->backlight.level = clamp(val, panel->backlight.min,
				       panel->backlight.max);
1520

1521
	panel->backlight.enabled = pch_ctl1 & BLM_PCH_PWM_ENABLE;
1522 1523 1524 1525

	return 0;
}

1526
static int pch_setup_backlight(struct intel_connector *connector, enum pipe unused)
1527
{
1528
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1529
	struct intel_panel *panel = &connector->panel;
1530
	u32 cpu_ctl2, pch_ctl1, pch_ctl2, val;
1531

1532 1533 1534 1535 1536
	pch_ctl1 = I915_READ(BLC_PWM_PCH_CTL1);
	panel->backlight.active_low_pwm = pch_ctl1 & BLM_PCH_POLARITY;

	pch_ctl2 = I915_READ(BLC_PWM_PCH_CTL2);
	panel->backlight.max = pch_ctl2 >> 16;
1537 1538 1539 1540

	if (!panel->backlight.max)
		panel->backlight.max = get_backlight_max_vbt(connector);

1541 1542 1543
	if (!panel->backlight.max)
		return -ENODEV;

1544 1545
	panel->backlight.min = get_backlight_min_vbt(connector);

1546
	val = pch_get_backlight(connector);
1547 1548 1549
	val = intel_panel_compute_brightness(connector, val);
	panel->backlight.level = clamp(val, panel->backlight.min,
				       panel->backlight.max);
1550

1551 1552
	cpu_ctl2 = I915_READ(BLC_PWM_CPU_CTL2);
	panel->backlight.enabled = (cpu_ctl2 & BLM_PWM_ENABLE) &&
1553
		(pch_ctl1 & BLM_PCH_PWM_ENABLE);
1554

1555 1556 1557
	return 0;
}

1558
static int i9xx_setup_backlight(struct intel_connector *connector, enum pipe unused)
1559
{
1560
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1561
	struct intel_panel *panel = &connector->panel;
1562 1563 1564 1565
	u32 ctl, val;

	ctl = I915_READ(BLC_PWM_CTL);

1566
	if (IS_GEN2(dev_priv) || IS_I915GM(dev_priv) || IS_I945GM(dev_priv))
1567 1568
		panel->backlight.combination_mode = ctl & BLM_LEGACY_MODE;

1569
	if (IS_PINEVIEW(dev_priv))
1570 1571 1572
		panel->backlight.active_low_pwm = ctl & BLM_POLARITY_PNV;

	panel->backlight.max = ctl >> 17;
1573 1574 1575 1576 1577

	if (!panel->backlight.max) {
		panel->backlight.max = get_backlight_max_vbt(connector);
		panel->backlight.max >>= 1;
	}
1578 1579 1580 1581

	if (!panel->backlight.max)
		return -ENODEV;

1582 1583 1584
	if (panel->backlight.combination_mode)
		panel->backlight.max *= 0xff;

1585 1586
	panel->backlight.min = get_backlight_min_vbt(connector);

1587
	val = i9xx_get_backlight(connector);
1588 1589 1590
	val = intel_panel_compute_brightness(connector, val);
	panel->backlight.level = clamp(val, panel->backlight.min,
				       panel->backlight.max);
1591

1592
	panel->backlight.enabled = val != 0;
1593

1594 1595 1596
	return 0;
}

1597
static int i965_setup_backlight(struct intel_connector *connector, enum pipe unused)
1598
{
1599
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1600
	struct intel_panel *panel = &connector->panel;
1601 1602 1603 1604 1605 1606 1607 1608
	u32 ctl, ctl2, val;

	ctl2 = I915_READ(BLC_PWM_CTL2);
	panel->backlight.combination_mode = ctl2 & BLM_COMBINATION_MODE;
	panel->backlight.active_low_pwm = ctl2 & BLM_POLARITY_I965;

	ctl = I915_READ(BLC_PWM_CTL);
	panel->backlight.max = ctl >> 16;
1609 1610 1611

	if (!panel->backlight.max)
		panel->backlight.max = get_backlight_max_vbt(connector);
1612 1613 1614 1615

	if (!panel->backlight.max)
		return -ENODEV;

1616 1617 1618
	if (panel->backlight.combination_mode)
		panel->backlight.max *= 0xff;

1619 1620
	panel->backlight.min = get_backlight_min_vbt(connector);

1621
	val = i9xx_get_backlight(connector);
1622 1623 1624
	val = intel_panel_compute_brightness(connector, val);
	panel->backlight.level = clamp(val, panel->backlight.min,
				       panel->backlight.max);
1625

1626
	panel->backlight.enabled = ctl2 & BLM_PWM_ENABLE;
1627

1628 1629 1630
	return 0;
}

1631
static int vlv_setup_backlight(struct intel_connector *connector, enum pipe pipe)
1632
{
1633
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1634
	struct intel_panel *panel = &connector->panel;
1635
	u32 ctl, ctl2, val;
1636

1637 1638 1639 1640
	if (WARN_ON(pipe != PIPE_A && pipe != PIPE_B))
		return -ENODEV;

	ctl2 = I915_READ(VLV_BLC_PWM_CTL2(pipe));
1641 1642
	panel->backlight.active_low_pwm = ctl2 & BLM_POLARITY_I965;

1643
	ctl = I915_READ(VLV_BLC_PWM_CTL(pipe));
1644
	panel->backlight.max = ctl >> 16;
1645 1646 1647 1648

	if (!panel->backlight.max)
		panel->backlight.max = get_backlight_max_vbt(connector);

1649 1650 1651
	if (!panel->backlight.max)
		return -ENODEV;

1652 1653
	panel->backlight.min = get_backlight_min_vbt(connector);

1654
	val = _vlv_get_backlight(dev_priv, pipe);
1655 1656 1657
	val = intel_panel_compute_brightness(connector, val);
	panel->backlight.level = clamp(val, panel->backlight.min,
				       panel->backlight.max);
1658

1659
	panel->backlight.enabled = ctl2 & BLM_PWM_ENABLE;
1660

1661 1662 1663
	return 0;
}

1664 1665 1666
static int
bxt_setup_backlight(struct intel_connector *connector, enum pipe unused)
{
1667
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1668 1669 1670
	struct intel_panel *panel = &connector->panel;
	u32 pwm_ctl, val;

1671
	panel->backlight.controller = dev_priv->vbt.backlight.controller;
1672

1673 1674
	pwm_ctl = I915_READ(BXT_BLC_PWM_CTL(panel->backlight.controller));

1675
	/* Controller 1 uses the utility pin. */
1676 1677 1678 1679 1680 1681 1682 1683 1684
	if (panel->backlight.controller == 1) {
		val = I915_READ(UTIL_PIN_CTL);
		panel->backlight.util_pin_active_low =
					val & UTIL_PIN_POLARITY;
	}

	panel->backlight.active_low_pwm = pwm_ctl & BXT_BLC_PWM_POLARITY;
	panel->backlight.max =
		I915_READ(BXT_BLC_PWM_FREQ(panel->backlight.controller));
1685 1686 1687 1688

	if (!panel->backlight.max)
		panel->backlight.max = get_backlight_max_vbt(connector);

1689 1690 1691 1692
	if (!panel->backlight.max)
		return -ENODEV;

	val = bxt_get_backlight(connector);
1693 1694 1695
	val = intel_panel_compute_brightness(connector, val);
	panel->backlight.level = clamp(val, panel->backlight.min,
				       panel->backlight.max);
1696

1697
	panel->backlight.enabled = pwm_ctl & BXT_BLC_PWM_ENABLE;
1698 1699 1700 1701

	return 0;
}

1702 1703 1704 1705 1706 1707 1708 1709 1710 1711 1712 1713 1714 1715 1716 1717 1718 1719 1720 1721 1722 1723 1724 1725 1726 1727 1728 1729 1730 1731 1732 1733 1734 1735 1736 1737
static int
cnp_setup_backlight(struct intel_connector *connector, enum pipe unused)
{
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
	struct intel_panel *panel = &connector->panel;
	u32 pwm_ctl, val;

	/*
	 * CNP has the BXT implementation of backlight, but with only
	 * one controller. Future platforms could have multiple controllers
	 * so let's make this extensible and prepared for the future.
	 */
	panel->backlight.controller = 0;

	pwm_ctl = I915_READ(BXT_BLC_PWM_CTL(panel->backlight.controller));

	panel->backlight.active_low_pwm = pwm_ctl & BXT_BLC_PWM_POLARITY;
	panel->backlight.max =
		I915_READ(BXT_BLC_PWM_FREQ(panel->backlight.controller));

	if (!panel->backlight.max)
		panel->backlight.max = get_backlight_max_vbt(connector);

	if (!panel->backlight.max)
		return -ENODEV;

	val = bxt_get_backlight(connector);
	val = intel_panel_compute_brightness(connector, val);
	panel->backlight.level = clamp(val, panel->backlight.min,
				       panel->backlight.max);

	panel->backlight.enabled = pwm_ctl & BXT_BLC_PWM_ENABLE;

	return 0;
}

1738 1739 1740 1741 1742 1743 1744 1745 1746 1747 1748 1749 1750 1751 1752
static int pwm_setup_backlight(struct intel_connector *connector,
			       enum pipe pipe)
{
	struct drm_device *dev = connector->base.dev;
	struct intel_panel *panel = &connector->panel;
	int retval;

	/* Get the PWM chip for backlight control */
	panel->backlight.pwm = pwm_get(dev->dev, "pwm_backlight");
	if (IS_ERR(panel->backlight.pwm)) {
		DRM_ERROR("Failed to own the pwm chip\n");
		panel->backlight.pwm = NULL;
		return -ENODEV;
	}

1753 1754 1755 1756 1757 1758
	/*
	 * FIXME: pwm_apply_args() should be removed when switching to
	 * the atomic PWM API.
	 */
	pwm_apply_args(panel->backlight.pwm);

1759 1760 1761 1762 1763 1764 1765 1766 1767 1768 1769 1770 1771 1772 1773 1774 1775 1776 1777
	retval = pwm_config(panel->backlight.pwm, CRC_PMIC_PWM_PERIOD_NS,
			    CRC_PMIC_PWM_PERIOD_NS);
	if (retval < 0) {
		DRM_ERROR("Failed to configure the pwm chip\n");
		pwm_put(panel->backlight.pwm);
		panel->backlight.pwm = NULL;
		return retval;
	}

	panel->backlight.min = 0; /* 0% */
	panel->backlight.max = 100; /* 100% */
	panel->backlight.level = DIV_ROUND_UP(
				 pwm_get_duty_cycle(panel->backlight.pwm) * 100,
				 CRC_PMIC_PWM_PERIOD_NS);
	panel->backlight.enabled = panel->backlight.level != 0;

	return 0;
}

1778
int intel_panel_setup_backlight(struct drm_connector *connector, enum pipe pipe)
1779
{
1780
	struct drm_i915_private *dev_priv = to_i915(connector->dev);
1781
	struct intel_connector *intel_connector = to_intel_connector(connector);
1782
	struct intel_panel *panel = &intel_connector->panel;
1783
	int ret;
1784

1785
	if (!dev_priv->vbt.backlight.present) {
1786 1787 1788 1789 1790 1791
		if (dev_priv->quirks & QUIRK_BACKLIGHT_PRESENT) {
			DRM_DEBUG_KMS("no backlight present per VBT, but present per quirk\n");
		} else {
			DRM_DEBUG_KMS("no backlight present per VBT\n");
			return 0;
		}
1792 1793
	}

1794 1795 1796 1797
	/* ensure intel_panel has been initialized first */
	if (WARN_ON(!panel->backlight.setup))
		return -ENODEV;

1798
	/* set level and max in panel struct */
1799
	mutex_lock(&dev_priv->backlight_lock);
1800
	ret = panel->backlight.setup(intel_connector, pipe);
1801
	mutex_unlock(&dev_priv->backlight_lock);
1802 1803 1804

	if (ret) {
		DRM_DEBUG_KMS("failed to setup backlight for connector %s\n",
1805
			      connector->name);
1806 1807
		return ret;
	}
1808

1809 1810
	panel->backlight.present = true;

1811 1812
	DRM_DEBUG_KMS("Connector %s backlight initialized, %s, brightness %u/%u\n",
		      connector->name,
1813
		      enableddisabled(panel->backlight.enabled),
1814
		      panel->backlight.level, panel->backlight.max);
1815

1816 1817 1818
	return 0;
}

1819
void intel_panel_destroy_backlight(struct drm_connector *connector)
1820
{
1821
	struct intel_connector *intel_connector = to_intel_connector(connector);
1822
	struct intel_panel *panel = &intel_connector->panel;
1823

1824 1825 1826 1827
	/* dispose of the pwm */
	if (panel->backlight.pwm)
		pwm_put(panel->backlight.pwm);

1828
	panel->backlight.present = false;
1829
}
1830

1831
/* Set up chip specific backlight functions */
1832 1833
static void
intel_panel_init_backlight_funcs(struct intel_panel *panel)
1834
{
1835
	struct intel_connector *connector =
1836
		container_of(panel, struct intel_connector, panel);
1837
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1838

1839 1840 1841 1842
	if (connector->base.connector_type == DRM_MODE_CONNECTOR_eDP &&
	    intel_dp_aux_init_backlight_funcs(connector) == 0)
		return;

1843 1844 1845 1846
	if (connector->base.connector_type == DRM_MODE_CONNECTOR_DSI &&
	    intel_dsi_dcs_init_backlight_funcs(connector) == 0)
		return;

1847
	if (IS_GEN9_LP(dev_priv)) {
1848 1849 1850 1851 1852
		panel->backlight.setup = bxt_setup_backlight;
		panel->backlight.enable = bxt_enable_backlight;
		panel->backlight.disable = bxt_disable_backlight;
		panel->backlight.set = bxt_set_backlight;
		panel->backlight.get = bxt_get_backlight;
1853
		panel->backlight.hz_to_pwm = bxt_hz_to_pwm;
1854 1855 1856 1857 1858 1859 1860
	} else if (HAS_PCH_CNP(dev_priv)) {
		panel->backlight.setup = cnp_setup_backlight;
		panel->backlight.enable = cnp_enable_backlight;
		panel->backlight.disable = cnp_disable_backlight;
		panel->backlight.set = bxt_set_backlight;
		panel->backlight.get = bxt_get_backlight;
		panel->backlight.hz_to_pwm = cnp_hz_to_pwm;
1861 1862
	} else if (HAS_PCH_LPT(dev_priv) || HAS_PCH_SPT(dev_priv) ||
		   HAS_PCH_KBP(dev_priv)) {
1863 1864 1865 1866 1867
		panel->backlight.setup = lpt_setup_backlight;
		panel->backlight.enable = lpt_enable_backlight;
		panel->backlight.disable = lpt_disable_backlight;
		panel->backlight.set = lpt_set_backlight;
		panel->backlight.get = lpt_get_backlight;
1868
		if (HAS_PCH_LPT(dev_priv))
1869
			panel->backlight.hz_to_pwm = lpt_hz_to_pwm;
1870
		else
1871
			panel->backlight.hz_to_pwm = spt_hz_to_pwm;
1872
	} else if (HAS_PCH_SPLIT(dev_priv)) {
1873 1874 1875 1876 1877 1878
		panel->backlight.setup = pch_setup_backlight;
		panel->backlight.enable = pch_enable_backlight;
		panel->backlight.disable = pch_disable_backlight;
		panel->backlight.set = pch_set_backlight;
		panel->backlight.get = pch_get_backlight;
		panel->backlight.hz_to_pwm = pch_hz_to_pwm;
1879
	} else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) {
1880
		if (connector->base.connector_type == DRM_MODE_CONNECTOR_DSI) {
1881 1882 1883 1884 1885
			panel->backlight.setup = pwm_setup_backlight;
			panel->backlight.enable = pwm_enable_backlight;
			panel->backlight.disable = pwm_disable_backlight;
			panel->backlight.set = pwm_set_backlight;
			panel->backlight.get = pwm_get_backlight;
1886
		} else {
1887 1888 1889 1890 1891 1892
			panel->backlight.setup = vlv_setup_backlight;
			panel->backlight.enable = vlv_enable_backlight;
			panel->backlight.disable = vlv_disable_backlight;
			panel->backlight.set = vlv_set_backlight;
			panel->backlight.get = vlv_get_backlight;
			panel->backlight.hz_to_pwm = vlv_hz_to_pwm;
1893
		}
1894
	} else if (IS_GEN4(dev_priv)) {
1895 1896 1897 1898 1899 1900
		panel->backlight.setup = i965_setup_backlight;
		panel->backlight.enable = i965_enable_backlight;
		panel->backlight.disable = i965_disable_backlight;
		panel->backlight.set = i9xx_set_backlight;
		panel->backlight.get = i9xx_get_backlight;
		panel->backlight.hz_to_pwm = i965_hz_to_pwm;
1901
	} else {
1902 1903 1904 1905 1906 1907
		panel->backlight.setup = i9xx_setup_backlight;
		panel->backlight.enable = i9xx_enable_backlight;
		panel->backlight.disable = i9xx_disable_backlight;
		panel->backlight.set = i9xx_set_backlight;
		panel->backlight.get = i9xx_get_backlight;
		panel->backlight.hz_to_pwm = i9xx_hz_to_pwm;
1908 1909 1910
	}
}

1911
int intel_panel_init(struct intel_panel *panel,
1912 1913
		     struct drm_display_mode *fixed_mode,
		     struct drm_display_mode *downclock_mode)
1914
{
1915 1916
	intel_panel_init_backlight_funcs(panel);

1917
	panel->fixed_mode = fixed_mode;
1918
	panel->downclock_mode = downclock_mode;
1919

1920 1921 1922 1923 1924
	return 0;
}

void intel_panel_fini(struct intel_panel *panel)
{
1925 1926 1927 1928 1929
	struct intel_connector *intel_connector =
		container_of(panel, struct intel_connector, panel);

	if (panel->fixed_mode)
		drm_mode_destroy(intel_connector->base.dev, panel->fixed_mode);
1930 1931 1932 1933

	if (panel->downclock_mode)
		drm_mode_destroy(intel_connector->base.dev,
				panel->downclock_mode);
1934
}