intel_panel.c 59.2 KB
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/*
 * Copyright © 2006-2010 Intel Corporation
 * Copyright (c) 2006 Dave Airlie <airlied@linux.ie>
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
 * to deal in the Software without restriction, including without limitation
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 * and/or sell copies of the Software, and to permit persons to whom the
 * Software is furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice (including the next
 * paragraph) shall be included in all copies or substantial portions of the
 * Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
 * DEALINGS IN THE SOFTWARE.
 *
 * Authors:
 *	Eric Anholt <eric@anholt.net>
 *      Dave Airlie <airlied@linux.ie>
 *      Jesse Barnes <jesse.barnes@intel.com>
 *      Chris Wilson <chris@chris-wilson.co.uk>
 */

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#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt

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#include <linux/kernel.h>
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#include <linux/moduleparam.h>
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#include <linux/pwm.h>
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#include "intel_drv.h"

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#define CRC_PMIC_PWM_PERIOD_NS	21333

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void
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intel_fixed_panel_mode(const struct drm_display_mode *fixed_mode,
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		       struct drm_display_mode *adjusted_mode)
{
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	drm_mode_copy(adjusted_mode, fixed_mode);
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	drm_mode_set_crtcinfo(adjusted_mode, 0);
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}

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/**
 * intel_find_panel_downclock - find the reduced downclock for LVDS in EDID
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 * @dev_priv: i915 device instance
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 * @fixed_mode : panel native mode
 * @connector: LVDS/eDP connector
 *
 * Return downclock_avail
 * Find the reduced downclock for LVDS/eDP in EDID.
 */
struct drm_display_mode *
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intel_find_panel_downclock(struct drm_i915_private *dev_priv,
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			struct drm_display_mode *fixed_mode,
			struct drm_connector *connector)
{
	struct drm_display_mode *scan, *tmp_mode;
	int temp_downclock;

	temp_downclock = fixed_mode->clock;
	tmp_mode = NULL;

	list_for_each_entry(scan, &connector->probed_modes, head) {
		/*
		 * If one mode has the same resolution with the fixed_panel
		 * mode while they have the different refresh rate, it means
		 * that the reduced downclock is found. In such
		 * case we can set the different FPx0/1 to dynamically select
		 * between low and high frequency.
		 */
		if (scan->hdisplay == fixed_mode->hdisplay &&
		    scan->hsync_start == fixed_mode->hsync_start &&
		    scan->hsync_end == fixed_mode->hsync_end &&
		    scan->htotal == fixed_mode->htotal &&
		    scan->vdisplay == fixed_mode->vdisplay &&
		    scan->vsync_start == fixed_mode->vsync_start &&
		    scan->vsync_end == fixed_mode->vsync_end &&
		    scan->vtotal == fixed_mode->vtotal) {
			if (scan->clock < temp_downclock) {
				/*
				 * The downclock is already found. But we
				 * expect to find the lower downclock.
				 */
				temp_downclock = scan->clock;
				tmp_mode = scan;
			}
		}
	}

	if (temp_downclock < fixed_mode->clock)
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		return drm_mode_duplicate(&dev_priv->drm, tmp_mode);
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	else
		return NULL;
}

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/* adjusted_mode has been preset to be the panel's fixed mode */
void
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intel_pch_panel_fitting(struct intel_crtc *intel_crtc,
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			struct intel_crtc_state *pipe_config,
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			int fitting_mode)
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{
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	const struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode;
	int x = 0, y = 0, width = 0, height = 0;
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	/* Native modes don't need fitting */
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	if (adjusted_mode->crtc_hdisplay == pipe_config->pipe_src_w &&
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	    adjusted_mode->crtc_vdisplay == pipe_config->pipe_src_h &&
	    !pipe_config->ycbcr420)
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		goto done;

	switch (fitting_mode) {
	case DRM_MODE_SCALE_CENTER:
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		width = pipe_config->pipe_src_w;
		height = pipe_config->pipe_src_h;
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		x = (adjusted_mode->crtc_hdisplay - width + 1)/2;
		y = (adjusted_mode->crtc_vdisplay - height + 1)/2;
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		break;

	case DRM_MODE_SCALE_ASPECT:
		/* Scale but preserve the aspect ratio */
		{
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			u32 scaled_width = adjusted_mode->crtc_hdisplay
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				* pipe_config->pipe_src_h;
			u32 scaled_height = pipe_config->pipe_src_w
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				* adjusted_mode->crtc_vdisplay;
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			if (scaled_width > scaled_height) { /* pillar */
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				width = scaled_height / pipe_config->pipe_src_h;
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				if (width & 1)
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					width++;
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				x = (adjusted_mode->crtc_hdisplay - width + 1) / 2;
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				y = 0;
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				height = adjusted_mode->crtc_vdisplay;
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			} else if (scaled_width < scaled_height) { /* letter */
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				height = scaled_width / pipe_config->pipe_src_w;
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				if (height & 1)
				    height++;
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				y = (adjusted_mode->crtc_vdisplay - height + 1) / 2;
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				x = 0;
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				width = adjusted_mode->crtc_hdisplay;
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			} else {
				x = y = 0;
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				width = adjusted_mode->crtc_hdisplay;
				height = adjusted_mode->crtc_vdisplay;
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			}
		}
		break;

	case DRM_MODE_SCALE_FULLSCREEN:
		x = y = 0;
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		width = adjusted_mode->crtc_hdisplay;
		height = adjusted_mode->crtc_vdisplay;
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		break;
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	default:
		WARN(1, "bad panel fit mode: %d\n", fitting_mode);
		return;
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	}

done:
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	pipe_config->pch_pfit.pos = (x << 16) | y;
	pipe_config->pch_pfit.size = (width << 16) | height;
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	pipe_config->pch_pfit.enabled = pipe_config->pch_pfit.size != 0;
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}
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static void
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centre_horizontally(struct drm_display_mode *adjusted_mode,
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		    int width)
{
	u32 border, sync_pos, blank_width, sync_width;

	/* keep the hsync and hblank widths constant */
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	sync_width = adjusted_mode->crtc_hsync_end - adjusted_mode->crtc_hsync_start;
	blank_width = adjusted_mode->crtc_hblank_end - adjusted_mode->crtc_hblank_start;
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	sync_pos = (blank_width - sync_width + 1) / 2;

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	border = (adjusted_mode->crtc_hdisplay - width + 1) / 2;
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	border += border & 1; /* make the border even */

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	adjusted_mode->crtc_hdisplay = width;
	adjusted_mode->crtc_hblank_start = width + border;
	adjusted_mode->crtc_hblank_end = adjusted_mode->crtc_hblank_start + blank_width;
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	adjusted_mode->crtc_hsync_start = adjusted_mode->crtc_hblank_start + sync_pos;
	adjusted_mode->crtc_hsync_end = adjusted_mode->crtc_hsync_start + sync_width;
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}

static void
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centre_vertically(struct drm_display_mode *adjusted_mode,
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		  int height)
{
	u32 border, sync_pos, blank_width, sync_width;

	/* keep the vsync and vblank widths constant */
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	sync_width = adjusted_mode->crtc_vsync_end - adjusted_mode->crtc_vsync_start;
	blank_width = adjusted_mode->crtc_vblank_end - adjusted_mode->crtc_vblank_start;
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	sync_pos = (blank_width - sync_width + 1) / 2;

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	border = (adjusted_mode->crtc_vdisplay - height + 1) / 2;
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	adjusted_mode->crtc_vdisplay = height;
	adjusted_mode->crtc_vblank_start = height + border;
	adjusted_mode->crtc_vblank_end = adjusted_mode->crtc_vblank_start + blank_width;
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	adjusted_mode->crtc_vsync_start = adjusted_mode->crtc_vblank_start + sync_pos;
	adjusted_mode->crtc_vsync_end = adjusted_mode->crtc_vsync_start + sync_width;
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}

static inline u32 panel_fitter_scaling(u32 source, u32 target)
{
	/*
	 * Floating point operation is not supported. So the FACTOR
	 * is defined, which can avoid the floating point computation
	 * when calculating the panel ratio.
	 */
#define ACCURACY 12
#define FACTOR (1 << ACCURACY)
	u32 ratio = source * FACTOR / target;
	return (FACTOR * ratio + FACTOR/2) / FACTOR;
}

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static void i965_scale_aspect(struct intel_crtc_state *pipe_config,
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			      u32 *pfit_control)
{
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	const struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode;
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	u32 scaled_width = adjusted_mode->crtc_hdisplay *
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		pipe_config->pipe_src_h;
	u32 scaled_height = pipe_config->pipe_src_w *
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		adjusted_mode->crtc_vdisplay;
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	/* 965+ is easy, it does everything in hw */
	if (scaled_width > scaled_height)
		*pfit_control |= PFIT_ENABLE |
			PFIT_SCALING_PILLAR;
	else if (scaled_width < scaled_height)
		*pfit_control |= PFIT_ENABLE |
			PFIT_SCALING_LETTER;
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	else if (adjusted_mode->crtc_hdisplay != pipe_config->pipe_src_w)
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		*pfit_control |= PFIT_ENABLE | PFIT_SCALING_AUTO;
}

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static void i9xx_scale_aspect(struct intel_crtc_state *pipe_config,
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			      u32 *pfit_control, u32 *pfit_pgm_ratios,
			      u32 *border)
{
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	struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode;
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	u32 scaled_width = adjusted_mode->crtc_hdisplay *
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		pipe_config->pipe_src_h;
	u32 scaled_height = pipe_config->pipe_src_w *
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		adjusted_mode->crtc_vdisplay;
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	u32 bits;

	/*
	 * For earlier chips we have to calculate the scaling
	 * ratio by hand and program it into the
	 * PFIT_PGM_RATIO register
	 */
	if (scaled_width > scaled_height) { /* pillar */
		centre_horizontally(adjusted_mode,
				    scaled_height /
				    pipe_config->pipe_src_h);

		*border = LVDS_BORDER_ENABLE;
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		if (pipe_config->pipe_src_h != adjusted_mode->crtc_vdisplay) {
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			bits = panel_fitter_scaling(pipe_config->pipe_src_h,
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						    adjusted_mode->crtc_vdisplay);
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			*pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT |
					     bits << PFIT_VERT_SCALE_SHIFT);
			*pfit_control |= (PFIT_ENABLE |
					  VERT_INTERP_BILINEAR |
					  HORIZ_INTERP_BILINEAR);
		}
	} else if (scaled_width < scaled_height) { /* letter */
		centre_vertically(adjusted_mode,
				  scaled_width /
				  pipe_config->pipe_src_w);

		*border = LVDS_BORDER_ENABLE;
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		if (pipe_config->pipe_src_w != adjusted_mode->crtc_hdisplay) {
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			bits = panel_fitter_scaling(pipe_config->pipe_src_w,
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						    adjusted_mode->crtc_hdisplay);
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			*pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT |
					     bits << PFIT_VERT_SCALE_SHIFT);
			*pfit_control |= (PFIT_ENABLE |
					  VERT_INTERP_BILINEAR |
					  HORIZ_INTERP_BILINEAR);
		}
	} else {
		/* Aspects match, Let hw scale both directions */
		*pfit_control |= (PFIT_ENABLE |
				  VERT_AUTO_SCALE | HORIZ_AUTO_SCALE |
				  VERT_INTERP_BILINEAR |
				  HORIZ_INTERP_BILINEAR);
	}
}

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void intel_gmch_panel_fitting(struct intel_crtc *intel_crtc,
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			      struct intel_crtc_state *pipe_config,
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			      int fitting_mode)
{
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	struct drm_i915_private *dev_priv = to_i915(intel_crtc->base.dev);
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	u32 pfit_control = 0, pfit_pgm_ratios = 0, border = 0;
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	struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode;
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	/* Native modes don't need fitting */
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	if (adjusted_mode->crtc_hdisplay == pipe_config->pipe_src_w &&
	    adjusted_mode->crtc_vdisplay == pipe_config->pipe_src_h)
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		goto out;

	switch (fitting_mode) {
	case DRM_MODE_SCALE_CENTER:
		/*
		 * For centered modes, we have to calculate border widths &
		 * heights and modify the values programmed into the CRTC.
		 */
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		centre_horizontally(adjusted_mode, pipe_config->pipe_src_w);
		centre_vertically(adjusted_mode, pipe_config->pipe_src_h);
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		border = LVDS_BORDER_ENABLE;
		break;
	case DRM_MODE_SCALE_ASPECT:
		/* Scale but preserve the aspect ratio */
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		if (INTEL_GEN(dev_priv) >= 4)
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			i965_scale_aspect(pipe_config, &pfit_control);
		else
			i9xx_scale_aspect(pipe_config, &pfit_control,
					  &pfit_pgm_ratios, &border);
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		break;
	case DRM_MODE_SCALE_FULLSCREEN:
		/*
		 * Full scaling, even if it changes the aspect ratio.
		 * Fortunately this is all done for us in hw.
		 */
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		if (pipe_config->pipe_src_h != adjusted_mode->crtc_vdisplay ||
		    pipe_config->pipe_src_w != adjusted_mode->crtc_hdisplay) {
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			pfit_control |= PFIT_ENABLE;
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			if (INTEL_GEN(dev_priv) >= 4)
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				pfit_control |= PFIT_SCALING_AUTO;
			else
				pfit_control |= (VERT_AUTO_SCALE |
						 VERT_INTERP_BILINEAR |
						 HORIZ_AUTO_SCALE |
						 HORIZ_INTERP_BILINEAR);
		}
		break;
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	default:
		WARN(1, "bad panel fit mode: %d\n", fitting_mode);
		return;
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	}

	/* 965+ wants fuzzy fitting */
	/* FIXME: handle multiple panels by failing gracefully */
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	if (INTEL_GEN(dev_priv) >= 4)
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		pfit_control |= ((intel_crtc->pipe << PFIT_PIPE_SHIFT) |
				 PFIT_FILTER_FUZZY);

out:
	if ((pfit_control & PFIT_ENABLE) == 0) {
		pfit_control = 0;
		pfit_pgm_ratios = 0;
	}

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	/* Make sure pre-965 set dither correctly for 18bpp panels. */
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	if (INTEL_GEN(dev_priv) < 4 && pipe_config->pipe_bpp == 18)
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		pfit_control |= PANEL_8TO6_DITHER_ENABLE;

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	pipe_config->gmch_pfit.control = pfit_control;
	pipe_config->gmch_pfit.pgm_ratios = pfit_pgm_ratios;
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	pipe_config->gmch_pfit.lvds_border_bits = border;
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}

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enum drm_connector_status
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intel_panel_detect(struct drm_i915_private *dev_priv)
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{
	/* Assume that the BIOS does not lie through the OpRegion... */
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	if (!i915_modparams.panel_ignore_lid && dev_priv->opregion.lid_state) {
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		return *dev_priv->opregion.lid_state & 0x1 ?
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			connector_status_connected :
			connector_status_disconnected;
	}

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	switch (i915_modparams.panel_ignore_lid) {
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	case -2:
		return connector_status_connected;
	case -1:
		return connector_status_disconnected;
	default:
		return connector_status_unknown;
	}
}

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/**
 * scale - scale values from one range to another
 *
 * @source_val: value in range [@source_min..@source_max]
 *
 * Return @source_val in range [@source_min..@source_max] scaled to range
 * [@target_min..@target_max].
 */
static uint32_t scale(uint32_t source_val,
		      uint32_t source_min, uint32_t source_max,
		      uint32_t target_min, uint32_t target_max)
{
	uint64_t target_val;

	WARN_ON(source_min > source_max);
	WARN_ON(target_min > target_max);

	/* defensive */
	source_val = clamp(source_val, source_min, source_max);

	/* avoid overflows */
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	target_val = DIV_ROUND_CLOSEST_ULL((uint64_t)(source_val - source_min) *
			(target_max - target_min), source_max - source_min);
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	target_val += target_min;

	return target_val;
}

/* Scale user_level in range [0..user_max] to [hw_min..hw_max]. */
static inline u32 scale_user_to_hw(struct intel_connector *connector,
				   u32 user_level, u32 user_max)
{
	struct intel_panel *panel = &connector->panel;

	return scale(user_level, 0, user_max,
		     panel->backlight.min, panel->backlight.max);
}

/* Scale user_level in range [0..user_max] to [0..hw_max], clamping the result
 * to [hw_min..hw_max]. */
static inline u32 clamp_user_to_hw(struct intel_connector *connector,
				   u32 user_level, u32 user_max)
{
	struct intel_panel *panel = &connector->panel;
	u32 hw_level;

	hw_level = scale(user_level, 0, user_max, 0, panel->backlight.max);
	hw_level = clamp(hw_level, panel->backlight.min, panel->backlight.max);

	return hw_level;
}

/* Scale hw_level in range [hw_min..hw_max] to [0..user_max]. */
static inline u32 scale_hw_to_user(struct intel_connector *connector,
				   u32 hw_level, u32 user_max)
{
	struct intel_panel *panel = &connector->panel;

	return scale(hw_level, panel->backlight.min, panel->backlight.max,
		     0, user_max);
}

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static u32 intel_panel_compute_brightness(struct intel_connector *connector,
					  u32 val)
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{
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	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
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	struct intel_panel *panel = &connector->panel;

	WARN_ON(panel->backlight.max == 0);
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	if (i915_modparams.invert_brightness < 0)
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		return val;

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	if (i915_modparams.invert_brightness > 0 ||
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	    dev_priv->quirks & QUIRK_INVERT_BRIGHTNESS) {
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		return panel->backlight.max - val + panel->backlight.min;
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	}
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	return val;
}

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static u32 lpt_get_backlight(struct intel_connector *connector)
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{
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	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
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	return I915_READ(BLC_PWM_PCH_CTL2) & BACKLIGHT_DUTY_CYCLE_MASK;
}
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static u32 pch_get_backlight(struct intel_connector *connector)
487
{
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	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
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	return I915_READ(BLC_PWM_CPU_CTL) & BACKLIGHT_DUTY_CYCLE_MASK;
}
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static u32 i9xx_get_backlight(struct intel_connector *connector)
{
495
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
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	struct intel_panel *panel = &connector->panel;
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	u32 val;
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	val = I915_READ(BLC_PWM_CTL) & BACKLIGHT_DUTY_CYCLE_MASK;
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	if (INTEL_INFO(dev_priv)->gen < 4)
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		val >>= 1;
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503
	if (panel->backlight.combination_mode) {
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		u8 lbpc;
505

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		pci_read_config_byte(dev_priv->drm.pdev, LBPC, &lbpc);
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		val *= lbpc;
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	}

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	return val;
}

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static u32 _vlv_get_backlight(struct drm_i915_private *dev_priv, enum pipe pipe)
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{
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	if (WARN_ON(pipe != PIPE_A && pipe != PIPE_B))
		return 0;

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	return I915_READ(VLV_BLC_PWM_CTL(pipe)) & BACKLIGHT_DUTY_CYCLE_MASK;
}

static u32 vlv_get_backlight(struct intel_connector *connector)
{
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	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
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	enum pipe pipe = intel_get_pipe_from_connector(connector);

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	return _vlv_get_backlight(dev_priv, pipe);
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}

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static u32 bxt_get_backlight(struct intel_connector *connector)
{
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	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
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	struct intel_panel *panel = &connector->panel;
533

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	return I915_READ(BXT_BLC_PWM_DUTY(panel->backlight.controller));
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}

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static u32 pwm_get_backlight(struct intel_connector *connector)
{
	struct intel_panel *panel = &connector->panel;
	int duty_ns;

	duty_ns = pwm_get_duty_cycle(panel->backlight.pwm);
	return DIV_ROUND_UP(duty_ns * 100, CRC_PMIC_PWM_PERIOD_NS);
}

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static u32 intel_panel_get_backlight(struct intel_connector *connector)
{
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	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
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	struct intel_panel *panel = &connector->panel;
	u32 val = 0;
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552
	mutex_lock(&dev_priv->backlight_lock);
553

554
	if (panel->backlight.enabled) {
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		val = panel->backlight.get(connector);
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		val = intel_panel_compute_brightness(connector, val);
	}
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	mutex_unlock(&dev_priv->backlight_lock);
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	DRM_DEBUG_DRIVER("get backlight PWM = %d\n", val);
	return val;
}

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static void lpt_set_backlight(const struct drm_connector_state *conn_state, u32 level)
566
{
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	struct intel_connector *connector = to_intel_connector(conn_state->connector);
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	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
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	u32 val = I915_READ(BLC_PWM_PCH_CTL2) & ~BACKLIGHT_DUTY_CYCLE_MASK;
	I915_WRITE(BLC_PWM_PCH_CTL2, val | level);
}

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static void pch_set_backlight(const struct drm_connector_state *conn_state, u32 level)
575
{
576
	struct intel_connector *connector = to_intel_connector(conn_state->connector);
577
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
578 579 580 581
	u32 tmp;

	tmp = I915_READ(BLC_PWM_CPU_CTL) & ~BACKLIGHT_DUTY_CYCLE_MASK;
	I915_WRITE(BLC_PWM_CPU_CTL, tmp | level);
582 583
}

584
static void i9xx_set_backlight(const struct drm_connector_state *conn_state, u32 level)
585
{
586
	struct intel_connector *connector = to_intel_connector(conn_state->connector);
587
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
588
	struct intel_panel *panel = &connector->panel;
589
	u32 tmp, mask;
590

591 592
	WARN_ON(panel->backlight.max == 0);

593
	if (panel->backlight.combination_mode) {
594 595
		u8 lbpc;

596
		lbpc = level * 0xfe / panel->backlight.max + 1;
597
		level /= lbpc;
598
		pci_write_config_byte(dev_priv->drm.pdev, LBPC, lbpc);
599 600
	}

601
	if (IS_GEN4(dev_priv)) {
602 603
		mask = BACKLIGHT_DUTY_CYCLE_MASK;
	} else {
604
		level <<= 1;
605 606
		mask = BACKLIGHT_DUTY_CYCLE_MASK_PNV;
	}
607

608
	tmp = I915_READ(BLC_PWM_CTL) & ~mask;
609 610 611
	I915_WRITE(BLC_PWM_CTL, tmp | level);
}

612
static void vlv_set_backlight(const struct drm_connector_state *conn_state, u32 level)
613
{
614
	struct intel_connector *connector = to_intel_connector(conn_state->connector);
615
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
616
	enum pipe pipe = to_intel_crtc(conn_state->crtc)->pipe;
617 618 619 620 621 622
	u32 tmp;

	tmp = I915_READ(VLV_BLC_PWM_CTL(pipe)) & ~BACKLIGHT_DUTY_CYCLE_MASK;
	I915_WRITE(VLV_BLC_PWM_CTL(pipe), tmp | level);
}

623
static void bxt_set_backlight(const struct drm_connector_state *conn_state, u32 level)
624
{
625
	struct intel_connector *connector = to_intel_connector(conn_state->connector);
626
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
627
	struct intel_panel *panel = &connector->panel;
628

629
	I915_WRITE(BXT_BLC_PWM_DUTY(panel->backlight.controller), level);
630 631
}

632
static void pwm_set_backlight(const struct drm_connector_state *conn_state, u32 level)
633
{
634
	struct intel_panel *panel = &to_intel_connector(conn_state->connector)->panel;
635 636 637 638 639
	int duty_ns = DIV_ROUND_UP(level * CRC_PMIC_PWM_PERIOD_NS, 100);

	pwm_config(panel->backlight.pwm, duty_ns, CRC_PMIC_PWM_PERIOD_NS);
}

640
static void
641
intel_panel_actually_set_backlight(const struct drm_connector_state *conn_state, u32 level)
642
{
643
	struct intel_connector *connector = to_intel_connector(conn_state->connector);
644
	struct intel_panel *panel = &connector->panel;
645 646 647 648

	DRM_DEBUG_DRIVER("set backlight PWM = %d\n", level);

	level = intel_panel_compute_brightness(connector, level);
649
	panel->backlight.set(conn_state, level);
650
}
651

652
/* set backlight brightness to level in range [0..max], scaling wrt hw min */
653
static void intel_panel_set_backlight(const struct drm_connector_state *conn_state,
654
				      u32 user_level, u32 user_max)
655
{
656
	struct intel_connector *connector = to_intel_connector(conn_state->connector);
657
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
658
	struct intel_panel *panel = &connector->panel;
659
	u32 hw_level;
660

661
	if (!panel->backlight.present)
662 663
		return;

664
	mutex_lock(&dev_priv->backlight_lock);
665

666
	WARN_ON(panel->backlight.max == 0);
667

668 669 670 671
	hw_level = scale_user_to_hw(connector, user_level, user_max);
	panel->backlight.level = hw_level;

	if (panel->backlight.enabled)
672
		intel_panel_actually_set_backlight(conn_state, hw_level);
673

674
	mutex_unlock(&dev_priv->backlight_lock);
675 676 677 678 679
}

/* set backlight brightness to level in range [0..max], assuming hw min is
 * respected.
 */
680
void intel_panel_set_backlight_acpi(const struct drm_connector_state *conn_state,
681 682
				    u32 user_level, u32 user_max)
{
683
	struct intel_connector *connector = to_intel_connector(conn_state->connector);
684
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
685 686 687
	struct intel_panel *panel = &connector->panel;
	u32 hw_level;

688
	/*
689
	 * Lack of crtc may occur during driver init because
690 691 692 693
	 * connection_mutex isn't held across the entire backlight
	 * setup + modeset readout, and the BIOS can issue the
	 * requests at any time.
	 */
694
	if (!panel->backlight.present || !conn_state->crtc)
695 696
		return;

697
	mutex_lock(&dev_priv->backlight_lock);
698 699 700 701 702

	WARN_ON(panel->backlight.max == 0);

	hw_level = clamp_user_to_hw(connector, user_level, user_max);
	panel->backlight.level = hw_level;
703

704
	if (panel->backlight.device)
705 706 707 708
		panel->backlight.device->props.brightness =
			scale_hw_to_user(connector,
					 panel->backlight.level,
					 panel->backlight.device->props.max_brightness);
709

710
	if (panel->backlight.enabled)
711
		intel_panel_actually_set_backlight(conn_state, hw_level);
712

713
	mutex_unlock(&dev_priv->backlight_lock);
714 715
}

716
static void lpt_disable_backlight(const struct drm_connector_state *old_conn_state)
717
{
718
	struct intel_connector *connector = to_intel_connector(old_conn_state->connector);
719
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
720 721
	u32 tmp;

722
	intel_panel_actually_set_backlight(old_conn_state, 0);
723

724 725 726 727 728 729 730 731 732 733 734 735 736 737
	/*
	 * Although we don't support or enable CPU PWM with LPT/SPT based
	 * systems, it may have been enabled prior to loading the
	 * driver. Disable to avoid warnings on LCPLL disable.
	 *
	 * This needs rework if we need to add support for CPU PWM on PCH split
	 * platforms.
	 */
	tmp = I915_READ(BLC_PWM_CPU_CTL2);
	if (tmp & BLM_PWM_ENABLE) {
		DRM_DEBUG_KMS("cpu backlight was enabled, disabling\n");
		I915_WRITE(BLC_PWM_CPU_CTL2, tmp & ~BLM_PWM_ENABLE);
	}

738 739 740 741
	tmp = I915_READ(BLC_PWM_PCH_CTL1);
	I915_WRITE(BLC_PWM_PCH_CTL1, tmp & ~BLM_PCH_PWM_ENABLE);
}

742
static void pch_disable_backlight(const struct drm_connector_state *old_conn_state)
743
{
744
	struct intel_connector *connector = to_intel_connector(old_conn_state->connector);
745
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
746 747
	u32 tmp;

748
	intel_panel_actually_set_backlight(old_conn_state, 0);
749

750 751 752 753 754 755 756
	tmp = I915_READ(BLC_PWM_CPU_CTL2);
	I915_WRITE(BLC_PWM_CPU_CTL2, tmp & ~BLM_PWM_ENABLE);

	tmp = I915_READ(BLC_PWM_PCH_CTL1);
	I915_WRITE(BLC_PWM_PCH_CTL1, tmp & ~BLM_PCH_PWM_ENABLE);
}

757
static void i9xx_disable_backlight(const struct drm_connector_state *old_conn_state)
758
{
759
	intel_panel_actually_set_backlight(old_conn_state, 0);
760 761
}

762
static void i965_disable_backlight(const struct drm_connector_state *old_conn_state)
763
{
764
	struct drm_i915_private *dev_priv = to_i915(old_conn_state->connector->dev);
765 766
	u32 tmp;

767
	intel_panel_actually_set_backlight(old_conn_state, 0);
768

769 770 771 772
	tmp = I915_READ(BLC_PWM_CTL2);
	I915_WRITE(BLC_PWM_CTL2, tmp & ~BLM_PWM_ENABLE);
}

773
static void vlv_disable_backlight(const struct drm_connector_state *old_conn_state)
774
{
775
	struct intel_connector *connector = to_intel_connector(old_conn_state->connector);
776
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
777
	enum pipe pipe = to_intel_crtc(old_conn_state->crtc)->pipe;
778 779
	u32 tmp;

780
	intel_panel_actually_set_backlight(old_conn_state, 0);
781

782 783 784 785
	tmp = I915_READ(VLV_BLC_PWM_CTL2(pipe));
	I915_WRITE(VLV_BLC_PWM_CTL2(pipe), tmp & ~BLM_PWM_ENABLE);
}

786
static void bxt_disable_backlight(const struct drm_connector_state *old_conn_state)
787
{
788
	struct intel_connector *connector = to_intel_connector(old_conn_state->connector);
789
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
790 791
	struct intel_panel *panel = &connector->panel;
	u32 tmp, val;
792

793
	intel_panel_actually_set_backlight(old_conn_state, 0);
794

795 796 797 798 799 800 801 802 803
	tmp = I915_READ(BXT_BLC_PWM_CTL(panel->backlight.controller));
	I915_WRITE(BXT_BLC_PWM_CTL(panel->backlight.controller),
			tmp & ~BXT_BLC_PWM_ENABLE);

	if (panel->backlight.controller == 1) {
		val = I915_READ(UTIL_PIN_CTL);
		val &= ~UTIL_PIN_ENABLE;
		I915_WRITE(UTIL_PIN_CTL, val);
	}
804 805
}

806
static void cnp_disable_backlight(const struct drm_connector_state *old_conn_state)
807
{
808
	struct intel_connector *connector = to_intel_connector(old_conn_state->connector);
809 810 811 812
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
	struct intel_panel *panel = &connector->panel;
	u32 tmp;

813
	intel_panel_actually_set_backlight(old_conn_state, 0);
814 815 816 817 818 819

	tmp = I915_READ(BXT_BLC_PWM_CTL(panel->backlight.controller));
	I915_WRITE(BXT_BLC_PWM_CTL(panel->backlight.controller),
		   tmp & ~BXT_BLC_PWM_ENABLE);
}

820
static void pwm_disable_backlight(const struct drm_connector_state *old_conn_state)
821
{
822
	struct intel_connector *connector = to_intel_connector(old_conn_state->connector);
823 824 825 826 827 828 829 830
	struct intel_panel *panel = &connector->panel;

	/* Disable the backlight */
	pwm_config(panel->backlight.pwm, 0, CRC_PMIC_PWM_PERIOD_NS);
	usleep_range(2000, 3000);
	pwm_disable(panel->backlight.pwm);
}

831
void intel_panel_disable_backlight(const struct drm_connector_state *old_conn_state)
832
{
833
	struct intel_connector *connector = to_intel_connector(old_conn_state->connector);
834
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
835
	struct intel_panel *panel = &connector->panel;
836

837
	if (!panel->backlight.present)
838 839
		return;

840
	/*
841
	 * Do not disable backlight on the vga_switcheroo path. When switching
842 843 844 845
	 * away from i915, the other client may depend on i915 to handle the
	 * backlight. This will leave the backlight on unnecessarily when
	 * another client is not activated.
	 */
846
	if (dev_priv->drm.switch_power_state == DRM_SWITCH_POWER_CHANGING) {
847 848 849 850
		DRM_DEBUG_DRIVER("Skipping backlight disable on vga switch\n");
		return;
	}

851
	mutex_lock(&dev_priv->backlight_lock);
852

853 854
	if (panel->backlight.device)
		panel->backlight.device->props.power = FB_BLANK_POWERDOWN;
855
	panel->backlight.enabled = false;
856
	panel->backlight.disable(old_conn_state);
857

858
	mutex_unlock(&dev_priv->backlight_lock);
859
}
860

861 862
static void lpt_enable_backlight(const struct intel_crtc_state *crtc_state,
				 const struct drm_connector_state *conn_state)
863
{
864
	struct intel_connector *connector = to_intel_connector(conn_state->connector);
865
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
866
	struct intel_panel *panel = &connector->panel;
867
	u32 pch_ctl1, pch_ctl2, schicken;
868 869 870 871 872 873 874

	pch_ctl1 = I915_READ(BLC_PWM_PCH_CTL1);
	if (pch_ctl1 & BLM_PCH_PWM_ENABLE) {
		DRM_DEBUG_KMS("pch backlight already enabled\n");
		pch_ctl1 &= ~BLM_PCH_PWM_ENABLE;
		I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1);
	}
875

876 877 878 879 880 881 882 883 884 885 886 887 888 889 890 891
	if (HAS_PCH_LPT(dev_priv)) {
		schicken = I915_READ(SOUTH_CHICKEN2);
		if (panel->backlight.alternate_pwm_increment)
			schicken |= LPT_PWM_GRANULARITY;
		else
			schicken &= ~LPT_PWM_GRANULARITY;
		I915_WRITE(SOUTH_CHICKEN2, schicken);
	} else {
		schicken = I915_READ(SOUTH_CHICKEN1);
		if (panel->backlight.alternate_pwm_increment)
			schicken |= SPT_PWM_GRANULARITY;
		else
			schicken &= ~SPT_PWM_GRANULARITY;
		I915_WRITE(SOUTH_CHICKEN1, schicken);
	}

892 893
	pch_ctl2 = panel->backlight.max << 16;
	I915_WRITE(BLC_PWM_PCH_CTL2, pch_ctl2);
894

895 896 897
	pch_ctl1 = 0;
	if (panel->backlight.active_low_pwm)
		pch_ctl1 |= BLM_PCH_POLARITY;
898

899 900 901
	/* After LPT, override is the default. */
	if (HAS_PCH_LPT(dev_priv))
		pch_ctl1 |= BLM_PCH_OVERRIDE_ENABLE;
902 903 904 905 906 907

	I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1);
	POSTING_READ(BLC_PWM_PCH_CTL1);
	I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1 | BLM_PCH_PWM_ENABLE);

	/* This won't stick until the above enable. */
908
	intel_panel_actually_set_backlight(conn_state, panel->backlight.level);
909 910
}

911 912
static void pch_enable_backlight(const struct intel_crtc_state *crtc_state,
				 const struct drm_connector_state *conn_state)
913
{
914
	struct intel_connector *connector = to_intel_connector(conn_state->connector);
915
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
916
	struct intel_panel *panel = &connector->panel;
917
	enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
918
	u32 cpu_ctl2, pch_ctl1, pch_ctl2;
919

920 921
	cpu_ctl2 = I915_READ(BLC_PWM_CPU_CTL2);
	if (cpu_ctl2 & BLM_PWM_ENABLE) {
922
		DRM_DEBUG_KMS("cpu backlight already enabled\n");
923 924 925
		cpu_ctl2 &= ~BLM_PWM_ENABLE;
		I915_WRITE(BLC_PWM_CPU_CTL2, cpu_ctl2);
	}
926

927 928 929 930 931 932
	pch_ctl1 = I915_READ(BLC_PWM_PCH_CTL1);
	if (pch_ctl1 & BLM_PCH_PWM_ENABLE) {
		DRM_DEBUG_KMS("pch backlight already enabled\n");
		pch_ctl1 &= ~BLM_PCH_PWM_ENABLE;
		I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1);
	}
933 934

	if (cpu_transcoder == TRANSCODER_EDP)
935
		cpu_ctl2 = BLM_TRANSCODER_EDP;
936
	else
937 938
		cpu_ctl2 = BLM_PIPE(cpu_transcoder);
	I915_WRITE(BLC_PWM_CPU_CTL2, cpu_ctl2);
939
	POSTING_READ(BLC_PWM_CPU_CTL2);
940
	I915_WRITE(BLC_PWM_CPU_CTL2, cpu_ctl2 | BLM_PWM_ENABLE);
941

942
	/* This won't stick until the above enable. */
943
	intel_panel_actually_set_backlight(conn_state, panel->backlight.level);
944 945 946 947 948 949 950

	pch_ctl2 = panel->backlight.max << 16;
	I915_WRITE(BLC_PWM_PCH_CTL2, pch_ctl2);

	pch_ctl1 = 0;
	if (panel->backlight.active_low_pwm)
		pch_ctl1 |= BLM_PCH_POLARITY;
951

952 953 954
	I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1);
	POSTING_READ(BLC_PWM_PCH_CTL1);
	I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1 | BLM_PCH_PWM_ENABLE);
955 956
}

957 958
static void i9xx_enable_backlight(const struct intel_crtc_state *crtc_state,
				  const struct drm_connector_state *conn_state)
959
{
960
	struct intel_connector *connector = to_intel_connector(conn_state->connector);
961
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
962
	struct intel_panel *panel = &connector->panel;
963 964 965 966
	u32 ctl, freq;

	ctl = I915_READ(BLC_PWM_CTL);
	if (ctl & BACKLIGHT_DUTY_CYCLE_MASK_PNV) {
967
		DRM_DEBUG_KMS("backlight already enabled\n");
968 969
		I915_WRITE(BLC_PWM_CTL, 0);
	}
970

971 972 973 974 975
	freq = panel->backlight.max;
	if (panel->backlight.combination_mode)
		freq /= 0xff;

	ctl = freq << 17;
976
	if (panel->backlight.combination_mode)
977
		ctl |= BLM_LEGACY_MODE;
978
	if (IS_PINEVIEW(dev_priv) && panel->backlight.active_low_pwm)
979 980 981 982 983 984
		ctl |= BLM_POLARITY_PNV;

	I915_WRITE(BLC_PWM_CTL, ctl);
	POSTING_READ(BLC_PWM_CTL);

	/* XXX: combine this into above write? */
985
	intel_panel_actually_set_backlight(conn_state, panel->backlight.level);
986 987 988 989 990 991

	/*
	 * Needed to enable backlight on some 855gm models. BLC_HIST_CTL is
	 * 855gm only, but checking for gen2 is safe, as 855gm is the only gen2
	 * that has backlight.
	 */
992
	if (IS_GEN2(dev_priv))
993
		I915_WRITE(BLC_HIST_CTL, BLM_HISTOGRAM_ENABLE);
994
}
995

996 997
static void i965_enable_backlight(const struct intel_crtc_state *crtc_state,
				  const struct drm_connector_state *conn_state)
998
{
999
	struct intel_connector *connector = to_intel_connector(conn_state->connector);
1000
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1001
	struct intel_panel *panel = &connector->panel;
1002
	enum pipe pipe = to_intel_crtc(conn_state->crtc)->pipe;
1003
	u32 ctl, ctl2, freq;
1004

1005 1006
	ctl2 = I915_READ(BLC_PWM_CTL2);
	if (ctl2 & BLM_PWM_ENABLE) {
1007
		DRM_DEBUG_KMS("backlight already enabled\n");
1008 1009 1010
		ctl2 &= ~BLM_PWM_ENABLE;
		I915_WRITE(BLC_PWM_CTL2, ctl2);
	}
1011

1012 1013 1014
	freq = panel->backlight.max;
	if (panel->backlight.combination_mode)
		freq /= 0xff;
1015

1016 1017
	ctl = freq << 16;
	I915_WRITE(BLC_PWM_CTL, ctl);
1018

1019 1020 1021 1022 1023 1024 1025 1026
	ctl2 = BLM_PIPE(pipe);
	if (panel->backlight.combination_mode)
		ctl2 |= BLM_COMBINATION_MODE;
	if (panel->backlight.active_low_pwm)
		ctl2 |= BLM_POLARITY_I965;
	I915_WRITE(BLC_PWM_CTL2, ctl2);
	POSTING_READ(BLC_PWM_CTL2);
	I915_WRITE(BLC_PWM_CTL2, ctl2 | BLM_PWM_ENABLE);
1027

1028
	intel_panel_actually_set_backlight(conn_state, panel->backlight.level);
1029 1030
}

1031 1032
static void vlv_enable_backlight(const struct intel_crtc_state *crtc_state,
				 const struct drm_connector_state *conn_state)
1033
{
1034
	struct intel_connector *connector = to_intel_connector(conn_state->connector);
1035
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1036
	struct intel_panel *panel = &connector->panel;
1037
	enum pipe pipe = to_intel_crtc(crtc_state->base.crtc)->pipe;
1038
	u32 ctl, ctl2;
1039

1040 1041
	ctl2 = I915_READ(VLV_BLC_PWM_CTL2(pipe));
	if (ctl2 & BLM_PWM_ENABLE) {
1042
		DRM_DEBUG_KMS("backlight already enabled\n");
1043 1044 1045
		ctl2 &= ~BLM_PWM_ENABLE;
		I915_WRITE(VLV_BLC_PWM_CTL2(pipe), ctl2);
	}
1046

1047 1048
	ctl = panel->backlight.max << 16;
	I915_WRITE(VLV_BLC_PWM_CTL(pipe), ctl);
1049

1050
	/* XXX: combine this into above write? */
1051
	intel_panel_actually_set_backlight(conn_state, panel->backlight.level);
1052

1053 1054 1055 1056
	ctl2 = 0;
	if (panel->backlight.active_low_pwm)
		ctl2 |= BLM_POLARITY_I965;
	I915_WRITE(VLV_BLC_PWM_CTL2(pipe), ctl2);
1057
	POSTING_READ(VLV_BLC_PWM_CTL2(pipe));
1058
	I915_WRITE(VLV_BLC_PWM_CTL2(pipe), ctl2 | BLM_PWM_ENABLE);
1059 1060
}

1061 1062
static void bxt_enable_backlight(const struct intel_crtc_state *crtc_state,
				 const struct drm_connector_state *conn_state)
1063
{
1064
	struct intel_connector *connector = to_intel_connector(conn_state->connector);
1065
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1066
	struct intel_panel *panel = &connector->panel;
1067
	enum pipe pipe = to_intel_crtc(crtc_state->base.crtc)->pipe;
1068 1069
	u32 pwm_ctl, val;

1070
	/* Controller 1 uses the utility pin. */
1071 1072 1073 1074 1075 1076 1077
	if (panel->backlight.controller == 1) {
		val = I915_READ(UTIL_PIN_CTL);
		if (val & UTIL_PIN_ENABLE) {
			DRM_DEBUG_KMS("util pin already enabled\n");
			val &= ~UTIL_PIN_ENABLE;
			I915_WRITE(UTIL_PIN_CTL, val);
		}
1078

1079 1080 1081 1082 1083 1084 1085 1086
		val = 0;
		if (panel->backlight.util_pin_active_low)
			val |= UTIL_PIN_POLARITY;
		I915_WRITE(UTIL_PIN_CTL, val | UTIL_PIN_PIPE(pipe) |
				UTIL_PIN_MODE_PWM | UTIL_PIN_ENABLE);
	}

	pwm_ctl = I915_READ(BXT_BLC_PWM_CTL(panel->backlight.controller));
1087 1088 1089
	if (pwm_ctl & BXT_BLC_PWM_ENABLE) {
		DRM_DEBUG_KMS("backlight already enabled\n");
		pwm_ctl &= ~BXT_BLC_PWM_ENABLE;
1090 1091
		I915_WRITE(BXT_BLC_PWM_CTL(panel->backlight.controller),
				pwm_ctl);
1092 1093
	}

1094 1095
	I915_WRITE(BXT_BLC_PWM_FREQ(panel->backlight.controller),
			panel->backlight.max);
1096

1097
	intel_panel_actually_set_backlight(conn_state, panel->backlight.level);
1098 1099 1100 1101 1102

	pwm_ctl = 0;
	if (panel->backlight.active_low_pwm)
		pwm_ctl |= BXT_BLC_PWM_POLARITY;

1103 1104 1105 1106
	I915_WRITE(BXT_BLC_PWM_CTL(panel->backlight.controller), pwm_ctl);
	POSTING_READ(BXT_BLC_PWM_CTL(panel->backlight.controller));
	I915_WRITE(BXT_BLC_PWM_CTL(panel->backlight.controller),
			pwm_ctl | BXT_BLC_PWM_ENABLE);
1107 1108
}

1109 1110
static void cnp_enable_backlight(const struct intel_crtc_state *crtc_state,
				 const struct drm_connector_state *conn_state)
1111
{
1112
	struct intel_connector *connector = to_intel_connector(conn_state->connector);
1113 1114 1115 1116 1117 1118 1119 1120 1121 1122 1123 1124 1125 1126 1127
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
	struct intel_panel *panel = &connector->panel;
	u32 pwm_ctl;

	pwm_ctl = I915_READ(BXT_BLC_PWM_CTL(panel->backlight.controller));
	if (pwm_ctl & BXT_BLC_PWM_ENABLE) {
		DRM_DEBUG_KMS("backlight already enabled\n");
		pwm_ctl &= ~BXT_BLC_PWM_ENABLE;
		I915_WRITE(BXT_BLC_PWM_CTL(panel->backlight.controller),
			   pwm_ctl);
	}

	I915_WRITE(BXT_BLC_PWM_FREQ(panel->backlight.controller),
		   panel->backlight.max);

1128
	intel_panel_actually_set_backlight(conn_state, panel->backlight.level);
1129 1130 1131 1132 1133 1134 1135 1136 1137 1138 1139

	pwm_ctl = 0;
	if (panel->backlight.active_low_pwm)
		pwm_ctl |= BXT_BLC_PWM_POLARITY;

	I915_WRITE(BXT_BLC_PWM_CTL(panel->backlight.controller), pwm_ctl);
	POSTING_READ(BXT_BLC_PWM_CTL(panel->backlight.controller));
	I915_WRITE(BXT_BLC_PWM_CTL(panel->backlight.controller),
		   pwm_ctl | BXT_BLC_PWM_ENABLE);
}

1140 1141
static void pwm_enable_backlight(const struct intel_crtc_state *crtc_state,
				 const struct drm_connector_state *conn_state)
1142
{
1143
	struct intel_connector *connector = to_intel_connector(conn_state->connector);
1144 1145 1146
	struct intel_panel *panel = &connector->panel;

	pwm_enable(panel->backlight.pwm);
1147
	intel_panel_actually_set_backlight(conn_state, panel->backlight.level);
1148 1149
}

1150 1151
void intel_panel_enable_backlight(const struct intel_crtc_state *crtc_state,
				  const struct drm_connector_state *conn_state)
1152
{
1153
	struct intel_connector *connector = to_intel_connector(conn_state->connector);
1154
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1155
	struct intel_panel *panel = &connector->panel;
1156
	enum pipe pipe = to_intel_crtc(crtc_state->base.crtc)->pipe;
1157

1158
	if (!panel->backlight.present)
1159 1160
		return;

1161
	DRM_DEBUG_KMS("pipe %c\n", pipe_name(pipe));
1162

1163
	mutex_lock(&dev_priv->backlight_lock);
1164

1165 1166
	WARN_ON(panel->backlight.max == 0);

1167
	if (panel->backlight.level <= panel->backlight.min) {
1168
		panel->backlight.level = panel->backlight.max;
1169 1170
		if (panel->backlight.device)
			panel->backlight.device->props.brightness =
1171 1172 1173
				scale_hw_to_user(connector,
						 panel->backlight.level,
						 panel->backlight.device->props.max_brightness);
1174
	}
1175

1176
	panel->backlight.enable(crtc_state, conn_state);
1177
	panel->backlight.enabled = true;
1178 1179
	if (panel->backlight.device)
		panel->backlight.device->props.power = FB_BLANK_UNBLANK;
1180

1181
	mutex_unlock(&dev_priv->backlight_lock);
1182 1183
}

1184
#if IS_ENABLED(CONFIG_BACKLIGHT_CLASS_DEVICE)
1185
static int intel_backlight_device_update_status(struct backlight_device *bd)
1186
{
1187
	struct intel_connector *connector = bl_get_data(bd);
1188
	struct intel_panel *panel = &connector->panel;
1189 1190
	struct drm_device *dev = connector->base.dev;

1191
	drm_modeset_lock(&dev->mode_config.connection_mutex, NULL);
1192 1193
	DRM_DEBUG_KMS("updating intel_backlight, brightness=%d/%d\n",
		      bd->props.brightness, bd->props.max_brightness);
1194
	intel_panel_set_backlight(connector->base.state, bd->props.brightness,
1195
				  bd->props.max_brightness);
1196 1197 1198 1199 1200 1201 1202 1203

	/*
	 * Allow flipping bl_power as a sub-state of enabled. Sadly the
	 * backlight class device does not make it easy to to differentiate
	 * between callbacks for brightness and bl_power, so our backlight_power
	 * callback needs to take this into account.
	 */
	if (panel->backlight.enabled) {
1204
		if (panel->backlight.power) {
1205 1206
			bool enable = bd->props.power == FB_BLANK_UNBLANK &&
				bd->props.brightness != 0;
1207
			panel->backlight.power(connector, enable);
1208 1209 1210 1211 1212
		}
	} else {
		bd->props.power = FB_BLANK_POWERDOWN;
	}

1213
	drm_modeset_unlock(&dev->mode_config.connection_mutex);
1214 1215 1216
	return 0;
}

1217
static int intel_backlight_device_get_brightness(struct backlight_device *bd)
1218
{
1219 1220
	struct intel_connector *connector = bl_get_data(bd);
	struct drm_device *dev = connector->base.dev;
1221
	struct drm_i915_private *dev_priv = to_i915(dev);
1222
	u32 hw_level;
1223
	int ret;
1224

1225
	intel_runtime_pm_get(dev_priv);
1226
	drm_modeset_lock(&dev->mode_config.connection_mutex, NULL);
1227 1228 1229 1230

	hw_level = intel_panel_get_backlight(connector);
	ret = scale_hw_to_user(connector, hw_level, bd->props.max_brightness);

1231
	drm_modeset_unlock(&dev->mode_config.connection_mutex);
1232
	intel_runtime_pm_put(dev_priv);
1233

1234
	return ret;
1235 1236
}

1237 1238 1239
static const struct backlight_ops intel_backlight_device_ops = {
	.update_status = intel_backlight_device_update_status,
	.get_brightness = intel_backlight_device_get_brightness,
1240 1241
};

1242
int intel_backlight_device_register(struct intel_connector *connector)
1243
{
1244
	struct intel_panel *panel = &connector->panel;
1245 1246
	struct backlight_properties props;

1247
	if (WARN_ON(panel->backlight.device))
1248 1249
		return -ENODEV;

1250 1251 1252
	if (!panel->backlight.present)
		return 0;

1253
	WARN_ON(panel->backlight.max == 0);
1254

1255
	memset(&props, 0, sizeof(props));
1256
	props.type = BACKLIGHT_RAW;
1257 1258 1259 1260 1261

	/*
	 * Note: Everything should work even if the backlight device max
	 * presented to the userspace is arbitrarily chosen.
	 */
1262
	props.max_brightness = panel->backlight.max;
1263 1264 1265
	props.brightness = scale_hw_to_user(connector,
					    panel->backlight.level,
					    props.max_brightness);
1266

1267 1268 1269 1270 1271
	if (panel->backlight.enabled)
		props.power = FB_BLANK_UNBLANK;
	else
		props.power = FB_BLANK_POWERDOWN;

1272 1273 1274 1275 1276
	/*
	 * Note: using the same name independent of the connector prevents
	 * registration of multiple backlight devices in the driver.
	 */
	panel->backlight.device =
1277
		backlight_device_register("intel_backlight",
1278 1279 1280
					  connector->base.kdev,
					  connector,
					  &intel_backlight_device_ops, &props);
1281

1282
	if (IS_ERR(panel->backlight.device)) {
1283
		DRM_ERROR("Failed to register backlight: %ld\n",
1284 1285
			  PTR_ERR(panel->backlight.device));
		panel->backlight.device = NULL;
1286 1287
		return -ENODEV;
	}
1288 1289 1290 1291

	DRM_DEBUG_KMS("Connector %s backlight sysfs interface registered\n",
		      connector->base.name);

1292 1293 1294
	return 0;
}

1295
void intel_backlight_device_unregister(struct intel_connector *connector)
1296
{
1297 1298 1299 1300 1301
	struct intel_panel *panel = &connector->panel;

	if (panel->backlight.device) {
		backlight_device_unregister(panel->backlight.device);
		panel->backlight.device = NULL;
1302
	}
1303
}
1304 1305
#endif /* CONFIG_BACKLIGHT_CLASS_DEVICE */

1306 1307 1308 1309 1310 1311 1312 1313 1314 1315 1316
/*
 * CNP: PWM clock frequency is 19.2 MHz or 24 MHz.
 *      PWM increment = 1
 */
static u32 cnp_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz)
{
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);

	return DIV_ROUND_CLOSEST(KHz(dev_priv->rawclk_freq), pwm_freq_hz);
}

1317 1318 1319 1320 1321
/*
 * BXT: PWM clock frequency = 19.2 MHz.
 */
static u32 bxt_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz)
{
1322
	return DIV_ROUND_CLOSEST(KHz(19200), pwm_freq_hz);
1323 1324
}

1325
/*
1326 1327 1328 1329 1330 1331
 * SPT: This value represents the period of the PWM stream in clock periods
 * multiplied by 16 (default increment) or 128 (alternate increment selected in
 * SCHICKEN_1 bit 0). PWM clock is 24 MHz.
 */
static u32 spt_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz)
{
1332
	struct intel_panel *panel = &connector->panel;
1333
	u32 mul;
1334

1335
	if (panel->backlight.alternate_pwm_increment)
1336 1337 1338 1339
		mul = 128;
	else
		mul = 16;

1340
	return DIV_ROUND_CLOSEST(MHz(24), pwm_freq_hz * mul);
1341 1342 1343 1344 1345 1346 1347 1348 1349
}

/*
 * LPT: This value represents the period of the PWM stream in clock periods
 * multiplied by 128 (default increment) or 16 (alternate increment, selected in
 * LPT SOUTH_CHICKEN2 register bit 5).
 */
static u32 lpt_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz)
{
1350
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1351
	struct intel_panel *panel = &connector->panel;
1352 1353
	u32 mul, clock;

1354
	if (panel->backlight.alternate_pwm_increment)
1355 1356 1357 1358
		mul = 16;
	else
		mul = 128;

V
Ville Syrjälä 已提交
1359
	if (HAS_PCH_LPT_H(dev_priv))
1360 1361 1362 1363
		clock = MHz(135); /* LPT:H */
	else
		clock = MHz(24); /* LPT:LP */

1364
	return DIV_ROUND_CLOSEST(clock, pwm_freq_hz * mul);
1365 1366 1367 1368 1369 1370 1371 1372
}

/*
 * ILK/SNB/IVB: This value represents the period of the PWM stream in PCH
 * display raw clocks multiplied by 128.
 */
static u32 pch_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz)
{
1373
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1374

1375
	return DIV_ROUND_CLOSEST(KHz(dev_priv->rawclk_freq), pwm_freq_hz * 128);
1376 1377 1378 1379 1380 1381
}

/*
 * Gen2: This field determines the number of time base events (display core
 * clock frequency/32) in total for a complete cycle of modulated backlight
 * control.
1382
 *
1383 1384 1385 1386 1387
 * Gen3: A time base event equals the display core clock ([DevPNV] HRAW clock)
 * divided by 32.
 */
static u32 i9xx_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz)
{
1388
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1389 1390
	int clock;

1391 1392
	if (IS_PINEVIEW(dev_priv))
		clock = KHz(dev_priv->rawclk_freq);
1393
	else
1394
		clock = KHz(dev_priv->cdclk.hw.cdclk);
1395

1396
	return DIV_ROUND_CLOSEST(clock, pwm_freq_hz * 32);
1397 1398 1399 1400
}

/*
 * Gen4: This value represents the period of the PWM stream in display core
1401 1402
 * clocks ([DevCTG] HRAW clocks) multiplied by 128.
 *
1403 1404 1405
 */
static u32 i965_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz)
{
1406
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1407 1408 1409
	int clock;

	if (IS_G4X(dev_priv))
1410
		clock = KHz(dev_priv->rawclk_freq);
1411
	else
1412
		clock = KHz(dev_priv->cdclk.hw.cdclk);
1413

1414
	return DIV_ROUND_CLOSEST(clock, pwm_freq_hz * 128);
1415 1416 1417 1418 1419 1420 1421 1422 1423
}

/*
 * VLV: This value represents the period of the PWM stream in display core
 * clocks ([DevCTG] 200MHz HRAW clocks) multiplied by 128 or 25MHz S0IX clocks
 * multiplied by 16. CHV uses a 19.2MHz S0IX clock.
 */
static u32 vlv_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz)
{
1424 1425
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
	int mul, clock;
1426 1427

	if ((I915_READ(CBR1_VLV) & CBR_PWM_CLOCK_MUX_SELECT) == 0) {
1428 1429
		if (IS_CHERRYVIEW(dev_priv))
			clock = KHz(19200);
1430
		else
1431 1432
			clock = MHz(25);
		mul = 16;
1433
	} else {
1434 1435
		clock = KHz(dev_priv->rawclk_freq);
		mul = 128;
1436
	}
1437

1438
	return DIV_ROUND_CLOSEST(clock, pwm_freq_hz * mul);
1439 1440 1441 1442
}

static u32 get_backlight_max_vbt(struct intel_connector *connector)
{
1443
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1444
	struct intel_panel *panel = &connector->panel;
1445 1446 1447
	u16 pwm_freq_hz = dev_priv->vbt.backlight.pwm_freq_hz;
	u32 pwm;

1448 1449
	if (!panel->backlight.hz_to_pwm) {
		DRM_DEBUG_KMS("backlight frequency conversion not supported\n");
1450 1451 1452
		return 0;
	}

1453 1454 1455 1456 1457 1458 1459
	if (pwm_freq_hz) {
		DRM_DEBUG_KMS("VBT defined backlight frequency %u Hz\n",
			      pwm_freq_hz);
	} else {
		pwm_freq_hz = 200;
		DRM_DEBUG_KMS("default backlight frequency %u Hz\n",
			      pwm_freq_hz);
1460 1461
	}

1462
	pwm = panel->backlight.hz_to_pwm(connector, pwm_freq_hz);
1463 1464 1465 1466 1467 1468 1469 1470 1471 1472
	if (!pwm) {
		DRM_DEBUG_KMS("backlight frequency conversion failed\n");
		return 0;
	}

	return pwm;
}

/*
 * Note: The setup hooks can't assume pipe is set!
1473
 */
1474 1475
static u32 get_backlight_min_vbt(struct intel_connector *connector)
{
1476
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1477
	struct intel_panel *panel = &connector->panel;
1478
	int min;
1479 1480 1481

	WARN_ON(panel->backlight.max == 0);

1482 1483 1484 1485 1486 1487 1488 1489 1490 1491 1492 1493 1494
	/*
	 * XXX: If the vbt value is 255, it makes min equal to max, which leads
	 * to problems. There are such machines out there. Either our
	 * interpretation is wrong or the vbt has bogus data. Or both. Safeguard
	 * against this by letting the minimum be at most (arbitrarily chosen)
	 * 25% of the max.
	 */
	min = clamp_t(int, dev_priv->vbt.backlight.min_brightness, 0, 64);
	if (min != dev_priv->vbt.backlight.min_brightness) {
		DRM_DEBUG_KMS("clamping VBT min backlight %d/255 to %d/255\n",
			      dev_priv->vbt.backlight.min_brightness, min);
	}

1495
	/* vbt value is a coefficient in range [0..255] */
1496
	return scale(min, 0, 255, 0, panel->backlight.max);
1497 1498
}

1499
static int lpt_setup_backlight(struct intel_connector *connector, enum pipe unused)
1500
{
1501
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1502 1503
	struct intel_panel *panel = &connector->panel;
	u32 pch_ctl1, pch_ctl2, val;
1504 1505 1506 1507 1508 1509 1510
	bool alt;

	if (HAS_PCH_LPT(dev_priv))
		alt = I915_READ(SOUTH_CHICKEN2) & LPT_PWM_GRANULARITY;
	else
		alt = I915_READ(SOUTH_CHICKEN1) & SPT_PWM_GRANULARITY;
	panel->backlight.alternate_pwm_increment = alt;
1511 1512 1513 1514 1515 1516

	pch_ctl1 = I915_READ(BLC_PWM_PCH_CTL1);
	panel->backlight.active_low_pwm = pch_ctl1 & BLM_PCH_POLARITY;

	pch_ctl2 = I915_READ(BLC_PWM_PCH_CTL2);
	panel->backlight.max = pch_ctl2 >> 16;
1517 1518 1519 1520

	if (!panel->backlight.max)
		panel->backlight.max = get_backlight_max_vbt(connector);

1521 1522 1523
	if (!panel->backlight.max)
		return -ENODEV;

1524 1525
	panel->backlight.min = get_backlight_min_vbt(connector);

1526
	val = lpt_get_backlight(connector);
1527 1528 1529
	val = intel_panel_compute_brightness(connector, val);
	panel->backlight.level = clamp(val, panel->backlight.min,
				       panel->backlight.max);
1530

1531
	panel->backlight.enabled = pch_ctl1 & BLM_PCH_PWM_ENABLE;
1532 1533 1534 1535

	return 0;
}

1536
static int pch_setup_backlight(struct intel_connector *connector, enum pipe unused)
1537
{
1538
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1539
	struct intel_panel *panel = &connector->panel;
1540
	u32 cpu_ctl2, pch_ctl1, pch_ctl2, val;
1541

1542 1543 1544 1545 1546
	pch_ctl1 = I915_READ(BLC_PWM_PCH_CTL1);
	panel->backlight.active_low_pwm = pch_ctl1 & BLM_PCH_POLARITY;

	pch_ctl2 = I915_READ(BLC_PWM_PCH_CTL2);
	panel->backlight.max = pch_ctl2 >> 16;
1547 1548 1549 1550

	if (!panel->backlight.max)
		panel->backlight.max = get_backlight_max_vbt(connector);

1551 1552 1553
	if (!panel->backlight.max)
		return -ENODEV;

1554 1555
	panel->backlight.min = get_backlight_min_vbt(connector);

1556
	val = pch_get_backlight(connector);
1557 1558 1559
	val = intel_panel_compute_brightness(connector, val);
	panel->backlight.level = clamp(val, panel->backlight.min,
				       panel->backlight.max);
1560

1561 1562
	cpu_ctl2 = I915_READ(BLC_PWM_CPU_CTL2);
	panel->backlight.enabled = (cpu_ctl2 & BLM_PWM_ENABLE) &&
1563
		(pch_ctl1 & BLM_PCH_PWM_ENABLE);
1564

1565 1566 1567
	return 0;
}

1568
static int i9xx_setup_backlight(struct intel_connector *connector, enum pipe unused)
1569
{
1570
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1571
	struct intel_panel *panel = &connector->panel;
1572 1573 1574 1575
	u32 ctl, val;

	ctl = I915_READ(BLC_PWM_CTL);

1576
	if (IS_GEN2(dev_priv) || IS_I915GM(dev_priv) || IS_I945GM(dev_priv))
1577 1578
		panel->backlight.combination_mode = ctl & BLM_LEGACY_MODE;

1579
	if (IS_PINEVIEW(dev_priv))
1580 1581 1582
		panel->backlight.active_low_pwm = ctl & BLM_POLARITY_PNV;

	panel->backlight.max = ctl >> 17;
1583 1584 1585 1586 1587

	if (!panel->backlight.max) {
		panel->backlight.max = get_backlight_max_vbt(connector);
		panel->backlight.max >>= 1;
	}
1588 1589 1590 1591

	if (!panel->backlight.max)
		return -ENODEV;

1592 1593 1594
	if (panel->backlight.combination_mode)
		panel->backlight.max *= 0xff;

1595 1596
	panel->backlight.min = get_backlight_min_vbt(connector);

1597
	val = i9xx_get_backlight(connector);
1598 1599 1600
	val = intel_panel_compute_brightness(connector, val);
	panel->backlight.level = clamp(val, panel->backlight.min,
				       panel->backlight.max);
1601

1602
	panel->backlight.enabled = val != 0;
1603

1604 1605 1606
	return 0;
}

1607
static int i965_setup_backlight(struct intel_connector *connector, enum pipe unused)
1608
{
1609
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1610
	struct intel_panel *panel = &connector->panel;
1611 1612 1613 1614 1615 1616 1617 1618
	u32 ctl, ctl2, val;

	ctl2 = I915_READ(BLC_PWM_CTL2);
	panel->backlight.combination_mode = ctl2 & BLM_COMBINATION_MODE;
	panel->backlight.active_low_pwm = ctl2 & BLM_POLARITY_I965;

	ctl = I915_READ(BLC_PWM_CTL);
	panel->backlight.max = ctl >> 16;
1619 1620 1621

	if (!panel->backlight.max)
		panel->backlight.max = get_backlight_max_vbt(connector);
1622 1623 1624 1625

	if (!panel->backlight.max)
		return -ENODEV;

1626 1627 1628
	if (panel->backlight.combination_mode)
		panel->backlight.max *= 0xff;

1629 1630
	panel->backlight.min = get_backlight_min_vbt(connector);

1631
	val = i9xx_get_backlight(connector);
1632 1633 1634
	val = intel_panel_compute_brightness(connector, val);
	panel->backlight.level = clamp(val, panel->backlight.min,
				       panel->backlight.max);
1635

1636
	panel->backlight.enabled = ctl2 & BLM_PWM_ENABLE;
1637

1638 1639 1640
	return 0;
}

1641
static int vlv_setup_backlight(struct intel_connector *connector, enum pipe pipe)
1642
{
1643
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1644
	struct intel_panel *panel = &connector->panel;
1645
	u32 ctl, ctl2, val;
1646

1647 1648 1649 1650
	if (WARN_ON(pipe != PIPE_A && pipe != PIPE_B))
		return -ENODEV;

	ctl2 = I915_READ(VLV_BLC_PWM_CTL2(pipe));
1651 1652
	panel->backlight.active_low_pwm = ctl2 & BLM_POLARITY_I965;

1653
	ctl = I915_READ(VLV_BLC_PWM_CTL(pipe));
1654
	panel->backlight.max = ctl >> 16;
1655 1656 1657 1658

	if (!panel->backlight.max)
		panel->backlight.max = get_backlight_max_vbt(connector);

1659 1660 1661
	if (!panel->backlight.max)
		return -ENODEV;

1662 1663
	panel->backlight.min = get_backlight_min_vbt(connector);

1664
	val = _vlv_get_backlight(dev_priv, pipe);
1665 1666 1667
	val = intel_panel_compute_brightness(connector, val);
	panel->backlight.level = clamp(val, panel->backlight.min,
				       panel->backlight.max);
1668

1669
	panel->backlight.enabled = ctl2 & BLM_PWM_ENABLE;
1670

1671 1672 1673
	return 0;
}

1674 1675 1676
static int
bxt_setup_backlight(struct intel_connector *connector, enum pipe unused)
{
1677
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1678 1679 1680
	struct intel_panel *panel = &connector->panel;
	u32 pwm_ctl, val;

1681
	panel->backlight.controller = dev_priv->vbt.backlight.controller;
1682

1683 1684
	pwm_ctl = I915_READ(BXT_BLC_PWM_CTL(panel->backlight.controller));

1685
	/* Controller 1 uses the utility pin. */
1686 1687 1688 1689 1690 1691 1692 1693 1694
	if (panel->backlight.controller == 1) {
		val = I915_READ(UTIL_PIN_CTL);
		panel->backlight.util_pin_active_low =
					val & UTIL_PIN_POLARITY;
	}

	panel->backlight.active_low_pwm = pwm_ctl & BXT_BLC_PWM_POLARITY;
	panel->backlight.max =
		I915_READ(BXT_BLC_PWM_FREQ(panel->backlight.controller));
1695 1696 1697 1698

	if (!panel->backlight.max)
		panel->backlight.max = get_backlight_max_vbt(connector);

1699 1700 1701
	if (!panel->backlight.max)
		return -ENODEV;

1702 1703
	panel->backlight.min = get_backlight_min_vbt(connector);

1704
	val = bxt_get_backlight(connector);
1705 1706 1707
	val = intel_panel_compute_brightness(connector, val);
	panel->backlight.level = clamp(val, panel->backlight.min,
				       panel->backlight.max);
1708

1709
	panel->backlight.enabled = pwm_ctl & BXT_BLC_PWM_ENABLE;
1710 1711 1712 1713

	return 0;
}

1714 1715 1716 1717 1718 1719 1720 1721 1722 1723 1724 1725 1726 1727 1728 1729 1730 1731 1732 1733 1734 1735 1736 1737 1738 1739
static int
cnp_setup_backlight(struct intel_connector *connector, enum pipe unused)
{
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
	struct intel_panel *panel = &connector->panel;
	u32 pwm_ctl, val;

	/*
	 * CNP has the BXT implementation of backlight, but with only
	 * one controller. Future platforms could have multiple controllers
	 * so let's make this extensible and prepared for the future.
	 */
	panel->backlight.controller = 0;

	pwm_ctl = I915_READ(BXT_BLC_PWM_CTL(panel->backlight.controller));

	panel->backlight.active_low_pwm = pwm_ctl & BXT_BLC_PWM_POLARITY;
	panel->backlight.max =
		I915_READ(BXT_BLC_PWM_FREQ(panel->backlight.controller));

	if (!panel->backlight.max)
		panel->backlight.max = get_backlight_max_vbt(connector);

	if (!panel->backlight.max)
		return -ENODEV;

1740 1741
	panel->backlight.min = get_backlight_min_vbt(connector);

1742 1743 1744 1745 1746 1747 1748 1749 1750 1751
	val = bxt_get_backlight(connector);
	val = intel_panel_compute_brightness(connector, val);
	panel->backlight.level = clamp(val, panel->backlight.min,
				       panel->backlight.max);

	panel->backlight.enabled = pwm_ctl & BXT_BLC_PWM_ENABLE;

	return 0;
}

1752 1753 1754 1755 1756 1757 1758 1759 1760 1761 1762 1763 1764 1765 1766
static int pwm_setup_backlight(struct intel_connector *connector,
			       enum pipe pipe)
{
	struct drm_device *dev = connector->base.dev;
	struct intel_panel *panel = &connector->panel;
	int retval;

	/* Get the PWM chip for backlight control */
	panel->backlight.pwm = pwm_get(dev->dev, "pwm_backlight");
	if (IS_ERR(panel->backlight.pwm)) {
		DRM_ERROR("Failed to own the pwm chip\n");
		panel->backlight.pwm = NULL;
		return -ENODEV;
	}

1767 1768 1769 1770 1771 1772
	/*
	 * FIXME: pwm_apply_args() should be removed when switching to
	 * the atomic PWM API.
	 */
	pwm_apply_args(panel->backlight.pwm);

1773 1774 1775 1776 1777 1778 1779 1780 1781 1782 1783 1784 1785 1786 1787 1788 1789 1790 1791
	retval = pwm_config(panel->backlight.pwm, CRC_PMIC_PWM_PERIOD_NS,
			    CRC_PMIC_PWM_PERIOD_NS);
	if (retval < 0) {
		DRM_ERROR("Failed to configure the pwm chip\n");
		pwm_put(panel->backlight.pwm);
		panel->backlight.pwm = NULL;
		return retval;
	}

	panel->backlight.min = 0; /* 0% */
	panel->backlight.max = 100; /* 100% */
	panel->backlight.level = DIV_ROUND_UP(
				 pwm_get_duty_cycle(panel->backlight.pwm) * 100,
				 CRC_PMIC_PWM_PERIOD_NS);
	panel->backlight.enabled = panel->backlight.level != 0;

	return 0;
}

1792
int intel_panel_setup_backlight(struct drm_connector *connector, enum pipe pipe)
1793
{
1794
	struct drm_i915_private *dev_priv = to_i915(connector->dev);
1795
	struct intel_connector *intel_connector = to_intel_connector(connector);
1796
	struct intel_panel *panel = &intel_connector->panel;
1797
	int ret;
1798

1799
	if (!dev_priv->vbt.backlight.present) {
1800 1801 1802 1803 1804 1805
		if (dev_priv->quirks & QUIRK_BACKLIGHT_PRESENT) {
			DRM_DEBUG_KMS("no backlight present per VBT, but present per quirk\n");
		} else {
			DRM_DEBUG_KMS("no backlight present per VBT\n");
			return 0;
		}
1806 1807
	}

1808 1809 1810 1811
	/* ensure intel_panel has been initialized first */
	if (WARN_ON(!panel->backlight.setup))
		return -ENODEV;

1812
	/* set level and max in panel struct */
1813
	mutex_lock(&dev_priv->backlight_lock);
1814
	ret = panel->backlight.setup(intel_connector, pipe);
1815
	mutex_unlock(&dev_priv->backlight_lock);
1816 1817 1818

	if (ret) {
		DRM_DEBUG_KMS("failed to setup backlight for connector %s\n",
1819
			      connector->name);
1820 1821
		return ret;
	}
1822

1823 1824
	panel->backlight.present = true;

1825 1826
	DRM_DEBUG_KMS("Connector %s backlight initialized, %s, brightness %u/%u\n",
		      connector->name,
1827
		      enableddisabled(panel->backlight.enabled),
1828
		      panel->backlight.level, panel->backlight.max);
1829

1830 1831 1832
	return 0;
}

1833
void intel_panel_destroy_backlight(struct drm_connector *connector)
1834
{
1835
	struct intel_connector *intel_connector = to_intel_connector(connector);
1836
	struct intel_panel *panel = &intel_connector->panel;
1837

1838 1839 1840 1841
	/* dispose of the pwm */
	if (panel->backlight.pwm)
		pwm_put(panel->backlight.pwm);

1842
	panel->backlight.present = false;
1843
}
1844

1845
/* Set up chip specific backlight functions */
1846 1847
static void
intel_panel_init_backlight_funcs(struct intel_panel *panel)
1848
{
1849
	struct intel_connector *connector =
1850
		container_of(panel, struct intel_connector, panel);
1851
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1852

1853 1854 1855 1856
	if (connector->base.connector_type == DRM_MODE_CONNECTOR_eDP &&
	    intel_dp_aux_init_backlight_funcs(connector) == 0)
		return;

1857 1858 1859 1860
	if (connector->base.connector_type == DRM_MODE_CONNECTOR_DSI &&
	    intel_dsi_dcs_init_backlight_funcs(connector) == 0)
		return;

1861
	if (IS_GEN9_LP(dev_priv)) {
1862 1863 1864 1865 1866
		panel->backlight.setup = bxt_setup_backlight;
		panel->backlight.enable = bxt_enable_backlight;
		panel->backlight.disable = bxt_disable_backlight;
		panel->backlight.set = bxt_set_backlight;
		panel->backlight.get = bxt_get_backlight;
1867
		panel->backlight.hz_to_pwm = bxt_hz_to_pwm;
1868 1869 1870 1871 1872 1873 1874
	} else if (HAS_PCH_CNP(dev_priv)) {
		panel->backlight.setup = cnp_setup_backlight;
		panel->backlight.enable = cnp_enable_backlight;
		panel->backlight.disable = cnp_disable_backlight;
		panel->backlight.set = bxt_set_backlight;
		panel->backlight.get = bxt_get_backlight;
		panel->backlight.hz_to_pwm = cnp_hz_to_pwm;
1875 1876
	} else if (HAS_PCH_LPT(dev_priv) || HAS_PCH_SPT(dev_priv) ||
		   HAS_PCH_KBP(dev_priv)) {
1877 1878 1879 1880 1881
		panel->backlight.setup = lpt_setup_backlight;
		panel->backlight.enable = lpt_enable_backlight;
		panel->backlight.disable = lpt_disable_backlight;
		panel->backlight.set = lpt_set_backlight;
		panel->backlight.get = lpt_get_backlight;
1882
		if (HAS_PCH_LPT(dev_priv))
1883
			panel->backlight.hz_to_pwm = lpt_hz_to_pwm;
1884
		else
1885
			panel->backlight.hz_to_pwm = spt_hz_to_pwm;
1886
	} else if (HAS_PCH_SPLIT(dev_priv)) {
1887 1888 1889 1890 1891 1892
		panel->backlight.setup = pch_setup_backlight;
		panel->backlight.enable = pch_enable_backlight;
		panel->backlight.disable = pch_disable_backlight;
		panel->backlight.set = pch_set_backlight;
		panel->backlight.get = pch_get_backlight;
		panel->backlight.hz_to_pwm = pch_hz_to_pwm;
1893
	} else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) {
1894
		if (connector->base.connector_type == DRM_MODE_CONNECTOR_DSI) {
1895 1896 1897 1898 1899
			panel->backlight.setup = pwm_setup_backlight;
			panel->backlight.enable = pwm_enable_backlight;
			panel->backlight.disable = pwm_disable_backlight;
			panel->backlight.set = pwm_set_backlight;
			panel->backlight.get = pwm_get_backlight;
1900
		} else {
1901 1902 1903 1904 1905 1906
			panel->backlight.setup = vlv_setup_backlight;
			panel->backlight.enable = vlv_enable_backlight;
			panel->backlight.disable = vlv_disable_backlight;
			panel->backlight.set = vlv_set_backlight;
			panel->backlight.get = vlv_get_backlight;
			panel->backlight.hz_to_pwm = vlv_hz_to_pwm;
1907
		}
1908
	} else if (IS_GEN4(dev_priv)) {
1909 1910 1911 1912 1913 1914
		panel->backlight.setup = i965_setup_backlight;
		panel->backlight.enable = i965_enable_backlight;
		panel->backlight.disable = i965_disable_backlight;
		panel->backlight.set = i9xx_set_backlight;
		panel->backlight.get = i9xx_get_backlight;
		panel->backlight.hz_to_pwm = i965_hz_to_pwm;
1915
	} else {
1916 1917 1918 1919 1920 1921
		panel->backlight.setup = i9xx_setup_backlight;
		panel->backlight.enable = i9xx_enable_backlight;
		panel->backlight.disable = i9xx_disable_backlight;
		panel->backlight.set = i9xx_set_backlight;
		panel->backlight.get = i9xx_get_backlight;
		panel->backlight.hz_to_pwm = i9xx_hz_to_pwm;
1922 1923 1924
	}
}

1925
int intel_panel_init(struct intel_panel *panel,
1926
		     struct drm_display_mode *fixed_mode,
1927
		     struct drm_display_mode *alt_fixed_mode,
1928
		     struct drm_display_mode *downclock_mode)
1929
{
1930 1931
	intel_panel_init_backlight_funcs(panel);

1932
	panel->fixed_mode = fixed_mode;
1933
	panel->alt_fixed_mode = alt_fixed_mode;
1934
	panel->downclock_mode = downclock_mode;
1935

1936 1937 1938 1939 1940
	return 0;
}

void intel_panel_fini(struct intel_panel *panel)
{
1941 1942 1943 1944 1945
	struct intel_connector *intel_connector =
		container_of(panel, struct intel_connector, panel);

	if (panel->fixed_mode)
		drm_mode_destroy(intel_connector->base.dev, panel->fixed_mode);
1946

1947 1948 1949 1950
	if (panel->alt_fixed_mode)
		drm_mode_destroy(intel_connector->base.dev,
				panel->alt_fixed_mode);

1951 1952 1953
	if (panel->downclock_mode)
		drm_mode_destroy(intel_connector->base.dev,
				panel->downclock_mode);
1954
}