From 8580b9a8185691b8e5e6d667b12a74efac6a8a08 Mon Sep 17 00:00:00 2001 From: HubretXie Date: Thu, 17 Jan 2019 12:58:31 +0800 Subject: [PATCH] Update dma_config.h MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit 串口dma中断名称统一修改为uart --- .../HAL_Drivers/config/f7/dma_config.h | 24 +++++++++---------- 1 file changed, 12 insertions(+), 12 deletions(-) diff --git a/bsp/stm32/libraries/HAL_Drivers/config/f7/dma_config.h b/bsp/stm32/libraries/HAL_Drivers/config/f7/dma_config.h index 5023b20a9..f716e2376 100644 --- a/bsp/stm32/libraries/HAL_Drivers/config/f7/dma_config.h +++ b/bsp/stm32/libraries/HAL_Drivers/config/f7/dma_config.h @@ -133,12 +133,12 @@ extern "C" { #define SPI1_RX_DMA_INSTANCE DMA2_Stream2 #define SPI1_RX_DMA_CHANNEL DMA_CHANNEL_3 #define SPI1_RX_DMA_IRQ DMA2_Stream2_IRQn -#elif defined(BSP_UART1_RX_USING_DMA) && !defined(USART1_RX_DMA_INSTANCE) -#define USART1_DMA_RX_IRQHandler DMA2_Stream2_IRQHandler -#define USART1_RX_DMA_RCC RCC_AHB1ENR_DMA2EN -#define USART1_RX_DMA_INSTANCE DMA2_Stream2 -#define USART1_RX_DMA_CHANNEL DMA_CHANNEL_4 -#define USART1_RX_DMA_IRQ DMA2_Stream2_IRQn +#elif defined(BSP_UART1_RX_USING_DMA) && !defined(UART1_RX_DMA_INSTANCE) +#define UART1_DMA_RX_IRQHandler DMA2_Stream2_IRQHandler +#define UART1_RX_DMA_RCC RCC_AHB1ENR_DMA2EN +#define UART1_RX_DMA_INSTANCE DMA2_Stream2 +#define UART1_RX_DMA_CHANNEL DMA_CHANNEL_4 +#define UART1_RX_DMA_IRQ DMA2_Stream2_IRQn #elif defined(BSP_QSPI_USING_DMA) && !defined(QSPI_DMA_INSTANCE) #define QSPI_DMA_IRQHandler DMA2_Stream2_IRQHandler #define QSPI_DMA_RCC RCC_AHB1ENR_DMA2EN @@ -190,12 +190,12 @@ extern "C" { #define SPI1_TX_DMA_INSTANCE DMA2_Stream5 #define SPI1_TX_DMA_CHANNEL DMA_CHANNEL_3 #define SPI1_TX_DMA_IRQ DMA2_Stream5_IRQn -#elif defined(BSP_UART1_RX_USING_DMA) && !defined(USART1_RX_DMA_INSTANCE) -#define USART1_DMA_RX_IRQHandler DMA2_Stream5_IRQHandler -#define USART1_RX_DMA_RCC RCC_AHB1ENR_DMA2EN -#define USART1_RX_DMA_INSTANCE DMA2_Stream5 -#define USART1_RX_DMA_CHANNEL DMA_CHANNEL_4 -#define USART1_RX_DMA_IRQ DMA2_Stream5_IRQn +#elif defined(BSP_UART1_RX_USING_DMA) && !defined(UART1_RX_DMA_INSTANCE) +#define UART1_DMA_RX_IRQHandler DMA2_Stream5_IRQHandler +#define UART1_RX_DMA_RCC RCC_AHB1ENR_DMA2EN +#define UART1_RX_DMA_INSTANCE DMA2_Stream5 +#define UART1_RX_DMA_CHANNEL DMA_CHANNEL_4 +#define UART1_RX_DMA_IRQ DMA2_Stream5_IRQn #elif defined(BSP_SPI5_RX_USING_DMA) && !defined(SPI5_RX_DMA_INSTANCE) #define SPI5_DMA_RX_IRQHandler DMA2_Stream5_IRQHandler #define SPI5_RX_DMA_RCC RCC_AHB1ENR_DMA2EN -- GitLab