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体验新版 GitCode,发现更多精彩内容 >>
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6acf4a45
编写于
1月 20, 2015
作者:
B
Bernard Xiong
浏览文件
操作
浏览文件
下载
电子邮件补丁
差异文件
[BSP] Update UART and GPIO driver with framework in STM32F4
上级
1bb425e8
变更
8
隐藏空白更改
内联
并排
Showing
8 changed file
with
308 addition
and
909 deletion
+308
-909
bsp/stm32f40x/drivers/board.c
bsp/stm32f40x/drivers/board.c
+4
-0
bsp/stm32f40x/drivers/board.h
bsp/stm32f40x/drivers/board.h
+0
-10
bsp/stm32f40x/drivers/serial.c
bsp/stm32f40x/drivers/serial.c
+0
-418
bsp/stm32f40x/drivers/serial.h
bsp/stm32f40x/drivers/serial.h
+0
-70
bsp/stm32f40x/drivers/stm32f4xx_it.c
bsp/stm32f40x/drivers/stm32f4xx_it.c
+0
-104
bsp/stm32f40x/drivers/usart.c
bsp/stm32f40x/drivers/usart.c
+277
-295
bsp/stm32f40x/drivers/usart.h
bsp/stm32f40x/drivers/usart.h
+4
-1
bsp/stm32f40x/rtconfig.h
bsp/stm32f40x/rtconfig.h
+23
-11
未找到文件。
bsp/stm32f40x/drivers/board.c
浏览文件 @
6acf4a45
...
...
@@ -17,6 +17,8 @@
#include "stm32f4xx.h"
#include "board.h"
#include "usart.h"
#include "gpio.h"
/**
* @addtogroup STM32
...
...
@@ -92,6 +94,8 @@ void rt_hw_board_init()
SysTick_Configuration
();
rt_hw_usart_init
();
stm32_hw_pin_init
();
#ifdef RT_USING_CONSOLE
rt_console_set_device
(
CONSOLE_DEVICE
);
#endif
...
...
bsp/stm32f40x/drivers/board.h
浏览文件 @
6acf4a45
...
...
@@ -40,11 +40,6 @@
#define STM32_SRAM_SIZE 128
#define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024)
//#define RT_USING_UART1
#define RT_USING_UART2
//#define RT_USING_UART3
//#define RT_USING_UART6
// <o> Console on USART: <0=> no console <1=>USART 1 <2=>USART 2 <3=> USART 3
// <i>Default: 1
#define STM32_CONSOLE_USART 2
...
...
@@ -63,11 +58,6 @@ void rt_hw_board_init(void);
#define FINSH_DEVICE_NAME CONSOLE_DEVICE
void
rt_hw_usart_init
(
void
);
/* SD Card init function */
void
rt_hw_msd_init
(
void
);
#endif
// <<< Use Configuration Wizard in Context Menu >>>
bsp/stm32f40x/drivers/serial.c
已删除
100644 → 0
浏览文件 @
1bb425e8
/*
* File : serial.c
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2009, RT-Thread Development Team
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rt-thread.org/license/LICENSE
*
* Change Logs:
* Date Author Notes
* 2009-02-05 Bernard first version
* 2009-10-25 Bernard fix rt_serial_read bug when there is no data
* in the buffer.
* 2010-03-29 Bernard cleanup code.
*/
#include "serial.h"
#include <stm32f4xx_dma.h>
#include <stm32f4xx_usart.h>
static
void
rt_serial_enable_dma
(
DMA_Stream_TypeDef
*
dma_channel
,
rt_uint32_t
address
,
rt_uint32_t
size
);
/**
* @addtogroup STM32
*/
/*@{*/
/* RT-Thread Device Interface */
static
rt_err_t
rt_serial_init
(
rt_device_t
dev
)
{
struct
stm32_serial_device
*
uart
=
(
struct
stm32_serial_device
*
)
dev
->
user_data
;
if
(
!
(
dev
->
flag
&
RT_DEVICE_FLAG_ACTIVATED
))
{
if
(
dev
->
flag
&
RT_DEVICE_FLAG_INT_RX
)
{
rt_memset
(
uart
->
int_rx
->
rx_buffer
,
0
,
sizeof
(
uart
->
int_rx
->
rx_buffer
));
uart
->
int_rx
->
read_index
=
0
;
uart
->
int_rx
->
save_index
=
0
;
}
if
(
dev
->
flag
&
RT_DEVICE_FLAG_DMA_TX
)
{
RT_ASSERT
(
uart
->
dma_tx
->
dma_channel
!=
RT_NULL
);
uart
->
dma_tx
->
list_head
=
uart
->
dma_tx
->
list_tail
=
RT_NULL
;
/* init data node memory pool */
rt_mp_init
(
&
(
uart
->
dma_tx
->
data_node_mp
),
"dn"
,
uart
->
dma_tx
->
data_node_mem_pool
,
sizeof
(
uart
->
dma_tx
->
data_node_mem_pool
),
sizeof
(
struct
stm32_serial_data_node
));
}
/* Enable USART */
USART_Cmd
(
uart
->
uart_device
,
ENABLE
);
dev
->
flag
|=
RT_DEVICE_FLAG_ACTIVATED
;
}
return
RT_EOK
;
}
static
rt_err_t
rt_serial_open
(
rt_device_t
dev
,
rt_uint16_t
oflag
)
{
return
RT_EOK
;
}
static
rt_err_t
rt_serial_close
(
rt_device_t
dev
)
{
return
RT_EOK
;
}
static
rt_size_t
rt_serial_read
(
rt_device_t
dev
,
rt_off_t
pos
,
void
*
buffer
,
rt_size_t
size
)
{
rt_uint8_t
*
ptr
;
rt_err_t
err_code
;
struct
stm32_serial_device
*
uart
;
ptr
=
buffer
;
err_code
=
RT_EOK
;
uart
=
(
struct
stm32_serial_device
*
)
dev
->
user_data
;
if
(
dev
->
flag
&
RT_DEVICE_FLAG_INT_RX
)
{
/* interrupt mode Rx */
while
(
size
)
{
rt_base_t
level
;
/* disable interrupt */
level
=
rt_hw_interrupt_disable
();
if
(
uart
->
int_rx
->
read_index
!=
uart
->
int_rx
->
save_index
)
{
/* read a character */
*
ptr
++
=
uart
->
int_rx
->
rx_buffer
[
uart
->
int_rx
->
read_index
];
size
--
;
/* move to next position */
uart
->
int_rx
->
read_index
++
;
if
(
uart
->
int_rx
->
read_index
>=
UART_RX_BUFFER_SIZE
)
uart
->
int_rx
->
read_index
=
0
;
}
else
{
/* set error code */
err_code
=
-
RT_EEMPTY
;
/* enable interrupt */
rt_hw_interrupt_enable
(
level
);
break
;
}
/* enable interrupt */
rt_hw_interrupt_enable
(
level
);
}
}
else
{
/* polling mode */
while
((
rt_uint32_t
)
ptr
-
(
rt_uint32_t
)
buffer
<
size
)
{
while
(
uart
->
uart_device
->
SR
&
USART_FLAG_RXNE
)
{
*
ptr
=
uart
->
uart_device
->
DR
&
0xff
;
ptr
++
;
}
}
}
/* set error code */
rt_set_errno
(
err_code
);
return
(
rt_uint32_t
)
ptr
-
(
rt_uint32_t
)
buffer
;
}
static
void
rt_serial_enable_dma
(
DMA_Stream_TypeDef
*
dma_channel
,
rt_uint32_t
address
,
rt_uint32_t
size
)
{
RT_ASSERT
(
dma_channel
!=
RT_NULL
);
/* disable DMA */
DMA_Cmd
(
dma_channel
,
DISABLE
);
/* set buffer address */
dma_channel
->
M0AR
=
address
;
/* set size */
dma_channel
->
NDTR
=
size
;
/* enable DMA */
DMA_Cmd
(
dma_channel
,
ENABLE
);
}
static
rt_size_t
rt_serial_write
(
rt_device_t
dev
,
rt_off_t
pos
,
const
void
*
buffer
,
rt_size_t
size
)
{
rt_uint8_t
*
ptr
;
rt_err_t
err_code
;
struct
stm32_serial_device
*
uart
;
err_code
=
RT_EOK
;
ptr
=
(
rt_uint8_t
*
)
buffer
;
uart
=
(
struct
stm32_serial_device
*
)
dev
->
user_data
;
if
(
dev
->
flag
&
RT_DEVICE_FLAG_INT_TX
)
{
/* interrupt mode Tx, does not support */
RT_ASSERT
(
0
);
}
else
if
(
dev
->
flag
&
RT_DEVICE_FLAG_DMA_TX
)
{
/* DMA mode Tx */
/* allocate a data node */
struct
stm32_serial_data_node
*
data_node
=
(
struct
stm32_serial_data_node
*
)
rt_mp_alloc
(
&
(
uart
->
dma_tx
->
data_node_mp
),
RT_WAITING_FOREVER
);
if
(
data_node
==
RT_NULL
)
{
/* set error code */
err_code
=
-
RT_ENOMEM
;
}
else
{
rt_uint32_t
level
;
/* fill data node */
data_node
->
data_ptr
=
ptr
;
data_node
->
data_size
=
size
;
/* insert to data link */
data_node
->
next
=
RT_NULL
;
/* disable interrupt */
level
=
rt_hw_interrupt_disable
();
data_node
->
prev
=
uart
->
dma_tx
->
list_tail
;
if
(
uart
->
dma_tx
->
list_tail
!=
RT_NULL
)
uart
->
dma_tx
->
list_tail
->
next
=
data_node
;
uart
->
dma_tx
->
list_tail
=
data_node
;
if
(
uart
->
dma_tx
->
list_head
==
RT_NULL
)
{
/* start DMA to transmit data */
uart
->
dma_tx
->
list_head
=
data_node
;
/* Enable DMA Channel */
rt_serial_enable_dma
(
uart
->
dma_tx
->
dma_channel
,
(
rt_uint32_t
)
uart
->
dma_tx
->
list_head
->
data_ptr
,
uart
->
dma_tx
->
list_head
->
data_size
);
}
/* enable interrupt */
rt_hw_interrupt_enable
(
level
);
}
}
else
{
/* polling mode */
if
(
dev
->
flag
&
RT_DEVICE_FLAG_STREAM
)
{
/* stream mode */
while
(
size
)
{
if
(
*
ptr
==
'\n'
)
{
while
(
!
(
uart
->
uart_device
->
SR
&
USART_FLAG_TXE
));
uart
->
uart_device
->
DR
=
'\r'
;
}
while
(
!
(
uart
->
uart_device
->
SR
&
USART_FLAG_TXE
));
uart
->
uart_device
->
DR
=
(
*
ptr
&
0x1FF
);
++
ptr
;
--
size
;
}
}
else
{
/* write data directly */
while
(
size
)
{
while
(
!
(
uart
->
uart_device
->
SR
&
USART_FLAG_TXE
));
uart
->
uart_device
->
DR
=
(
*
ptr
&
0x1FF
);
++
ptr
;
--
size
;
}
}
}
/* set error code */
rt_set_errno
(
err_code
);
return
(
rt_uint32_t
)
ptr
-
(
rt_uint32_t
)
buffer
;
}
static
rt_err_t
rt_serial_control
(
rt_device_t
dev
,
rt_uint8_t
cmd
,
void
*
args
)
{
struct
stm32_serial_device
*
uart
;
RT_ASSERT
(
dev
!=
RT_NULL
);
uart
=
(
struct
stm32_serial_device
*
)
dev
->
user_data
;
switch
(
cmd
)
{
case
RT_DEVICE_CTRL_SUSPEND
:
/* suspend device */
dev
->
flag
|=
RT_DEVICE_FLAG_SUSPENDED
;
USART_Cmd
(
uart
->
uart_device
,
DISABLE
);
break
;
case
RT_DEVICE_CTRL_RESUME
:
/* resume device */
dev
->
flag
&=
~
RT_DEVICE_FLAG_SUSPENDED
;
USART_Cmd
(
uart
->
uart_device
,
ENABLE
);
break
;
}
return
RT_EOK
;
}
/*
* serial register for STM32
* support STM32F103VB and STM32F103ZE
*/
rt_err_t
rt_hw_serial_register
(
rt_device_t
device
,
const
char
*
name
,
rt_uint32_t
flag
,
struct
stm32_serial_device
*
serial
)
{
RT_ASSERT
(
device
!=
RT_NULL
);
if
((
flag
&
RT_DEVICE_FLAG_DMA_RX
)
||
(
flag
&
RT_DEVICE_FLAG_INT_TX
))
{
RT_ASSERT
(
0
);
}
device
->
type
=
RT_Device_Class_Char
;
device
->
rx_indicate
=
RT_NULL
;
device
->
tx_complete
=
RT_NULL
;
device
->
init
=
rt_serial_init
;
device
->
open
=
rt_serial_open
;
device
->
close
=
rt_serial_close
;
device
->
read
=
rt_serial_read
;
device
->
write
=
rt_serial_write
;
device
->
control
=
rt_serial_control
;
device
->
user_data
=
serial
;
/* register a character device */
return
rt_device_register
(
device
,
name
,
RT_DEVICE_FLAG_RDWR
|
flag
);
}
/* ISR for serial interrupt */
void
rt_hw_serial_isr
(
rt_device_t
device
)
{
struct
stm32_serial_device
*
uart
=
(
struct
stm32_serial_device
*
)
device
->
user_data
;
if
(
USART_GetITStatus
(
uart
->
uart_device
,
USART_IT_RXNE
)
!=
RESET
)
{
/* interrupt mode receive */
RT_ASSERT
(
device
->
flag
&
RT_DEVICE_FLAG_INT_RX
);
/* save on rx buffer */
while
(
uart
->
uart_device
->
SR
&
USART_FLAG_RXNE
)
{
rt_base_t
level
;
/* disable interrupt */
level
=
rt_hw_interrupt_disable
();
/* save character */
uart
->
int_rx
->
rx_buffer
[
uart
->
int_rx
->
save_index
]
=
uart
->
uart_device
->
DR
&
0xff
;
uart
->
int_rx
->
save_index
++
;
if
(
uart
->
int_rx
->
save_index
>=
UART_RX_BUFFER_SIZE
)
uart
->
int_rx
->
save_index
=
0
;
/* if the next position is read index, discard this 'read char' */
if
(
uart
->
int_rx
->
save_index
==
uart
->
int_rx
->
read_index
)
{
uart
->
int_rx
->
read_index
++
;
if
(
uart
->
int_rx
->
read_index
>=
UART_RX_BUFFER_SIZE
)
uart
->
int_rx
->
read_index
=
0
;
}
/* enable interrupt */
rt_hw_interrupt_enable
(
level
);
}
/* clear interrupt */
USART_ClearITPendingBit
(
uart
->
uart_device
,
USART_IT_RXNE
);
/* invoke callback */
if
(
device
->
rx_indicate
!=
RT_NULL
)
{
rt_size_t
rx_length
;
/* get rx length */
rx_length
=
uart
->
int_rx
->
read_index
>
uart
->
int_rx
->
save_index
?
UART_RX_BUFFER_SIZE
-
uart
->
int_rx
->
read_index
+
uart
->
int_rx
->
save_index
:
uart
->
int_rx
->
save_index
-
uart
->
int_rx
->
read_index
;
device
->
rx_indicate
(
device
,
rx_length
);
}
}
if
(
USART_GetITStatus
(
uart
->
uart_device
,
USART_IT_TC
)
!=
RESET
)
{
/* clear interrupt */
USART_ClearITPendingBit
(
uart
->
uart_device
,
USART_IT_TC
);
}
}
/*
* ISR for DMA mode Tx
*/
void
rt_hw_serial_dma_tx_isr
(
rt_device_t
device
)
{
rt_uint32_t
level
;
struct
stm32_serial_data_node
*
data_node
;
struct
stm32_serial_device
*
uart
=
(
struct
stm32_serial_device
*
)
device
->
user_data
;
/* DMA mode receive */
RT_ASSERT
(
device
->
flag
&
RT_DEVICE_FLAG_DMA_TX
);
/* get the first data node */
data_node
=
uart
->
dma_tx
->
list_head
;
RT_ASSERT
(
data_node
!=
RT_NULL
);
/* invoke call to notify tx complete */
if
(
device
->
tx_complete
!=
RT_NULL
)
device
->
tx_complete
(
device
,
data_node
->
data_ptr
);
/* disable interrupt */
level
=
rt_hw_interrupt_disable
();
/* remove list head */
uart
->
dma_tx
->
list_head
=
data_node
->
next
;
if
(
uart
->
dma_tx
->
list_head
==
RT_NULL
)
/* data link empty */
uart
->
dma_tx
->
list_tail
=
RT_NULL
;
/* enable interrupt */
rt_hw_interrupt_enable
(
level
);
/* release data node memory */
rt_mp_free
(
data_node
);
if
(
uart
->
dma_tx
->
list_head
!=
RT_NULL
)
{
/* transmit next data node */
rt_serial_enable_dma
(
uart
->
dma_tx
->
dma_channel
,
(
rt_uint32_t
)
uart
->
dma_tx
->
list_head
->
data_ptr
,
uart
->
dma_tx
->
list_head
->
data_size
);
}
else
{
/* no data to be transmitted, disable DMA */
DMA_Cmd
(
uart
->
dma_tx
->
dma_channel
,
DISABLE
);
}
}
/*@}*/
bsp/stm32f40x/drivers/serial.h
已删除
100644 → 0
浏览文件 @
1bb425e8
/*
* File : serial.h
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2009 - 2010, RT-Thread Development Team
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rt-thread.org/license/LICENSE
*
* Change Logs:
* Date Author Notes
* 2009-01-05 Bernard first version
* 2010-03-29 Bernard remove interrupt tx and DMA rx mode.
*/
#ifndef __RT_HW_SERIAL_H__
#define __RT_HW_SERIAL_H__
#include <rthw.h>
#include <rtthread.h>
/* STM32F40x library definitions */
#include <stm32f4xx.h>
#define UART_RX_BUFFER_SIZE 64
#define UART_TX_DMA_NODE_SIZE 4
/* data node for Tx Mode */
struct
stm32_serial_data_node
{
rt_uint8_t
*
data_ptr
;
rt_size_t
data_size
;
struct
stm32_serial_data_node
*
next
,
*
prev
;
};
struct
stm32_serial_dma_tx
{
/* DMA Channel */
DMA_Stream_TypeDef
*
dma_channel
;
/* data list head and tail */
struct
stm32_serial_data_node
*
list_head
,
*
list_tail
;
/* data node memory pool */
struct
rt_mempool
data_node_mp
;
rt_uint8_t
data_node_mem_pool
[
UART_TX_DMA_NODE_SIZE
*
(
sizeof
(
struct
stm32_serial_data_node
)
+
sizeof
(
void
*
))];
};
struct
stm32_serial_int_rx
{
rt_uint8_t
rx_buffer
[
UART_RX_BUFFER_SIZE
];
rt_uint32_t
read_index
,
save_index
;
};
struct
stm32_serial_device
{
USART_TypeDef
*
uart_device
;
/* rx structure */
struct
stm32_serial_int_rx
*
int_rx
;
/* tx structure */
struct
stm32_serial_dma_tx
*
dma_tx
;
};
rt_err_t
rt_hw_serial_register
(
rt_device_t
device
,
const
char
*
name
,
rt_uint32_t
flag
,
struct
stm32_serial_device
*
serial
);
void
rt_hw_serial_isr
(
rt_device_t
device
);
void
rt_hw_serial_dma_tx_isr
(
rt_device_t
device
);
#endif
bsp/stm32f40x/drivers/stm32f4xx_it.c
浏览文件 @
6acf4a45
...
...
@@ -54,16 +54,6 @@ void NMI_Handler(void)
{
}
/**
* @brief This function handles Hard Fault exception.
* @param None
* @retval None
*/
//void HardFault_Handler(void)
//{
// // definition in libcpu/arm/cortex-m4/context_*.S
//}
/**
* @brief This function handles Memory Manage exception.
* @param None
...
...
@@ -112,100 +102,6 @@ void SVC_Handler(void)
{
}
/**
* @brief This function handles Debug Monitor exception.
* @param None
* @retval None
*/
//void DebugMon_Handler(void)
//{
// defined in gdb/libcpu/cortexm/gdb_gcc.S
//}
/**
* @brief This function handles PendSVC exception.
* @param None
* @retval None
*/
//void PendSV_Handler(void)
//{
// // defined in libcpu/arm/cortex-m4/context_*.S
//}
/**
* @brief This function handles SysTick Handler.
* @param None
* @retval None
*/
//void SysTick_Handler(void)
//{
// // defined in boarc.c
//}
/******************************************************************************/
/* STM32F4xx Peripherals Interrupt Handlers */
/* Add here the Interrupt Handler for the used peripheral(s) (PPP), for the */
/* available peripheral interrupt handler's name please refer to the startup */
/* file (startup_stm32f4xx.s). */
/******************************************************************************/
/**
* @brief This function handles PPP interrupt request.
* @param None
* @retval None
*/
/*void PPP_IRQHandler(void)
{
}*/
void
USART1_IRQHandler
(
void
)
{
#ifdef RT_USING_UART1
extern
struct
rt_device
uart1_device
;
extern
void
rt_hw_serial_isr
(
struct
rt_device
*
device
);
/* enter interrupt */
rt_interrupt_enter
();
rt_hw_serial_isr
(
&
uart1_device
);
/* leave interrupt */
rt_interrupt_leave
();
#endif
}
void
USART2_IRQHandler
(
void
)
{
#ifdef RT_USING_UART2
extern
struct
rt_device
uart2_device
;
extern
void
rt_hw_serial_isr
(
struct
rt_device
*
device
);
/* enter interrupt */
rt_interrupt_enter
();
rt_hw_serial_isr
(
&
uart2_device
);
/* leave interrupt */
rt_interrupt_leave
();
#endif
}
void
USART3_IRQHandler
(
void
)
{
#ifdef RT_USING_UART3
extern
struct
rt_device
uart3_device
;
extern
void
rt_hw_serial_isr
(
struct
rt_device
*
device
);
/* enter interrupt */
rt_interrupt_enter
();
rt_hw_serial_isr
(
&
uart3_device
);
/* leave interrupt */
rt_interrupt_leave
();
#endif
}
/**
* @}
*/
...
...
bsp/stm32f40x/drivers/usart.c
浏览文件 @
6acf4a45
...
...
@@ -12,148 +12,273 @@
* 2009-01-05 Bernard the first version
* 2010-03-29 Bernard remove interrupt Tx and DMA Rx mode
* 2012-02-08 aozima update for F4.
* 2012-07-28 aozima update for ART board.
*/
#include "stm32f4xx.h"
#include "usart.h"
#include "board.h"
#include <serial.h>
/*
* Use UART1 as console output and finsh input
* interrupt Rx and poll Tx (stream mode)
*
* Use UART2 with interrupt Rx and poll Tx
* Use UART3 with DMA Tx and interrupt Rx -- DMA channel 2
*
* USART DMA setting on STM32
* USART1 Tx --> DMA Channel 4
* USART1 Rx --> DMA Channel 5
* USART2 Tx --> DMA Channel 7
* USART2 Rx --> DMA Channel 6
* USART3 Tx --> DMA Channel 2
* USART3 Rx --> DMA Channel 3
*/
#include <rtdevice.h>
#ifdef RT_USING_UART1
struct
stm32_serial_int_rx
uart1_int_rx
;
struct
stm32_serial_device
uart1
=
/* UART GPIO define. */
#define UART1_GPIO_TX GPIO_Pin_6
#define UART1_TX_PIN_SOURCE GPIO_PinSource6
#define UART1_GPIO_RX GPIO_Pin_7
#define UART1_RX_PIN_SOURCE GPIO_PinSource7
#define UART1_GPIO GPIOB
#define UART1_GPIO_RCC RCC_AHB1Periph_GPIOB
#define RCC_APBPeriph_UART1 RCC_APB2Periph_USART1
#define UART1_TX_DMA DMA1_Channel4
#define UART1_RX_DMA DMA1_Channel5
#define UART2_GPIO_TX GPIO_Pin_2
#define UART2_TX_PIN_SOURCE GPIO_PinSource2
#define UART2_GPIO_RX GPIO_Pin_3
#define UART2_RX_PIN_SOURCE GPIO_PinSource3
#define UART2_GPIO GPIOA
#define UART2_GPIO_RCC RCC_AHB1Periph_GPIOA
#define RCC_APBPeriph_UART2 RCC_APB1Periph_USART2
#define UART2_TX_DMA DMA1_Channel4
#define UART2_RX_DMA DMA1_Channel5
#define UART3_GPIO_TX GPIO_Pin_8
#define UART3_TX_PIN_SOURCE GPIO_PinSource8
#define UART3_GPIO_RX GPIO_Pin_9
#define UART3_RX_PIN_SOURCE GPIO_PinSource9
#define UART3_GPIO GPIOD
#define UART3_GPIO_RCC RCC_AHB1Periph_GPIOD
#define RCC_APBPeriph_UART3 RCC_APB1Periph_USART3
#define UART3_TX_DMA DMA1_Stream1
#define UART3_RX_DMA DMA1_Stream3
/* STM32 uart driver */
struct
stm32_uart
{
USART_TypeDef
*
uart_device
;
IRQn_Type
irq
;
};
static
rt_err_t
stm32_configure
(
struct
rt_serial_device
*
serial
,
struct
serial_configure
*
cfg
)
{
struct
stm32_uart
*
uart
;
USART_InitTypeDef
USART_InitStructure
;
RT_ASSERT
(
serial
!=
RT_NULL
);
RT_ASSERT
(
cfg
!=
RT_NULL
);
uart
=
(
struct
stm32_uart
*
)
serial
->
parent
.
user_data
;
if
(
cfg
->
baud_rate
==
BAUD_RATE_9600
)
USART_InitStructure
.
USART_BaudRate
=
9600
;
else
if
(
cfg
->
baud_rate
==
BAUD_RATE_115200
)
USART_InitStructure
.
USART_BaudRate
=
115200
;
if
(
cfg
->
data_bits
==
DATA_BITS_8
)
USART_InitStructure
.
USART_WordLength
=
USART_WordLength_8b
;
if
(
cfg
->
stop_bits
==
STOP_BITS_1
)
USART_InitStructure
.
USART_StopBits
=
USART_StopBits_1
;
else
if
(
cfg
->
stop_bits
==
STOP_BITS_2
)
USART_InitStructure
.
USART_StopBits
=
USART_StopBits_2
;
USART_InitStructure
.
USART_Parity
=
USART_Parity_No
;
USART_InitStructure
.
USART_HardwareFlowControl
=
USART_HardwareFlowControl_None
;
USART_InitStructure
.
USART_Mode
=
USART_Mode_Rx
|
USART_Mode_Tx
;
USART_Init
(
uart
->
uart_device
,
&
USART_InitStructure
);
/* Enable USART */
USART_Cmd
(
uart
->
uart_device
,
ENABLE
);
/* enable interrupt */
USART_ITConfig
(
uart
->
uart_device
,
USART_IT_RXNE
,
ENABLE
);
return
RT_EOK
;
}
static
rt_err_t
stm32_control
(
struct
rt_serial_device
*
serial
,
int
cmd
,
void
*
arg
)
{
struct
stm32_uart
*
uart
;
RT_ASSERT
(
serial
!=
RT_NULL
);
uart
=
(
struct
stm32_uart
*
)
serial
->
parent
.
user_data
;
switch
(
cmd
)
{
case
RT_DEVICE_CTRL_CLR_INT
:
/* disable rx irq */
UART_DISABLE_IRQ
(
uart
->
irq
);
break
;
case
RT_DEVICE_CTRL_SET_INT
:
/* enable rx irq */
UART_ENABLE_IRQ
(
uart
->
irq
);
break
;
}
return
RT_EOK
;
}
static
int
stm32_putc
(
struct
rt_serial_device
*
serial
,
char
c
)
{
struct
stm32_uart
*
uart
;
RT_ASSERT
(
serial
!=
RT_NULL
);
uart
=
(
struct
stm32_uart
*
)
serial
->
parent
.
user_data
;
while
(
!
(
uart
->
uart_device
->
SR
&
USART_FLAG_TXE
));
uart
->
uart_device
->
DR
=
c
;
return
1
;
}
static
int
stm32_getc
(
struct
rt_serial_device
*
serial
)
{
int
ch
;
struct
stm32_uart
*
uart
;
RT_ASSERT
(
serial
!=
RT_NULL
);
uart
=
(
struct
stm32_uart
*
)
serial
->
parent
.
user_data
;
ch
=
-
1
;
if
(
uart
->
uart_device
->
SR
&
USART_FLAG_RXNE
)
{
ch
=
uart
->
uart_device
->
DR
&
0xff
;
}
return
ch
;
}
static
const
struct
rt_uart_ops
stm32_uart_ops
=
{
stm32_configure
,
stm32_control
,
stm32_putc
,
stm32_getc
,
};
#if defined(RT_USING_UART1)
/* UART1 device driver structure */
struct
stm32_uart
uart1
=
{
USART1
,
&
uart1_int_rx
,
RT_NULL
USART1_IRQn
,
};
struct
rt_device
uart1_device
;
#endif
struct
rt_serial_device
serial1
;
#ifdef RT_USING_UART2
struct
stm32_serial_int_rx
uart2_int_rx
;
struct
stm32_serial_device
uart2
=
void
USART1_IRQHandler
(
void
)
{
struct
stm32_uart
*
uart
;
uart
=
&
uart1
;
/* enter interrupt */
rt_interrupt_enter
();
if
(
USART_GetITStatus
(
uart
->
uart_device
,
USART_IT_RXNE
)
!=
RESET
)
{
rt_hw_serial_isr
(
&
serial1
,
RT_SERIAL_EVENT_RX_IND
);
/* clear interrupt */
USART_ClearITPendingBit
(
uart
->
uart_device
,
USART_IT_RXNE
);
}
if
(
USART_GetITStatus
(
uart
->
uart_device
,
USART_IT_TC
)
!=
RESET
)
{
/* clear interrupt */
USART_ClearITPendingBit
(
uart
->
uart_device
,
USART_IT_TC
);
}
/* leave interrupt */
rt_interrupt_leave
();
}
#endif
/* RT_USING_UART1 */
#if defined(RT_USING_UART2)
/* UART2 device driver structure */
struct
stm32_uart
uart2
=
{
USART2
,
&
uart2_int_rx
,
RT_NULL
USART2_IRQn
,
};
struct
rt_device
uart2_device
;
#endif
struct
rt_serial_device
serial2
;
#ifdef RT_USING_UART3
struct
stm32_serial_int_rx
uart3_int_rx
;
struct
stm32_serial_dma_tx
uart3_dma_tx
;
struct
stm32_serial_device
uart3
=
void
USART2_IRQHandler
(
void
)
{
USART3
,
&
uart3_int_rx
,
&
uart3_dma_tx
};
struct
rt_device
uart3_device
;
#endif
struct
stm32_uart
*
uart
;
uart
=
&
uart2
;
/* enter interrupt */
rt_interrupt_enter
();
if
(
USART_GetITStatus
(
uart
->
uart_device
,
USART_IT_RXNE
)
!=
RESET
)
{
rt_hw_serial_isr
(
&
serial2
,
RT_SERIAL_EVENT_RX_IND
);
/* clear interrupt */
USART_ClearITPendingBit
(
uart
->
uart_device
,
USART_IT_RXNE
);
}
if
(
USART_GetITStatus
(
uart
->
uart_device
,
USART_IT_TC
)
!=
RESET
)
{
/* clear interrupt */
USART_ClearITPendingBit
(
uart
->
uart_device
,
USART_IT_TC
);
}
/* leave interrupt */
rt_interrupt_leave
();
}
#endif
/* RT_USING_UART2 */
#if
def RT_USING_UART6
struct
stm32_serial_int_rx
uart6_int_rx
;
struct
stm32_
serial_device
uart6
=
#if
defined(RT_USING_UART3)
/* UART3 device driver structure */
struct
stm32_
uart
uart3
=
{
USART6
,
&
uart6_int_rx
,
RT_NULL
USART3
,
USART3_IRQn
,
};
struct
rt_device
uart6_device
;
#endif
//#define USART1_DR_Base 0x40013804
//#define USART2_DR_Base 0x40004404
//#define USART3_DR_Base 0x40004804
/* USART1_REMAP = 0 */
#define UART1_GPIO_TX GPIO_Pin_9
#define UART1_TX_PIN_SOURCE GPIO_PinSource9
#define UART1_GPIO_RX GPIO_Pin_10
#define UART1_RX_PIN_SOURCE GPIO_PinSource10
#define UART1_GPIO GPIOA
#define UART1_GPIO_RCC RCC_AHB1Periph_GPIOA
#define RCC_APBPeriph_UART1 RCC_APB2Periph_USART1
#define UART1_TX_DMA DMA1_Channel4
#define UART1_RX_DMA DMA1_Channel5
#define UART2_GPIO_TX GPIO_Pin_2
#define UART2_TX_PIN_SOURCE GPIO_PinSource2
#define UART2_GPIO_RX GPIO_Pin_3
#define UART2_RX_PIN_SOURCE GPIO_PinSource3
#define UART2_GPIO GPIOA
#define UART2_GPIO_RCC RCC_AHB1Periph_GPIOA
#define RCC_APBPeriph_UART2 RCC_APB1Periph_USART2
/* USART3_REMAP[1:0] = 00 */
#define UART3_GPIO_TX GPIO_Pin_10
#define UART3_TX_PIN_SOURCE GPIO_PinSource10
#define UART3_GPIO_RX GPIO_Pin_11
#define UART3_RX_PIN_SOURCE GPIO_PinSource11
#define UART3_GPIO GPIOB
#define UART3_GPIO_RCC RCC_AHB1Periph_GPIOB
#define RCC_APBPeriph_UART3 RCC_APB1Periph_USART3
#define UART3_TX_DMA DMA1_Stream1
#define UART3_RX_DMA DMA1_Stream3
struct
rt_serial_device
serial3
;
#define UART6_GPIO_TX GPIO_Pin_6
#define UART6_TX_PIN_SOURCE GPIO_PinSource6
#define UART6_GPIO_RX GPIO_Pin_7
#define UART6_RX_PIN_SOURCE GPIO_PinSource7
#define UART6_GPIO GPIOC
#define UART6_GPIO_RCC RCC_AHB1Periph_GPIOC
#define RCC_APBPeriph_UART6 RCC_APB2Periph_USART6
void
USART3_IRQHandler
(
void
)
{
struct
stm32_uart
*
uart
;
uart
=
&
uart3
;
/* enter interrupt */
rt_interrupt_enter
();
if
(
USART_GetITStatus
(
uart
->
uart_device
,
USART_IT_RXNE
)
!=
RESET
)
{
rt_hw_serial_isr
(
&
serial3
,
RT_SERIAL_EVENT_RX_IND
);
/* clear interrupt */
USART_ClearITPendingBit
(
uart
->
uart_device
,
USART_IT_RXNE
);
}
if
(
USART_GetITStatus
(
uart
->
uart_device
,
USART_IT_TC
)
!=
RESET
)
{
/* clear interrupt */
USART_ClearITPendingBit
(
uart
->
uart_device
,
USART_IT_TC
);
}
/* leave interrupt */
rt_interrupt_leave
();
}
#endif
/* RT_USING_UART3 */
static
void
RCC_Configuration
(
void
)
{
#ifdef RT_USING_UART1
/* Enable U
SART2
GPIO clocks */
/* Enable U
ART1
GPIO clocks */
RCC_AHB1PeriphClockCmd
(
UART1_GPIO_RCC
,
ENABLE
);
/* Enable U
SART2
clock */
/* Enable U
ART1
clock */
RCC_APB2PeriphClockCmd
(
RCC_APBPeriph_UART1
,
ENABLE
);
#endif
#endif
/* RT_USING_UART1 */
#ifdef RT_USING_UART2
/* Enable U
S
ART2 GPIO clocks */
/* Enable UART2 GPIO clocks */
RCC_AHB1PeriphClockCmd
(
UART2_GPIO_RCC
,
ENABLE
);
/* Enable U
S
ART2 clock */
/* Enable UART2 clock */
RCC_APB1PeriphClockCmd
(
RCC_APBPeriph_UART2
,
ENABLE
);
#endif
#endif
/* RT_USING_UART1 */
#ifdef RT_USING_UART3
/* Enable U
S
ART3 GPIO clocks */
/* Enable UART3 GPIO clocks */
RCC_AHB1PeriphClockCmd
(
UART3_GPIO_RCC
,
ENABLE
);
/* Enable U
S
ART3 clock */
/* Enable UART3 clock */
RCC_APB1PeriphClockCmd
(
RCC_APBPeriph_UART3
,
ENABLE
);
/* DMA clock enable */
RCC_APB1PeriphClockCmd
(
RCC_AHB1Periph_DMA1
,
ENABLE
);
#endif
#ifdef RT_USING_UART6
/* Enable USART6 GPIO clocks */
RCC_AHB1PeriphClockCmd
(
UART6_GPIO_RCC
,
ENABLE
);
/* Enable USART6 clock */
RCC_APB2PeriphClockCmd
(
RCC_APBPeriph_UART6
,
ENABLE
);
#endif
#endif
/* RT_USING_UART3 */
}
static
void
GPIO_Configuration
(
void
)
...
...
@@ -173,17 +298,17 @@ static void GPIO_Configuration(void)
/* Connect alternate function */
GPIO_PinAFConfig
(
UART1_GPIO
,
UART1_TX_PIN_SOURCE
,
GPIO_AF_USART1
);
GPIO_PinAFConfig
(
UART1_GPIO
,
UART1_RX_PIN_SOURCE
,
GPIO_AF_USART1
);
#endif
#endif
/* RT_USING_UART1 */
#ifdef RT_USING_UART2
/* Configure USART2 Rx/tx PIN */
GPIO_InitStructure
.
GPIO_Pin
=
UART2_GPIO_
TX
|
UART2_GPIO_R
X
;
GPIO_InitStructure
.
GPIO_Pin
=
UART2_GPIO_
RX
|
UART2_GPIO_T
X
;
GPIO_Init
(
UART2_GPIO
,
&
GPIO_InitStructure
);
/* Connect alternate function */
GPIO_PinAFConfig
(
UART2_GPIO
,
UART2_TX_PIN_SOURCE
,
GPIO_AF_USART2
);
GPIO_PinAFConfig
(
UART2_GPIO
,
UART2_RX_PIN_SOURCE
,
GPIO_AF_USART2
);
#endif
#endif
/* RT_USING_UART2 */
#ifdef RT_USING_UART3
/* Configure USART3 Rx/tx PIN */
...
...
@@ -193,217 +318,74 @@ static void GPIO_Configuration(void)
/* Connect alternate function */
GPIO_PinAFConfig
(
UART3_GPIO
,
UART3_TX_PIN_SOURCE
,
GPIO_AF_USART3
);
GPIO_PinAFConfig
(
UART3_GPIO
,
UART3_RX_PIN_SOURCE
,
GPIO_AF_USART3
);
#endif
#ifdef RT_USING_UART6
/* Configure USART6 Rx/tx PIN */
GPIO_InitStructure
.
GPIO_Pin
=
UART6_GPIO_TX
|
UART6_GPIO_RX
;
GPIO_Init
(
UART6_GPIO
,
&
GPIO_InitStructure
);
/* Connect alternate function */
GPIO_PinAFConfig
(
UART6_GPIO
,
UART6_TX_PIN_SOURCE
,
GPIO_AF_USART6
);
GPIO_PinAFConfig
(
UART6_GPIO
,
UART6_RX_PIN_SOURCE
,
GPIO_AF_USART6
);
#endif
#endif
/* RT_USING_UART3 */
}
static
void
NVIC_Configuration
(
void
)
static
void
NVIC_Configuration
(
struct
stm32_uart
*
uart
)
{
NVIC_InitTypeDef
NVIC_InitStructure
;
#ifdef RT_USING_UART1
/* Enable the USART1 Interrupt */
NVIC_InitStructure
.
NVIC_IRQChannel
=
USART1_IRQn
;
NVIC_InitStructure
.
NVIC_IRQChannel
=
uart
->
irq
;
NVIC_InitStructure
.
NVIC_IRQChannelPreemptionPriority
=
3
;
NVIC_InitStructure
.
NVIC_IRQChannelSubPriority
=
0
;
NVIC_InitStructure
.
NVIC_IRQChannelCmd
=
ENABLE
;
NVIC_Init
(
&
NVIC_InitStructure
);
#endif
#ifdef RT_USING_UART2
/* Enable the USART2 Interrupt */
NVIC_InitStructure
.
NVIC_IRQChannel
=
USART2_IRQn
;
NVIC_InitStructure
.
NVIC_IRQChannelPreemptionPriority
=
1
;
NVIC_InitStructure
.
NVIC_IRQChannelSubPriority
=
1
;
NVIC_InitStructure
.
NVIC_IRQChannelCmd
=
ENABLE
;
NVIC_Init
(
&
NVIC_InitStructure
);
#endif
#ifdef RT_USING_UART3
/* Enable the USART3 Interrupt */
NVIC_InitStructure
.
NVIC_IRQChannel
=
USART3_IRQn
;
NVIC_InitStructure
.
NVIC_IRQChannelSubPriority
=
1
;
NVIC_InitStructure
.
NVIC_IRQChannelCmd
=
ENABLE
;
NVIC_Init
(
&
NVIC_InitStructure
);
/* Enable the DMA1 Channel2 Interrupt */
NVIC_InitStructure
.
NVIC_IRQChannel
=
DMA1_Stream1_IRQn
;
NVIC_InitStructure
.
NVIC_IRQChannelSubPriority
=
1
;
NVIC_InitStructure
.
NVIC_IRQChannelCmd
=
ENABLE
;
NVIC_Init
(
&
NVIC_InitStructure
);
#endif
#ifdef RT_USING_UART6
/* Enable the USART6 Interrupt */
NVIC_InitStructure
.
NVIC_IRQChannel
=
USART6_IRQn
;
NVIC_InitStructure
.
NVIC_IRQChannelPreemptionPriority
=
1
;
NVIC_InitStructure
.
NVIC_IRQChannelSubPriority
=
1
;
NVIC_InitStructure
.
NVIC_IRQChannelCmd
=
ENABLE
;
NVIC_Init
(
&
NVIC_InitStructure
);
#endif
}
static
void
DMA_Configuration
(
void
)
int
stm32_hw_usart_init
(
void
)
{
#if defined (RT_USING_UART3)
DMA_InitTypeDef
DMA_InitStructure
;
// /* Configure DMA Stream */
// DMA_InitStructure.DMA_Channel = DMA_CHANNEL;
// DMA_InitStructure.DMA_PeripheralBaseAddr = (uint32_t)SRC_Const_Buffer;
// DMA_InitStructure.DMA_Memory0BaseAddr = (uint32_t)DST_Buffer;
// DMA_InitStructure.DMA_DIR = DMA_DIR_MemoryToMemory;
// DMA_InitStructure.DMA_BufferSize = (uint32_t)BUFFER_SIZE;
// DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Enable;
// DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable;
// DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Word;
// DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_Word;
// DMA_InitStructure.DMA_Mode = DMA_Mode_Normal;
// DMA_InitStructure.DMA_Priority = DMA_Priority_High;
// DMA_InitStructure.DMA_FIFOMode = DMA_FIFOMode_Disable;
// DMA_InitStructure.DMA_FIFOThreshold = DMA_FIFOThreshold_Full;
// DMA_InitStructure.DMA_MemoryBurst = DMA_MemoryBurst_Single;
// DMA_InitStructure.DMA_PeripheralBurst = DMA_PeripheralBurst_Single;
// DMA_Init(DMA_STREAM, &DMA_InitStructure);
/* Configure DMA Stream */
DMA_InitStructure
.
DMA_Channel
=
DMA_Channel_0
;
DMA_InitStructure
.
DMA_PeripheralBaseAddr
=
(
uint32_t
)(
&
USART3
->
DR
);
DMA_InitStructure
.
DMA_Memory0BaseAddr
=
(
uint32_t
)
0
;
DMA_InitStructure
.
DMA_DIR
=
DMA_DIR_MemoryToPeripheral
;
DMA_InitStructure
.
DMA_BufferSize
=
(
uint32_t
)
0
;
DMA_InitStructure
.
DMA_PeripheralInc
=
DMA_PeripheralInc_Disable
;
DMA_InitStructure
.
DMA_MemoryInc
=
DMA_MemoryInc_Enable
;
DMA_InitStructure
.
DMA_PeripheralDataSize
=
DMA_PeripheralDataSize_Word
;
DMA_InitStructure
.
DMA_MemoryDataSize
=
DMA_MemoryDataSize_Byte
;
DMA_InitStructure
.
DMA_Mode
=
DMA_Mode_Normal
;
DMA_InitStructure
.
DMA_Priority
=
DMA_Priority_High
;
DMA_InitStructure
.
DMA_FIFOMode
=
DMA_FIFOMode_Disable
;
DMA_InitStructure
.
DMA_FIFOThreshold
=
DMA_FIFOThreshold_Full
;
DMA_InitStructure
.
DMA_MemoryBurst
=
DMA_MemoryBurst_Single
;
DMA_InitStructure
.
DMA_PeripheralBurst
=
DMA_PeripheralBurst_Single
;
DMA_DeInit
(
UART3_TX_DMA
);
DMA_Init
(
UART3_TX_DMA
,
&
DMA_InitStructure
);
// /* fill init structure */
// DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
// DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable;
// DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte;
// DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte;
// DMA_InitStructure.DMA_Mode = DMA_Mode_Normal;
// DMA_InitStructure.DMA_Priority = DMA_Priority_VeryHigh;
// DMA_InitStructure.DMA_M2M = DMA_M2M_Disable;
//
// /* DMA1 Channel5 (triggered by USART3 Tx event) Config */
// DMA_DeInit(UART3_TX_DMA);
// DMA_InitStructure.DMA_PeripheralBaseAddr = USART3_DR_Base;
// DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralDST;
// DMA_InitStructure.DMA_MemoryBaseAddr = (u32)0;
// DMA_InitStructure.DMA_BufferSize = 0;
// DMA_Init(UART3_TX_DMA, &DMA_InitStructure);
DMA_ITConfig
(
UART3_TX_DMA
,
DMA_IT_TC
|
DMA_IT_TE
,
ENABLE
);
// DMA_ClearFlag(DMA1_FLAG_TC5);
#endif
}
volatile
USART_TypeDef
*
uart2_debug
=
USART2
;
/*
* Init all related hardware in here
* rt_hw_serial_init() will register all supported USART device
*/
void
rt_hw_usart_init
()
{
USART_InitTypeDef
USART_InitStructure
;
struct
stm32_uart
*
uart
;
struct
serial_configure
config
=
RT_SERIAL_CONFIG_DEFAULT
;
RCC_Configuration
();
GPIO_Configuration
();
NVIC_Configuration
();
DMA_Configuration
();
/* uart init */
#ifdef RT_USING_UART1
USART_InitStructure
.
USART_BaudRate
=
115200
;
USART_InitStructure
.
USART_WordLength
=
USART_WordLength_8b
;
USART_InitStructure
.
USART_StopBits
=
USART_StopBits_1
;
USART_InitStructure
.
USART_Parity
=
USART_Parity_No
;
USART_InitStructure
.
USART_HardwareFlowControl
=
USART_HardwareFlowControl_None
;
USART_InitStructure
.
USART_Mode
=
USART_Mode_Rx
|
USART_Mode_Tx
;
USART_Init
(
USART1
,
&
USART_InitStructure
);
uart
=
&
uart1
;
/* register uart1 */
rt_hw_serial_register
(
&
uart1_device
,
"uart1"
,
RT_DEVICE_FLAG_RDWR
|
RT_DEVICE_FLAG_INT_RX
,
&
uart1
);
serial1
.
ops
=
&
stm32_uart_ops
;
serial1
.
config
=
config
;
/* enable interrupt */
USART_ITConfig
(
USART1
,
USART_IT_RXNE
,
ENABLE
);
#endif
NVIC_Configuration
(
&
uart1
);
#ifdef RT_USING_UART2
USART_InitStructure
.
USART_BaudRate
=
115200
;
USART_InitStructure
.
USART_WordLength
=
USART_WordLength_8b
;
USART_InitStructure
.
USART_StopBits
=
USART_StopBits_1
;
USART_InitStructure
.
USART_Parity
=
USART_Parity_No
;
USART_InitStructure
.
USART_HardwareFlowControl
=
USART_HardwareFlowControl_None
;
USART_InitStructure
.
USART_Mode
=
USART_Mode_Rx
|
USART_Mode_Tx
;
USART_Init
(
USART2
,
&
USART_InitStructure
);
/* register UART1 device */
rt_hw_serial_register
(
&
serial1
,
"uart1"
,
RT_DEVICE_FLAG_RDWR
|
RT_DEVICE_FLAG_INT_RX
,
uart
);
#endif
/* RT_USING_UART1 */
/* register uart2 */
rt_hw_serial_register
(
&
uart2_device
,
"uart2"
,
RT_DEVICE_FLAG_RDWR
|
RT_DEVICE_FLAG_INT_RX
,
&
uart2
);
#ifdef RT_USING_UART2
uart
=
&
uart2
;
/* Enable USART2 DMA Rx request */
USART_ITConfig
(
USART2
,
USART_IT_RXNE
,
ENABLE
);
#endif
serial2
.
ops
=
&
stm32_uart_ops
;
serial2
.
config
=
config
;
#ifdef RT_USING_UART3
USART_InitStructure
.
USART_BaudRate
=
115200
;
USART_InitStructure
.
USART_WordLength
=
USART_WordLength_8b
;
USART_InitStructure
.
USART_StopBits
=
USART_StopBits_1
;
USART_InitStructure
.
USART_Parity
=
USART_Parity_No
;
USART_InitStructure
.
USART_HardwareFlowControl
=
USART_HardwareFlowControl_None
;
USART_InitStructure
.
USART_Mode
=
USART_Mode_Rx
|
USART_Mode_Tx
;
USART_Init
(
USART3
,
&
USART_InitStructure
);
NVIC_Configuration
(
&
uart2
);
// uart3_dma_tx.dma_channel= UART3_TX_DMA;
/* register UART1 device */
rt_hw_serial_register
(
&
serial2
,
"uart2"
,
RT_DEVICE_FLAG_RDWR
|
RT_DEVICE_FLAG_INT_RX
,
uart
);
#endif
/* RT_USING_UART2 */
/* register uart3 */
rt_hw_serial_register
(
&
uart3_device
,
"uart3"
,
RT_DEVICE_FLAG_RDWR
|
RT_DEVICE_FLAG_INT_RX
|
RT_DEVICE_FLAG_DMA_TX
,
&
uart3
);
#ifdef RT_USING_UART3
uart
=
&
uart3
;
/* Enable USART3 DMA Tx request */
USART_DMACmd
(
USART3
,
USART_DMAReq_Tx
,
ENABLE
)
;
serial3
.
ops
=
&
stm32_uart_ops
;
serial3
.
config
=
config
;
/* enable interrupt */
USART_ITConfig
(
USART3
,
USART_IT_RXNE
,
ENABLE
);
#endif
NVIC_Configuration
(
&
uart3
);
#ifdef RT_USING_UART6
USART_InitStructure
.
USART_BaudRate
=
9600
;
USART_InitStructure
.
USART_WordLength
=
USART_WordLength_8b
;
USART_InitStructure
.
USART_StopBits
=
USART_StopBits_1
;
USART_InitStructure
.
USART_Parity
=
USART_Parity_No
;
USART_InitStructure
.
USART_HardwareFlowControl
=
USART_HardwareFlowControl_None
;
USART_InitStructure
.
USART_Mode
=
USART_Mode_Rx
|
USART_Mode_Tx
;
USART_Init
(
USART6
,
&
USART_InitStructure
);
/* register UART3 device */
rt_hw_serial_register
(
&
serial3
,
"uart3"
,
RT_DEVICE_FLAG_RDWR
|
RT_DEVICE_FLAG_INT_RX
,
uart
);
#endif
/* RT_USING_UART3 */
/* register uart6 */
rt_hw_serial_register
(
&
uart6_device
,
"uart6"
,
RT_DEVICE_FLAG_RDWR
|
RT_DEVICE_FLAG_INT_RX
,
&
uart6
);
#endif
return
0
;
}
INIT_BOARD_EXPORT
(
stm32_hw_usart_init
);
bsp/stm32f40x/drivers/usart.h
浏览文件 @
6acf4a45
...
...
@@ -18,6 +18,9 @@
#include <rthw.h>
#include <rtthread.h>
void
rt_hw_usart_init
(
void
);
#define UART_ENABLE_IRQ(n) NVIC_EnableIRQ((n))
#define UART_DISABLE_IRQ(n) NVIC_DisableIRQ((n))
int
stm32_hw_usart_init
(
void
);
#endif
bsp/stm32f40x/rtconfig.h
浏览文件 @
6acf4a45
...
...
@@ -2,14 +2,11 @@
#ifndef __RTTHREAD_CFG_H__
#define __RTTHREAD_CFG_H__
/* RT_GDB_STUB */
//#define RT_USING_GDB
/* RT_NAME_MAX*/
#define RT_NAME_MAX 8
/* RT_ALIGN_SIZE*/
#define RT_ALIGN_SIZE
8
#define RT_ALIGN_SIZE
4
/* PRIORITY_MAX */
#define RT_THREAD_PRIORITY_MAX 32
...
...
@@ -20,7 +17,6 @@
/* SECTION: RT_DEBUG */
/* Thread Debug */
#define RT_DEBUG
#define RT_USING_OVERFLOW_CHECK
/* Using Hook */
...
...
@@ -62,6 +58,16 @@
/* SECTION: Device System */
/* Using Device System */
#define RT_USING_DEVICE
#define RT_USING_DEVICE_IPC
/* Using serial framework */
#define RT_USING_SERIAL
#define RT_USING_UART1
#define RT_USING_UART2
#define RT_USING_UART3
/* Using GPIO pin framework */
#define RT_USING_PIN
/* SECTION: Console options */
#define RT_USING_CONSOLE
...
...
@@ -75,7 +81,14 @@
#define FINSH_USING_DESCRIPTION
/* SECTION: device filesystem */
/* Using Device file system */
/* #define RT_USING_DFS */
/* the max number of mounted filesystem */
#define DFS_FILESYSTEMS_MAX 2
/* the max number of opened files */
#define DFS_FD_MAX 4
/* Using ELM FATFS */
//#define RT_USING_DFS_ELMFAT
#define RT_DFS_ELM_WORD_ACCESS
/* Reentrancy (thread safe) of the FatFs module. */
...
...
@@ -87,12 +100,8 @@
/* Maximum sector size to be handled. */
#define RT_DFS_ELM_MAX_SECTOR_SIZE 512
#define RT_USING_DFS_ROMFS
/* the max number of mounted filesystem */
#define DFS_FILESYSTEMS_MAX 2
/* the max number of opened files */
#define DFS_FD_MAX 4
/* Using ROM file system */
// #define RT_USING_DFS_ROMFS
/* SECTION: lwip, a lighwight TCP/IP protocol stack */
/* #define RT_USING_LWIP */
...
...
@@ -151,4 +160,7 @@
#define CHECKSUM_GEN_IP 0
#define CHECKSUM_GEN_UDP 0
/* RT_GDB_STUB */
//#define RT_USING_GDB
#endif
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