From e7df811926bb603c09eb01626a2b87b29bafd5c4 Mon Sep 17 00:00:00 2001 From: liu2guang <1004383796@qq.com> Date: Fri, 29 Jun 2018 11:47:44 +0800 Subject: [PATCH] =?UTF-8?q?[bsp][stm32f10x]=20Fix=20compile=20error=20when?= =?UTF-8?q?=20configuring=20HSI.=20|=E4=BF=AE=E5=A4=8D=E5=BD=93=E9=85=8D?= =?UTF-8?q?=E7=BD=AE=E4=B8=BAHSI=E5=86=85=E9=83=A8=E6=97=B6=E9=92=9F?= =?UTF-8?q?=E5=81=9A=E4=B8=BA=E6=97=B6=E9=92=9F=E6=BA=90=E6=97=B6=E7=BC=96?= =?UTF-8?q?=E8=AF=91=E9=94=99=E8=AF=AF=E9=97=AE=E9=A2=98.?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit --- bsp/stm32f10x-HAL/drivers/board.c | 65 ++++++++++++------- .../drivers/stm32f1xx_hal_conf.h | 4 ++ 2 files changed, 47 insertions(+), 22 deletions(-) diff --git a/bsp/stm32f10x-HAL/drivers/board.c b/bsp/stm32f10x-HAL/drivers/board.c index 61029214c1..0c880d4746 100644 --- a/bsp/stm32f10x-HAL/drivers/board.c +++ b/bsp/stm32f10x-HAL/drivers/board.c @@ -49,37 +49,58 @@ void HAL_MspInit(void) void SystemClock_Config(void) { - rt_err_t result; + rt_err_t ret = RT_EOK; RCC_OscInitTypeDef RCC_OscInitStruct; RCC_ClkInitTypeDef RCC_ClkInitStruct; - /**Initializes the CPU, AHB and APB busses clocks - */ + +#if !defined(RT_USING_HSI) + /* Initializes the CPU, AHB and APB busses clocks */ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE; - RCC_OscInitStruct.HSEState = RCC_HSE_ON; + RCC_OscInitStruct.HSEState = RCC_HSE_ON; RCC_OscInitStruct.HSEPredivValue = RCC_HSE_PREDIV_DIV1; - RCC_OscInitStruct.HSIState = RCC_HSI_ON; - RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; - RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; - RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL9; - result = HAL_RCC_OscConfig(&RCC_OscInitStruct); - RT_ASSERT(result == HAL_OK); - /**Initializes the CPU, AHB and APB busses clocks - */ - RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2; - RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; - RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; + RCC_OscInitStruct.HSIState = RCC_HSI_ON; + RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; + RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; + RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL9; + ret = HAL_RCC_OscConfig(&RCC_OscInitStruct); + RT_ASSERT(ret == HAL_OK); + + /* Initializes the CPU, AHB and APB busses clocks */ + RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK | + RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2; + RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; + RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2; RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; - result = HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2); - RT_ASSERT(result == HAL_OK); - /**Configure the Systick interrupt time - */ + ret = HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2); + RT_ASSERT(ret == HAL_OK); + HAL_SYSTICK_Config(HAL_RCC_GetHCLKFreq() / RT_TICK_PER_SECOND); - /**Configure the Systick - */ HAL_SYSTICK_CLKSourceConfig(SYSTICK_CLKSOURCE_HCLK); - /* SysTick_IRQn interrupt configuration */ HAL_NVIC_SetPriority(SysTick_IRQn, 15, 0); +#else + RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI; + RCC_OscInitStruct.HSIState = RCC_HSI_ON; + RCC_OscInitStruct.HSICalibrationValue = 16; + RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; + RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI_DIV2; + RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL16; + ret = HAL_RCC_OscConfig(&RCC_OscInitStruct); + RT_ASSERT(ret == HAL_OK); + + RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK | + RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; + RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; + RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; + RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2; + RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; + ret = HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2); + RT_ASSERT(ret == HAL_OK); + + HAL_SYSTICK_Config(HAL_RCC_GetHCLKFreq()/RT_TICK_PER_SECOND); + HAL_SYSTICK_CLKSourceConfig(SYSTICK_CLKSOURCE_HCLK); + HAL_NVIC_SetPriority(SysTick_IRQn, 15, 0); +#endif } /** diff --git a/bsp/stm32f10x-HAL/drivers/stm32f1xx_hal_conf.h b/bsp/stm32f10x-HAL/drivers/stm32f1xx_hal_conf.h index e50abfd1fc..32be5f38d0 100644 --- a/bsp/stm32f10x-HAL/drivers/stm32f1xx_hal_conf.h +++ b/bsp/stm32f10x-HAL/drivers/stm32f1xx_hal_conf.h @@ -103,7 +103,11 @@ extern "C" { * This value is used by the RCC HAL module to compute the system frequency * (when HSE is used as system clock source, directly or through the PLL). */ +#if !defined(RT_USING_HSI) #define HSE_VALUE ((unsigned int)RT_HSE_VALUE) +#endif + +//#define HSE_VALUE ((unsigned int)RT_HSE_VALUE) #if !defined (HSE_VALUE) #if defined(USE_STM3210C_EVAL) -- GitLab