diff --git a/bsp/es32f0334/drivers/drv_pm.c b/bsp/es32f0334/drivers/drv_pm.c index f9324d720851489673be4c78d8fcc56f7dbfdb5e..22f2c430732e27dba5cfd8ef0efa23ecc2fe8950 100644 --- a/bsp/es32f0334/drivers/drv_pm.c +++ b/bsp/es32f0334/drivers/drv_pm.c @@ -6,6 +6,7 @@ * Change Logs: * Date Author Notes * 2019-04-08 wangyq the first version + * 2019-05-06 Zero-Free adapt to the new power management interface */ #include @@ -16,52 +17,26 @@ #ifdef RT_USING_PM -static void _drv_pm_enter(struct rt_pm *pm) +static void _drv_pm_enter(struct rt_pm *pm, uint8_t mode) { - rt_uint32_t mode; - - mode = pm->current_mode; - switch (mode) { - case PM_RUN_MODE_NORMAL: + case PM_SLEEP_MODE_NONE: break; - case PM_SLEEP_MODE_SLEEP: + case PM_SLEEP_MODE_IDLE: __WFI(); break; - case PM_SLEEP_MODE_TIMER: - pmu_stop2_enter(); - break; - - case PM_SLEEP_MODE_SHUTDOWN: - pmu_standby_enter(PMU_STANDBY_PORT_NONE); - break; - - default: - RT_ASSERT(0); - break; - } -} - -static void _drv_pm_exit(struct rt_pm *pm) -{ - rt_uint32_t mode; - - RT_ASSERT(pm != RT_NULL); - - mode = pm->current_mode; - - switch (mode) - { - case PM_RUN_MODE_NORMAL: + case PM_SLEEP_MODE_LIGHT: break; - case PM_SLEEP_MODE_SLEEP: + case PM_SLEEP_MODE_DEEP: + pmu_stop2_enter(); break; - case PM_SLEEP_MODE_TIMER: + case PM_SLEEP_MODE_STANDBY: + pmu_standby_enter(PMU_STANDBY_PORT_NONE); break; case PM_SLEEP_MODE_SHUTDOWN: @@ -73,32 +48,21 @@ static void _drv_pm_exit(struct rt_pm *pm) } } -#if PM_RUN_MODE_COUNT > 1 -static void _drv_pm_frequency_change(struct rt_pm *pm, rt_uint32_t frequency) -{ - return; -} -#endif - static int drv_hw_pm_init(void) { static const struct rt_pm_ops _ops = { _drv_pm_enter, - _drv_pm_exit, - -#if PM_RUN_MODE_COUNT > 1 - _drv_pm_frequency_change, -#endif + RT_NULL, RT_NULL, RT_NULL, RT_NULL }; - rt_uint8_t timer_mask; + rt_uint8_t timer_mask = 0; - /* initialize timer mask */ - timer_mask = 1UL << PM_SLEEP_MODE_TIMER; + /* initialize timer mask(no need tickless) */ + // timer_mask = 1UL << PM_SLEEP_MODE_DEEP; /* initialize system pm module */ rt_system_pm_init(&_ops, timer_mask, RT_NULL); diff --git a/bsp/es32f0654/drivers/drv_pm.c b/bsp/es32f0654/drivers/drv_pm.c index 256634b81d68645023719feec3ddd2d01cb13ab4..aa2f07ec68a101a94d15ecec51908d4c9ffbe2ad 100644 --- a/bsp/es32f0654/drivers/drv_pm.c +++ b/bsp/es32f0654/drivers/drv_pm.c @@ -6,6 +6,7 @@ * Change Logs: * Date Author Notes * 2019-04-01 wangyq the first version + * 2019-05-06 Zero-Free adapt to the new power management interface */ #include @@ -16,52 +17,26 @@ #ifdef RT_USING_PM -static void _drv_pm_enter(struct rt_pm *pm) +static void _drv_pm_enter(struct rt_pm *pm, uint8_t mode) { - rt_uint32_t mode; - - mode = pm->current_mode; - switch (mode) { - case PM_RUN_MODE_NORMAL: + case PM_SLEEP_MODE_NONE: break; - case PM_SLEEP_MODE_SLEEP: + case PM_SLEEP_MODE_IDLE: __WFI(); break; - case PM_SLEEP_MODE_TIMER: - pmu_stop2_enter(); - break; - - case PM_SLEEP_MODE_SHUTDOWN: - pmu_standby_enter(PMU_STANDBY_PORT_NONE); - break; - - default: - RT_ASSERT(0); - break; - } -} - -static void _drv_pm_exit(struct rt_pm *pm) -{ - rt_uint32_t mode; - - RT_ASSERT(pm != RT_NULL); - - mode = pm->current_mode; - - switch (mode) - { - case PM_RUN_MODE_NORMAL: + case PM_SLEEP_MODE_LIGHT: break; - case PM_SLEEP_MODE_SLEEP: + case PM_SLEEP_MODE_DEEP: + pmu_stop2_enter(); break; - case PM_SLEEP_MODE_TIMER: + case PM_SLEEP_MODE_STANDBY: + pmu_standby_enter(PMU_STANDBY_PORT_NONE); break; case PM_SLEEP_MODE_SHUTDOWN: @@ -73,32 +48,21 @@ static void _drv_pm_exit(struct rt_pm *pm) } } -#if PM_RUN_MODE_COUNT > 1 -static void _drv_pm_frequency_change(struct rt_pm *pm, rt_uint32_t frequency) -{ - return; -} -#endif - static int drv_hw_pm_init(void) { static const struct rt_pm_ops _ops = { _drv_pm_enter, - _drv_pm_exit, - -#if PM_RUN_MODE_COUNT > 1 - _drv_pm_frequency_change, -#endif + RT_NULL, RT_NULL, RT_NULL, RT_NULL }; - rt_uint8_t timer_mask; + rt_uint8_t timer_mask = 0; - /* initialize timer mask */ - timer_mask = 1UL << PM_SLEEP_MODE_TIMER; + /* initialize timer mask(no need tickless) */ + timer_mask = 1UL << PM_SLEEP_MODE_DEEP; /* initialize system pm module */ rt_system_pm_init(&_ops, timer_mask, RT_NULL); diff --git a/bsp/stm32/libraries/HAL_Drivers/SConscript b/bsp/stm32/libraries/HAL_Drivers/SConscript index 413cc61a7bf8d9b95c7c1a337cea2c7a7260863d..99f1e9e52035f6e1938d09de77431b4ce5bfabd7 100644 --- a/bsp/stm32/libraries/HAL_Drivers/SConscript +++ b/bsp/stm32/libraries/HAL_Drivers/SConscript @@ -39,6 +39,10 @@ if GetDepend(['RT_USING_ADC']): if GetDepend(['RT_USING_CAN']): src += ['drv_can.c'] +if GetDepend(['RT_USING_PM', 'SOC_SERIES_STM32L4']): + src += ['drv_pm.c'] + src += ['drv_lptim.c'] + if GetDepend('BSP_USING_SDRAM'): src += ['drv_sdram.c'] diff --git a/bsp/stm32/libraries/HAL_Drivers/drv_lptim.c b/bsp/stm32/libraries/HAL_Drivers/drv_lptim.c new file mode 100644 index 0000000000000000000000000000000000000000..64e602fa52a3db440bca425ae8286f7a8989aa7b --- /dev/null +++ b/bsp/stm32/libraries/HAL_Drivers/drv_lptim.c @@ -0,0 +1,132 @@ +/* + * Copyright (c) 2006-2018, RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2019-05-06 Zero-Free first version + */ + +#include +#include + +static LPTIM_HandleTypeDef LptimHandle; + +void HAL_LPTIM_MspInit(LPTIM_HandleTypeDef *hlptim) +{ + if (hlptim->Instance == LPTIM1) + { + /* Peripheral clock enable */ + __HAL_RCC_LPTIM1_CLK_ENABLE(); + } +} + +void LPTIM1_IRQHandler(void) +{ + HAL_LPTIM_IRQHandler(&LptimHandle); +} + +void HAL_LPTIM_CompareMatchCallback(LPTIM_HandleTypeDef *hlptim) +{ + /* enter interrupt */ + rt_interrupt_enter(); + + /* leave interrupt */ + rt_interrupt_leave(); +} + +/** + * This function get current count value of LPTIM + * + * @return the count vlaue + */ +rt_uint32_t stm32l4_lptim_get_current_tick(void) +{ + return HAL_LPTIM_ReadCounter(&LptimHandle); +} + +/** + * This function get the max value that LPTIM can count + * + * @return the max count + */ +rt_uint32_t stm32l4_lptim_get_tick_max(void) +{ + return (0xFFFF); +} + +/** + * This function start LPTIM with reload value + * + * @param reload The value that LPTIM count down from + * + * @return RT_EOK + */ +rt_err_t stm32l4_lptim_start(rt_uint32_t reload) +{ + HAL_LPTIM_TimeOut_Start_IT(&LptimHandle, 0xFFFF, reload); + + return (RT_EOK); +} + +/** + * This function stop LPTIM + */ +void stm32l4_lptim_stop(void) +{ + rt_uint32_t _ier; + + _ier = LptimHandle.Instance->IER; + LptimHandle.Instance->ICR = LptimHandle.Instance->ISR & _ier; +} + +/** + * This function get the count clock of LPTIM + * + * @return the count clock frequency in Hz + */ +rt_uint32_t stm32l4_lptim_get_countfreq(void) +{ + return 32000 / 32; +} + +/** + * This function initialize the lptim + */ +int stm32l4_hw_lptim_init(void) +{ + RCC_OscInitTypeDef RCC_OscInitStruct = {0}; + RCC_PeriphCLKInitTypeDef RCC_PeriphCLKInitStruct = {0}; + + /* Enable LSI clock */ + RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_LSI; + RCC_OscInitStruct.LSIState = RCC_LSI_ON; + RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE; + HAL_RCC_OscConfig(&RCC_OscInitStruct); + + /* Select the LSI clock as LPTIM peripheral clock */ + RCC_PeriphCLKInitStruct.PeriphClockSelection = RCC_PERIPHCLK_LPTIM1; + RCC_PeriphCLKInitStruct.Lptim1ClockSelection = RCC_LPTIM1CLKSOURCE_LSI; + HAL_RCCEx_PeriphCLKConfig(&RCC_PeriphCLKInitStruct); + + LptimHandle.Instance = LPTIM1; + LptimHandle.Init.Clock.Source = LPTIM_CLOCKSOURCE_APBCLOCK_LPOSC; + LptimHandle.Init.Clock.Prescaler = LPTIM_PRESCALER_DIV32; + LptimHandle.Init.Trigger.Source = LPTIM_TRIGSOURCE_SOFTWARE; + LptimHandle.Init.OutputPolarity = LPTIM_OUTPUTPOLARITY_HIGH; + LptimHandle.Init.UpdateMode = LPTIM_UPDATE_IMMEDIATE; + LptimHandle.Init.CounterSource = LPTIM_COUNTERSOURCE_INTERNAL; + if (HAL_LPTIM_Init(&LptimHandle) != HAL_OK) + { + return -1; + } + + NVIC_ClearPendingIRQ(LPTIM1_IRQn); + NVIC_SetPriority(LPTIM1_IRQn, 0); + NVIC_EnableIRQ(LPTIM1_IRQn); + + return 0; +} + +INIT_DEVICE_EXPORT(stm32l4_hw_lptim_init); diff --git a/bsp/stm32/libraries/HAL_Drivers/drv_lptim.h b/bsp/stm32/libraries/HAL_Drivers/drv_lptim.h new file mode 100644 index 0000000000000000000000000000000000000000..0fd51b5eac295c4ef3e3d3ecb12e8b1e52aa0ac1 --- /dev/null +++ b/bsp/stm32/libraries/HAL_Drivers/drv_lptim.h @@ -0,0 +1,23 @@ +/* + * Copyright (c) 2006-2018, RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2019-05-06 Zero-Free first version + */ + +#ifndef __DRV_PMTIMER_H__ +#define __DRV_PMTIMER_H__ + +#include + +rt_uint32_t stm32l4_lptim_get_countfreq(void); +rt_uint32_t stm32l4_lptim_get_tick_max(void); +rt_uint32_t stm32l4_lptim_get_current_tick(void); + +rt_err_t stm32l4_lptim_start(rt_uint32_t load); +void stm32l4_lptim_stop(void); + +#endif /* __DRV_PMTIMER_H__ */ diff --git a/bsp/stm32/libraries/HAL_Drivers/drv_pm.c b/bsp/stm32/libraries/HAL_Drivers/drv_pm.c new file mode 100644 index 0000000000000000000000000000000000000000..84ddf6cd4121b8065e823e394c67fb00b7edcdcf --- /dev/null +++ b/bsp/stm32/libraries/HAL_Drivers/drv_pm.c @@ -0,0 +1,248 @@ +/* + * Copyright (c) 2006-2018, RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2019-05-06 Zero-Free first version + */ + +#include +#include + +static void uart_console_reconfig(void) +{ + struct serial_configure config = RT_SERIAL_CONFIG_DEFAULT; + + rt_device_control(rt_console_get_device(), RT_DEVICE_CTRL_CONFIG, &config); +} + +/** + * This function will put STM32L4xx into sleep mode. + * + * @param pm pointer to power manage structure + */ +static void sleep(struct rt_pm *pm, uint8_t mode) +{ + switch (mode) + { + case PM_SLEEP_MODE_NONE: + break; + + case PM_SLEEP_MODE_IDLE: + // __WFI(); + break; + + case PM_SLEEP_MODE_LIGHT: + if (pm->run_mode == PM_RUN_MODE_LOW_SPEED) + { + /* Enter LP SLEEP Mode, Enable low-power regulator */ + HAL_PWR_EnterSLEEPMode(PWR_LOWPOWERREGULATOR_ON, PWR_SLEEPENTRY_WFI); + } + else + { + /* Enter SLEEP Mode, Main regulator is ON */ + HAL_PWR_EnterSLEEPMode(PWR_MAINREGULATOR_ON, PWR_SLEEPENTRY_WFI); + } + break; + + case PM_SLEEP_MODE_DEEP: + /* Enter STOP 2 mode */ + HAL_PWREx_EnterSTOP2Mode(PWR_STOPENTRY_WFI); + /* Re-configure the system clock */ + SystemClock_ReConfig(pm->run_mode); + break; + + case PM_SLEEP_MODE_STANDBY: + /* Enter STANDBY mode */ + HAL_PWR_EnterSTANDBYMode(); + break; + + case PM_SLEEP_MODE_SHUTDOWN: + /* Enter SHUTDOWNN mode */ + HAL_PWREx_EnterSHUTDOWNMode(); + break; + + default: + RT_ASSERT(0); + break; + } +} + +static uint8_t run_speed[PM_RUN_MODE_MAX][2] = +{ + {80, 0}, + {80, 1}, + {24, 2}, + {2, 3}, +}; + +static void run(struct rt_pm *pm, uint8_t mode) +{ + static uint8_t last_mode; + static char *run_str[] = PM_RUN_MODE_NAMES; + + if (mode == last_mode) + return; + last_mode = mode; + + /* 1. 设置 MSI 作为 SYSCLK 时钟源,以修改 PLL */ + SystemClock_MSI_ON(); + + /* 2. 根据RUN模式切换时钟频率(HSI) */ + switch (mode) + { + case PM_RUN_MODE_HIGH_SPEED: + case PM_RUN_MODE_NORMAL_SPEED: + SystemClock_80M(); + /* Configure the main internal regulator output voltage (Range1 by default)*/ + HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1); + break; + case PM_RUN_MODE_MEDIUM_SPEED: + SystemClock_24M(); + /* Configure the main internal regulator output voltage */ + HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE2); + break; + case PM_RUN_MODE_LOW_SPEED: + SystemClock_2M(); + /* Enter LP RUN mode */ + HAL_PWREx_EnableLowPowerRunMode(); + break; + default: + break; + } + + /* 3. 关闭 MSI 时钟 */ + // SystemClock_MSI_OFF(); + + /* 4. 更新外设时钟 */ + uart_console_reconfig(); + /* Re-Configure the Systick time */ + HAL_SYSTICK_Config(HAL_RCC_GetHCLKFreq() / RT_TICK_PER_SECOND); + /* Re-Configure the Systick */ + HAL_SYSTICK_CLKSourceConfig(SYSTICK_CLKSOURCE_HCLK); + + rt_kprintf("switch to %s mode, frequency = %d MHz\n", run_str[mode], run_speed[mode][0]); +} + +/** + * This function caculate the PM tick from OS tick + * + * @param tick OS tick + * + * @return the PM tick + */ +static rt_tick_t stm32l4_pm_tick_from_os_tick(rt_tick_t tick) +{ + rt_uint32_t freq = stm32l4_lptim_get_countfreq(); + + return (freq * tick / RT_TICK_PER_SECOND); +} + +/** + * This function caculate the OS tick from PM tick + * + * @param tick PM tick + * + * @return the OS tick + */ +static rt_tick_t stm32l4_os_tick_from_pm_tick(rt_uint32_t tick) +{ + static rt_uint32_t os_tick_remain = 0; + rt_uint32_t ret, freq; + + freq = stm32l4_lptim_get_countfreq(); + ret = (tick * RT_TICK_PER_SECOND + os_tick_remain) / freq; + + os_tick_remain += (tick * RT_TICK_PER_SECOND); + os_tick_remain %= freq; + + return ret; +} + +/** + * This function start the timer of pm + * + * @param pm Pointer to power manage structure + * @param timeout How many OS Ticks that MCU can sleep + */ +static void pm_timer_start(struct rt_pm *pm, rt_uint32_t timeout) +{ + RT_ASSERT(pm != RT_NULL); + RT_ASSERT(timeout > 0); + + if (timeout != RT_TICK_MAX) + { + /* Convert OS Tick to pmtimer timeout value */ + timeout = stm32l4_pm_tick_from_os_tick(timeout); + if (timeout > stm32l4_lptim_get_tick_max()) + { + timeout = stm32l4_lptim_get_tick_max(); + } + + /* Enter PM_TIMER_MODE */ + stm32l4_lptim_start(timeout); + } +} + +/** + * This function stop the timer of pm + * + * @param pm Pointer to power manage structure + */ +static void pm_timer_stop(struct rt_pm *pm) +{ + RT_ASSERT(pm != RT_NULL); + + /* Reset pmtimer status */ + stm32l4_lptim_stop(); +} + +/** + * This function calculate how many OS Ticks that MCU have suspended + * + * @param pm Pointer to power manage structure + * + * @return OS Ticks + */ +static rt_tick_t pm_timer_get_tick(struct rt_pm *pm) +{ + rt_uint32_t timer_tick; + + RT_ASSERT(pm != RT_NULL); + + timer_tick = stm32l4_lptim_get_current_tick(); + + return stm32l4_os_tick_from_pm_tick(timer_tick); +} + +/** + * This function initialize the power manager + */ +int drv_pm_hw_init(void) +{ + static const struct rt_pm_ops _ops = + { + sleep, + run, + pm_timer_start, + pm_timer_stop, + pm_timer_get_tick + }; + + rt_uint8_t timer_mask = 0; + + /* Enable Power Clock */ + __HAL_RCC_PWR_CLK_ENABLE(); + + /* initialize timer mask */ + timer_mask = 1UL << PM_SLEEP_MODE_DEEP; + + /* initialize system pm module */ + rt_system_pm_init(&_ops, timer_mask, RT_NULL); + + return 0; +} + +INIT_BOARD_EXPORT(drv_pm_hw_init); diff --git a/bsp/stm32/libraries/STM32L4xx_HAL/SConscript b/bsp/stm32/libraries/STM32L4xx_HAL/SConscript index 5b130f5aa303a45ce97972cc7772b4b31a73a36d..5eb48c406cd5f1e7f02c5b8ac06f10c50e251c4d 100644 --- a/bsp/stm32/libraries/STM32L4xx_HAL/SConscript +++ b/bsp/stm32/libraries/STM32L4xx_HAL/SConscript @@ -84,6 +84,9 @@ if GetDepend(['RT_USING_MTD_NOR']): if GetDepend(['RT_USING_MTD_NAND']): src += ['STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_nand.c'] +if GetDepend(['RT_USING_PM']): + src += ['STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_lptim.c'] + if GetDepend(['BSP_USING_ON_CHIP_FLASH']): src += ['STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.c'] src += ['STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c'] diff --git a/bsp/stm32/stm32l476-st-nucleo/.config b/bsp/stm32/stm32l476-st-nucleo/.config index 0731ce47825b7992a88067674f75586a5daa21e8..460cc52d06d114a201303dcc108e705d5128b6a3 100644 --- a/bsp/stm32/stm32l476-st-nucleo/.config +++ b/bsp/stm32/stm32l476-st-nucleo/.config @@ -7,6 +7,7 @@ # RT-Thread Kernel # CONFIG_RT_NAME_MAX=8 +# CONFIG_RT_USING_ARCH_DATA_TYPE is not set # CONFIG_RT_USING_SMP is not set CONFIG_RT_ALIGN_SIZE=4 # CONFIG_RT_THREAD_PRIORITY_8 is not set @@ -18,7 +19,7 @@ CONFIG_RT_USING_OVERFLOW_CHECK=y CONFIG_RT_USING_HOOK=y CONFIG_RT_USING_IDLE_HOOK=y CONFIG_RT_IDEL_HOOK_LIST_SIZE=4 -CONFIG_IDLE_THREAD_STACK_SIZE=256 +CONFIG_IDLE_THREAD_STACK_SIZE=1024 # CONFIG_RT_USING_TIMER_SOFT is not set CONFIG_RT_DEBUG=y CONFIG_RT_DEBUG_COLOR=y @@ -111,6 +112,7 @@ CONFIG_FINSH_ARG_MAX=10 # CONFIG_RT_USING_DEVICE_IPC=y CONFIG_RT_PIPE_BUFSZ=512 +# CONFIG_RT_USING_SYSTEM_WORKQUEUE is not set CONFIG_RT_USING_SERIAL=y CONFIG_RT_SERIAL_USING_DMA=y CONFIG_RT_SERIAL_RB_BUFSZ=64 @@ -124,13 +126,15 @@ CONFIG_RT_USING_PIN=y # CONFIG_RT_USING_MTD_NOR is not set # CONFIG_RT_USING_MTD_NAND is not set # CONFIG_RT_USING_MTD is not set -# CONFIG_RT_USING_PM is not set +CONFIG_RT_USING_PM=y CONFIG_RT_USING_RTC=y +# CONFIG_RT_USING_ALARM is not set # CONFIG_RT_USING_SOFT_RTC is not set # CONFIG_RT_USING_SDIO is not set # CONFIG_RT_USING_SPI is not set # CONFIG_RT_USING_WDT is not set # CONFIG_RT_USING_AUDIO is not set +# CONFIG_RT_USING_SENSOR is not set # # Using WiFi @@ -158,6 +162,11 @@ CONFIG_RT_USING_LIBC=y # # CONFIG_RT_USING_SAL is not set +# +# Network interface device +# +# CONFIG_RT_USING_NETDEV is not set + # # light weight TCP/IP stack # @@ -181,16 +190,9 @@ CONFIG_RT_USING_LIBC=y # # Utilities # -# CONFIG_RT_USING_LOGTRACE is not set # CONFIG_RT_USING_RYM is not set # CONFIG_RT_USING_ULOG is not set # CONFIG_RT_USING_UTEST is not set - -# -# ARM CMSIS -# -# CONFIG_RT_USING_CMSIS_OS is not set -# CONFIG_RT_USING_RTT_CMSIS is not set # CONFIG_RT_USING_LWP is not set # @@ -202,10 +204,12 @@ CONFIG_RT_USING_LIBC=y # # CONFIG_PKG_USING_PAHOMQTT is not set # CONFIG_PKG_USING_WEBCLIENT is not set +# CONFIG_PKG_USING_WEBNET is not set # CONFIG_PKG_USING_MONGOOSE is not set # CONFIG_PKG_USING_WEBTERMINAL is not set # CONFIG_PKG_USING_CJSON is not set # CONFIG_PKG_USING_JSMN is not set +# CONFIG_PKG_USING_LIBMODBUS is not set # CONFIG_PKG_USING_LJSON is not set # CONFIG_PKG_USING_EZXML is not set # CONFIG_PKG_USING_NANOPB is not set @@ -223,6 +227,7 @@ CONFIG_RT_USING_LIBC=y # Wiced WiFi # # CONFIG_PKG_USING_WLAN_WICED is not set +# CONFIG_PKG_USING_RW007 is not set # CONFIG_PKG_USING_COAP is not set # CONFIG_PKG_USING_NOPOLL is not set # CONFIG_PKG_USING_NETUTILS is not set @@ -236,6 +241,9 @@ CONFIG_RT_USING_LIBC=y # CONFIG_PKG_USING_GAGENT_CLOUD is not set # CONFIG_PKG_USING_ALI_IOTKIT is not set # CONFIG_PKG_USING_AZURE is not set +# CONFIG_PKG_USING_TENCENT_IOTKIT is not set +# CONFIG_PKG_USING_NIMBLE is not set +# CONFIG_PKG_USING_OTA_DOWNLOADER is not set # # security packages @@ -256,6 +264,7 @@ CONFIG_RT_USING_LIBC=y # # CONFIG_PKG_USING_OPENMV is not set # CONFIG_PKG_USING_MUPDF is not set +# CONFIG_PKG_USING_STEMWIN is not set # # tools packages @@ -267,6 +276,7 @@ CONFIG_RT_USING_LIBC=y # CONFIG_PKG_USING_RDB is not set # CONFIG_PKG_USING_QRCODE is not set # CONFIG_PKG_USING_ULOG_EASYFLASH is not set +# CONFIG_PKG_USING_ADBD is not set # # system packages @@ -283,10 +293,13 @@ CONFIG_RT_USING_LIBC=y # CONFIG_PKG_USING_LITTLEVGL2RTT is not set # CONFIG_PKG_USING_CMSIS is not set # CONFIG_PKG_USING_DFS_YAFFS is not set +# CONFIG_PKG_USING_LITTLEFS is not set +# CONFIG_PKG_USING_THREAD_POOL is not set # # peripheral libraries and drivers # +# CONFIG_PKG_USING_SENSORS_DRIVERS is not set # CONFIG_PKG_USING_REALTEK_AMEBA is not set # CONFIG_PKG_USING_SHT2X is not set # CONFIG_PKG_USING_AHT10 is not set @@ -294,6 +307,16 @@ CONFIG_RT_USING_LIBC=y # CONFIG_PKG_USING_STM32_SDIO is not set # CONFIG_PKG_USING_ICM20608 is not set # CONFIG_PKG_USING_U8G2 is not set +# CONFIG_PKG_USING_BUTTON is not set +# CONFIG_PKG_USING_MPU6XXX is not set +# CONFIG_PKG_USING_PCF8574 is not set +# CONFIG_PKG_USING_SX12XX is not set +# CONFIG_PKG_USING_SIGNAL_LED is not set +# CONFIG_PKG_USING_WM_LIBRARIES is not set +# CONFIG_PKG_USING_KENDRYTE_SDK is not set +# CONFIG_PKG_USING_INFRARED is not set +# CONFIG_PKG_USING_ROSSERIAL is not set +# CONFIG_PKG_USING_AT24CXX is not set # # miscellaneous packages @@ -308,10 +331,7 @@ CONFIG_RT_USING_LIBC=y # CONFIG_PKG_USING_ZLIB is not set # CONFIG_PKG_USING_DSTR is not set # CONFIG_PKG_USING_TINYFRAME is not set - -# -# sample package -# +# CONFIG_PKG_USING_KENDRYTE_DEMO is not set # # samples: kernel and components samples @@ -320,11 +340,9 @@ CONFIG_RT_USING_LIBC=y # CONFIG_PKG_USING_FILESYSTEM_SAMPLES is not set # CONFIG_PKG_USING_NETWORK_SAMPLES is not set # CONFIG_PKG_USING_PERIPHERAL_SAMPLES is not set - -# -# example package: hello -# # CONFIG_PKG_USING_HELLO is not set +# CONFIG_PKG_USING_VI is not set +# CONFIG_PKG_USING_NNOM is not set CONFIG_SOC_FAMILY_STM32=y CONFIG_SOC_SERIES_STM32L4=y diff --git a/bsp/stm32/stm32l476-st-nucleo/board/CubeMX_Config/Inc/stm32l4xx_hal_conf.h b/bsp/stm32/stm32l476-st-nucleo/board/CubeMX_Config/Inc/stm32l4xx_hal_conf.h index b663dfd26408b18e8ddb62ed85f906066e0c6648..9cf0bbaca24a05fdb2e2bb319fec984d029c5521 100644 --- a/bsp/stm32/stm32l476-st-nucleo/board/CubeMX_Config/Inc/stm32l4xx_hal_conf.h +++ b/bsp/stm32/stm32l476-st-nucleo/board/CubeMX_Config/Inc/stm32l4xx_hal_conf.h @@ -69,7 +69,7 @@ /*#define HAL_IWDG_MODULE_ENABLED */ /*#define HAL_LTDC_MODULE_ENABLED */ /*#define HAL_LCD_MODULE_ENABLED */ -/*#define HAL_LPTIM_MODULE_ENABLED */ +#define HAL_LPTIM_MODULE_ENABLED /*#define HAL_NAND_MODULE_ENABLED */ /*#define HAL_NOR_MODULE_ENABLED */ /*#define HAL_OPAMP_MODULE_ENABLED */ diff --git a/bsp/stm32/stm32l476-st-nucleo/board/board.c b/bsp/stm32/stm32l476-st-nucleo/board/board.c index b4fcfe0a84359e89af74dfa2719c5844b3e4f32b..88600d4b4fbe98ef9842d8a82fe1868c205a2dc2 100644 --- a/bsp/stm32/stm32l476-st-nucleo/board/board.c +++ b/bsp/stm32/stm32l476-st-nucleo/board/board.c @@ -5,62 +5,237 @@ * * Change Logs: * Date Author Notes - * 2019-02-05 gw first version + * 2019-02-05 gw first version + * 2019-05-05 Zero-Free Adding multiple configurations for system clock frequency */ #include void SystemClock_Config(void) { - RCC_OscInitTypeDef RCC_OscInitStruct = {0}; - RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; - RCC_PeriphCLKInitTypeDef PeriphClkInit = {0}; + RCC_OscInitTypeDef RCC_OscInitStruct = {0}; + RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; + RCC_PeriphCLKInitTypeDef PeriphClkInit = {0}; #ifdef BSP_USING_ONCHIP_RTC - /**Configure LSE Drive Capability - */ - HAL_PWR_EnableBkUpAccess(); - __HAL_RCC_LSEDRIVE_CONFIG(RCC_LSEDRIVE_LOW); -#endif - /**Initializes the CPU, AHB and APB busses clocks - */ - RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI; - RCC_OscInitStruct.HSIState = RCC_HSI_ON; - RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT; - RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; - RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI; - RCC_OscInitStruct.PLL.PLLM = 1; - RCC_OscInitStruct.PLL.PLLN = 10; - RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV7; - RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV2; - RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2; - if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) - { - Error_Handler(); - } - /**Initializes the CPU, AHB and APB busses clocks - */ - RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK - |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; - RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; - RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; - RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1; - RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; - - if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4) != HAL_OK) - { - Error_Handler(); - } - PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USART2; - PeriphClkInit.Usart2ClockSelection = RCC_USART2CLKSOURCE_PCLK1; - if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK) - { - Error_Handler(); - } - /**Configure the main internal regulator output voltage + /**Configure LSE Drive Capability + */ + HAL_PWR_EnableBkUpAccess(); + __HAL_RCC_LSEDRIVE_CONFIG(RCC_LSEDRIVE_LOW); +#endif + /**Initializes the CPU, AHB and APB busses clocks + */ + RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI; + RCC_OscInitStruct.HSIState = RCC_HSI_ON; + RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT; + RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; + RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI; + RCC_OscInitStruct.PLL.PLLM = 1; + RCC_OscInitStruct.PLL.PLLN = 10; + RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV7; + RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV2; + RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2; + if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) + { + Error_Handler(); + } + /**Initializes the CPU, AHB and APB busses clocks + */ + RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK + | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2; + RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; + RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; + RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1; + RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; + + if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4) != HAL_OK) + { + Error_Handler(); + } + PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USART2; + PeriphClkInit.Usart2ClockSelection = RCC_USART2CLKSOURCE_PCLK1; + if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK) + { + Error_Handler(); + } + /**Configure the main internal regulator output voltage + */ + if (HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1) != HAL_OK) + { + Error_Handler(); + } +} + +#ifdef RT_USING_PM + +void SystemClock_MSI_ON(void) +{ + RCC_OscInitTypeDef RCC_OscInitStruct = {0}; + RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; + + /* Initializes the CPU, AHB and APB busses clocks */ + RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_MSI; + RCC_OscInitStruct.MSIState = RCC_MSI_ON; + if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) + { + RT_ASSERT(0); + } + + RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_SYSCLK; + RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_MSI; + if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_1) != HAL_OK) + { + Error_Handler(); + } +} + +void SystemClock_MSI_OFF(void) +{ + RCC_OscInitTypeDef RCC_OscInitStruct = {0}; + + RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_MSI; + RCC_OscInitStruct.HSIState = RCC_MSI_OFF; + RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE; /* No update on PLL */ + if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) + { + Error_Handler(); + } +} + +void SystemClock_80M(void) +{ + RCC_OscInitTypeDef RCC_OscInitStruct; + RCC_ClkInitTypeDef RCC_ClkInitStruct; + + /**Initializes the CPU, AHB and APB busses clocks */ + RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI; + RCC_OscInitStruct.HSIState = RCC_HSI_ON; + RCC_OscInitStruct.HSICalibrationValue = 16; + RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; + RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI; + RCC_OscInitStruct.PLL.PLLM = 1; + RCC_OscInitStruct.PLL.PLLN = 10; + RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV7; + RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV2; + RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2; + if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) + { + Error_Handler(); + } + + /**Initializes the CPU, AHB and APB busses clocks + */ + RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK + | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2; + RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; + RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; + RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1; + RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; + + if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4) != HAL_OK) + { + Error_Handler(); + } +} + +void SystemClock_24M(void) +{ + RCC_OscInitTypeDef RCC_OscInitStruct; + RCC_ClkInitTypeDef RCC_ClkInitStruct; + RCC_PeriphCLKInitTypeDef PeriphClkInit; + + /** Initializes the CPU, AHB and APB busses clocks */ + RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI; + RCC_OscInitStruct.HSIState = RCC_HSI_ON; + RCC_OscInitStruct.HSICalibrationValue = 16; + RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; + RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI; + RCC_OscInitStruct.PLL.PLLM = 1; + RCC_OscInitStruct.PLL.PLLN = 12; + RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV7; + RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV2; + RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV8; + if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) + { + Error_Handler(); + } + /** Initializes the CPU, AHB and APB busses clocks */ + RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK + | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2; + RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; + RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; + RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1; + RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; + if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_1) != HAL_OK) + { + Error_Handler(); + } + PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USART2; + PeriphClkInit.Usart2ClockSelection = RCC_USART2CLKSOURCE_PCLK1; + if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK) + { + Error_Handler(); + } +} + +void SystemClock_2M(void) +{ + RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; + RCC_OscInitTypeDef RCC_OscInitStruct = {0}; + + /* MSI is enabled after System reset, update MSI to 2Mhz (RCC_MSIRANGE_5) */ + RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_MSI; + RCC_OscInitStruct.MSIState = RCC_MSI_ON; + RCC_OscInitStruct.MSIClockRange = RCC_MSIRANGE_5; + RCC_OscInitStruct.MSICalibrationValue = RCC_MSICALIBRATION_DEFAULT; + RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE; + if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) + { + /* Initialization Error */ + Error_Handler(); + } + + /* Select MSI as system clock source and configure the HCLK, PCLK1 and PCLK2 + clocks dividers */ + RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_SYSCLK; + RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_MSI; + RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; + RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1; + RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; + if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_0) != HAL_OK) + { + /* Initialization Error */ + Error_Handler(); + } +} + +/** + * @brief Configures system clock after wake-up from STOP: enable HSI, PLL + * and select PLL as system clock source. + * @param None + * @retval None */ - if (HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1) != HAL_OK) - { - Error_Handler(); - } +void SystemClock_ReConfig(uint8_t mode) +{ + SystemClock_MSI_ON(); + + switch (mode) + { + case PM_RUN_MODE_HIGH_SPEED: + case PM_RUN_MODE_NORMAL_SPEED: + SystemClock_80M(); + break; + case PM_RUN_MODE_MEDIUM_SPEED: + SystemClock_24M(); + break; + case PM_RUN_MODE_LOW_SPEED: + SystemClock_2M(); + break; + default: + break; + } + + // SystemClock_MSI_OFF(); } + +#endif diff --git a/bsp/stm32/stm32l476-st-nucleo/board/board.h b/bsp/stm32/stm32l476-st-nucleo/board/board.h index f5e2db4e1b18c690ef3b22588dd6a8029b2e76de..b59fe1b3b615f11b1ff454e02bcbeea78dbf1d40 100644 --- a/bsp/stm32/stm32l476-st-nucleo/board/board.h +++ b/bsp/stm32/stm32l476-st-nucleo/board/board.h @@ -33,6 +33,17 @@ extern "C" { void SystemClock_Config(void); +#ifdef RT_USING_PM + +void SystemClock_MSI_ON(void); +void SystemClock_MSI_OFF(void); +void SystemClock_80M(void); +void SystemClock_24M(void); +void SystemClock_2M(void); +void SystemClock_ReConfig(uint8_t mode); + +#endif + #ifdef __cplusplus } #endif diff --git a/bsp/stm32/stm32l476-st-nucleo/project.uvprojx b/bsp/stm32/stm32l476-st-nucleo/project.uvprojx index c4775ff651c3ecf896e0155c7e7bb2417f15f9b8..bd3252b612e1b77e6ea8ed38db66727ed6f20044 100644 --- a/bsp/stm32/stm32l476-st-nucleo/project.uvprojx +++ b/bsp/stm32/stm32l476-st-nucleo/project.uvprojx @@ -369,7 +369,7 @@ .\board\linker_scripts\link.sct - --keep *.o(.rti_fn.*) --keep *.o(FSymTab) + @@ -533,9 +533,16 @@ - drv_soft_i2c.c + drv_pm.c 1 - ..\libraries\HAL_Drivers\drv_soft_i2c.c + ..\libraries\HAL_Drivers\drv_pm.c + + + + + drv_lptim.c + 1 + ..\libraries\HAL_Drivers\drv_lptim.c @@ -588,30 +595,16 @@ DeviceDrivers - i2c_core.c - 1 - ..\..\..\components\drivers\i2c\i2c_core.c - - - - - i2c_dev.c - 1 - ..\..\..\components\drivers\i2c\i2c_dev.c - - - - - i2c-bit-ops.c + pin.c 1 - ..\..\..\components\drivers\i2c\i2c-bit-ops.c + ..\..\..\components\drivers\misc\pin.c - pin.c + pm.c 1 - ..\..\..\components\drivers\misc\pin.c + ..\..\..\components\drivers\pm\pm.c @@ -875,13 +868,6 @@ ..\libraries\STM32L4xx_HAL\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_rng.c - - - stm32l4xx_hal_sram.c - 1 - ..\libraries\STM32L4xx_HAL\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_sram.c - - stm32l4xx_hal_gpio.c @@ -919,30 +905,23 @@ - stm32l4xx_hal_i2c.c - 1 - ..\libraries\STM32L4xx_HAL\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_i2c.c - - - - - stm32l4xx_hal_i2c_ex.c + stm32l4xx_hal_rtc.c 1 - ..\libraries\STM32L4xx_HAL\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_i2c_ex.c + ..\libraries\STM32L4xx_HAL\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_rtc.c - stm32l4xx_hal_rtc.c + stm32l4xx_hal_rtc_ex.c 1 - ..\libraries\STM32L4xx_HAL\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_rtc.c + ..\libraries\STM32L4xx_HAL\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_rtc_ex.c - stm32l4xx_hal_rtc_ex.c + stm32l4xx_hal_lptim.c 1 - ..\libraries\STM32L4xx_HAL\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_rtc_ex.c + ..\libraries\STM32L4xx_HAL\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_lptim.c diff --git a/bsp/stm32/stm32l476-st-nucleo/rtconfig.h b/bsp/stm32/stm32l476-st-nucleo/rtconfig.h index afeaf369c03283df897eb7f8f17774014ce95fea..380c3c328009873bafb9130fb518fb1ec33d7972 100644 --- a/bsp/stm32/stm32l476-st-nucleo/rtconfig.h +++ b/bsp/stm32/stm32l476-st-nucleo/rtconfig.h @@ -15,7 +15,7 @@ #define RT_USING_HOOK #define RT_USING_IDLE_HOOK #define RT_IDEL_HOOK_LIST_SIZE 4 -#define IDLE_THREAD_STACK_SIZE 256 +#define IDLE_THREAD_STACK_SIZE 1024 #define RT_DEBUG #define RT_DEBUG_COLOR @@ -79,7 +79,10 @@ #define RT_PIPE_BUFSZ 512 #define RT_USING_SERIAL #define RT_SERIAL_USING_DMA +#define RT_SERIAL_RB_BUFSZ 64 #define RT_USING_PIN +#define RT_USING_PM +#define RT_USING_RTC /* Using WiFi */ @@ -96,6 +99,9 @@ /* Socket abstraction layer */ +/* Network interface device */ + + /* light weight TCP/IP stack */ @@ -111,9 +117,6 @@ /* Utilities */ -/* ARM CMSIS */ - - /* RT-Thread online packages */ /* IoT - internet of things */ @@ -151,13 +154,8 @@ /* miscellaneous packages */ -/* sample package */ - /* samples: kernel and components samples */ - -/* example package: hello */ - #define SOC_FAMILY_STM32 #define SOC_SERIES_STM32L4 diff --git a/components/drivers/include/drivers/pm.h b/components/drivers/include/drivers/pm.h index 94d4c8559be95669ab67d255de604485444f39e4..e35b21cd48df840ea4144f58d95848ced16145a2 100644 --- a/components/drivers/include/drivers/pm.h +++ b/components/drivers/include/drivers/pm.h @@ -7,6 +7,7 @@ * Date Author Notes * 2012-06-02 Bernard the first version * 2018-08-02 Tanek split run and sleep modes, support custom mode + * 2019-04-28 Zero-Free improve PM mode and device ops interface */ #ifndef __PM_H__ @@ -16,96 +17,67 @@ #ifndef PM_HAS_CUSTOM_CONFIG -/* All modes used for rt_pm_request() adn rt_pm_release() */ +/* All modes used for rt_pm_request() and rt_pm_release() */ enum { - /* run modes */ - PM_RUN_MODE_NORMAL = 0, - /* sleep modes */ - PM_SLEEP_MODE_SLEEP, - PM_SLEEP_MODE_TIMER, + PM_SLEEP_MODE_NONE = 0, + PM_SLEEP_MODE_IDLE, + PM_SLEEP_MODE_LIGHT, + PM_SLEEP_MODE_DEEP, + PM_SLEEP_MODE_STANDBY, PM_SLEEP_MODE_SHUTDOWN, + PM_SLEEP_MODE_MAX, +}; + +enum +{ + /* run modes*/ + PM_RUN_MODE_HIGH_SPEED = 0, + PM_RUN_MODE_NORMAL_SPEED, + PM_RUN_MODE_MEDIUM_SPEED, + PM_RUN_MODE_LOW_SPEED, + PM_RUN_MODE_MAX, +}; + +enum +{ + RT_PM_FREQUENCY_PENDING = 0x01, }; +#define RT_PM_DEFAULT_SLEEP_MODE PM_SLEEP_MODE_IDLE +#define RT_PM_DEFAULT_RUN_MODE PM_RUN_MODE_NORMAL_SPEED + /* The name of all modes used in the msh command "pm_dump" */ -#define PM_MODE_NAMES \ +#define PM_SLEEP_MODE_NAMES \ { \ - "Running Mode", \ - \ - "Sleep Mode", \ - "Timer Mode", \ + "None Mode", \ + "Idle Mode", \ + "LightSleep Mode", \ + "DeepSleep Mode", \ + "Standby Mode", \ "Shutdown Mode", \ } -/* run mode count : 1 */ -#define PM_RUN_MODE_COUNT 1 -/* sleep mode count : 3 */ -#define PM_SLEEP_MODE_COUNT 3 - -/* support redefining default run mode */ -#ifndef PM_RUN_MODE_DEFAULT -#define PM_RUN_MODE_DEFAULT 0 -#endif - -/* support redefining default sleep mode */ -#ifndef PM_SLEEP_MODE_DEFAULT -#define PM_SLEEP_MODE_DEFAULT (PM_SLEEP_MODE_START) -#endif - -/* support redefining the minimum tick into sleep mode */ -#ifndef PM_MIN_ENTER_SLEEP_TICK -#define PM_MIN_ENTER_SLEEP_TICK (1) -#endif +#define PM_RUN_MODE_NAMES \ +{ \ + "High Speed", \ + "Normal Speed", \ + "Medium Speed", \ + "Low Mode", \ +} #else /* PM_HAS_CUSTOM_CONFIG */ #include -#ifndef PM_RUN_MODE_COUNT -#error "You must defined PM_RUN_MODE_COUNT on pm_cfg.h" -#endif - -#ifndef PM_SLEEP_MODE_COUNT -#error "You must defined PM_SLEEP_MODE_COUNT on pm_cfg.h" -#endif - -#ifndef PM_MODE_DEFAULT -#error "You must defined PM_MODE_DEFAULT on pm_cfg.h" -#endif - -#ifndef PM_MODE_NAMES -#error "You must defined PM_MODE_NAMES on pm_cfg.h" -#endif - -#ifndef PM_RUN_MODE_DEFAULT -#error "You must defined PM_RUN_MODE_DEFAULT on pm_cfg.h" -#endif - -/* The default sleep mode(PM_SLEEP_MODE_DEFAULT) are not required. - * If the default mode is defined, it is requested once in rt_system_pm_init() - */ - #endif /* PM_HAS_CUSTOM_CONFIG */ -/* run mode must start at 0 */ -#define PM_RUN_MODE_START 0 -/* the values of the run modes and sleep mode must be consecutive */ -#define PM_SLEEP_MODE_START PM_RUN_MODE_COUNT -/* all mode count */ -#define PM_MODE_COUNT (PM_RUN_MODE_COUNT + PM_SLEEP_MODE_COUNT) -/* The last mode, will be request in rt_system_pm_init() */ -#define PM_MODE_MAX (PM_RUN_MODE_COUNT + PM_SLEEP_MODE_COUNT - 1) - -#if PM_MODE_COUNT > 32 -#error "The number of modes cannot exceed 32" -#endif - /** * device control flag to request or release power */ #define RT_PM_DEVICE_CTRL_REQUEST 0x01 -#define RT_PM_DEVICE_CTRL_RELEASE 0x02 +#define RT_PM_DEVICE_CTRL_RELEASE 0x00 struct rt_pm; @@ -114,13 +86,8 @@ struct rt_pm; */ struct rt_pm_ops { - void (*enter)(struct rt_pm *pm); - void (*exit)(struct rt_pm *pm); - -#if PM_RUN_MODE_COUNT > 1 - void (*frequency_change)(struct rt_pm *pm, rt_uint32_t frequency); -#endif - + void (*sleep)(struct rt_pm *pm, uint8_t mode); + void (*run)(struct rt_pm *pm, uint8_t mode); void (*timer_start)(struct rt_pm *pm, rt_uint32_t timeout); void (*timer_stop)(struct rt_pm *pm); rt_tick_t (*timer_get_tick)(struct rt_pm *pm); @@ -128,18 +95,15 @@ struct rt_pm_ops struct rt_device_pm_ops { -#if PM_RUN_MODE_COUNT > 1 - void (*frequency_change)(const struct rt_device* device); -#endif - - void (*suspend)(const struct rt_device* device); - void (*resume) (const struct rt_device* device); + int (*suspend)(const struct rt_device *device, uint8_t mode); + void (*resume)(const struct rt_device *device, uint8_t mode); + int (*frequency_change)(const struct rt_device *device, uint8_t mode); }; struct rt_device_pm { - const struct rt_device* device; - const struct rt_device_pm_ops* ops; + const struct rt_device *device; + const struct rt_device_pm_ops *ops; }; /** @@ -150,32 +114,45 @@ struct rt_pm struct rt_device parent; /* modes */ - rt_uint8_t modes[PM_MODE_COUNT]; - rt_uint8_t current_mode; /* current pm mode */ - rt_uint8_t exit_count; + rt_uint8_t modes[PM_SLEEP_MODE_MAX]; + rt_uint8_t sleep_mode; /* current sleep mode */ + rt_uint8_t run_mode; /* current running mode */ /* the list of device, which has PM feature */ rt_uint8_t device_pm_number; - struct rt_device_pm* device_pm; - struct rt_semaphore device_lock; + struct rt_device_pm *device_pm; /* if the mode has timer, the corresponding bit is 1*/ - rt_uint32_t timer_mask; + rt_uint8_t timer_mask; + rt_uint8_t flags; const struct rt_pm_ops *ops; }; -void rt_pm_enter(void); -void rt_pm_exit(void); +enum +{ + RT_PM_ENTER_SLEEP = 0, + RT_PM_EXIT_SLEEP, +}; + +struct rt_pm_notify +{ + void (*notify)(uint8_t event, uint8_t mode, void *data); + void *data; +}; + +void rt_pm_request(uint8_t sleep_mode); +void rt_pm_release(uint8_t sleep_mode); +int rt_pm_run_enter(uint8_t run_mode); -void rt_pm_request(rt_ubase_t mode); -void rt_pm_release(rt_ubase_t mode); +void rt_pm_device_register(struct rt_device *device, const struct rt_device_pm_ops *ops); +void rt_pm_device_unregister(struct rt_device *device); -void rt_pm_register_device(struct rt_device* device, const struct rt_device_pm_ops* ops); -void rt_pm_unregister_device(struct rt_device* device); +void rt_pm_notify_set(void (*notify)(uint8_t event, uint8_t mode, void *data), void *data); +void rt_pm_default_set(uint8_t sleep_mode); void rt_system_pm_init(const struct rt_pm_ops *ops, - rt_uint8_t timer_mask, - void *user_data); + uint8_t timer_mask, + void *user_data); #endif /* __PM_H__ */ diff --git a/components/drivers/pm/pm.c b/components/drivers/pm/pm.c index c300414444e651024f284fefcd6035d8f02274f1..98a993b52604b81d5059af164376a7139809c442 100644 --- a/components/drivers/pm/pm.c +++ b/components/drivers/pm/pm.c @@ -7,6 +7,7 @@ * Date Author Notes * 2012-06-02 Bernard the first version * 2018-08-02 Tanek split run and sleep modes, support custom mode + * 2019-04-28 Zero-Free improve PM mode and device ops interface */ #include @@ -16,27 +17,45 @@ #ifdef RT_USING_PM static struct rt_pm _pm; +static uint8_t _pm_default_sleep = RT_PM_DEFAULT_SLEEP_MODE; +static struct rt_pm_notify _pm_notify; + +#define RT_PM_TICKLESS_THRESH (2) + +RT_WEAK uint32_t rt_pm_enter_critical(uint8_t sleep_mode) +{ + return rt_hw_interrupt_disable(); +} + +RT_WEAK void rt_pm_exit_critical(uint32_t ctx, uint8_t sleep_mode) +{ + rt_hw_interrupt_enable(ctx); +} /** * This function will suspend all registered devices */ -static void _pm_device_suspend(void) +static int _pm_device_suspend(uint8_t mode) { - int index; + int index, ret = RT_EOK; for (index = 0; index < _pm.device_pm_number; index++) { if (_pm.device_pm[index].ops->suspend != RT_NULL) { - _pm.device_pm[index].ops->suspend(_pm.device_pm[index].device); + ret = _pm.device_pm[index].ops->suspend(_pm.device_pm[index].device, mode); + if(ret != RT_EOK) + break; } } + + return ret; } /** * This function will resume all registered devices */ -static void _pm_device_resume(void) +static void _pm_device_resume(uint8_t mode) { int index; @@ -44,16 +63,15 @@ static void _pm_device_resume(void) { if (_pm.device_pm[index].ops->resume != RT_NULL) { - _pm.device_pm[index].ops->resume(_pm.device_pm[index].device); + _pm.device_pm[index].ops->resume(_pm.device_pm[index].device, mode); } } } -#if PM_RUN_MODE_COUNT > 1 /** * This function will update the frequency of all registered devices */ -static void _pm_device_frequency_change(void) +static void _pm_device_frequency_change(uint8_t mode) { rt_uint32_t index; @@ -61,152 +79,148 @@ static void _pm_device_frequency_change(void) for (index = 0; index < _pm.device_pm_number; index ++) { if (_pm.device_pm[index].ops->frequency_change != RT_NULL) - _pm.device_pm[index].ops->frequency_change(_pm.device_pm[index].device); + _pm.device_pm[index].ops->frequency_change(_pm.device_pm[index].device, mode); } } -#endif /** - * This function will enter corresponding power mode. + * This function will update the system clock frequency when idle */ -void rt_pm_enter(void) +static void _pm_frequency_scaling(struct rt_pm *pm) { - rt_ubase_t level; - struct rt_pm *pm; - rt_uint32_t index; - rt_tick_t timeout_tick; + rt_base_t level; - pm = &_pm; - - /* disable interrupt before check run modes */ - level = rt_hw_interrupt_disable(); - /* check each run mode, and decide to swithc to run mode or sleep mode */ - for (index = 0; index < PM_RUN_MODE_COUNT; index++) + if (pm->flags & RT_PM_FREQUENCY_PENDING) { - if (pm->modes[index]) - { - if (index > pm->current_mode) - { - pm->ops->exit(pm); - pm->current_mode = index; - pm->ops->enter(pm); -#if PM_RUN_MODE_COUNT > 1 - pm->ops->frequency_change(pm, 0); - _pm_device_frequency_change(); -#endif - } - - rt_hw_interrupt_enable(level); - /* The current mode is run mode, no need to check sleep mode */ - return ; - } + level = rt_hw_interrupt_disable(); + /* change system runing mode */ + pm->ops->run(pm, pm->run_mode); + /* changer device frequency */ + _pm_device_frequency_change(pm->run_mode); + pm->flags &= ~RT_PM_FREQUENCY_PENDING; + rt_hw_interrupt_enable(level); } - /* enable interrupt after check run modes */ - rt_hw_interrupt_enable(level); +} - level = rt_hw_interrupt_disable(); - /* check each sleep mode to decide which mode can system sleep. */ - for (index = PM_SLEEP_MODE_START; index < PM_SLEEP_MODE_START + PM_SLEEP_MODE_COUNT; index++) +/** + * This function selects the sleep mode according to the rt_pm_request/rt_pm_release count. + */ +static uint8_t _pm_select_sleep_mode(struct rt_pm *pm) +{ + int index; + uint8_t mode; + + mode = _pm_default_sleep; + for (index = PM_SLEEP_MODE_NONE; index < PM_SLEEP_MODE_MAX; index ++) { if (pm->modes[index]) { - /* let mcu sleep when system is idle */ - - /* run mode to sleep mode */ - if (pm->current_mode < PM_SLEEP_MODE_START) - { - /* exit run mode */ - pm->ops->exit(pm); - } - - /* set current power mode */ - pm->current_mode = index; - pm->exit_count = 1; - - /* suspend all of devices with PM feature */ - _pm_device_suspend(); - - /* should start pm timer */ - if (pm->timer_mask & (1 << index)) - { - /* get next os tick */ - timeout_tick = rt_timer_next_timeout_tick(); - if (timeout_tick != RT_TICK_MAX) - { - timeout_tick -= rt_tick_get(); - -#if defined(PM_MIN_ENTER_SLEEP_TICK) && PM_MIN_ENTER_SLEEP_TICK > 0 - if (timeout_tick < PM_MIN_ENTER_SLEEP_TICK) - { - rt_hw_interrupt_enable(level); - /* limit the minimum time to enter timer sleep mode */ - return ; - } -#endif - } - /* startup pm timer */ - pm->ops->timer_start(pm, timeout_tick); - } - - /* enter sleep and wait to be waken up */ - pm->ops->enter(pm); - - /* exit from low power mode */ - rt_pm_exit(); - - rt_hw_interrupt_enable(level); - return ; + mode = index; + break; } } + pm->sleep_mode = mode; - rt_hw_interrupt_enable(level); + return mode; } /** - * This function exits from sleep mode. + * This function changes the power sleep mode base on the result of selection */ -void rt_pm_exit(void) +static void _pm_change_sleep_mode(struct rt_pm *pm, uint8_t mode) { - rt_ubase_t level; - struct rt_pm *pm; - rt_tick_t delta_tick; + rt_tick_t timeout_tick, delta_tick; + rt_base_t level; + int ret = RT_EOK; - pm = &_pm; - - level = rt_hw_interrupt_disable(); - - if (pm->exit_count) + if (mode == PM_SLEEP_MODE_NONE) + { + pm->sleep_mode = mode; + pm->ops->sleep(pm, PM_SLEEP_MODE_NONE); + } + else { - pm->exit_count = 0; + level = rt_pm_enter_critical(mode); + + /* Notify app will enter sleep mode */ + if (_pm_notify.notify) + _pm_notify.notify(RT_PM_ENTER_SLEEP, mode, _pm_notify.data); - if (pm->current_mode >= PM_SLEEP_MODE_START) + /* Suspend all peripheral device */ + ret = _pm_device_suspend(mode); + if (ret != RT_EOK) { - /* sleep mode with timer */ - if (pm->timer_mask & (1 << pm->current_mode)) - { - /* get the tick of pm timer */ - delta_tick = pm->ops->timer_get_tick(pm); + _pm_device_resume(mode); + if (_pm_notify.notify) + _pm_notify.notify(RT_PM_EXIT_SLEEP, mode, _pm_notify.data); + rt_pm_exit_critical(level, mode); - /* stop pm timer */ - pm->ops->timer_stop(pm); + return; + } - if (delta_tick) + /* Tickless*/ + if (pm->timer_mask & (0x01 << mode)) + { + timeout_tick = rt_timer_next_timeout_tick(); + if (timeout_tick == RT_TICK_MAX) + { + if (pm->ops->timer_start) + { + pm->ops->timer_start(pm, RT_TICK_MAX); + } + } + else + { + timeout_tick = timeout_tick - rt_tick_get(); + if (timeout_tick < RT_PM_TICKLESS_THRESH) + { + mode = PM_SLEEP_MODE_IDLE; + } + else { - /* adjust OS tick */ - rt_tick_set(rt_tick_get() + delta_tick); - /* check system timer */ - rt_timer_check(); + pm->ops->timer_start(pm, timeout_tick); } } + } + + /* enter lower power state */ + pm->ops->sleep(pm, mode); - /* exit from sleep mode */ - pm->ops->exit(pm); - /* resume the device with PM feature */ - _pm_device_resume(); + /* wake up from lower power state*/ + if (pm->timer_mask & (0x01 << mode)) + { + delta_tick = pm->ops->timer_get_tick(pm); + pm->ops->timer_stop(pm); + if (delta_tick) + { + rt_tick_set(rt_tick_get() + delta_tick); + rt_timer_check(); + } } + + /* resume all device */ + _pm_device_resume(pm->sleep_mode); + + if (_pm_notify.notify) + _pm_notify.notify(RT_PM_EXIT_SLEEP, mode, _pm_notify.data); + + rt_pm_exit_critical(level, mode); } +} - rt_hw_interrupt_enable(level); +/** + * This function will enter corresponding power mode. + */ +void rt_system_power_manager(void) +{ + uint8_t mode; + + /* CPU frequency scaling according to the runing mode settings */ + _pm_frequency_scaling(&_pm); + + /* Low Power Mode Processing */ + mode = _pm_select_sleep_mode(&_pm); + _pm_change_sleep_mode(&_pm, mode); } /** @@ -215,60 +229,18 @@ void rt_pm_exit(void) * * @param parameter the parameter of run mode or sleep mode */ -void rt_pm_request(rt_ubase_t mode) +void rt_pm_request(uint8_t mode) { - rt_ubase_t level; + rt_base_t level; struct rt_pm *pm; - pm = &_pm; - - if (mode > PM_MODE_MAX) + if (mode > (PM_SLEEP_MODE_MAX - 1)) return; level = rt_hw_interrupt_disable(); - - /* update pm modes table */ - pm->modes[mode] ++; - - /* request higter mode with a smaller mode value*/ - if (mode < pm->current_mode) - { - /* the old current mode is RUN mode, need to all pm->ops->exit(), - * if not, it has already called in rt_pm_exit() - */ - if (pm->current_mode < PM_SLEEP_MODE_START) - { - pm->ops->exit(pm); - } - else if (pm->exit_count) - { - /* call exeit when global interrupt is disable */ - pm->ops->exit(pm); - pm->exit_count = 0; - } - - /* update current mode */ - pm->current_mode = mode; - - /* current mode is higher run mode */ - if (mode < PM_SLEEP_MODE_START) - { - /* enter run mode */ - pm->ops->enter(pm); -#if PM_RUN_MODE_COUNT > 1 - /* frequency change */ - pm->ops->frequency_change(pm, 0); - _pm_device_frequency_change(); -#endif - } - else - { - /* do nothing when request higher sleep mode, - * and swithc to new sleep mode in rt_pm_enter() - */ - } - } - + pm = &_pm; + if (pm->modes[mode] < 255) + pm->modes[mode] ++; rt_hw_interrupt_enable(level); } @@ -279,21 +251,18 @@ void rt_pm_request(rt_ubase_t mode) * @param parameter the parameter of run mode or sleep mode * */ -void rt_pm_release(rt_ubase_t mode) +void rt_pm_release(uint8_t mode) { rt_ubase_t level; struct rt_pm *pm; - pm = &_pm; - - if (mode > PM_MODE_MAX) + if (mode > (PM_SLEEP_MODE_MAX - 1)) return; level = rt_hw_interrupt_disable(); - + pm = &_pm; if (pm->modes[mode] > 0) pm->modes[mode] --; - rt_hw_interrupt_enable(level); } @@ -303,9 +272,9 @@ void rt_pm_release(rt_ubase_t mode) * @param device the device with PM feature * @param ops the PM ops for device */ -void rt_pm_register_device(struct rt_device *device, const struct rt_device_pm_ops *ops) +void rt_pm_device_register(struct rt_device *device, const struct rt_device_pm_ops *ops) { - rt_ubase_t level; + rt_base_t level; struct rt_device_pm *device_pm; RT_DEBUG_NOT_IN_INTERRUPT; @@ -322,8 +291,6 @@ void rt_pm_register_device(struct rt_device *device, const struct rt_device_pm_o _pm.device_pm_number += 1; } - rt_sem_release(&(_pm.device_lock)); - rt_hw_interrupt_enable(level); } @@ -332,7 +299,7 @@ void rt_pm_register_device(struct rt_device *device, const struct rt_device_pm_o * * @param device the device with PM feature */ -void rt_pm_unregister_device(struct rt_device *device) +void rt_pm_device_unregister(struct rt_device *device) { rt_ubase_t level; rt_uint32_t index; @@ -362,6 +329,23 @@ void rt_pm_unregister_device(struct rt_device *device) rt_hw_interrupt_enable(level); } +/** + * This function set notification callback for application + */ +void rt_pm_notify_set(void (*notify)(uint8_t event, uint8_t mode, void *data), void *data) +{ + _pm_notify.notify = notify; + _pm_notify.data = data; +} + +/** + * This function set default sleep mode when no pm_request + */ +void rt_pm_default_set(uint8_t sleep_mode) +{ + _pm_default_sleep = sleep_mode; +} + /** * RT-Thread device interface for PM device */ @@ -377,7 +361,7 @@ static rt_size_t _rt_pm_device_read(rt_device_t dev, pm = (struct rt_pm *)dev; RT_ASSERT(pm != RT_NULL); - if (pos <= PM_MODE_MAX) + if (pos < PM_SLEEP_MODE_MAX) { int mode; @@ -399,11 +383,11 @@ static rt_size_t _rt_pm_device_write(rt_device_t dev, { /* get request */ request = *(unsigned char *)buffer; - if (request == '1') + if (request == 0x01) { rt_pm_request(pos); } - else if (request == '0') + else if (request == 0x00) { rt_pm_release(pos); } @@ -434,6 +418,33 @@ static rt_err_t _rt_pm_device_control(rt_device_t dev, return RT_EOK; } +int rt_pm_run_enter(uint8_t mode) +{ + rt_base_t level; + struct rt_pm *pm; + + if (mode > PM_RUN_MODE_MAX) + return -RT_EINVAL; + + level = rt_hw_interrupt_disable(); + pm = &_pm; + if (mode < pm->run_mode) + { + /* change system runing mode */ + pm->ops->run(pm, mode); + /* changer device frequency */ + _pm_device_frequency_change(mode); + } + else + { + pm->flags |= RT_PM_FREQUENCY_PENDING; + } + pm->run_mode = mode; + rt_hw_interrupt_enable(level); + + return RT_EOK; +} + /** * This function will initialize power management. * @@ -466,37 +477,23 @@ void rt_system_pm_init(const struct rt_pm_ops *ops, /* register PM device to the system */ rt_device_register(device, "pm", RT_DEVICE_FLAG_RDWR); - /* todo : add to kernel source code */ - rt_thread_idle_sethook(rt_pm_enter); - rt_memset(pm->modes, 0, sizeof(pm->modes)); - pm->current_mode = PM_RUN_MODE_DEFAULT; - + pm->sleep_mode = _pm_default_sleep; + pm->run_mode = RT_PM_DEFAULT_RUN_MODE; pm->timer_mask = timer_mask; pm->ops = ops; pm->device_pm = RT_NULL; pm->device_pm_number = 0; - - /* initialize semaphore */ - rt_sem_init(&(pm->device_lock), "pm", 1, RT_IPC_FLAG_FIFO); - - /* request in default running mode */ - rt_pm_request(PM_RUN_MODE_DEFAULT); - -#ifdef PM_SLEEP_MODE_DEFAULT - /* request in default sleep mode */ - rt_pm_request(PM_SLEEP_MODE_DEFAULT); -#endif - - /* must hold on deep shutdown mode */ - rt_pm_request(PM_MODE_MAX); } #ifdef RT_USING_FINSH #include +static const char *_pm_sleep_str[] = PM_SLEEP_MODE_NAMES; +static const char *_pm_run_str[] = PM_RUN_MODE_NAMES; + static void rt_pm_release_mode(int argc, char **argv) { int mode = 0; @@ -521,9 +518,20 @@ static void rt_pm_request_mode(int argc, char **argv) } MSH_CMD_EXPORT_ALIAS(rt_pm_request_mode, pm_request, request power management mode); +static void rt_pm_run_mode_switch(int argc, char **argv) +{ + int mode = 0; + if (argc >= 2) + { + mode = atoi(argv[1]); + } + + rt_pm_run_enter(mode); +} +MSH_CMD_EXPORT_ALIAS(rt_pm_run_mode_switch, pm_run, switch power management run mode); + static void rt_pm_dump_status(void) { - static const char *pm_str[] = PM_MODE_NAMES; rt_uint32_t index; struct rt_pm *pm; @@ -531,17 +539,18 @@ static void rt_pm_dump_status(void) rt_kprintf("| Power Management Mode | Counter | Timer |\n"); rt_kprintf("+-----------------------+---------+-------+\n"); - for (index = 0; index <= PM_MODE_MAX; index ++) + for (index = 0; index < PM_SLEEP_MODE_MAX; index ++) { int has_timer = 0; if (pm->timer_mask & (1 << index)) has_timer = 1; - rt_kprintf("| %021s | %7d | %5d |\n", pm_str[index], pm->modes[index], has_timer); + rt_kprintf("| %021s | %7d | %5d |\n", _pm_sleep_str[index], pm->modes[index], has_timer); } rt_kprintf("+-----------------------+---------+-------+\n"); - rt_kprintf("pm current mode: %s\n", pm_str[pm->current_mode]); + rt_kprintf("pm current sleep mode: %s\n", _pm_sleep_str[pm->sleep_mode]); + rt_kprintf("pm current run mode: %s\n", _pm_run_str[pm->run_mode]); } FINSH_FUNCTION_EXPORT_ALIAS(rt_pm_dump_status, pm_dump, dump power management status); MSH_CMD_EXPORT_ALIAS(rt_pm_dump_status, pm_dump, dump power management status); diff --git a/examples/pm/timer_app.c b/examples/pm/timer_app.c index 5c20d0f6902eacea461be9c8dd1b5a7f2c291db2..b7ff675b394a77ac4365e97726c8838a04f1c852 100644 --- a/examples/pm/timer_app.c +++ b/examples/pm/timer_app.c @@ -6,6 +6,7 @@ * Change Logs: * Date Author Notes * 2018-08-07 Tanek first implementation + * 2019-05-06 Zero-Free adapt to the new power management interface */ #include @@ -39,7 +40,7 @@ static int timer_app_init(void) rt_timer_start(timer1); /* keep in timer mode */ - rt_pm_request(PM_SLEEP_MODE_TIMER); + rt_pm_request(PM_SLEEP_MODE_DEEP); return 0; } diff --git a/src/idle.c b/src/idle.c index e685a7ddfcdf5132c3291ad860e06a3751dac116..77b04248927d73db39cfb5a620a15f7e7d3b8d02 100644 --- a/src/idle.c +++ b/src/idle.c @@ -228,6 +228,7 @@ void rt_thread_idle_excute(void) } } +extern void rt_system_power_manager(void); static void rt_thread_idle_entry(void *parameter) { #ifdef RT_USING_SMP @@ -255,6 +256,9 @@ static void rt_thread_idle_entry(void *parameter) #endif rt_thread_idle_excute(); +#ifdef RT_USING_PM + rt_system_power_manager(); +#endif } }