diff --git a/bsp/mb9bf506r/drivers/board.c b/bsp/mb9bf506r/drivers/board.c index fff2233dfe1f2165620d06c8ea5f1a031abbcb89..97b3a272a5846fa5ceb5f21b5eb36fb04b5802ff 100644 --- a/bsp/mb9bf506r/drivers/board.c +++ b/bsp/mb9bf506r/drivers/board.c @@ -18,7 +18,7 @@ #include "board.h" #include "mcu.h" -#include "serial.h" +#include "fm3_uart.h" #include "nand.h" /** diff --git a/bsp/mb9bf506r/drivers/console.c b/bsp/mb9bf506r/drivers/console.c deleted file mode 100644 index 6dde8183d97def523b40f1989e92d3c1cde38411..0000000000000000000000000000000000000000 --- a/bsp/mb9bf506r/drivers/console.c +++ /dev/null @@ -1,183 +0,0 @@ -#include - -#include - -#define RT_CONSOLE_WIDTH 240 -#define RT_CONSOLE_HEIGHT 320 - -#define RT_CONSOLE_FONT_WIDTH 8 -#define RT_CONSOLE_FONT_HEIGHT 16 - -#define RT_CONSOLE_COL (RT_CONSOLE_WIDTH/RT_CONSOLE_FONT_WIDTH) -#define RT_CONSOLE_ROW (RT_CONSOLE_HEIGHT/RT_CONSOLE_FONT_HEIGHT) - -#define RT_CONSOLE_TAB 4 - -#define RT_CONSOLE_FOREPIXEL (0x001f) - -extern struct serial_device uart0; - -struct rt_console -{ - rt_uint8_t *video_ptr; - rt_uint8_t *font_ptr; - - /* bpp and pixel of width */ - rt_uint8_t bpp; - rt_uint32_t pitch; - - /* current cursor */ - rt_uint8_t current_col; - rt_uint8_t current_row; -}; -struct rt_console console; - -void rt_hw_console_init(rt_uint8_t *video_ptr, rt_uint8_t *font_ptr, rt_uint8_t bpp); -void rt_hw_console_newline(void); -void rt_hw_console_putc(char c); -void rt_hw_console_clear(void); - -void rt_hw_console_init(rt_uint8_t *video_ptr, rt_uint8_t *font_ptr, rt_uint8_t bpp) -{ - rt_memset(&console, 0, sizeof(struct rt_console)); - - console.video_ptr = video_ptr; - console.font_ptr = font_ptr; - console.bpp = bpp; - console.pitch = console.bpp * RT_CONSOLE_WIDTH; - - rt_hw_console_clear(); -} - -void rt_hw_console_putc(char c) -{ - switch (c) - { - case 10: - case 11: - case 12: - case 13: - /* to next line */ - rt_hw_console_newline(); - console.current_col = 0; - break; - - case 9: - console.current_col += RT_CONSOLE_TAB; - break; - - default: - { - rt_uint8_t *font_ptr; - register rt_uint32_t cursor; - register rt_uint32_t i, j; - - if (console.current_col == RT_CONSOLE_COL) - { - rt_hw_console_newline(); - console.current_col = 0; - - rt_hw_console_putc(c); - - return; - } - - font_ptr = console.font_ptr + c * RT_CONSOLE_FONT_HEIGHT; - cursor = (console.current_row * RT_CONSOLE_FONT_HEIGHT) * console.pitch - + console.current_col * RT_CONSOLE_FONT_WIDTH * console.bpp; - - for (i = 0; i < RT_CONSOLE_FONT_HEIGHT; i ++ ) - { - for (j = 0; j < RT_CONSOLE_FONT_WIDTH; j ++) - { - if (((font_ptr[i] >> (7-j)) & 0x01) != 0) - { - /* draw a pixel */ - rt_uint8_t *ptr = &(console.video_ptr[cursor + i * console.pitch + j * console.bpp]); - switch (console.bpp) - { - case 1: - *ptr = RT_CONSOLE_FOREPIXEL; - break; - case 2: - *(rt_uint16_t*)ptr = RT_CONSOLE_FOREPIXEL; - break; - case 3: - ptr[0] = RT_CONSOLE_FOREPIXEL & 0xff; - ptr[1] = (RT_CONSOLE_FOREPIXEL >> 8) & 0xff; - ptr[2] = (RT_CONSOLE_FOREPIXEL >> 16) & 0xff; - break; - case 4: - *(rt_uint32_t*)ptr = RT_CONSOLE_FOREPIXEL; - break; - } - } - } - } - - console.current_col ++; - } - break; - } -} - -void rt_hw_console_newline(void) -{ - console.current_row ++; - if (console.current_row >= RT_CONSOLE_ROW) - { - rt_uint32_t i; - - /* scroll to next line */ - for (i = 0; i < RT_CONSOLE_ROW - 1; i ++) - { - rt_memcpy(console.video_ptr + i * RT_CONSOLE_FONT_HEIGHT * console.pitch, - console.video_ptr + (i + 1) * RT_CONSOLE_FONT_HEIGHT * console.pitch, - RT_CONSOLE_FONT_HEIGHT * console.pitch); - } - - /* clear last line */ - rt_memset(console.video_ptr + (RT_CONSOLE_ROW - 1) * RT_CONSOLE_FONT_HEIGHT * console.pitch, - 0, - RT_CONSOLE_FONT_HEIGHT * console.pitch); - - console.current_row = RT_CONSOLE_ROW - 1; - } -} - -void rt_hw_console_clear(void) -{ - console.current_col = 0; - console.current_row = 0; - - rt_memset(console.video_ptr, 0, RT_CONSOLE_HEIGHT * console.pitch); -} - -/* write one character to serial, must not trigger interrupt */ -void rt_hw_serial_putc(const char c) -{ - /* - to be polite with serial console add a line feed - to the carriage return character - */ - if (c=='\n') - rt_hw_serial_putc('\r'); - - while (!(uart0.uart_device->SSR & SSR_TDRE)) - ; - uart0.uart_device->TDR = (c & 0x1FF); -} - -/** - * This function is used by rt_kprintf to display a string on console. - * - * @param str the displayed string - */ -void rt_hw_console_output(const char *str) -{ - while (*str) - { - rt_hw_serial_putc(*str++); - } -} - diff --git a/bsp/mb9bf506r/drivers/fm3_uart.c b/bsp/mb9bf506r/drivers/fm3_uart.c new file mode 100644 index 0000000000000000000000000000000000000000..f70c7a047554949ade90511563cdf2b1c9b5ebc4 --- /dev/null +++ b/bsp/mb9bf506r/drivers/fm3_uart.c @@ -0,0 +1,942 @@ +/* + * File : fm3_uart.c + * mb9bf506r uart driver + * This file is part of RT-Thread RTOS + * COPYRIGHT (C) 2006 - 2012, RT-Thread Development Team + * + * The license and distribution terms for this file may be + * found in the file LICENSE in this distribution or at + * http://www.rt-thread.org/license/LICENSE + * + * Change Logs: + * Date Author Notes + * 2012-05-15 lgnq first version. + * 2012-05-28 heyuanjie87 change interfaces + */ + +#include +#include +#include "fm3_uart.h" + +#if (defined(RT_USING_UART0_0) || defined(RT_USING_UART0_1)) +/* UART0 device driver structure */ +struct serial_ringbuffer uart0_int_rx; +struct uart03_device uart0 = +{ + FM3_MFS0_UART, + MFS0RX_IRQn, + MFS0TX_IRQn, +}; +struct rt_serial_device serial0; + +void MFS0RX_IRQHandler(void) +{ + /* enter interrupt */ + rt_interrupt_enter(); + rt_hw_serial_isr(&serial0); + /* leave interrupt */ + rt_interrupt_leave(); +} +#endif + +#if (defined(RT_USING_UART1_0) || defined(RT_USING_UART1_1)) +/* UART1 device driver structure */ +struct serial_ringbuffer uart1_int_rx; +struct uart03_device uart1 = +{ + FM3_MFS1_UART, + MFS1RX_IRQn, + MFS1TX_IRQn, +}; +struct rt_serial_device serial1; + +void MFS1RX_IRQHandler(void) +{ + /* enter interrupt */ + rt_interrupt_enter(); + rt_hw_serial_isr(&serial1); + /* leave interrupt */ + rt_interrupt_leave(); +} +#endif + +#if (defined(RT_USING_UART2_0) || defined(RT_USING_UART2_1) || defined(RT_USING_UART2_2)) +/* UART2 device driver structure */ +struct serial_ringbuffer uart2_int_rx; +struct uart03_device uart2 = +{ + FM3_MFS2_UART, + MFS2RX_IRQn, + MFS2TX_IRQn, +}; +struct rt_serial_device serial2; + +void MFS2RX_IRQHandler(void) +{ + /* enter interrupt */ + rt_interrupt_enter(); + rt_hw_serial_isr(&serial2); + /* leave interrupt */ + rt_interrupt_leave(); +} +#endif + +#if (defined(RT_USING_UART3_0) || defined(RT_USING_UART3_1) || defined(RT_USING_UART3_2)) +/* UART3 device driver structure */ +struct serial_ringbuffer uart3_int_rx; +struct uart03_device uart3 = +{ + FM3_MFS3_UART, + MFS3RX_IRQn, + MFS3TX_IRQn, +}; +struct rt_serial_device serial3; + +void MFS3RX_IRQHandler(void) +{ + /* enter interrupt */ + rt_interrupt_enter(); + rt_hw_serial_isr(&serial3); + /* leave interrupt */ + rt_interrupt_leave(); +} +#endif + +#if (defined(RT_USING_UART4_0) || defined(RT_USING_UART4_1) || defined(RT_USING_UART4_2)) +/* UART4 device driver structure */ +struct serial_ringbuffer uart4_int_rx; +struct uart47_device uart4 = +{ + FM3_MFS4_UART, + MFS4RX_IRQn, + MFS4TX_IRQn, + FIFO_SIZE, +}; +struct rt_serial_device serial4; + +void MFS4RX_IRQHandler(void) +{ + /* enter interrupt */ + rt_interrupt_enter(); + rt_hw_serial_isr(&serial4); + /* leave interrupt */ + rt_interrupt_leave(); +} +#endif + +#if (defined(RT_USING_UART5_0) || defined(RT_USING_UART5_1) || defined(RT_USING_UART5_2)) +/* UART5 device driver structure */ +struct serial_ringbuffer uart5_int_rx; +struct uart47_device uart5 = +{ + FM3_MFS5_UART, + MFS5RX_IRQn, + MFS5TX_IRQn, + FIFO_SIZE, +}; +struct rt_serial_device serial5; + +void MFS5RX_IRQHandler(void) +{ + /* enter interrupt */ + rt_interrupt_enter(); + rt_hw_serial_isr(&serial5); + /* leave interrupt */ + rt_interrupt_leave(); +} +#endif + +#if (defined(RT_USING_UART6_0) || defined(RT_USING_UART6_1)) +/* UART6 device driver structure */ +struct serial_ringbuffer uart6_int_rx; +struct uart47_device uart6 = +{ + FM3_MFS6_UART, + MFS6RX_IRQn, + MFS6TX_IRQn, + FIFO_SIZE, +}; +struct rt_serial_device serial6; + +void MFS6RX_IRQHandler(void) +{ + /* enter interrupt */ + rt_interrupt_enter(); + rt_hw_serial_isr(&serial6); + /* leave interrupt */ + rt_interrupt_leave(); +} +#endif + +#if (defined(RT_USING_UART7_0) || defined(RT_USING_UART7_1)) +/* UART7 device driver structure */ +struct serial_ringbuffer uart7_int_rx; +struct uart47_device uart7 = +{ + FM3_MFS7_UART, + MFS7RX_IRQn, + MFS7TX_IRQn, + FIFO_SIZE, +}; +struct rt_serial_device serial7; + +void MFS7RX_IRQHandler(void) +{ + /* enter interrupt */ + rt_interrupt_enter(); + rt_hw_serial_isr(&serial7); + /* leave interrupt */ + rt_interrupt_leave(); +} + +#endif + +void uart_pin_setup(void) +{ +#if defined(RT_USING_UART0_0) + /* Set UART Ch0 Port, SIN0_0(P21), SOT0_0(P22) */ + FM3_GPIO->PFR2_f.P1 = 1; + FM3_GPIO->PFR2_f.P2 = 1; + FM3_GPIO->EPFR07_f.SIN0S0 = 1; + FM3_GPIO->EPFR07_f.SIN0S1 = 0; + FM3_GPIO->EPFR07_f.SOT0B0 = 1; + FM3_GPIO->EPFR07_f.SOT0B1 = 0; +#elif defined(RT_USING_UART0_1) + /* Set UART Ch0 Port, SIN0_1(P14), SOT0_1(P15) */ + FM3_GPIO->PFR1_f.P4 = 1; + FM3_GPIO->PFR1_f.P5 = 1; + FM3_GPIO->EPFR07_f.SIN0S0 = 0; + FM3_GPIO->EPFR07_f.SIN0S1 = 1; + FM3_GPIO->EPFR07_f.SOT0B0 = 0; + FM3_GPIO->EPFR07_f.SOT0B1 = 1; +#endif + +#if defined(RT_USING_UART1_0) + /* Set UART Ch1 Port, SIN1_0(P56), SOT1_0(P57) */ + FM3_GPIO->PFR5_f.P6 = 1; + FM3_GPIO->PFR5_f.P7 = 1; + FM3_GPIO->EPFR07_f.SIN1S0 = 1; + FM3_GPIO->EPFR07_f.SIN1S1 = 0; + FM3_GPIO->EPFR07_f.SOT1B0 = 1; + FM3_GPIO->EPFR07_f.SOT1B1 = 0; +#elif defined(RT_USING_UART1_1) + /* Set UART Ch1 Port, SIN1_1(P11), SOT1_1(P12) */ + FM3_GPIO->PFR1_f.P1 = 1; + FM3_GPIO->PFR1_f.P2 = 1; + FM3_GPIO->EPFR07_f.SIN1S0 = 0; + FM3_GPIO->EPFR07_f.SIN1S1 = 1; + FM3_GPIO->EPFR07_f.SOT1B0 = 0; + FM3_GPIO->EPFR07_f.SOT1B1 = 1; +#endif + +#if defined(RT_USING_UART2_0) + /* Set UART Ch2 Port, SIN2_0(P72), SOT2_0(P73) */ + FM3_GPIO->PFR7_f.P2 = 1; + FM3_GPIO->PFR7_f.P3 = 1; + FM3_GPIO->EPFR07_f.SIN2S0 = 1; + FM3_GPIO->EPFR07_f.SIN2S1 = 0; + FM3_GPIO->EPFR07_f.SOT2B0 = 1; + FM3_GPIO->EPFR07_f.SOT2B1 = 0; +#elif defined(RT_USING_UART2_1) + /* Set UART Ch2 Port, SIN2_1(P24), SOT2_1(P25) */ + FM3_GPIO->PFR2_f.P4 = 1; + FM3_GPIO->PFR2_f.P5 = 1; + FM3_GPIO->EPFR07_f.SIN2S0 = 0; + FM3_GPIO->EPFR07_f.SIN2S1 = 1; + FM3_GPIO->EPFR07_f.SOT2B0 = 0; + FM3_GPIO->EPFR07_f.SOT2B1 = 1; +#elif defined(RT_USING_UART2_2) + /* Set UART Ch2 Port, SIN2_2(P17), SOT2_2(P18) */ + FM3_GPIO->PFR1_f.P7 = 1; + FM3_GPIO->PFR1_f.P8 = 1; + FM3_GPIO->EPFR07_f.SIN2S0 = 1; + FM3_GPIO->EPFR07_f.SIN2S1 = 1; + FM3_GPIO->EPFR07_f.SOT2B0 = 1; + FM3_GPIO->EPFR07_f.SOT2B1 = 1; +#endif + +#if defined(RT_USING_UART3_0) + /* Set UART Ch3 Port, SIN3_0(P66), SOT3_0(P67) */ + FM3_GPIO->PFR6_f.P6 = 1; + FM3_GPIO->PFR6_f.P7 = 1; + FM3_GPIO->EPFR07_f.SIN3S0 = 1; + FM3_GPIO->EPFR07_f.SIN3S1 = 0; + FM3_GPIO->EPFR07_f.SOT3B0 = 1; + FM3_GPIO->EPFR07_f.SOT3B1 = 0; +#elif defined(RT_USING_UART3_1) + /* Set UART Ch3 Port, SIN3_1(P50), SOT3_1(P51) */ + FM3_GPIO->PFR5_f.P0 = 1; + FM3_GPIO->PFR5_f.P1 = 1; + FM3_GPIO->EPFR07_f.SIN3S0 = 0; + FM3_GPIO->EPFR07_f.SIN3S1 = 1; + FM3_GPIO->EPFR07_f.SOT3B0 = 0; + FM3_GPIO->EPFR07_f.SOT3B1 = 1; +#elif defined(RT_USING_UART3_2) + /* Set UART Ch3 Port, SIN3_2(P48), SOT3_2(P49) */ + FM3_GPIO->PFR4_f.P8 = 1; + FM3_GPIO->PFR4_f.P9 = 1; + FM3_GPIO->EPFR07_f.SIN3S0 = 1; + FM3_GPIO->EPFR07_f.SIN3S1 = 1; + FM3_GPIO->EPFR07_f.SOT3B0 = 1; + FM3_GPIO->EPFR07_f.SOT3B1 = 1; +#endif + +#if defined(RT_USING_UART4_0) + /* Set UART Ch4 Port, SIN4_0(P0A), SOT4_0(P0B), CTS4_0(P0E), RTS4_0(P0D) */ + FM3_GPIO->PFR0_f.PA = 1; + FM3_GPIO->PFR0_f.PB = 1; + FM3_GPIO->PFR0_f.PD = 1; + FM3_GPIO->PFR0_f.PE = 1; + FM3_GPIO->EPFR08_f.SIN4S0 = 1; + FM3_GPIO->EPFR08_f.SIN4S1 = 0; + FM3_GPIO->EPFR08_f.SOT4B0 = 1; + FM3_GPIO->EPFR08_f.SOT4B1 = 0; + FM3_GPIO->EPFR08_f.CTS4S0 = 1; + FM3_GPIO->EPFR08_f.CTS4S1 = 0; + FM3_GPIO->EPFR08_f.RTS4E0 = 1; + FM3_GPIO->EPFR08_f.RTS4E1 = 0; +#elif defined(RT_USING_UART4_1) + /* Set UART Ch4 Port, SIN4_1(P1A), SOT4_1(P1B), CTS4_1(P1D), RTS4_1(P1E) */ + FM3_GPIO->PFR1_f.PA = 1; + FM3_GPIO->PFR1_f.PB = 1; + FM3_GPIO->PFR1_f.PD = 1; + FM3_GPIO->PFR1_f.PE = 1; + FM3_GPIO->EPFR08_f.SIN4S0 = 0; + FM3_GPIO->EPFR08_f.SIN4S1 = 1; + FM3_GPIO->EPFR08_f.SOT4B0 = 0; + FM3_GPIO->EPFR08_f.SOT4B1 = 1; + FM3_GPIO->EPFR08_f.CTS4S0 = 0; + FM3_GPIO->EPFR08_f.CTS4S1 = 1; + FM3_GPIO->EPFR08_f.RTS4E0 = 0; + FM3_GPIO->EPFR08_f.RTS4E1 = 1; +#elif defined(RT_USING_UART4_2) + /* Set UART Ch4 Port, SIN4_2(P05), SOT4_2(P06), CTS4_2(P08), RTS4_2(P09)*/ + FM3_GPIO->PFR0_f.P5 = 1; + FM3_GPIO->PFR0_f.P6 = 1; + FM3_GPIO->PFR0_f.P8 = 1; + FM3_GPIO->PFR0_f.P9 = 1; + FM3_GPIO->EPFR08_f.SIN4S0 = 1; + FM3_GPIO->EPFR08_f.SIN4S1 = 1; + FM3_GPIO->EPFR08_f.SOT4B0 = 1; + FM3_GPIO->EPFR08_f.SOT4B1 = 1; + FM3_GPIO->EPFR08_f.CTS4S0 = 1; + FM3_GPIO->EPFR08_f.CTS4S1 = 1; + FM3_GPIO->EPFR08_f.RTS4E0 = 1; + FM3_GPIO->EPFR08_f.RTS4E1 = 1; +#endif + +#if defined(RT_USING_UART5_0) + /* Set UART Ch5 Port, SIN5_0(P60), SOT5_0(P61) */ + FM3_GPIO->PFR6_f.P0 = 1; + FM3_GPIO->PFR6_f.P1 = 1; + FM3_GPIO->EPFR08_f.SIN5S0 = 1; + FM3_GPIO->EPFR08_f.SIN5S1 = 0; + FM3_GPIO->EPFR08_f.SOT5B0 = 1; + FM3_GPIO->EPFR08_f.SOT5B1 = 0; +#elif defined(RT_USING_UART5_1) + /* Set UART Ch5 Port, SIN5_1(P63), SOT5_1(P64) */ + FM3_GPIO->PFR6_f.P3 = 1; + FM3_GPIO->PFR6_f.P4 = 1; + FM3_GPIO->EPFR08_f.SIN5S0 = 0; + FM3_GPIO->EPFR08_f.SIN5S1 = 1; + FM3_GPIO->EPFR08_f.SOT5B0 = 0; + FM3_GPIO->EPFR08_f.SOT5B1 = 1; +#elif defined(RT_USING_UART5_2) + /* Set UART Ch5 Port, SIN5_2(P36), SOT5_2(P37) */ + FM3_GPIO->PFR3_f.P6 = 1; + FM3_GPIO->PFR3_f.P7 = 1; + FM3_GPIO->EPFR08_f.SIN5S0 = 1; + FM3_GPIO->EPFR08_f.SIN5S1 = 1; + FM3_GPIO->EPFR08_f.SOT5B0 = 1; + FM3_GPIO->EPFR08_f.SOT5B1 = 1; +#endif + +#if defined(RT_USING_UART6_0) + /* Set UART Ch6 Port, SIN6_0(P53), SOT6_0(P54) */ + FM3_GPIO->PFR5_f.P3 = 1; + FM3_GPIO->PFR5_f.P4 = 1; + FM3_GPIO->EPFR08_f.SIN6S0 = 1; + FM3_GPIO->EPFR08_f.SIN6S1 = 0; + FM3_GPIO->EPFR08_f.SOT6B0 = 1; + FM3_GPIO->EPFR08_f.SOT6B1 = 0; +#elif defined(RT_USING_UART6_1) + /* Set UART Ch6 Port, SIN6_1(P33), SOT6_1(P32) */ + FM3_GPIO->PFR3_f.P2 = 1; + FM3_GPIO->PFR3_f.P3 = 1; + FM3_GPIO->EPFR08_f.SIN6S0 = 0; + FM3_GPIO->EPFR08_f.SIN6S1 = 1; + FM3_GPIO->EPFR08_f.SOT6B0 = 0; + FM3_GPIO->EPFR08_f.SOT6B1 = 1; +#endif + +#if defined(RT_USING_UART7_0) + /* Set UART Ch7 Port, SIN7_0(P59), SOT7_0(P5A) */ + FM3_GPIO->PFR5_f.P9 = 1; + FM3_GPIO->PFR5_f.PA = 1; + FM3_GPIO->EPFR08_f.SIN7S0 = 1; + FM3_GPIO->EPFR08_f.SIN7S1 = 0; + FM3_GPIO->EPFR08_f.SOT7B0 = 1; + FM3_GPIO->EPFR08_f.SOT7B1 = 0; +#elif defined(RT_USING_UART7_1) + /* Set UART Ch7 Port, SIN7_1(P4E), SOT7_1(P4D) */ + FM3_GPIO->PFR4_f.PD = 1; + FM3_GPIO->PFR4_f.PE = 1; + FM3_GPIO->EPFR08_f.SIN7S0 = 0; + FM3_GPIO->EPFR08_f.SIN7S1 = 1; + FM3_GPIO->EPFR08_f.SOT7B0 = 0; + FM3_GPIO->EPFR08_f.SOT7B1 = 1; +#endif +} + +static rt_err_t uart03_configure(struct rt_serial_device *serial, struct serial_configure *cfg) +{ + struct uart03_device *uart; + + RT_ASSERT(serial != RT_NULL); + + uart = (struct uart03_device *)serial->parent.user_data; + + uart->uart_regs->SMR = SMR_MD_UART | SMR_SOE; + + /* set baudreate */ + uart->uart_regs->BGR = (40000000UL + (cfg->baud_rate/2))/cfg->baud_rate - 1; + + /* set stop bits */ + switch (cfg->stop_bits) + { + case STOP_BITS_1: + uart->uart_regs->SMR_f.SBL = 0; + uart->uart_regs->ESCR_f.ESBL = 0; + break; + case STOP_BITS_2: + uart->uart_regs->SMR_f.SBL = 1; + uart->uart_regs->ESCR_f.ESBL = 0; + break; + case STOP_BITS_3: + uart->uart_regs->SMR_f.SBL = 0; + uart->uart_regs->ESCR_f.ESBL = 1; + break; + case STOP_BITS_4: + uart->uart_regs->SMR_f.SBL = 1; + uart->uart_regs->ESCR_f.ESBL = 1; + break; + default: + return RT_ERROR; + } + + /* set data bits */ + switch (cfg->data_bits) + { + case DATA_BITS_5: + uart->uart_regs->ESCR_f.L0 = 1; + uart->uart_regs->ESCR_f.L1 = 0; + uart->uart_regs->ESCR_f.L2 = 0; + break; + case DATA_BITS_6: + uart->uart_regs->ESCR_f.L0 = 0; + uart->uart_regs->ESCR_f.L1 = 1; + uart->uart_regs->ESCR_f.L2 = 0; + break; + case DATA_BITS_7: + uart->uart_regs->ESCR_f.L0 = 1; + uart->uart_regs->ESCR_f.L1 = 1; + uart->uart_regs->ESCR_f.L2 = 0; + break; + case DATA_BITS_8: + uart->uart_regs->ESCR_f.L0 = 0; + uart->uart_regs->ESCR_f.L1 = 0; + uart->uart_regs->ESCR_f.L2 = 0; + break; + case DATA_BITS_9: + uart->uart_regs->ESCR_f.L0 = 0; + uart->uart_regs->ESCR_f.L1 = 0; + uart->uart_regs->ESCR_f.L2 = 1; + break; + default: + return RT_ERROR; + } + + /* set parity */ + switch (cfg->parity) + { + case PARITY_NONE: + uart->uart_regs->ESCR_f.PEN = 0; + break; + case PARITY_EVEN: + uart->uart_regs->ESCR_f.PEN = 1; + uart->uart_regs->ESCR_f.P = 0; + break; + case PARITY_ODD: + uart->uart_regs->ESCR_f.PEN = 1; + uart->uart_regs->ESCR_f.P = 1; + break; + default: + return RT_ERROR; + } + + /* set bit order */ + switch (cfg->bit_order) + { + case BIT_ORDER_LSB: + uart->uart_regs->SMR_f.BDS = 0; + break; + case BIT_ORDER_MSB: + uart->uart_regs->SMR_f.BDS = 1; + break; + default: + return RT_ERROR; + } + + /* set NRZ mode */ + switch (cfg->invert) + { + case NRZ_NORMAL: + uart->uart_regs->ESCR_f.INV = 0; + break; + case NRZ_INVERTED: + uart->uart_regs->ESCR_f.INV = 1; + break; + default: + return RT_ERROR; + } + + uart->uart_regs->SCR = SCR_RXE | SCR_TXE | SCR_RIE; + + return RT_EOK; +} + +static rt_err_t uart03_control(struct rt_serial_device *serial, int cmd, void *arg) +{ + struct uart03_device *uart; + + RT_ASSERT(serial != RT_NULL); + uart = (struct uart03_device *)serial->parent.user_data; + + switch (cmd) + { + case RT_DEVICE_CTRL_CLR_INT: + /* disable rx irq */ + UART_DISABLE_IRQ(uart->rx_irq); + break; + case RT_DEVICE_CTRL_SET_INT: + /* enable rx irq */ + UART_ENABLE_IRQ(uart->rx_irq); + break; + } + + return (RT_EOK); +} + +static int uart03_putc(struct rt_serial_device *serial, char c) +{ + struct uart03_device *uart; + + RT_ASSERT(serial != RT_NULL); + + uart = (struct uart03_device *)serial->parent.user_data; + /* while send buffer is empty */ + while (!(uart->uart_regs->SSR & SSR_TDRE)); + /* write to send buffer */ + uart->uart_regs->TDR = c; + + return (1); +} + +static int uart03_getc(struct rt_serial_device *serial) +{ + struct uart03_device *uart; + int ch; + + RT_ASSERT(serial != RT_NULL); + + uart = (struct uart03_device *)serial->parent.user_data; + /* receive buffer is full */ + if (uart->uart_regs->SSR & SSR_RDRF) + { + ch = uart->uart_regs->RDR & 0xff; + return (ch); + } + else + return (-1); +} + +static struct rt_uart_ops uart03_ops = +{ + uart03_configure, + uart03_control, + uart03_putc, + uart03_getc, +}; + +static rt_err_t uart47_configure(struct rt_serial_device *serial, struct serial_configure *cfg) +{ + struct uart47_device *uart; + + RT_ASSERT(serial != RT_NULL); + + uart = (struct uart47_device *)serial->parent.user_data; + + uart->uart_regs->SMR = SMR_MD_UART | SMR_SOE; + + /* set baudreate */ + uart->uart_regs->BGR = (40000000UL + (cfg->baud_rate/2))/cfg->baud_rate - 1; + + /* set stop bits */ + switch (cfg->stop_bits) + { + case STOP_BITS_1: + uart->uart_regs->SMR_f.SBL = 0; + uart->uart_regs->ESCR_f.ESBL = 0; + break; + case STOP_BITS_2: + uart->uart_regs->SMR_f.SBL = 1; + uart->uart_regs->ESCR_f.ESBL = 0; + break; + case STOP_BITS_3: + uart->uart_regs->SMR_f.SBL = 0; + uart->uart_regs->ESCR_f.ESBL = 1; + break; + case STOP_BITS_4: + uart->uart_regs->SMR_f.SBL = 1; + uart->uart_regs->ESCR_f.ESBL = 1; + break; + default: + return RT_ERROR; + } + + /* set data bits */ + switch (cfg->data_bits) + { + case DATA_BITS_5: + uart->uart_regs->ESCR_f.L0 = 1; + uart->uart_regs->ESCR_f.L1 = 0; + uart->uart_regs->ESCR_f.L2 = 0; + break; + case DATA_BITS_6: + uart->uart_regs->ESCR_f.L0 = 0; + uart->uart_regs->ESCR_f.L1 = 1; + uart->uart_regs->ESCR_f.L2 = 0; + break; + case DATA_BITS_7: + uart->uart_regs->ESCR_f.L0 = 1; + uart->uart_regs->ESCR_f.L1 = 1; + uart->uart_regs->ESCR_f.L2 = 0; + break; + case DATA_BITS_8: + uart->uart_regs->ESCR_f.L0 = 0; + uart->uart_regs->ESCR_f.L1 = 0; + uart->uart_regs->ESCR_f.L2 = 0; + break; + case DATA_BITS_9: + uart->uart_regs->ESCR_f.L0 = 0; + uart->uart_regs->ESCR_f.L1 = 0; + uart->uart_regs->ESCR_f.L2 = 1; + break; + default: + return RT_ERROR; + } + + /* set parity */ + switch (cfg->parity) + { + case PARITY_NONE: + uart->uart_regs->ESCR_f.PEN = 0; + break; + case PARITY_EVEN: + uart->uart_regs->ESCR_f.PEN = 1; + uart->uart_regs->ESCR_f.P = 0; + break; + case PARITY_ODD: + uart->uart_regs->ESCR_f.PEN = 1; + uart->uart_regs->ESCR_f.P = 1; + break; + default: + return RT_ERROR; + } + + /* set bit order */ + switch (cfg->bit_order) + { + case BIT_ORDER_LSB: + uart->uart_regs->SMR_f.BDS = 0; + break; + case BIT_ORDER_MSB: + uart->uart_regs->SMR_f.BDS = 1; + break; + default: + return RT_ERROR; + } + + /* set NRZ mode */ + switch (cfg->invert) + { + case NRZ_NORMAL: + uart->uart_regs->ESCR_f.INV = 0; + break; + case NRZ_INVERTED: + uart->uart_regs->ESCR_f.INV = 1; + break; + default: + return RT_ERROR; + } + + /* configure fifo */ + /* Disable the Data Lost detection */ + uart->uart_regs->FCR1_f.FLSTE = 0; + /* Enable the received FIFO idle detection */ + uart->uart_regs->FCR1_f.FRIE = 1; + /* Requests for the transmit FIFO data */ + uart->uart_regs->FCR1_f.FDRQ = 1; + /* Disable the transmit FIFO interrupt */ + uart->uart_regs->FCR1_f.FTIE = 0; + /* Transmit FIFO:FIFO1; Received FIFO:FIFO2 */ + uart->uart_regs->FCR1_f.FSEL = 0; + + /* Transfer data count */ + uart->uart_regs->FBYTE1 = 0; + /* Set the data count to generate a received interrupt */ + uart->uart_regs->FBYTE2 = uart->fifo_size; + + /* FIFO pointer Not reloaded */ + uart->uart_regs->FCR0_f.FLD = 0; + /* FIFO pointer Not saved */ + uart->uart_regs->FCR0_f.FSET = 0; + /* FIFO2 is reset */ + uart->uart_regs->FCR0_f.FCL2 = 1; + /* FIFO1 is reset */ + uart->uart_regs->FCR0_f.FCL1 = 1; + /* Enables the FIFO2 operation */ + uart->uart_regs->FCR0_f.FE2 = 1; + /* Enables the FIFO1 operation */ + uart->uart_regs->FCR0_f.FE1 = 1; + + /* enable receive and send */ + uart->uart_regs->SCR = SCR_RXE | SCR_TXE | SCR_RIE; + + return RT_EOK; +} + +static rt_err_t uart47_control(struct rt_serial_device *serial, int cmd, void *arg) +{ + struct uart47_device *uart; + + RT_ASSERT(serial != RT_NULL); + uart = (struct uart47_device *)serial->parent.user_data; + + switch (cmd) + { + case RT_DEVICE_CTRL_CLR_INT: + /* disable rx irq */ + UART_DISABLE_IRQ(uart->rx_irq); + break; + case RT_DEVICE_CTRL_SET_INT: + /* enable rx irq */ + UART_ENABLE_IRQ(uart->rx_irq); + break; + } + + return (RT_EOK); +} + +static int uart47_putc(struct rt_serial_device *serial, char c) +{ + struct uart47_device *uart; + + RT_ASSERT(serial != RT_NULL); + + uart = (struct uart47_device *)serial->parent.user_data; + + /* while send fifo is empty */ + while (!(uart->uart_regs->SSR & SSR_TDRE)); + /* write to fifo */ + uart->uart_regs->TDR = c; + + return (1); +} + +static int uart47_getc(struct rt_serial_device *serial) +{ + int ch; + struct uart47_device *uart; + + RT_ASSERT(serial != RT_NULL); + + uart = (struct uart47_device *)serial->parent.user_data; + + /* receive is disabled */ + if (!(uart->uart_regs->SCR & SCR_RXE)) + return (-1); + /* receive fifo is not full */ + if ((uart->uart_regs->SSR & SSR_RDRF) == 0) + return (-1); + /* read char */ + ch = uart->uart_regs->RDR & 0xff; + + return (ch); +} + +static struct rt_uart_ops uart47_ops = +{ + uart47_configure, + uart47_control, + uart47_putc, + uart47_getc, +}; + +void rt_hw_serial_init(void) +{ + struct serial_configure config; + + uart_pin_setup(); + +#if (defined(RT_USING_UART0_0) || defined(RT_USING_UART0_1)) + config.baud_rate = BAUD_RATE_115200; + config.bit_order = BIT_ORDER_LSB; + config.data_bits = DATA_BITS_8; + config.parity = PARITY_NONE; + config.stop_bits = STOP_BITS_1; + config.invert = NRZ_NORMAL; + + serial0.ops = &uart03_ops; + serial0.int_rx = &uart0_int_rx; + serial0.config = config; + + /* register UART0 device */ + rt_hw_serial_register(&serial0, "uart0", + RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX | RT_DEVICE_FLAG_STREAM, + &uart0); +#endif + +#if (defined(RT_USING_UART1_0) || defined(RT_USING_UART1_1)) + config.baud_rate = BAUD_RATE_115200; + config.bit_order = BIT_ORDER_LSB; + config.data_bits = DATA_BITS_8; + config.parity = PARITY_NONE; + config.stop_bits = STOP_BITS_1; + config.invert = NRZ_NORMAL; + + serial1.ops = &uart03_ops; + serial1.int_rx = &uart1_int_rx; + serial1.config = config; + + /* register UART1 device */ + rt_hw_serial_register(&serial1, + "uart1", + RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX | RT_DEVICE_FLAG_STREAM, + &uart1); +#endif + +#if (defined(RT_USING_UART2_0) || defined(RT_USING_UART2_1) || defined(RT_USING_UART2_2)) + config.baud_rate = BAUD_RATE_115200; + config.bit_order = BIT_ORDER_LSB; + config.data_bits = DATA_BITS_8; + config.parity = PARITY_NONE; + config.stop_bits = STOP_BITS_1; + config.invert = NRZ_NORMAL; + + serial2.ops = &uart03_ops; + serial2.int_rx = &uart2_int_rx; + serial2.config = config; + + /* register UART2 device */ + rt_hw_serial_register(&serial2, + "uart2", + RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX | RT_DEVICE_FLAG_STREAM, + &uart2); +#endif + +#if (defined(RT_USING_UART3_0) || defined(RT_USING_UART3_1) || defined(RT_USING_UART3_2)) + config.baud_rate = BAUD_RATE_115200; + config.bit_order = BIT_ORDER_LSB; + config.data_bits = DATA_BITS_8; + config.parity = PARITY_NONE; + config.stop_bits = STOP_BITS_1; + config.invert = NRZ_NORMAL; + + serial3.ops = &uart03_ops; + serial3.int_rx = &uart3_int_rx; + serial3.config = config; + + /* register UART3 device */ + rt_hw_serial_register(&serial3, + "uart3", + RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX | RT_DEVICE_FLAG_STREAM, + &uart3); +#endif + +#if (defined(RT_USING_UART4_0) || defined(RT_USING_UART4_1) || defined(RT_USING_UART4_2)) + config.baud_rate = BAUD_RATE_115200; + config.bit_order = BIT_ORDER_LSB; + config.data_bits = DATA_BITS_8; + config.parity = PARITY_NONE; + config.stop_bits = STOP_BITS_1; + config.invert = NRZ_NORMAL; + + serial4.ops = &uart47_ops; + serial4.int_rx = &uart4_int_rx; + serial4.config = config; + + /* register UART4 device */ + rt_hw_serial_register(&serial4, + "uart4", + RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX | RT_DEVICE_FLAG_STREAM, + &uart4); +#endif + +#if (defined(RT_USING_UART5_0) || defined(RT_USING_UART5_1) || defined(RT_USING_UART5_2)) + config.baud_rate = BAUD_RATE_115200; + config.bit_order = BIT_ORDER_LSB; + config.data_bits = DATA_BITS_8; + config.parity = PARITY_NONE; + config.stop_bits = STOP_BITS_1; + config.invert = NRZ_NORMAL; + + serial5.ops = &uart47_ops; + serial5.int_rx = &uart5_int_rx; + serial5.config = config; + + /* register UART5 device */ + rt_hw_serial_register(&serial5, + "uart5", + RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX | RT_DEVICE_FLAG_STREAM, + &uart5); +#endif + +#if (defined(RT_USING_UART6_0) || defined(RT_USING_UART6_1)) + config.baud_rate = BAUD_RATE_115200; + config.bit_order = BIT_ORDER_LSB; + config.data_bits = DATA_BITS_8; + config.parity = PARITY_NONE; + config.stop_bits = STOP_BITS_1; + config.invert = NRZ_NORMAL; + + serial6.ops = &uart47_ops; + serial6.int_rx = &uart6_int_rx; + serial6.config = config; + + /* register UART6 device */ + rt_hw_serial_register(&serial6, + "uart6", + RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX | RT_DEVICE_FLAG_STREAM, + &uart6); +#endif + +#if (defined(RT_USING_UART7_0) || defined(RT_USING_UART7_1)) + config.baud_rate = BAUD_RATE_115200; + config.bit_order = BIT_ORDER_LSB; + config.data_bits = DATA_BITS_8; + config.parity = PARITY_NONE; + config.stop_bits = STOP_BITS_1; + config.invert = NRZ_NORMAL; + + serial7.ops = &uart47_ops; + serial7.int_rx = &uart7_int_rx; + serial7.config = config; + + /* register UART7 device */ + rt_hw_serial_register(&serial7, + "uart7", + RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX | RT_DEVICE_FLAG_STREAM, + &uart7); +#endif +} diff --git a/bsp/mb9bf506r/drivers/serial.h b/bsp/mb9bf506r/drivers/fm3_uart.h similarity index 72% rename from bsp/mb9bf506r/drivers/serial.h rename to bsp/mb9bf506r/drivers/fm3_uart.h index d73cff450c4a856369a302e6a35049c42f7fc760..f8698dbe1777cbf27c0b840709945fcfdadc01bc 100644 --- a/bsp/mb9bf506r/drivers/serial.h +++ b/bsp/mb9bf506r/drivers/fm3_uart.h @@ -1,5 +1,5 @@ /* - * File : serial.h + * File : fm3_uart.h * This file is part of RT-Thread RTOS * COPYRIGHT (C) 2006, RT-Thread Development Team * @@ -13,12 +13,10 @@ * 2011-05-15 lgnq modified according bernard's implementaion. */ -#ifndef __RT_HW_SERIAL_H__ -#define __RT_HW_SERIAL_H__ +#ifndef __FM3_UART_H__ +#define __FM3_UART_H__ -#include #include - #include "mb9bf506r.h" #define SMR_SOE 0x01U @@ -57,22 +55,7 @@ #define ESCR_DATABITS_7 0x03U #define ESCR_DATABITS_9 0x04U -#define BPS 115200 /* serial baudrate */ - -#define UART_RX_BUFFER_SIZE 64 -#define UART_TX_BUFFER_SIZE 64 - -struct serial_int_rx -{ - rt_uint8_t rx_buffer[UART_RX_BUFFER_SIZE]; - rt_uint32_t read_index, save_index; -}; - -struct serial_int_tx -{ - rt_uint8_t tx_buffer[UART_TX_BUFFER_SIZE]; - rt_uint32_t write_index, save_index; -}; +#define FIFO_SIZE 16 /* * Enable/DISABLE Interrupt Controller @@ -81,19 +64,23 @@ struct serial_int_tx #define UART_ENABLE_IRQ(n) NVIC_EnableIRQ((n)) #define UART_DISABLE_IRQ(n) NVIC_DisableIRQ((n)) -struct serial_device +struct uart03_device { - FM3_MFS03_UART_TypeDef *uart_device; + FM3_MFS03_UART_TypeDef *uart_regs; /* irq number */ - IRQn_Type rx_irq, tx_irq; + IRQn_Type rx_irq; + IRQn_Type tx_irq; +}; - /* rx structure */ - struct serial_int_rx *int_rx; - /* tx structure */ - struct serial_int_tx *int_tx; +struct uart47_device +{ + FM3_MFS47_UART_TypeDef *uart_regs; + /* irq number */ + IRQn_Type rx_irq; + IRQn_Type tx_irq; + rt_uint8_t fifo_size; }; -void rt_hw_serial_isr(rt_device_t device); void rt_hw_serial_init(void); #endif diff --git a/bsp/mb9bf506r/drivers/serial.c b/bsp/mb9bf506r/drivers/serial.c deleted file mode 100644 index 083f3338a29a840bf2b4478421b3bbbe39444a84..0000000000000000000000000000000000000000 --- a/bsp/mb9bf506r/drivers/serial.c +++ /dev/null @@ -1,657 +0,0 @@ -/* - * File : serial.c - * This file is part of RT-Thread RTOS - * COPYRIGHT (C) 2006, RT-Thread Development Team - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rt-thread.org/license/LICENSE - * - * Change Logs: - * Date Author Notes - * 2006-03-13 Bernard first version - * 2011-05-15 lgnq modified according bernard's implementation. - */ - -#include - -#include "serial.h" - -/** - * @addtogroup FM3 MB9B500 - */ - -/*@{*/ - -/* RT-Thread Device Interface */ - -/** - * This function initializes serial - */ -static rt_err_t rt_serial_init(rt_device_t dev) -{ - struct serial_device *uart = (struct serial_device*)dev->user_data; - - if (!(dev->flag & RT_DEVICE_FLAG_ACTIVATED)) - { - if (dev->flag & RT_DEVICE_FLAG_INT_RX) - { - rt_memset(uart->int_rx->rx_buffer, 0, - sizeof(uart->int_rx->rx_buffer)); - uart->int_rx->read_index = uart->int_rx->save_index = 0; - } - - if (dev->flag & RT_DEVICE_FLAG_INT_TX) - { - rt_memset(uart->int_tx->tx_buffer, 0, - sizeof(uart->int_tx->tx_buffer)); - uart->int_tx->write_index = uart->int_tx->save_index = 0; - } - - dev->flag |= RT_DEVICE_FLAG_ACTIVATED; - } - - return RT_EOK; -} - -/* save a char to serial buffer */ -static void rt_serial_savechar(struct serial_device *uart, char ch) -{ - rt_base_t level; - - /* disable interrupt */ - level = rt_hw_interrupt_disable(); - - uart->int_rx->rx_buffer[uart->int_rx->save_index] = ch; - uart->int_rx->save_index ++; - if (uart->int_rx->save_index >= UART_RX_BUFFER_SIZE) - uart->int_rx->save_index = 0; - - /* if the next position is read index, discard this 'read char' */ - if (uart->int_rx->save_index == uart->int_rx->read_index) - { - uart->int_rx->read_index ++; - if (uart->int_rx->read_index >= UART_RX_BUFFER_SIZE) - uart->int_rx->read_index = 0; - } - - /* enable interrupt */ - rt_hw_interrupt_enable(level); -} - -static rt_err_t rt_serial_open(rt_device_t dev, rt_uint16_t oflag) -{ - struct serial_device *uart; - - RT_ASSERT(dev != RT_NULL); - uart = (struct serial_device*)dev->user_data; - - if (dev->flag & RT_DEVICE_FLAG_INT_RX) - { - /* enable interrupt */ - UART_ENABLE_IRQ(uart->rx_irq); - } - - return RT_EOK; -} - -static rt_err_t rt_serial_close(rt_device_t dev) -{ - struct serial_device *uart; - - RT_ASSERT(dev != RT_NULL); - uart = (struct serial_device*)dev->user_data; - - if (dev->flag & RT_DEVICE_FLAG_INT_RX) - { - /* disable interrupt */ - UART_DISABLE_IRQ(uart->rx_irq); - } - - return RT_EOK; -} - -static rt_size_t rt_serial_read(rt_device_t dev, rt_off_t pos, void *buffer, - rt_size_t size) -{ - rt_uint8_t *ptr; - rt_err_t err_code; - struct serial_device *uart; - - ptr = buffer; - err_code = RT_EOK; - uart = (struct serial_device*)dev->user_data; - - if (dev->flag & RT_DEVICE_FLAG_INT_RX) - { - rt_base_t level; - - /* interrupt mode Rx */ - while (size) - { - if (uart->int_rx->read_index != uart->int_rx->save_index) - { - *ptr++ = uart->int_rx->rx_buffer[uart->int_rx->read_index]; - size --; - - /* disable interrupt */ - level = rt_hw_interrupt_disable(); - - uart->int_rx->read_index ++; - if (uart->int_rx->read_index >= UART_RX_BUFFER_SIZE) - uart->int_rx->read_index = 0; - - /* enable interrupt */ - rt_hw_interrupt_enable(level); - } - else - { - /* set error code */ - err_code = -RT_EEMPTY; - break; - } - } - } - else - { - /* polling mode */ - while ((rt_uint32_t)ptr - (rt_uint32_t)buffer < size) - { - while (uart->uart_device->SSR & SSR_RDRF) - { - *ptr = uart->uart_device->RDR & 0xff; - ptr ++; - } - } - } - - /* set error code */ - rt_set_errno(err_code); - - return (rt_uint32_t)ptr - (rt_uint32_t)buffer; -} - -static rt_size_t rt_serial_write(rt_device_t dev, rt_off_t pos, - const void *buffer, rt_size_t size) -{ - rt_uint8_t *ptr; - rt_err_t err_code; - struct serial_device *uart; - - err_code = RT_EOK; - ptr = (rt_uint8_t*)buffer; - uart = (struct serial_device*)dev->user_data; - - if (dev->flag & RT_DEVICE_FLAG_INT_TX) - { - /* interrupt mode Tx */ - while (uart->int_tx->save_index != uart->int_tx->write_index) - { - /* save on tx buffer */ - uart->int_tx->tx_buffer[uart->int_tx->save_index] = *ptr++; - - -- size; - - /* move to next position */ - uart->int_tx->save_index ++; - - /* wrap save index */ - if (uart->int_tx->save_index >= UART_TX_BUFFER_SIZE) - uart->int_tx->save_index = 0; - } - - /* set error code */ - if (size > 0) - err_code = -RT_EFULL; - } - else - { - /* polling mode */ - while (size) - { - /* - * to be polite with serial console add a line feed - * to the carriage return character - */ - if (*ptr == '\n' && (dev->flag & RT_DEVICE_FLAG_STREAM)) - { - while (!(uart->uart_device->SSR & SSR_TDRE)); - uart->uart_device->TDR = '\r'; - } - - while (!(uart->uart_device->SSR & SSR_TDRE)); - uart->uart_device->TDR = (*ptr & 0x1FF); - - ++ptr; - --size; - } - } - - /* set error code */ - rt_set_errno(err_code); - - return (rt_uint32_t)ptr - (rt_uint32_t)buffer; -} - -static rt_err_t rt_serial_control(rt_device_t dev, rt_uint8_t cmd, void *args) -{ - RT_ASSERT(dev != RT_NULL); - - switch (cmd) - { - case RT_DEVICE_CTRL_SUSPEND: - /* suspend device */ - dev->flag |= RT_DEVICE_FLAG_SUSPENDED; - break; - - case RT_DEVICE_CTRL_RESUME: - /* resume device */ - dev->flag &= ~RT_DEVICE_FLAG_SUSPENDED; - break; - } - - return RT_EOK; -} - -/* - * serial register - */ -rt_err_t rt_hw_serial_register(rt_device_t device, const char *name, - rt_uint32_t flag, struct serial_device *serial) -{ - RT_ASSERT(device != RT_NULL); - - device->type = RT_Device_Class_Char; - device->rx_indicate = RT_NULL; - device->tx_complete = RT_NULL; - device->init = rt_serial_init; - device->open = rt_serial_open; - device->close = rt_serial_close; - device->read = rt_serial_read; - device->write = rt_serial_write; - device->control = rt_serial_control; - device->user_data = serial; - - /* register a character device */ - return rt_device_register(device, name, flag); -} - -/* ISR for serial interrupt */ -void rt_hw_serial_isr(rt_device_t device) -{ - struct serial_device *uart = (struct serial_device*)device->user_data; - - /* interrupt mode receive */ - RT_ASSERT(device->flag & RT_DEVICE_FLAG_INT_RX); - - /* save on rx buffer */ - while (uart->uart_device->SSR & SSR_RDRF) - { - rt_serial_savechar(uart, uart->uart_device->RDR & 0xff); - } - - /* invoke callback */ - if (device->rx_indicate != RT_NULL) - { - rt_size_t rx_length; - - /* get rx length */ - rx_length = uart->int_rx->read_index > uart->int_rx->save_index ? - UART_RX_BUFFER_SIZE - uart->int_rx->read_index + uart->int_rx->save_index : - uart->int_rx->save_index - uart->int_rx->read_index; - - device->rx_indicate(device, rx_length); - } -} - -#if (defined(RT_USING_UART0_0) || defined(RT_USING_UART0_1)) -/* UART0 device driver structure */ -struct serial_int_rx uart0_int_rx; -struct serial_device uart0 = -{ - FM3_MFS0_UART, - MFS0RX_IRQn, - MFS0TX_IRQn, - &uart0_int_rx, - RT_NULL -}; -struct rt_device uart0_device; - -void MFS0RX_IRQHandler(void) -{ - /* enter interrupt */ - rt_interrupt_enter(); - rt_hw_serial_isr(&uart0_device); - /* leave interrupt */ - rt_interrupt_leave(); -} -#endif - -#if (defined(RT_USING_UART1_0) || defined(RT_USING_UART1_1)) -/* UART1 device driver structure */ -struct serial_int_rx uart1_int_rx; -struct serial_device uart1 = -{ - FM3_MFS1_UART, - MFS1RX_IRQn, - MFS1TX_IRQn, - &uart1_int_rx, - RT_NULL -}; -struct rt_device uart1_device; - -void MFS1RX_IRQHandler(void) -{ - /* enter interrupt */ - rt_interrupt_enter(); - rt_hw_serial_isr(&uart1_device); - /* leave interrupt */ - rt_interrupt_leave(); -} -#endif - -#if (defined(RT_USING_UART2_0) || defined(RT_USING_UART2_1) || defined(RT_USING_UART2_2)) -/* UART2 device driver structure */ -struct serial_int_rx uart2_int_rx; -struct serial_device uart2 = -{ - FM3_MFS2_UART, - MFS2RX_IRQn, - MFS2TX_IRQn, - &uart2_int_rx, - RT_NULL -}; -struct rt_device uart2_device; - -void MFS2RX_IRQHandler(void) -{ - /* enter interrupt */ - rt_interrupt_enter(); - rt_hw_serial_isr(&uart2_device); - /* leave interrupt */ - rt_interrupt_leave(); -} -#endif - -#if (defined(RT_USING_UART3_0) || defined(RT_USING_UART3_1) || defined(RT_USING_UART3_2)) -/* UART3 device driver structure */ -struct serial_int_rx uart3_int_rx; -struct serial_device uart3 = -{ - FM3_MFS3_UART, - MFS3RX_IRQn, - MFS3TX_IRQn, - &uart3_int_rx, - RT_NULL -}; -struct rt_device uart3_device; - -void MFS3RX_IRQHandler(void) -{ - /* enter interrupt */ - rt_interrupt_enter(); - rt_hw_serial_isr(&uart3_device); - /* leave interrupt */ - rt_interrupt_leave(); -} -#endif - -void uart_pin_setup(void) -{ -#if defined(RT_USING_UART0_0) - /* Set UART Ch0 Port, SIN0_0(P21), SOT0_0(P22) */ - FM3_GPIO->PFR2_f.P1 = 1; - FM3_GPIO->PFR2_f.P2 = 1; - FM3_GPIO->EPFR07_f.SIN0S0 = 1; - FM3_GPIO->EPFR07_f.SIN0S1 = 0; - FM3_GPIO->EPFR07_f.SOT0B0 = 1; - FM3_GPIO->EPFR07_f.SOT0B1 = 0; -#elif defined(RT_USING_UART0_1) - /* Set UART Ch0 Port, SIN0_1(P14), SOT0_1(P15) */ - FM3_GPIO->PFR1_f.P4 = 1; - FM3_GPIO->PFR1_f.P5 = 1; - FM3_GPIO->EPFR07_f.SIN0S0 = 0; - FM3_GPIO->EPFR07_f.SIN0S1 = 1; - FM3_GPIO->EPFR07_f.SOT0B0 = 0; - FM3_GPIO->EPFR07_f.SOT0B1 = 1; -#endif - -#if defined(RT_USING_UART1_0) - /* Set UART Ch1 Port, SIN1_0(P56), SOT1_0(P57) */ - FM3_GPIO->PFR5_f.P6 = 1; - FM3_GPIO->PFR5_f.P7 = 1; - FM3_GPIO->EPFR07_f.SIN1S0 = 1; - FM3_GPIO->EPFR07_f.SIN1S1 = 0; - FM3_GPIO->EPFR07_f.SOT1B0 = 1; - FM3_GPIO->EPFR07_f.SOT1B1 = 0; -#elif defined(RT_USING_UART1_1) - /* Set UART Ch1 Port, SIN1_1(P11), SOT1_1(P12) */ - FM3_GPIO->PFR1_f.P1 = 1; - FM3_GPIO->PFR1_f.P2 = 1; - FM3_GPIO->EPFR07_f.SIN1S0 = 0; - FM3_GPIO->EPFR07_f.SIN1S1 = 1; - FM3_GPIO->EPFR07_f.SOT1B0 = 0; - FM3_GPIO->EPFR07_f.SOT1B1 = 1; -#endif - -#if defined(RT_USING_UART2_0) - /* Set UART Ch2 Port, SIN2_0(P72), SOT2_0(P73) */ - FM3_GPIO->PFR7_f.P2 = 1; - FM3_GPIO->PFR7_f.P3 = 1; - FM3_GPIO->EPFR07_f.SIN2S0 = 1; - FM3_GPIO->EPFR07_f.SIN2S1 = 0; - FM3_GPIO->EPFR07_f.SOT2B0 = 1; - FM3_GPIO->EPFR07_f.SOT2B1 = 0; -#elif defined(RT_USING_UART2_1) - /* Set UART Ch2 Port, SIN2_1(P24), SOT2_1(P25) */ - FM3_GPIO->PFR2_f.P4 = 1; - FM3_GPIO->PFR2_f.P5 = 1; - FM3_GPIO->EPFR07_f.SIN2S0 = 0; - FM3_GPIO->EPFR07_f.SIN2S1 = 1; - FM3_GPIO->EPFR07_f.SOT2B0 = 0; - FM3_GPIO->EPFR07_f.SOT2B1 = 1; -#elif defined(RT_USING_UART2_2) - /* Set UART Ch2 Port, SIN2_2(P17), SOT2_2(P18) */ - FM3_GPIO->PFR1_f.P7 = 1; - FM3_GPIO->PFR1_f.P8 = 1; - FM3_GPIO->EPFR07_f.SIN2S0 = 1; - FM3_GPIO->EPFR07_f.SIN2S1 = 1; - FM3_GPIO->EPFR07_f.SOT2B0 = 1; - FM3_GPIO->EPFR07_f.SOT2B1 = 1; -#endif - -#if defined(RT_USING_UART3_0) - /* Set UART Ch3 Port, SIN3_0(P66), SOT3_0(P67) */ - FM3_GPIO->PFR6_f.P6 = 1; - FM3_GPIO->PFR6_f.P7 = 1; - FM3_GPIO->EPFR07_f.SIN3S0 = 1; - FM3_GPIO->EPFR07_f.SIN3S1 = 0; - FM3_GPIO->EPFR07_f.SOT3B0 = 1; - FM3_GPIO->EPFR07_f.SOT3B1 = 0; -#elif defined(RT_USING_UART3_1) - /* Set UART Ch3 Port, SIN3_1(P50), SOT3_1(P51) */ - FM3_GPIO->PFR5_f.P0 = 1; - FM3_GPIO->PFR5_f.P1 = 1; - FM3_GPIO->EPFR07_f.SIN3S0 = 0; - FM3_GPIO->EPFR07_f.SIN3S1 = 1; - FM3_GPIO->EPFR07_f.SOT3B0 = 0; - FM3_GPIO->EPFR07_f.SOT3B1 = 1; -#elif defined(RT_USING_UART3_2) - /* Set UART Ch3 Port, SIN3_2(P48), SOT3_2(P49) */ - FM3_GPIO->PFR4_f.P8 = 1; - FM3_GPIO->PFR4_f.P9 = 1; - FM3_GPIO->EPFR07_f.SIN3S0 = 1; - FM3_GPIO->EPFR07_f.SIN3S1 = 1; - FM3_GPIO->EPFR07_f.SOT3B0 = 1; - FM3_GPIO->EPFR07_f.SOT3B1 = 1; -#endif - -#if defined(RT_USING_UART4_0) - /* Set UART Ch4 Port, SIN4_0(P0A), SOT4_0(P0B), CTS4_0(P0E), RTS4_0(P0D) */ - FM3_GPIO->PFR0_f.PA = 1; - FM3_GPIO->PFR0_f.PB = 1; - FM3_GPIO->PFR0_f.PD = 1; - FM3_GPIO->PFR0_f.PE = 1; - FM3_GPIO->EPFR08_f.SIN4S0 = 1; - FM3_GPIO->EPFR08_f.SIN4S1 = 0; - FM3_GPIO->EPFR08_f.SOT4B0 = 1; - FM3_GPIO->EPFR08_f.SOT4B1 = 0; - FM3_GPIO->EPFR08_f.CTS4S0 = 1; - FM3_GPIO->EPFR08_f.CTS4S1 = 0; - FM3_GPIO->EPFR08_f.RTS4E0 = 1; - FM3_GPIO->EPFR08_f.RTS4E1 = 0; -#elif defined(RT_USING_UART4_1) - /* Set UART Ch4 Port, SIN4_1(P1A), SOT4_1(P1B), CTS4_1(P1D), RTS4_1(P1E) */ - FM3_GPIO->PFR1_f.PA = 1; - FM3_GPIO->PFR1_f.PB = 1; - FM3_GPIO->PFR1_f.PD = 1; - FM3_GPIO->PFR1_f.PE = 1; - FM3_GPIO->EPFR08_f.SIN4S0 = 0; - FM3_GPIO->EPFR08_f.SIN4S1 = 1; - FM3_GPIO->EPFR08_f.SOT4B0 = 0; - FM3_GPIO->EPFR08_f.SOT4B1 = 1; - FM3_GPIO->EPFR08_f.CTS4S0 = 0; - FM3_GPIO->EPFR08_f.CTS4S1 = 1; - FM3_GPIO->EPFR08_f.RTS4E0 = 0; - FM3_GPIO->EPFR08_f.RTS4E1 = 1; -#elif defined(RT_USING_UART4_2) - /* Set UART Ch4 Port, SIN4_2(P05), SOT4_2(P06), CTS4_2(P08), RTS4_2(P09)*/ - FM3_GPIO->PFR0_f.P5 = 1; - FM3_GPIO->PFR0_f.P6 = 1; - FM3_GPIO->PFR0_f.P8 = 1; - FM3_GPIO->PFR0_f.P9 = 1; - FM3_GPIO->EPFR08_f.SIN4S0 = 1; - FM3_GPIO->EPFR08_f.SIN4S1 = 1; - FM3_GPIO->EPFR08_f.SOT4B0 = 1; - FM3_GPIO->EPFR08_f.SOT4B1 = 1; - FM3_GPIO->EPFR08_f.CTS4S0 = 1; - FM3_GPIO->EPFR08_f.CTS4S1 = 1; - FM3_GPIO->EPFR08_f.RTS4E0 = 1; - FM3_GPIO->EPFR08_f.RTS4E1 = 1; -#endif - -#if defined(RT_USING_UART5_0) - /* Set UART Ch5 Port, SIN5_0(P60), SOT5_0(P61) */ - FM3_GPIO->PFR6_f.P0 = 1; - FM3_GPIO->PFR6_f.P1 = 1; - FM3_GPIO->EPFR08_f.SIN5S0 = 1; - FM3_GPIO->EPFR08_f.SIN5S1 = 0; - FM3_GPIO->EPFR08_f.SOT5B0 = 1; - FM3_GPIO->EPFR08_f.SOT5B1 = 0; -#elif defined(RT_USING_UART5_1) - /* Set UART Ch5 Port, SIN5_1(P63), SOT5_1(P64) */ - FM3_GPIO->PFR6_f.P3 = 1; - FM3_GPIO->PFR6_f.P4 = 1; - FM3_GPIO->EPFR08_f.SIN5S0 = 0; - FM3_GPIO->EPFR08_f.SIN5S1 = 1; - FM3_GPIO->EPFR08_f.SOT5B0 = 0; - FM3_GPIO->EPFR08_f.SOT5B1 = 1; -#elif defined(RT_USING_UART5_2) - /* Set UART Ch5 Port, SIN5_2(P36), SOT5_2(P37) */ - FM3_GPIO->PFR3_f.P6 = 1; - FM3_GPIO->PFR3_f.P7 = 1; - FM3_GPIO->EPFR08_f.SIN5S0 = 1; - FM3_GPIO->EPFR08_f.SIN5S1 = 1; - FM3_GPIO->EPFR08_f.SOT5B0 = 1; - FM3_GPIO->EPFR08_f.SOT5B1 = 1; -#endif - -#if defined(RT_USING_UART6_0) - /* Set UART Ch6 Port, SIN6_0(P53), SOT6_0(P54) */ - FM3_GPIO->PFR5_f.P3 = 1; - FM3_GPIO->PFR5_f.P4 = 1; - FM3_GPIO->EPFR08_f.SIN6S0 = 1; - FM3_GPIO->EPFR08_f.SIN6S1 = 0; - FM3_GPIO->EPFR08_f.SOT6B0 = 1; - FM3_GPIO->EPFR08_f.SOT6B1 = 0; -#elif defined(RT_USING_UART6_1) - /* Set UART Ch6 Port, SIN6_1(P33), SOT6_1(P32) */ - FM3_GPIO->PFR3_f.P2 = 1; - FM3_GPIO->PFR3_f.P3 = 1; - FM3_GPIO->EPFR08_f.SIN6S0 = 0; - FM3_GPIO->EPFR08_f.SIN6S1 = 1; - FM3_GPIO->EPFR08_f.SOT6B0 = 0; - FM3_GPIO->EPFR08_f.SOT6B1 = 1; -#endif - -#if defined(RT_USING_UART7_0) - /* Set UART Ch7 Port, SIN7_0(P59), SOT7_0(P5A) */ - FM3_GPIO->PFR5_f.P9 = 1; - FM3_GPIO->PFR5_f.PA = 1; - FM3_GPIO->EPFR08_f.SIN7S0 = 1; - FM3_GPIO->EPFR08_f.SIN7S1 = 0; - FM3_GPIO->EPFR08_f.SOT7B0 = 1; - FM3_GPIO->EPFR08_f.SOT7B1 = 0; -#elif defined(RT_USING_UART7_1) - /* Set UART Ch7 Port, SIN7_1(P4E), SOT7_1(P4D) */ - FM3_GPIO->PFR4_f.PD = 1; - FM3_GPIO->PFR4_f.PE = 1; - FM3_GPIO->EPFR08_f.SIN7S0 = 0; - FM3_GPIO->EPFR08_f.SIN7S1 = 1; - FM3_GPIO->EPFR08_f.SOT7B0 = 0; - FM3_GPIO->EPFR08_f.SOT7B1 = 1; -#endif -} - -void rt_hw_serial_init(void) -{ - uart_pin_setup(); - -#if (defined(RT_USING_UART0_0) || defined(RT_USING_UART0_1)) - /* initialize UART0 */ - uart0.uart_device->SMR = SMR_MD_UART | SMR_SOE; - uart0.uart_device->BGR = (40000000UL + (BPS/2))/BPS - 1; - uart0.uart_device->ESCR = ESCR_DATABITS_8; - uart0.uart_device->SCR = SCR_RXE | SCR_TXE | SCR_RIE; - - /* register UART0 device */ - rt_hw_serial_register(&uart0_device, - "uart0", - RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX | RT_DEVICE_FLAG_STREAM, - &uart0); -#endif - -#if (defined(RT_USING_UART1_0) || defined(RT_USING_UART1_1)) - /* initialize UART1 */ - uart1.uart_device->SMR = SMR_MD_UART | SMR_SOE; - uart1.uart_device->BGR = (40000000UL + (BPS/2))/BPS - 1; - uart1.uart_device->ESCR = ESCR_DATABITS_8; - uart1.uart_device->SCR = SCR_RXE | SCR_TXE | SCR_RIE; - - /* register UART1 device */ - rt_hw_serial_register(&uart1_device, - "uart1", - RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX | RT_DEVICE_FLAG_STREAM, - &uart1); -#endif - -#if (defined(RT_USING_UART2_0) || defined(RT_USING_UART2_1) || defined(RT_USING_UART2_2)) - /* initialize UART2 */ - uart2.uart_device->SMR = SMR_MD_UART | SMR_SOE; - uart2.uart_device->BGR = (40000000UL + (BPS/2))/BPS - 1; - uart2.uart_device->ESCR = ESCR_DATABITS_8; - uart2.uart_device->SCR = SCR_RXE | SCR_TXE | SCR_RIE; - - /* register UART2 device */ - rt_hw_serial_register(&uart2_device, - "uart2", - RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX | RT_DEVICE_FLAG_STREAM, - &uart2); -#endif - -#if (defined(RT_USING_UART3_0) || defined(RT_USING_UART3_1) || defined(RT_USING_UART3_2)) - /* initialize UART3 */ - uart3.uart_device->SMR = SMR_MD_UART | SMR_SOE; - uart3.uart_device->BGR = (40000000UL + (BPS/2))/BPS - 1; - uart3.uart_device->ESCR = ESCR_DATABITS_8; - uart3.uart_device->SCR = SCR_RXE | SCR_TXE | SCR_RIE; - - /* register UART3 device */ - rt_hw_serial_register(&uart3_device, - "uart3", - RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX | RT_DEVICE_FLAG_STREAM, - &uart3); -#endif -} - -/*@}*/ diff --git a/bsp/mb9bf506r/project.ewp b/bsp/mb9bf506r/project.ewp index 68bc640b8d08c1d333f384da6d08fce21f2fa297..4bb87e1ad98f76064ed5e3c4795bb647d78a6fdd 100644 --- a/bsp/mb9bf506r/project.ewp +++ b/bsp/mb9bf506r/project.ewp @@ -301,6 +301,7 @@ $PROJ_DIR$\applications $PROJ_DIR$\libraries\CMSIS\RTOS $PROJ_DIR$\..\..\libcpu\arm\cortex-m3 + $PROJ_DIR$\..\..\components\drivers\include $PROJ_DIR$\..\..\libcpu\arm\common $PROJ_DIR$\..\..\components\init $PROJ_DIR$\..\..\components\finsh @@ -1218,6 +1219,7 @@ $PROJ_DIR$\applications $PROJ_DIR$\libraries\CMSIS\RTOS $PROJ_DIR$\..\..\libcpu\arm\cortex-m3 + $PROJ_DIR$\..\..\components\drivers\include $PROJ_DIR$\..\..\libcpu\arm\common $PROJ_DIR$\..\..\components\init $PROJ_DIR$\..\..\components\finsh @@ -1847,6 +1849,9 @@ CMSIS + + $PROJ_DIR$\libraries\CMSIS\RTOS\rtt_cmsis.c + $PROJ_DIR$\libraries\Device\FUJISTU\MB9BF50x\Source\IAR\startup_mb9bf50x.S @@ -1878,13 +1883,19 @@ $PROJ_DIR$\..\..\libcpu\arm\common\showmem.c + + DeviceDrivers + + $PROJ_DIR$\..\..\components\drivers\serial\serial.c + + Drivers $PROJ_DIR$\drivers\board.c - $PROJ_DIR$\drivers\console.c + $PROJ_DIR$\drivers\fm3_uart.c $PROJ_DIR$\drivers\led.c @@ -1892,9 +1903,6 @@ $PROJ_DIR$\drivers\nand.c - - $PROJ_DIR$\drivers\serial.c - finsh diff --git a/bsp/mb9bf506r/project.uvopt b/bsp/mb9bf506r/project.uvopt index 0731e588cd23e4dec00e0d39a7e6e198dd139ee8..ae9194aa9764615b671844101d21bd5e3a54f087 100644 --- a/bsp/mb9bf506r/project.uvopt +++ b/bsp/mb9bf506r/project.uvopt @@ -183,10 +183,10 @@ 1 0 0 - 48 + 0 0 - 3 - 12 + 1 + 1 0 applications\application.c application.c @@ -199,8 +199,8 @@ 0 0 0 - 66 - 89 + 76 + 88 0 applications\startup.c startup.c @@ -218,10 +218,10 @@ 1 0 0 - 0 + 18 0 - 0 - 0 + 18 + 21 0 drivers\board.c board.c @@ -237,8 +237,8 @@ 0 0 0 - drivers\console.c - console.c + drivers\fm3_uart.c + fm3_uart.c 2 @@ -268,8 +268,15 @@ drivers\nand.c nand.c + + + + CMSIS + 0 + 0 + 0 - 2 + 3 7 1 0 @@ -279,16 +286,9 @@ 0 0 0 - drivers\serial.c - serial.c + libraries\Device\FUJISTU\MB9BF50x\Source\system_mb9bf50x.c + system_mb9bf50x.c - - - - CMSIS - 0 - 0 - 0 3 8 @@ -300,8 +300,8 @@ 0 0 0 - libraries\Device\FUJISTU\MB9BF50x\Source\system_mb9bf50x.c - system_mb9bf50x.c + libraries\CMSIS\RTOS\rtt_cmsis.c + rtt_cmsis.c 3 @@ -311,7 +311,7 @@ 0 0 0 - 139 + 143 149 0 libraries\Device\FUJISTU\MB9BF50x\Source\ARM\startup_mb9bf50x.S @@ -360,8 +360,8 @@ 0 0 0 - 141 - 148 + 58 + 65 0 ..\..\src\idle.c idle.c @@ -586,7 +586,7 @@ - finsh + DeviceDrivers 0 0 0 @@ -596,6 +596,27 @@ 1 0 0 + 24 + 0 + 339 + 353 + 0 + ..\..\components\drivers\serial\serial.c + serial.c + + + + + finsh + 0 + 0 + 0 + + 7 + 29 + 1 + 0 + 0 0 0 0 @@ -605,8 +626,8 @@ cmd.c - 6 - 29 + 7 + 30 1 0 0 @@ -619,8 +640,8 @@ finsh_compiler.c - 6 - 30 + 7 + 31 1 0 0 @@ -633,8 +654,8 @@ finsh_error.c - 6 - 31 + 7 + 32 1 0 0 @@ -647,8 +668,8 @@ finsh_heap.c - 6 - 32 + 7 + 33 1 0 0 @@ -661,8 +682,8 @@ finsh_init.c - 6 - 33 + 7 + 34 1 0 0 @@ -675,8 +696,8 @@ finsh_node.c - 6 - 34 + 7 + 35 1 0 0 @@ -689,8 +710,8 @@ finsh_ops.c - 6 - 35 + 7 + 36 1 0 0 @@ -703,8 +724,8 @@ finsh_parser.c - 6 - 36 + 7 + 37 1 0 0 @@ -717,8 +738,8 @@ finsh_token.c - 6 - 37 + 7 + 38 1 0 0 @@ -731,8 +752,8 @@ finsh_var.c - 6 - 38 + 7 + 39 1 0 0 @@ -745,8 +766,8 @@ finsh_vm.c - 6 - 39 + 7 + 40 1 0 0 @@ -759,8 +780,8 @@ shell.c - 6 - 40 + 7 + 41 1 0 0 @@ -780,15 +801,15 @@ 0 0 - 7 - 41 + 8 + 42 1 0 0 - 15 + 26 0 - 3 - 20 + 11 + 17 0 ..\..\components\init\components_init.c components_init.c diff --git a/bsp/mb9bf506r/project.uvproj b/bsp/mb9bf506r/project.uvproj index f7d84105e7f4fa3b8dc2c4b6334249fd6dc3a2f6..ff44fff6c6582188d6dcb28e8dfb64360cc5396b 100644 --- a/bsp/mb9bf506r/project.uvproj +++ b/bsp/mb9bf506r/project.uvproj @@ -348,7 +348,7 @@ - .;..\..\components\finsh;..\..\components\init;..\..\include;..\..\libcpu\arm\common;..\..\libcpu\arm\cortex-m3;applications;drivers;libraries\CMSIS\Include;libraries\CMSIS\RTOS;libraries\Device\FUJISTU\MB9BF50x\Include + .;..\..\components\drivers\include;..\..\components\finsh;..\..\components\init;..\..\include;..\..\libcpu\arm\common;..\..\libcpu\arm\cortex-m3;applications;drivers;libraries\CMSIS\Include;libraries\CMSIS\RTOS;libraries\Device\FUJISTU\MB9BF50x\Include @@ -409,9 +409,9 @@ drivers\board.c - console.c + fm3_uart.c 1 - drivers\console.c + drivers\fm3_uart.c led.c @@ -423,11 +423,6 @@ 1 drivers\nand.c - - serial.c - 1 - drivers\serial.c - @@ -438,6 +433,11 @@ 1 libraries\Device\FUJISTU\MB9BF50x\Source\system_mb9bf50x.c + + rtt_cmsis.c + 1 + libraries\CMSIS\RTOS\rtt_cmsis.c + startup_mb9bf50x.S 2 @@ -545,6 +545,16 @@ + + DeviceDrivers + + + serial.c + 1 + ..\..\components\drivers\serial\serial.c + + + finsh diff --git a/bsp/mb9bf506r/rtconfig.h b/bsp/mb9bf506r/rtconfig.h index 2a1d983d06cca938eff9854572504c4e1b2d6f59..a8d34d0cf3e32637a7302c59bb7d798f49f7ad79 100644 --- a/bsp/mb9bf506r/rtconfig.h +++ b/bsp/mb9bf506r/rtconfig.h @@ -62,6 +62,8 @@ //
#define RT_USING_DEVICE +// +#define RT_USING_SERIAL // #define RT_USING_UART0_0 // @@ -87,7 +89,7 @@ // // #define RT_USING_UART4_1 // -// #define RT_USING_UART4_2 +#define RT_USING_UART4_2 // // #define RT_USING_UART5_0 // @@ -99,7 +101,7 @@ // // #define RT_USING_UART6_1 // -// #define RT_USING_UART7_0 +#define RT_USING_UART7_0 // // #define RT_USING_UART7_1 // diff --git a/components/drivers/include/drivers/serial.h b/components/drivers/include/drivers/serial.h new file mode 100644 index 0000000000000000000000000000000000000000..12ecb0bb9a329914bf4766ddbdb9d05542eaf778 --- /dev/null +++ b/components/drivers/include/drivers/serial.h @@ -0,0 +1,107 @@ +/* + * File : serial.h + * This file is part of RT-Thread RTOS + * COPYRIGHT (C) 2006 - 2012, RT-Thread Development Team + * + * The license and distribution terms for this file may be + * found in the file LICENSE in this distribution or at + * http://www.rt-thread.org/license/LICENSE + * + * Change Logs: + * Date Author Notes + * 2012-05-15 lgnq first version. + * 2012-05-28 bernard chage interfaces + */ + +#ifndef __SERIAL_H__ +#define __SERIAL_H__ + +#include + +#define BAUD_RATE_9600 9600 +#define BAUD_RATE_115200 115200 + +#define DATA_BITS_5 5 +#define DATA_BITS_6 6 +#define DATA_BITS_7 7 +#define DATA_BITS_8 8 +#define DATA_BITS_9 9 + +#define STOP_BITS_1 1 +#define STOP_BITS_2 2 +#define STOP_BITS_3 3 +#define STOP_BITS_4 4 + +#define PARITY_NONE 0 +#define PARITY_ODD 1 +#define PARITY_EVEN 2 + +#define BIT_ORDER_LSB 0 +#define BIT_ORDER_MSB 1 + +#define NRZ_NORMAL 0 /* Non Return to Zero : normal mode */ +#define NRZ_INVERTED 1 /* Non Return to Zero : inverted mode */ + +#define UART_RX_BUFFER_SIZE 64 +#define UART_TX_BUFFER_SIZE 64 +#define SERIAL_RBUFFER_SIZE 64 + +#define RT_DEVICE_CTRL_CONFIG 0x03 /* configure device */ +#define RT_DEVICE_CTRL_SET_INT 0x10 /* enable receive irq */ +#define RT_DEVICE_CTRL_CLR_INT 0x11 /* disable receive irq */ +#define RT_DEVICE_CTRL_GET_INT 0x12 + +#define RT_SERIAL_RX_INT 0x01 +#define RT_SERIAL_TX_INT 0x02 + +#define RT_SERIAL_ERR_OVERRUN 0x01 +#define RT_SERIAL_ERR_FRAMING 0x02 +#define RT_SERIAL_ERR_PARITY 0x03 + +struct serial_ringbuffer +{ + rt_uint8_t buffer[SERIAL_RBUFFER_SIZE]; + rt_uint16_t put_index, get_index; +}; + +struct serial_configure +{ + rt_uint32_t baud_rate; + rt_uint32_t data_bits :4; + rt_uint32_t stop_bits :2; + rt_uint32_t parity :2; + rt_uint32_t bit_order :1; + rt_uint32_t invert :1; + rt_uint32_t reserved :20; +}; + +struct rt_serial_device +{ + struct rt_device parent; + + const struct rt_uart_ops *ops; + struct serial_configure config; + + /* rx structure */ + struct serial_ringbuffer *int_rx; + /* tx structure */ + struct serial_ringbuffer *int_tx; +}; +typedef struct rt_serial_device rt_serial_t; + +/** + * uart operators + */ +struct rt_uart_ops +{ + rt_err_t (*configure)(struct rt_serial_device *serial, struct serial_configure *cfg); + rt_err_t (*control)(struct rt_serial_device *serial, int cmd, void *arg); + + int (*putc)(struct rt_serial_device *serial, char c); + int (*getc)(struct rt_serial_device *serial); +}; + +void rt_hw_serial_isr(struct rt_serial_device *serial); +rt_err_t rt_hw_serial_register(struct rt_serial_device *serial, const char *name, rt_uint32_t flag, void *data); + +#endif diff --git a/components/drivers/include/rtdevice.h b/components/drivers/include/rtdevice.h index 259f9352799b8b246029edd8a2341e24a6b40089..2b4b7b9ec413d8583fd9ca331228b77bf8a8da3b 100644 --- a/components/drivers/include/rtdevice.h +++ b/components/drivers/include/rtdevice.h @@ -63,4 +63,8 @@ rt_size_t rt_ringbuffer_emptry_size(struct rt_ringbuffer* rb); #include "drivers/usb_host.h" #endif +#ifdef RT_USING_SERIAL +#include "drivers/serial.h" +#endif + #endif diff --git a/components/drivers/serial/SConscript b/components/drivers/serial/SConscript new file mode 100644 index 0000000000000000000000000000000000000000..5e66156c821d25075a6590c919683842996b08e4 --- /dev/null +++ b/components/drivers/serial/SConscript @@ -0,0 +1,8 @@ +from building import * + +cwd = GetCurrentDir() +src = Glob('*.c') +CPPPATH = [cwd + '/../include'] +group = DefineGroup('DeviceDrivers', src, depend = ['RT_USING_SERIAL'], CPPPATH = CPPPATH) + +Return('group') diff --git a/components/drivers/serial/serial.c b/components/drivers/serial/serial.c new file mode 100644 index 0000000000000000000000000000000000000000..b1f733006cf57b57a222ffa6937903c95dd6bfbd --- /dev/null +++ b/components/drivers/serial/serial.c @@ -0,0 +1,361 @@ +/* + * File : serial.c + * This file is part of RT-Thread RTOS + * COPYRIGHT (C) 2006, RT-Thread Development Team + * + * The license and distribution terms for this file may be + * found in the file LICENSE in this distribution or at + * http://www.rt-thread.org/license/LICENSE + * + * Change Logs: + * Date Author Notes + * 2006-03-13 bernard first version + * 2012-05-15 lgnq modified according bernard's implementation. + * 2012-05-28 bernard code cleanup + */ + +#include +#include +#include + +rt_inline void serial_ringbuffer_init(struct serial_ringbuffer* rbuffer) +{ + rt_memset(rbuffer->buffer, 0, sizeof(rbuffer->buffer)); + rbuffer->put_index = 0; + rbuffer->get_index = 0; +} + +rt_inline void serial_ringbuffer_putc(struct serial_ringbuffer* rbuffer, char ch) +{ + rt_base_t level; + + /* disable interrupt */ + level = rt_hw_interrupt_disable(); + + rbuffer->buffer[rbuffer->put_index] = ch; + rbuffer->put_index = (rbuffer->put_index + 1) & (SERIAL_RBUFFER_SIZE - 1); + + /* if the next position is read index, discard this 'read char' */ + if (rbuffer->put_index == rbuffer->get_index) + { + rbuffer->get_index = (rbuffer->get_index + 1) & (SERIAL_RBUFFER_SIZE - 1); + } + + /* enable interrupt */ + rt_hw_interrupt_enable(level); +} + +rt_inline int serial_ringbuffer_putchar(struct serial_ringbuffer* rbuffer, char ch) +{ + rt_base_t level; + rt_uint16_t next_index; + + /* disable interrupt */ + level = rt_hw_interrupt_disable(); + + next_index = (rbuffer->put_index + 1) & (SERIAL_RBUFFER_SIZE - 1); + if (next_index != rbuffer->get_index) + { + rbuffer->buffer[rbuffer->put_index] = ch; + rbuffer->put_index = next_index; + } + else + { + /* enable interrupt */ + rt_hw_interrupt_enable(level); + return -1; + } + + /* enable interrupt */ + rt_hw_interrupt_enable(level); + return 1; +} + +rt_inline int serial_ringbuffer_getc(struct serial_ringbuffer* rbuffer) +{ + int ch; + rt_base_t level; + + ch = -1; + /* disable interrupt */ + level = rt_hw_interrupt_disable(); + if (rbuffer->get_index != rbuffer->put_index) + { + ch = rbuffer->buffer[rbuffer->get_index]; + rbuffer->get_index = (rbuffer->get_index + 1) & (SERIAL_RBUFFER_SIZE - 1); + } + /* enable interrupt */ + rt_hw_interrupt_enable(level); + return ch; +} + +rt_inline rt_uint32_t serial_ringbuffer_size(struct serial_ringbuffer* rbuffer) +{ + rt_uint32_t size; + rt_base_t level; + + level = rt_hw_interrupt_disable(); + size = (rbuffer->put_index - rbuffer->get_index) & (SERIAL_RBUFFER_SIZE - 1); + rt_hw_interrupt_enable(level); + + return size; +} + +/* RT-Thread Device Interface */ + +/* + * This function initializes serial + */ +static rt_err_t rt_serial_init(struct rt_device *dev) +{ + rt_err_t result = RT_EOK; + struct rt_serial_device *serial; + + RT_ASSERT(dev != RT_NULL); + serial = (struct rt_serial_device*) dev; + + if (!(dev->flag & RT_DEVICE_FLAG_ACTIVATED)) + { + /* apply configuration */ + if (serial->ops->configure) + result = serial->ops->configure(serial, &serial->config); + + if (result != RT_EOK) + return result; + + if (dev->flag & RT_DEVICE_FLAG_INT_RX) + serial_ringbuffer_init(serial->int_rx); + + if (dev->flag & RT_DEVICE_FLAG_INT_TX) + serial_ringbuffer_init(serial->int_tx); + + /* set activated */ + dev->flag |= RT_DEVICE_FLAG_ACTIVATED; + } + + return result; +} + +static rt_err_t rt_serial_open(struct rt_device *dev, rt_uint16_t oflag) +{ + struct rt_serial_device *serial; + rt_uint32_t int_flags = 0; + + RT_ASSERT(dev != RT_NULL); + serial = (struct rt_serial_device*) dev; + + if (dev->flag & RT_DEVICE_FLAG_INT_RX) + int_flags = RT_SERIAL_RX_INT; + if (dev->flag & RT_DEVICE_FLAG_INT_TX) + int_flags |= RT_SERIAL_TX_INT; + + if (int_flags) + { + serial->ops->control(serial, RT_DEVICE_CTRL_SET_INT, (void*)int_flags); + } + + return RT_EOK; +} + +static rt_err_t rt_serial_close(struct rt_device *dev) +{ + struct rt_serial_device *serial; + rt_uint32_t int_flags = 0; + + RT_ASSERT(dev != RT_NULL); + serial = (struct rt_serial_device*) dev; + + if (dev->flag & RT_DEVICE_FLAG_INT_RX) + int_flags = RT_SERIAL_RX_INT; + if (dev->flag & RT_DEVICE_FLAG_INT_TX) + int_flags |= RT_SERIAL_TX_INT; + + if (int_flags) + { + serial->ops->control(serial, RT_DEVICE_CTRL_CLR_INT, (void*)int_flags); + } + + return RT_EOK; +} + +static rt_size_t rt_serial_read(struct rt_device *dev, rt_off_t pos, void *buffer, rt_size_t size) +{ + rt_uint8_t *ptr; + rt_uint32_t read_nbytes; + struct rt_serial_device *serial; + + RT_ASSERT(dev != RT_NULL); + serial = (struct rt_serial_device*) dev; + + ptr = (rt_uint8_t*)buffer; + + if (dev->flag & RT_DEVICE_FLAG_INT_RX) + { + /* interrupt mode Rx */ + while (size) + { + int ch; + + ch = serial_ringbuffer_getc(serial->int_rx); + if (ch == -1) break; + + *ptr = ch & 0xff; + ptr ++; + size --; + } + } + else + { + /* polling mode */ + while ((rt_uint32_t)ptr - (rt_uint32_t)buffer < size) + { + *ptr = serial->ops->getc(serial); + ptr ++; + } + } + + read_nbytes = (rt_uint32_t)ptr - (rt_uint32_t)buffer; + /* set error code */ + if (read_nbytes == 0) + { + rt_set_errno(-RT_EEMPTY); + } + + return read_nbytes; +} + +static rt_size_t rt_serial_write(struct rt_device *dev, rt_off_t pos, + const void *buffer, rt_size_t size) +{ + rt_uint8_t *ptr; + rt_size_t write_nbytes = 0; + struct rt_serial_device *serial; + + RT_ASSERT(dev != RT_NULL); + serial = (struct rt_serial_device*) dev; + + ptr = (rt_uint8_t*)buffer; + + if (dev->flag & RT_DEVICE_FLAG_INT_TX) + { + /* warning: data will be discarded if buffer is full */ + while (size) + { + if (serial_ringbuffer_putchar(serial->int_tx, *ptr) != -1) + { + ptr ++; + size --; + } + else break; + } + } + else + { + /* polling mode */ + while (size) + { + /* + * to be polite with serial console add a line feed + * to the carriage return character + */ + if (*ptr == '\n' && (dev->flag & RT_DEVICE_FLAG_STREAM)) + { + serial->ops->putc(serial, '\r'); + } + + serial->ops->putc(serial, *ptr); + + ++ptr; + --size; + } + } + + write_nbytes = (rt_uint32_t)ptr - (rt_uint32_t)buffer; + if (write_nbytes == 0) + { + rt_set_errno(-RT_EFULL); + } + + return write_nbytes; +} + +static rt_err_t rt_serial_control(struct rt_device *dev, rt_uint8_t cmd, void *args) +{ + struct rt_serial_device *serial; + + RT_ASSERT(serial != RT_NULL); + serial = (struct rt_serial_device*) dev; + + switch (cmd) + { + case RT_DEVICE_CTRL_SUSPEND: + /* suspend device */ + dev->flag |= RT_DEVICE_FLAG_SUSPENDED; + break; + + case RT_DEVICE_CTRL_RESUME: + /* resume device */ + dev->flag &= ~RT_DEVICE_FLAG_SUSPENDED; + break; + + case RT_DEVICE_CTRL_CONFIG: + /* configure device */ + serial->ops->configure(serial, (struct serial_configure *)args); + break; + } + + return RT_EOK; +} + +/* + * serial register + */ +rt_err_t rt_hw_serial_register(struct rt_serial_device *serial, const char *name, rt_uint32_t flag, void *data) +{ + struct rt_device *device; + RT_ASSERT(serial != RT_NULL); + + device = &(serial->parent); + + device->type = RT_Device_Class_Char; + device->rx_indicate = RT_NULL; + device->tx_complete = RT_NULL; + + device->init = rt_serial_init; + device->open = rt_serial_open; + device->close = rt_serial_close; + device->read = rt_serial_read; + device->write = rt_serial_write; + device->control = rt_serial_control; + device->user_data = data; + + /* register a character device */ + return rt_device_register(device, name, flag); +} + +/* ISR for serial interrupt */ +void rt_hw_serial_isr(struct rt_serial_device *serial) +{ + int ch = -1; + + /* interrupt mode receive */ + RT_ASSERT(serial->parent.flag & RT_DEVICE_FLAG_INT_RX); + + while (1) + { + ch = serial->ops->getc(serial); + if (ch == -1) break; + + serial_ringbuffer_putc(serial->int_rx, ch); + } + + /* invoke callback */ + if (serial->parent.rx_indicate != RT_NULL) + { + rt_size_t rx_length; + + /* get rx length */ + rx_length = serial_ringbuffer_size(serial->int_rx); + serial->parent.rx_indicate(&serial->parent, rx_length); + } +}