diff --git a/bsp/stm32l072/board/board.c b/bsp/stm32l072/board/board.c
index 92411be737ee54dc49c9f46d7762f06d6b204878..e12b284cb13e3507bdf6bd7372e7049b1b4549fe 100644
--- a/bsp/stm32l072/board/board.c
+++ b/bsp/stm32l072/board/board.c
@@ -40,12 +40,6 @@ void NVIC_Configuration(void)
 //    NVIC_PriorityGroupConfig(NVIC_PriorityGroup_2);
 }
 
-void error_handler(void)
-{
-    rt_kprintf("error_handler\n");
-    while(1);
-}
-
 /**
  * This RCC initial for system.
  * use HSE clock source
@@ -68,7 +62,10 @@ static void RCC_Configuration(void)
     OscInit.PLL.PLLDIV = RCC_PLLDIV_2;
     OscInit.PLL.PLLMUL = RCC_PLLMUL_4;
     OscInit.PLL.PLLSource = RCC_PLLSOURCE_HSI;
-    HAL_RCC_OscConfig(&OscInit);
+    if (HAL_RCC_OscConfig(&OscInit) != HAL_OK)
+    {
+        RT_ASSERT(RT_NULL);
+    }
 
     /* Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2
     clocks dividers */
@@ -81,7 +78,10 @@ static void RCC_Configuration(void)
     ClkInit.AHBCLKDivider = RCC_SYSCLK_DIV1;
     ClkInit.APB1CLKDivider = RCC_HCLK_DIV1;
     ClkInit.APB2CLKDivider = RCC_HCLK_DIV1;
-    HAL_RCC_ClockConfig(&ClkInit, FLASH_LATENCY_1);
+    if (HAL_RCC_ClockConfig(&ClkInit, FLASH_LATENCY_1) != HAL_OK)
+    {
+        RT_ASSERT(RT_NULL);
+    }
 }
 
 #ifdef PRINT_RCC_FREQ_INFO