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体验新版 GitCode,发现更多精彩内容 >>
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6ecdfca2
编写于
6月 24, 2018
作者:
B
Bernard Xiong
提交者:
GitHub
6月 24, 2018
浏览文件
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浏览文件
下载
差异文件
Merge pull request #1563 from uestczyh222/master
[Bsp][STM32F4xx-HAL]优化GPIO驱动减小Flash占用1128->292
上级
ce4b279a
010f0702
变更
2
显示空白变更内容
内联
并排
Showing
2 changed file
with
179 addition
and
162 deletion
+179
-162
bsp/stm32f4xx-HAL/drivers/drv_gpio.c
bsp/stm32f4xx-HAL/drivers/drv_gpio.c
+176
-152
bsp/stm32f4xx-HAL/drivers/drv_gpio.h
bsp/stm32f4xx-HAL/drivers/drv_gpio.h
+3
-10
未找到文件。
bsp/stm32f4xx-HAL/drivers/drv_gpio.c
浏览文件 @
6ecdfca2
...
...
@@ -15,97 +15,142 @@
#include <rtdevice.h>
#include <board.h>
#ifdef RT_USING_PIN
#define __STM32_PIN(index, gpio, gpio_index)
{index, GPIO##gpio##_CLK_ENABLE, GPIO##gpio, GPIO_PIN_##gpio_index}
#define __STM32_PIN_DEFAULT
{-1, 0, 0, 0}
#define __STM32_PIN(index, gpio, gpio_index)
(gpio | gpio_index)
#define __STM32_PIN_DEFAULT
0
static
void
GPIOA_CLK_ENABLE
(
void
)
{
#ifdef __HAL_RCC_GPIOA_CLK_ENABLE
__HAL_RCC_GPIOA_CLK_ENABLE
();
#endif
}
#define A (1U << 8)
#define B (2U << 8)
#define C (3U << 8)
#define D (4U << 8)
#define E (5U << 8)
#define F (6U << 8)
#define G (7U << 8)
#define H (8U << 8)
#define I (9U << 8)
#define J (10U << 8)
#define K (11U << 8)
static
void
GPIOB_CLK_ENABLE
(
void
)
static
GPIO_TypeDef
*
get_st_gpio
(
rt_uint16_t
gpio_pin
)
{
#ifdef __HAL_RCC_GPIOB_CLK_ENABLE
__HAL_RCC_GPIOB_CLK_ENABLE
();
#endif
switch
(
gpio_pin
>>
8
)
{
case
A
:
#ifdef GPIOA
return
GPIOA
;
#endif
case
B
:
#ifdef GPIOB
return
GPIOB
;
#endif
case
C
:
#ifdef GPIOC
return
GPIOC
;
#endif
case
D
:
#ifdef GPIOD
return
GPIOD
;
#endif
case
E
:
#ifdef GPIOE
return
GPIOE
;
#endif
case
F
:
#ifdef GPIOF
return
GPIOF
;
#endif
case
G
:
#ifdef GPIOG
return
GPIOG
;
#endif
case
H
:
#ifdef GPIOH
return
GPIOH
;
#endif
case
I
:
#ifdef GPIOI
return
GPIOI
;
#endif
case
J
:
#ifdef GPIOJ
return
GPIOJ
;
#endif
case
K
:
#ifdef GPIOK
return
GPIOK
;
#endif
default:
return
RT_NULL
;
}
}
static
void
GPIOC_CLK_ENABLE
(
void
)
{
#ifdef __HAL_RCC_GPIOC_CLK_ENABLE
__HAL_RCC_GPIOC_CLK_ENABLE
();
#endif
}
#define get_st_pin(gpio_pin) (0x01 << (gpio_pin&0xFF))
#if (STM32F4xx_PIN_NUMBERS > 48)
static
void
GPIOD_CLK_ENABLE
(
void
)
static
void
drv_clock_enable
(
rt_uint16_t
gpio_pin
)
{
#ifdef __HAL_RCC_GPIOD_CLK_ENABLE
switch
(
gpio_pin
>>
8
)
{
case
A
:
#ifdef __HAL_RCC_GPIOA_CLK_ENABLE
__HAL_RCC_GPIOA_CLK_ENABLE
();
#endif
break
;
case
B
:
#ifdef __HAL_RCC_GPIOB_CLK_ENABLE
__HAL_RCC_GPIOB_CLK_ENABLE
();
#endif
break
;
case
C
:
#ifdef __HAL_RCC_GPIOC_CLK_ENABLE
__HAL_RCC_GPIOC_CLK_ENABLE
();
#endif
break
;
case
D
:
#ifdef __HAL_RCC_GPIOD_CLK_ENABLE
__HAL_RCC_GPIOD_CLK_ENABLE
();
#endif
}
#if (STM32F4xx_PIN_NUMBERS > 64)
static
void
GPIOE_CLK_ENABLE
(
void
)
{
#ifdef __HAL_RCC_GPIOE_CLK_ENABLE
#endif
break
;
case
E
:
#ifdef __HAL_RCC_GPIOE_CLK_ENABLE
__HAL_RCC_GPIOE_CLK_ENABLE
();
#endif
}
#if (STM32F4xx_PIN_NUMBERS > 100)
static
void
GPIOF_CLK_ENABLE
(
void
)
{
#ifdef __HAL_RCC_GPIOF_CLK_ENABLE
#endif
break
;
case
F
:
#ifdef __HAL_RCC_GPIOF_CLK_ENABLE
__HAL_RCC_GPIOF_CLK_ENABLE
();
#endif
}
static
void
GPIOG_CLK_ENABLE
(
void
)
{
#ifdef __HAL_RCC_GPIOG_CLK_ENABLE
#endif
break
;
case
G
:
#ifdef __HAL_RCC_GPIOG_CLK_ENABLE
__HAL_RCC_GPIOG_CLK_ENABLE
();
#endif
}
#if (STM32F4xx_PIN_NUMBERS > 144)
static
void
GPIOH_CLK_ENABLE
(
void
)
{
#ifdef __HAL_RCC_GPIOH_CLK_ENABLE
#endif
break
;
case
H
:
#ifdef __HAL_RCC_GPIOH_CLK_ENABLE
__HAL_RCC_GPIOH_CLK_ENABLE
();
#endif
}
static
void
GPIOI_CLK_ENABLE
(
void
)
{
#ifdef __HAL_RCC_GPIOI_CLK_ENABLE
#endif
break
;
case
I
:
#ifdef __HAL_RCC_GPIOI_CLK_ENABLE
__HAL_RCC_GPIOI_CLK_ENABLE
();
#endif
}
#if (STM32F4xx_PIN_NUMBERS > 176)
static
void
GPIOJ_CLK_ENABLE
(
void
)
{
#ifdef __HAL_RCC_GPIOJ_CLK_ENABLE
#endif
break
;
case
J
:
#ifdef __HAL_RCC_GPIOJ_CLK_ENABLE
__HAL_RCC_GPIOJ_CLK_ENABLE
();
#endif
}
static
void
GPIOK_CLK_ENABLE
(
void
)
{
#ifdef __HAL_RCC_GPIOK_CLK_ENABLE
#endif
break
;
case
K
:
#ifdef __HAL_RCC_GPIOK_CLK_ENABLE
__HAL_RCC_GPIOK_CLK_ENABLE
();
#endif
#endif
break
;
default:
break
;
}
}
#endif
#endif
#endif
#endif
#endif
/* STM32 GPIO driver */
struct
pin_index
{
int
index
;
void
(
*
rcc
)(
void
);
GPIO_TypeDef
*
gpio
;
uint32_t
pin
;
};
static
const
struct
pin_index
pins
[]
=
static
const
rt_uint16_t
pins
[]
=
{
#if (STM32F4xx_PIN_NUMBERS == 36)
__STM32_PIN_DEFAULT
,
...
...
@@ -1535,74 +1580,58 @@ struct rt_pin_irq_hdr pin_irq_hdr_tab[] =
};
#define ITEM_NUM(items) sizeof(items) / sizeof(items[0])
const
struct
pin_index
*
get_pin
(
uint8_t
pin
)
const
rt_uint16_t
get_pin
(
uint8_t
pin
)
{
const
struct
pin_index
*
index
;
rt_uint16_t
gpio_pin
=
__STM32_PIN_DEFAULT
;
if
(
pin
<
ITEM_NUM
(
pins
))
{
index
=
&
pins
[
pin
];
if
(
index
->
index
==
-
1
)
index
=
RT_NULL
;
}
else
{
index
=
RT_NULL
;
gpio_pin
=
pins
[
pin
];
}
return
index
;
return
gpio_pin
;
};
void
stm32_pin_write
(
rt_device_t
dev
,
rt_base_t
pin
,
rt_base_t
value
)
{
const
struct
pin_index
*
index
;
index
=
get_pin
(
pin
);
if
(
index
==
RT_NULL
)
rt_uint16_t
gpio_pin
;
gpio_pin
=
get_pin
(
pin
);
if
(
get_st_gpio
(
gpio_pin
)
==
RT_NULL
)
{
return
;
}
HAL_GPIO_WritePin
(
index
->
gpio
,
index
->
pin
,
(
GPIO_PinState
)
value
);
HAL_GPIO_WritePin
(
get_st_gpio
(
gpio_pin
),
get_st_pin
(
gpio_pin
)
,
(
GPIO_PinState
)
value
);
}
int
stm32_pin_read
(
rt_device_t
dev
,
rt_base_t
pin
)
{
int
value
;
const
struct
pin_index
*
index
;
value
=
PIN_LOW
;
index
=
get_pin
(
pin
);
if
(
index
==
RT_NULL
)
rt_uint16_t
gpio_pin
;
gpio_pin
=
get_pin
(
pin
);
if
(
get_st_gpio
(
gpio_pin
)
==
RT_NULL
)
{
return
value
;
return
PIN_LOW
;
}
value
=
HAL_GPIO_ReadPin
(
index
->
gpio
,
index
->
pin
);
return
value
;
return
HAL_GPIO_ReadPin
(
get_st_gpio
(
gpio_pin
),
get_st_pin
(
gpio_pin
));
}
void
stm32_pin_mode
(
rt_device_t
dev
,
rt_base_t
pin
,
rt_base_t
mode
)
{
const
struct
pin_index
*
index
;
rt_uint16_t
gpio_pin
;
GPIO_InitTypeDef
GPIO_InitStruct
;
index
=
get_pin
(
pin
);
if
(
index
==
RT_NULL
)
gpio_pin
=
get_pin
(
pin
);
if
(
get_st_gpio
(
gpio_pin
)
==
RT_NULL
)
{
return
;
}
/* GPIO Periph clock enable */
index
->
rcc
(
);
drv_clock_enable
(
gpio_pin
);
/* Configure GPIO_InitStructure */
GPIO_InitStruct
.
Pin
=
index
->
pin
;
GPIO_InitStruct
.
Pin
=
get_st_pin
(
gpio_pin
)
;
GPIO_InitStruct
.
Mode
=
GPIO_MODE_OUTPUT_PP
;
GPIO_InitStruct
.
Pull
=
GPIO_NOPULL
;
GPIO_InitStruct
.
Speed
=
GPIO_SPEED_FREQ_VERY_HIGH
;
if
(
mode
==
PIN_MODE_OUTPUT
)
{
/* output setting */
GPIO_InitStruct
.
Mode
=
GPIO_MODE_OUTPUT_PP
;
GPIO_InitStruct
.
Pull
=
GPIO_NOPULL
;
}
else
if
(
mode
==
PIN_MODE_INPUT
)
if
(
mode
==
PIN_MODE_INPUT
)
{
/* input setting: not pull. */
GPIO_InitStruct
.
Mode
=
GPIO_MODE_INPUT
;
GPIO_InitStruct
.
Pull
=
GPIO_NOPULL
;
}
else
if
(
mode
==
PIN_MODE_INPUT_PULLUP
)
{
...
...
@@ -1620,27 +1649,13 @@ void stm32_pin_mode(rt_device_t dev, rt_base_t pin, rt_base_t mode)
{
/* output setting: od. */
GPIO_InitStruct
.
Mode
=
GPIO_MODE_OUTPUT_OD
;
GPIO_InitStruct
.
Pull
=
GPIO_NOPULL
;
}
HAL_GPIO_Init
(
index
->
gpio
,
&
GPIO_InitStruct
);
}
rt_inline
rt_int32_t
bit2bitno
(
rt_uint32_t
bit
)
{
int
i
;
for
(
i
=
0
;
i
<
32
;
i
++
)
{
if
((
0x01
<<
i
)
==
bit
)
{
return
i
;
}
}
return
-
1
;
HAL_GPIO_Init
(
get_st_gpio
(
gpio_pin
),
&
GPIO_InitStruct
)
;
}
rt_inline
const
struct
pin_irq_map
*
get_pin_irq_map
(
uint32_t
pinbit
)
rt_inline
const
struct
pin_irq_map
*
get_pin_irq_map
(
rt_uint16_t
gpio_pin
)
{
rt_int32_t
mapindex
=
bit2bitno
(
pinbit
)
;
rt_int32_t
mapindex
=
gpio_pin
&
0xFF
;
if
(
mapindex
<
0
||
mapindex
>=
ITEM_NUM
(
pin_irq_map
))
{
return
RT_NULL
;
...
...
@@ -1651,15 +1666,15 @@ rt_inline const struct pin_irq_map *get_pin_irq_map(uint32_t pinbit)
rt_err_t
stm32_pin_attach_irq
(
struct
rt_device
*
device
,
rt_int32_t
pin
,
rt_uint32_t
mode
,
void
(
*
hdr
)(
void
*
args
),
void
*
args
)
{
const
struct
pin_index
*
index
;
rt_uint16_t
gpio_pin
;
rt_base_t
level
;
rt_int32_t
irqindex
=
-
1
;
index
=
get_pin
(
pin
);
if
(
index
==
RT_NULL
)
gpio_pin
=
get_pin
(
pin
);
if
(
get_st_gpio
(
gpio_pin
)
==
RT_NULL
)
{
return
RT_ENOSYS
;
}
irqindex
=
bit2bitno
(
index
->
pin
)
;
irqindex
=
gpio_pin
&
0xFF
;
if
(
irqindex
<
0
||
irqindex
>=
ITEM_NUM
(
pin_irq_map
))
{
return
RT_ENOSYS
;
...
...
@@ -1688,15 +1703,15 @@ rt_err_t stm32_pin_attach_irq(struct rt_device *device, rt_int32_t pin,
rt_err_t
stm32_pin_dettach_irq
(
struct
rt_device
*
device
,
rt_int32_t
pin
)
{
const
struct
pin_index
*
index
;
rt_uint16_t
gpio_pin
;
rt_base_t
level
;
rt_int32_t
irqindex
=
-
1
;
index
=
get_pin
(
pin
);
if
(
index
==
RT_NULL
)
gpio_pin
=
get_pin
(
pin
);
if
(
get_st_gpio
(
gpio_pin
)
==
RT_NULL
)
{
return
RT_ENOSYS
;
}
irqindex
=
bit2bitno
(
index
->
pin
)
;
irqindex
=
gpio_pin
&
0xFF
;
if
(
irqindex
<
0
||
irqindex
>=
ITEM_NUM
(
pin_irq_map
))
{
return
RT_ENOSYS
;
...
...
@@ -1718,19 +1733,19 @@ rt_err_t stm32_pin_dettach_irq(struct rt_device *device, rt_int32_t pin)
rt_err_t
stm32_pin_irq_enable
(
struct
rt_device
*
device
,
rt_base_t
pin
,
rt_uint32_t
enabled
)
{
const
struct
pin_index
*
index
;
rt_uint16_t
gpio_pin
;
const
struct
pin_irq_map
*
irqmap
;
rt_base_t
level
;
rt_int32_t
irqindex
=
-
1
;
GPIO_InitTypeDef
GPIO_InitStruct
;
index
=
get_pin
(
pin
);
if
(
index
==
RT_NULL
)
gpio_pin
=
get_pin
(
pin
);
if
(
get_st_gpio
(
gpio_pin
)
==
RT_NULL
)
{
return
RT_ENOSYS
;
}
if
(
enabled
==
PIN_IRQ_ENABLE
)
{
irqindex
=
bit2bitno
(
index
->
pin
)
;
irqindex
=
gpio_pin
&
0xFF
;
if
(
irqindex
<
0
||
irqindex
>=
ITEM_NUM
(
pin_irq_map
))
{
return
RT_ENOSYS
;
...
...
@@ -1743,9 +1758,9 @@ rt_err_t stm32_pin_irq_enable(struct rt_device *device, rt_base_t pin,
}
irqmap
=
&
pin_irq_map
[
irqindex
];
/* GPIO Periph clock enable */
index
->
rcc
(
);
drv_clock_enable
(
gpio_pin
);
/* Configure GPIO_InitStructure */
GPIO_InitStruct
.
Pin
=
index
->
pin
;
GPIO_InitStruct
.
Pin
=
get_st_pin
(
gpio_pin
)
;
GPIO_InitStruct
.
Pull
=
GPIO_NOPULL
;
GPIO_InitStruct
.
Speed
=
GPIO_SPEED_FREQ_VERY_HIGH
;
switch
(
pin_irq_hdr_tab
[
irqindex
].
mode
)
...
...
@@ -1760,14 +1775,14 @@ rt_err_t stm32_pin_irq_enable(struct rt_device *device, rt_base_t pin,
GPIO_InitStruct
.
Mode
=
GPIO_MODE_IT_RISING_FALLING
;
break
;
}
HAL_GPIO_Init
(
index
->
gpio
,
&
GPIO_InitStruct
);
HAL_GPIO_Init
(
get_st_gpio
(
gpio_pin
)
,
&
GPIO_InitStruct
);
HAL_NVIC_SetPriority
(
irqmap
->
irqno
,
5
,
0
);
HAL_NVIC_EnableIRQ
(
irqmap
->
irqno
);
rt_hw_interrupt_enable
(
level
);
}
else
if
(
enabled
==
PIN_IRQ_DISABLE
)
{
irqmap
=
get_pin_irq_map
(
index
->
pin
);
irqmap
=
get_pin_irq_map
(
gpio_
pin
);
if
(
irqmap
==
RT_NULL
)
{
return
RT_ENOSYS
;
...
...
@@ -1799,8 +1814,17 @@ int rt_hw_pin_init(void)
}
INIT_BOARD_EXPORT
(
rt_hw_pin_init
);
rt_inline
void
pin_irq_hdr
(
int
irqno
)
rt_inline
void
pin_irq_hdr
(
uint16_t
GPIO_Pin
)
{
int
irqno
=
0
;
for
(
irqno
=
0
;
irqno
<
16
;
irqno
++
)
{
if
((
0x01
<<
irqno
)
==
GPIO_Pin
)
{
break
;
}
}
if
(
irqno
==
16
)
return
;
if
(
pin_irq_hdr_tab
[
irqno
].
hdr
)
{
pin_irq_hdr_tab
[
irqno
].
hdr
(
pin_irq_hdr_tab
[
irqno
].
args
);
...
...
@@ -1809,7 +1833,7 @@ rt_inline void pin_irq_hdr(int irqno)
void
HAL_GPIO_EXTI_Callback
(
uint16_t
GPIO_Pin
)
{
pin_irq_hdr
(
bit2bitno
(
GPIO_Pin
)
);
pin_irq_hdr
(
GPIO_Pin
);
}
void
EXTI0_IRQHandler
(
void
)
...
...
bsp/stm32f4xx-HAL/drivers/drv_gpio.h
浏览文件 @
6ecdfca2
...
...
@@ -11,14 +11,7 @@
* Date Author Notes
* 2015-01-05 Bernard the first version
*/
#ifndef GPIO_H__
#define GPIO_H__
struct
stm32_hw_pin_userdata
{
int
pin
;
uint32_t
mode
;
};
#define PIN_USERDATA_END {-1,0}
extern
struct
stm32_hw_pin_userdata
stm32_pins
[];
int
rt_hw_pin_init
(
void
);
#ifndef __DRV_GPIO_H__
#define __DRV_GPIO_H__
extern
int
rt_hw_pin_init
(
void
);
#endif
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