diff --git a/bsp/swm320/libraries/CMSIS/DeviceSupport/SWM320.h b/bsp/swm320/libraries/CMSIS/DeviceSupport/SWM320.h index 55eb7812f072415707464e457ed7f2869ccaa1c7..4ac927b7b953ae962b0b004c3c923b58c6527f9a 100644 --- a/bsp/swm320/libraries/CMSIS/DeviceSupport/SWM320.h +++ b/bsp/swm320/libraries/CMSIS/DeviceSupport/SWM320.h @@ -8,83 +8,83 @@ */ typedef enum IRQn { - /****** Cortex-M0 Processor Exceptions Numbers **********************************************/ - NonMaskableInt_IRQn = -14, /*!< 2 Non Maskable Interrupt */ - MemoryManagement_IRQn = -12, /*!< 4 Cortex-M4 Memory Management Interrupt */ - BusFault_IRQn = -11, /*!< 5 Cortex-M4 Bus Fault Interrupt */ - UsageFault_IRQn = -10, /*!< 6 Cortex-M4 Usage Fault Interrupt */ - SVCall_IRQn = -5, /*!< 11 Cortex-M4 SV Call Interrupt */ - DebugMonitor_IRQn = -4, /*!< 12 Cortex-M4 Debug Monitor Interrupt */ - PendSV_IRQn = -2, /*!< 14 Cortex-M4 Pend SV Interrupt */ - SysTick_IRQn = -1, /*!< 15 Cortex-M4 System Tick Interrupt */ - - /****** Cortex-M4 specific Interrupt Numbers ************************************************/ - GPIOA0_IRQn = 0, - GPIOA1_IRQn = 1, - GPIOA2_IRQn = 2, - GPIOA3_IRQn = 3, - GPIOA4_IRQn = 4, - GPIOA5_IRQn = 5, - GPIOA6_IRQn = 6, - GPIOA7_IRQn = 7, - GPIOB0_IRQn = 8, - GPIOB1_IRQn = 9, - GPIOB2_IRQn = 10, - GPIOB3_IRQn = 11, - GPIOB4_IRQn = 12, - GPIOB5_IRQn = 13, - GPIOB6_IRQn = 14, - GPIOB7_IRQn = 15, - GPIOC0_IRQn = 16, - GPIOC1_IRQn = 17, - GPIOC2_IRQn = 18, - GPIOC3_IRQn = 19, - GPIOC4_IRQn = 20, - GPIOC5_IRQn = 21, - GPIOC6_IRQn = 22, - GPIOC7_IRQn = 23, - GPIOM0_IRQn = 24, - GPIOM1_IRQn = 25, - GPIOM2_IRQn = 26, - GPIOM3_IRQn = 27, - GPIOM4_IRQn = 28, - GPIOM5_IRQn = 29, - GPIOM6_IRQn = 30, - GPIOM7_IRQn = 31, - DMA_IRQn = 32, - LCD_IRQn = 33, - NORFLC_IRQn = 34, - CAN_IRQn = 35, - PULSE_IRQn = 36, - WDT_IRQn = 37, - PWM_IRQn = 38, - UART0_IRQn = 39, - UART1_IRQn = 40, - UART2_IRQn = 41, - UART3_IRQn = 42, - UART4_IRQn = 43, - I2C0_IRQn = 44, - I2C1_IRQn = 45, - SPI0_IRQn = 46, - ADC0_IRQn = 47, - RTC_IRQn = 48, - BOD_IRQn = 49, - SDIO_IRQn = 50, - GPIOA_IRQn = 51, - GPIOB_IRQn = 52, - GPIOC_IRQn = 53, - GPIOM_IRQn = 54, - GPION_IRQn = 55, - GPIOP_IRQn = 56, - ADC1_IRQn = 57, - FPU_IRQn = 58, - SPI1_IRQn = 59, - TIMR0_IRQn = 60, - TIMR1_IRQn = 61, - TIMR2_IRQn = 62, - TIMR3_IRQn = 63, - TIMR4_IRQn = 64, - TIMR5_IRQn = 65, +/****** Cortex-M0 Processor Exceptions Numbers **********************************************/ + NonMaskableInt_IRQn = -14, /*!< 2 Non Maskable Interrupt */ + MemoryManagement_IRQn = -12, /*!< 4 Cortex-M4 Memory Management Interrupt */ + BusFault_IRQn = -11, /*!< 5 Cortex-M4 Bus Fault Interrupt */ + UsageFault_IRQn = -10, /*!< 6 Cortex-M4 Usage Fault Interrupt */ + SVCall_IRQn = -5, /*!< 11 Cortex-M4 SV Call Interrupt */ + DebugMonitor_IRQn = -4, /*!< 12 Cortex-M4 Debug Monitor Interrupt */ + PendSV_IRQn = -2, /*!< 14 Cortex-M4 Pend SV Interrupt */ + SysTick_IRQn = -1, /*!< 15 Cortex-M4 System Tick Interrupt */ + +/****** Cortex-M4 specific Interrupt Numbers ************************************************/ + GPIOA0_IRQn = 0, + GPIOA1_IRQn = 1, + GPIOA2_IRQn = 2, + GPIOA3_IRQn = 3, + GPIOA4_IRQn = 4, + GPIOA5_IRQn = 5, + GPIOA6_IRQn = 6, + GPIOA7_IRQn = 7, + GPIOB0_IRQn = 8, + GPIOB1_IRQn = 9, + GPIOB2_IRQn = 10, + GPIOB3_IRQn = 11, + GPIOB4_IRQn = 12, + GPIOB5_IRQn = 13, + GPIOB6_IRQn = 14, + GPIOB7_IRQn = 15, + GPIOC0_IRQn = 16, + GPIOC1_IRQn = 17, + GPIOC2_IRQn = 18, + GPIOC3_IRQn = 19, + GPIOC4_IRQn = 20, + GPIOC5_IRQn = 21, + GPIOC6_IRQn = 22, + GPIOC7_IRQn = 23, + GPIOM0_IRQn = 24, + GPIOM1_IRQn = 25, + GPIOM2_IRQn = 26, + GPIOM3_IRQn = 27, + GPIOM4_IRQn = 28, + GPIOM5_IRQn = 29, + GPIOM6_IRQn = 30, + GPIOM7_IRQn = 31, + DMA_IRQn = 32, + LCD_IRQn = 33, + NORFLC_IRQn = 34, + CAN_IRQn = 35, + PULSE_IRQn = 36, + WDT_IRQn = 37, + PWM_IRQn = 38, + UART0_IRQn = 39, + UART1_IRQn = 40, + UART2_IRQn = 41, + UART3_IRQn = 42, + UART4_IRQn = 43, + I2C0_IRQn = 44, + I2C1_IRQn = 45, + SPI0_IRQn = 46, + ADC0_IRQn = 47, + RTC_IRQn = 48, + BOD_IRQn = 49, + SDIO_IRQn = 50, + GPIOA_IRQn = 51, + GPIOB_IRQn = 52, + GPIOC_IRQn = 53, + GPIOM_IRQn = 54, + GPION_IRQn = 55, + GPIOP_IRQn = 56, + ADC1_IRQn = 57, + FPU_IRQn = 58, + SPI1_IRQn = 59, + TIMR0_IRQn = 60, + TIMR1_IRQn = 61, + TIMR2_IRQn = 62, + TIMR3_IRQn = 63, + TIMR4_IRQn = 64, + TIMR5_IRQn = 65, } IRQn_Type; /* @@ -94,3454 +94,3512 @@ typedef enum IRQn */ /* Configuration of the Cortex-M0 Processor and Core Peripherals */ -#define __CM4_REV 0x0001 /*!< Core revision r0p1 */ -#define __MPU_PRESENT 1 /*!< SWM320 provides an MPU */ -#define __NVIC_PRIO_BITS 3 /*!< SWM320 uses 3 Bits for the Priority Levels */ -#define __Vendor_SysTickConfig 0 /*!< Set to 1 if different SysTick Config is used */ -#define __FPU_PRESENT 0 /*!< FPU present */ - -#if defined(__CC_ARM) -#pragma anon_unions +#define __CM4_REV 0x0001 /*!< Core revision r0p1 */ +#define __MPU_PRESENT 1 /*!< SWM320 provides an MPU */ +#define __NVIC_PRIO_BITS 3 /*!< SWM320 uses 3 Bits for the Priority Levels */ +#define __Vendor_SysTickConfig 0 /*!< Set to 1 if different SysTick Config is used */ +#define __FPU_PRESENT 0 /*!< FPU present */ + +#if defined ( __CC_ARM ) + #pragma anon_unions #endif #include -#include "core_cm4.h" /* Cortex-M0 processor and core peripherals */ +#include "core_cm4.h" /* Cortex-M0 processor and core peripherals */ #include "system_SWM320.h" + /******************************************************************************/ /* Device Specific Peripheral registers structures */ /******************************************************************************/ -typedef struct -{ - __IO uint32_t CLKSEL; //Clock Select - - __IO uint32_t CLKDIV; - - __IO uint32_t CLKEN; //Clock Enable +typedef struct { + __IO uint32_t CLKSEL; //Clock Select - __IO uint32_t SLEEP; + __IO uint32_t CLKDIV; - uint32_t RESERVED0[6]; + __IO uint32_t CLKEN; //Clock Enable - __IO uint32_t RTCBKP_ISO; //[0] 1 RTC备份电源域处于隔离状态 0 RTC备份电源域可访问 + __IO uint32_t SLEEP; + + uint32_t RESERVED0[6]; + + __IO uint32_t RTCBKP_ISO; //[0] 1 RTCݵԴڸ״̬ 0 RTCݵԴɷ + + __IO uint32_t RTCWKEN; //[0] 1 ʹRTCѹ - __IO uint32_t RTCWKEN; //[0] 1 使能RTC唤醒功能 + uint32_t RESERVED[52+64]; - uint32_t RESERVED[52 + 64]; + __IO uint32_t PAWKEN; //Port A Wakeup Enable + __IO uint32_t PBWKEN; + __IO uint32_t PCWKEN; + + uint32_t RESERVED2[1+4]; - __IO uint32_t PAWKEN; //Port A Wakeup Enable - __IO uint32_t PBWKEN; - __IO uint32_t PCWKEN; + __IO uint32_t PAWKSR; //Port A Wakeup Status Registerд1 + __IO uint32_t PBWKSR; + __IO uint32_t PCWKSR; - uint32_t RESERVED2[1 + 4]; + uint32_t RESERVED3[64-10]; - __IO uint32_t PAWKSR; //Port A Wakeup Status Register，写1清零 - __IO uint32_t PBWKSR; - __IO uint32_t PCWKSR; + __IO uint32_t RSTCR; //Reset Control Register + __IO uint32_t RSTSR; //Reset Status Register - uint32_t RESERVED3[64 - 10]; - - __IO uint32_t RSTCR; //Reset Control Register - __IO uint32_t RSTSR; //Reset Status Register - - uint32_t RESERVED4[61 + 64]; - - __IO uint32_t BKP[3]; //数据备份寄存器 + uint32_t RESERVED4[61+64]; + __IO uint32_t BKP[3]; //ݱݼĴ + //RTC Power Domain: 0x4001E000 - uint32_t RESERVED5[(0x4001E000 - 0x40000508) / 4 - 1]; - - __IO uint32_t RTCBKP[8]; //RTC电源域数据备份寄存器 - - __IO uint32_t LRCCR; //Low speed RC Control Register - __IO uint32_t LRCTRIM0; //Low speed RC Trim + uint32_t RESERVED5[(0x4001E000-0x40000508)/4-1]; + + __IO uint32_t RTCBKP[8]; //RTCԴݱݼĴ + + __IO uint32_t LRCCR; //Low speed RC Control Register + __IO uint32_t LRCTRIM0; //Low speed RC Trim __IO uint32_t LRCTRIM1; - - uint32_t RESERVED6; - - __IO uint32_t RTCLDOTRIM; //RTC Power Domain LDO Trim - + + uint32_t RESERVED6; + + __IO uint32_t RTCLDOTRIM; //RTC Power Domain LDO Trim + //Analog Control: 0x40031000 - uint32_t RESERVED7[(0x40031000 - 0x4001E030) / 4 - 1]; - - __IO uint32_t HRCCR; //High speed RC Control Register - - uint32_t RESERVED8[7]; - + uint32_t RESERVED7[(0x40031000-0x4001E030)/4-1]; + + __IO uint32_t HRCCR; //High speed RC Control Register + + uint32_t RESERVED8[7]; + __IO uint32_t XTALCR; - + __IO uint32_t PLLCR; __IO uint32_t PLLDIV; __IO uint32_t PLLSET; - __IO uint32_t PLLLOCK; //[0] 1 PLL已锁定 - + __IO uint32_t PLLLOCK; //[0] 1 PLL + __IO uint32_t BODIE; __IO uint32_t BODIF; - - __IO uint32_t ADC1IN7; + + __IO uint32_t ADC1IN7; } SYS_TypeDef; -#define SYS_CLKSEL_LFCK_Pos 0 //Low Frequency Clock Source 0 LRC 1 PLL -#define SYS_CLKSEL_LFCK_Msk (0x01 << SYS_CLKSEL_LFCK_Pos) -#define SYS_CLKSEL_HFCK_Pos 1 //High Frequency Clock Source 0 HRC 1 XTAL -#define SYS_CLKSEL_HFCK_Msk (0x01 << SYS_CLKSEL_HFCK_Pos) -#define SYS_CLKSEL_SYS_Pos 2 //系统时钟选择 0 LFCK 1 HFCK -#define SYS_CLKSEL_SYS_Msk (0x01 << SYS_CLKSEL_SYS_Pos) - -#define SYS_CLKDIV_SYS_Pos 0 //系统时钟分频 0 1分频 1 2分频 -#define SYS_CLKDIV_SYS_Msk (0x01 << SYS_CLKDIV_SYS_Pos) -#define SYS_CLKDIV_PWM_Pos 1 //PWM 时钟分频 0 1分频 1 8分频 -#define SYS_CLKDIV_PWM_Msk (0x01 << SYS_CLKDIV_PWM_Pos) -#define SYS_CLKDIV_SDRAM_Pos 2 //SDRAM时钟分频 0 1分频 1 2分频 2 4分频 -#define SYS_CLKDIV_SDRAM_Msk (0x03 << SYS_CLKDIV_SDRAM_Pos) -#define SYS_CLKDIV_SDIO_Pos 4 //SDIO时钟分频 0 1分频 1 2分频 2 4分频 3 8分频 -#define SYS_CLKDIV_SDIO_Msk (0x03 << SYS_CLKDIV_SDIO_Pos) - -#define SYS_CLKEN_GPIOA_Pos 0 -#define SYS_CLKEN_GPIOA_Msk (0x01 << SYS_CLKEN_GPIOA_Pos) -#define SYS_CLKEN_GPIOB_Pos 1 -#define SYS_CLKEN_GPIOB_Msk (0x01 << SYS_CLKEN_GPIOB_Pos) -#define SYS_CLKEN_GPIOC_Pos 2 -#define SYS_CLKEN_GPIOC_Msk (0x01 << SYS_CLKEN_GPIOC_Pos) -#define SYS_CLKEN_GPIOM_Pos 4 -#define SYS_CLKEN_GPIOM_Msk (0x01 << SYS_CLKEN_GPIOM_Pos) -#define SYS_CLKEN_GPION_Pos 5 -#define SYS_CLKEN_GPION_Msk (0x01 << SYS_CLKEN_GPION_Pos) -#define SYS_CLKEN_TIMR_Pos 6 -#define SYS_CLKEN_TIMR_Msk (0x01 << SYS_CLKEN_TIMR_Pos) -#define SYS_CLKEN_WDT_Pos 7 -#define SYS_CLKEN_WDT_Msk (0x01 << SYS_CLKEN_WDT_Pos) -#define SYS_CLKEN_ADC0_Pos 8 -#define SYS_CLKEN_ADC0_Msk (0x01 << SYS_CLKEN_ADC0_Pos) -#define SYS_CLKEN_PWM_Pos 9 -#define SYS_CLKEN_PWM_Msk (0x01 << SYS_CLKEN_PWM_Pos) -#define SYS_CLKEN_RTC_Pos 10 -#define SYS_CLKEN_RTC_Msk (0x01 << SYS_CLKEN_RTC_Pos) -#define SYS_CLKEN_UART0_Pos 11 -#define SYS_CLKEN_UART0_Msk (0x01 << SYS_CLKEN_UART0_Pos) -#define SYS_CLKEN_UART1_Pos 12 -#define SYS_CLKEN_UART1_Msk (0x01 << SYS_CLKEN_UART1_Pos) -#define SYS_CLKEN_UART2_Pos 13 -#define SYS_CLKEN_UART2_Msk (0x01 << SYS_CLKEN_UART2_Pos) -#define SYS_CLKEN_UART3_Pos 14 -#define SYS_CLKEN_UART3_Msk (0x01 << SYS_CLKEN_UART3_Pos) -#define SYS_CLKEN_UART4_Pos 15 -#define SYS_CLKEN_UART4_Msk (0x01 << SYS_CLKEN_UART4_Pos) -#define SYS_CLKEN_SPI0_Pos 16 -#define SYS_CLKEN_SPI0_Msk (0x01 << SYS_CLKEN_SPI0_Pos) -#define SYS_CLKEN_I2C0_Pos 17 -#define SYS_CLKEN_I2C0_Msk (0x01 << SYS_CLKEN_I2C0_Pos) -#define SYS_CLKEN_I2C1_Pos 18 -#define SYS_CLKEN_I2C1_Msk (0x01 << SYS_CLKEN_I2C1_Pos) -#define SYS_CLKEN_I2C2_Pos 19 -#define SYS_CLKEN_I2C2_Msk (0x01 << SYS_CLKEN_I2C2_Pos) -#define SYS_CLKEN_LCD_Pos 20 -#define SYS_CLKEN_LCD_Msk (0x01 << SYS_CLKEN_LCD_Pos) -#define SYS_CLKEN_GPIOP_Pos 21 -#define SYS_CLKEN_GPIOP_Msk (0x01 << SYS_CLKEN_GPIOP_Pos) -#define SYS_CLKEN_ANAC_Pos 22 //模拟控制单元时钟使能 -#define SYS_CLKEN_ANAC_Msk (0x01 << SYS_CLKEN_ANAC_Pos) -#define SYS_CLKEN_CRC_Pos 23 -#define SYS_CLKEN_CRC_Msk (0x01 << SYS_CLKEN_CRC_Pos) -#define SYS_CLKEN_RTCBKP_Pos 24 -#define SYS_CLKEN_RTCBKP_Msk (0x01 << SYS_CLKEN_RTCBKP_Pos) -#define SYS_CLKEN_CAN_Pos 25 -#define SYS_CLKEN_CAN_Msk (0x01 << SYS_CLKEN_CAN_Pos) -#define SYS_CLKEN_SDRAM_Pos 26 -#define SYS_CLKEN_SDRAM_Msk (0x01 << SYS_CLKEN_SDRAM_Pos) -#define SYS_CLKEN_NORFL_Pos 27 //NOR Flash -#define SYS_CLKEN_NORFL_Msk (0x01 << SYS_CLKEN_NORFL_Pos) -#define SYS_CLKEN_RAMC_Pos 28 -#define SYS_CLKEN_RAMC_Msk (0x01 << SYS_CLKEN_RAMC_Pos) -#define SYS_CLKEN_SDIO_Pos 29 -#define SYS_CLKEN_SDIO_Msk (0x01 << SYS_CLKEN_SDIO_Pos) -#define SYS_CLKEN_ADC1_Pos 30 -#define SYS_CLKEN_ADC1_Msk (0x01 << SYS_CLKEN_ADC1_Pos) -#define SYS_CLKEN_ALIVE_Pos 31 //CHIPALIVE电源域系统时钟使能 -#define SYS_CLKEN_ALIVE_Msk (0x01 << SYS_CLKEN_ALIVE_Pos) - -#define SYS_SLEEP_SLEEP_Pos 0 //将该位置1后，系统将进入SLEEP模式 -#define SYS_SLEEP_SLEEP_Msk (0x01 << SYS_SLEEP_SLEEP_Pos) -#define SYS_SLEEP_DEEP_Pos 1 //将该位置1后，系统将进入STOP SLEEP模式 -#define SYS_SLEEP_DEEP_Msk (0x01 << SYS_SLEEP_DEEP_Pos) - -#define SYS_RSTCR_SYS_Pos 0 //写1进行系统复位，硬件自动清零 -#define SYS_RSTCR_SYS_Msk (0x01 << SYS_RSTCR_SYS_Pos) -#define SYS_RSTCR_FLASH_Pos 1 //写1对FLASH控制器进行一次复位，硬件自动清零 -#define SYS_RSTCR_FLASH_Msk (0x01 << SYS_RSTCR_FLASH_Pos) -#define SYS_RSTCR_PWM_Pos 2 //写1对PWM进行一次复位，硬件自动清零 -#define SYS_RSTCR_PWM_Msk (0x01 << SYS_RSTCR_PWM_Pos) -#define SYS_RSTCR_CPU_Pos 3 //写1对CPU进行一次复位，硬件自动清零 -#define SYS_RSTCR_CPU_Msk (0x01 << SYS_RSTCR_CPU_Pos) -#define SYS_RSTCR_DMA_Pos 4 //写1对DMA进行一次复位，硬件自动清零 -#define SYS_RSTCR_DMA_Msk (0x01 << SYS_RSTCR_DMA_Pos) -#define SYS_RSTCR_NORFLASH_Pos 5 //写1对NOR Flash控制器进行一次复位，硬件自动清零 -#define SYS_RSTCR_NORFLASH_Msk (0x01 << SYS_RSTCR_NORFLASH_Pos) -#define SYS_RSTCR_SRAM_Pos 6 //写1对SRAM控制器进行一次复位，硬件自动清零 -#define SYS_RSTCR_SRAM_Msk (0x01 << SYS_RSTCR_SRAM_Pos) -#define SYS_RSTCR_SDRAM_Pos 7 //写1对SDRAM控制器进行一次复位，硬件自动清零 -#define SYS_RSTCR_SDRAM_Msk (0x01 << SYS_RSTCR_SDRAM_Pos) -#define SYS_RSTCR_SDIO_Pos 8 //写1对SDIO进行一次复位，硬件自动清零 -#define SYS_RSTCR_SDIO_Msk (0x01 << SYS_RSTCR_SDIO_Pos) -#define SYS_RSTCR_LCD_Pos 9 //写1对LCD进行一次复位，硬件自动清零 -#define SYS_RSTCR_LCD_Msk (0x01 << SYS_RSTCR_LCD_Pos) -#define SYS_RSTCR_CAN_Pos 10 //写1对CAN进行一次复位，硬件自动清零 -#define SYS_RSTCR_CAN_Msk (0x01 << SYS_RSTCR_CAN_Pos) - -#define SYS_RSTSR_POR_Pos 0 //1 出现过POR复位，写1清零 -#define SYS_RSTSR_POR_Msk (0x01 << SYS_RSTSR_POR_Pos) -#define SYS_RSTSR_BOD_Pos 1 //1 出现过BOD复位，写1清零 -#define SYS_RSTSR_BOD_Msk (0x01 << SYS_RSTSR_BOD_Pos) -#define SYS_RSTSR_PIN_Pos 2 //1 出现过外部引脚复位，写1清零 -#define SYS_RSTSR_PIN_Msk (0x01 << SYS_RSTSR_PIN_Pos) -#define SYS_RSTSR_WDT_Pos 3 //1 出现过WDT复位，写1清零 -#define SYS_RSTSR_WDT_Msk (0x01 << SYS_RSTSR_WDT_Pos) -#define SYS_RSTSR_SWRST_Pos 4 //Software Reset, 1 出现过软件复位，写1清零 -#define SYS_RSTSR_SWRST_Msk (0x01 << SYS_RSTSR_SWRST_Pos) - -#define SYS_LRCCR_OFF_Pos 0 //Low Speed RC Off -#define SYS_LRCCR_OFF_Msk (0x01 << SYS_LRCCR_OFF_Pos) - -#define SYS_LRCTRIM0_R_Pos 0 //LRC粗调控制位 -#define SYS_LRCTRIM0_R_Msk (0x7FFF << SYS_LRCTRIM0_R_Pos) -#define SYS_LRCTRIM0_M_Pos 15 //LRC中调控制位 -#define SYS_LRCTRIM0_M_Msk (0x3F << SYS_LRCTRIM2_M_Pos) -#define SYS_LRCTRIM0_F_Pos 21 //LRC细调控制位 -#define SYS_LRCTRIM0_F_Msk (0x7FF << SYS_LRCTRIM0_F_Pos) - -#define SYS_LRCTRIM1_U_Pos 0 //LRC U调控制位 -#define SYS_LRCTRIM1_U_Msk (0x7FFF << SYS_LRCTRIM1_U_Pos) - -#define SYS_HRCCR_DBL_Pos 0 //Double Frequency 0 20MHz 1 40MHz -#define SYS_HRCCR_DBL_Msk (0x01 << SYS_HRCCR_DBL_Pos) -#define SYS_HRCCR_OFF_Pos 1 //High speed RC Off -#define SYS_HRCCR_OFF_Msk (0x01 << SYS_HRCCR_OFF_Pos) - -#define SYS_XTALCR_EN_Pos 0 -#define SYS_XTALCR_EN_Msk (0x01 << SYS_XTALCR_EN_Pos) - -#define SYS_PLLCR_OUTEN_Pos 0 //只能LOCK后设置 -#define SYS_PLLCR_OUTEN_Msk (0x01 << SYS_PLLCR_OUTEN_Pos) -#define SYS_PLLCR_INSEL_Pos 1 //0 XTAL 1 HRC -#define SYS_PLLCR_INSEL_Msk (0x01 << SYS_PLLCR_INSEL_Pos) -#define SYS_PLLCR_OFF_Pos 2 -#define SYS_PLLCR_OFF_Msk (0x01 << SYS_PLLCR_OFF_Pos) - -#define SYS_PLLDIV_FBDIV_Pos 0 //PLL FeedBack分频寄存器 \ - //VCO输出频率 = PLL输入时钟 / INDIV * 4 * FBDIV \ - //PLL输出频率 = PLL输入时钟 / INDIV * 4 * FBDIV / OUTDIV = VCO输出频率 / OUTDIV -#define SYS_PLLDIV_FBDIV_Msk (0x1FF << SYS_PLLDIV_FBDIV_Pos) -#define SYS_PLLDIV_ADDIV_Pos 9 //ADC时钟基（即VCO输出分频后的时钟）经ADDIV分频后作为ADC的转换时钟 -#define SYS_PLLDIV_ADDIV_Msk (0x1F << SYS_PLLDIV_ADDIV_Pos) -#define SYS_PLLDIV_ADVCO_Pos 14 //0 VCO输出16分频作为ADC时钟基 1 VCO输出经过32分频作为ADC时钟基 2 VCO输出经过64分频作为ADC时钟基 -#define SYS_PLLDIV_ADVCO_Msk (0x03 << SYS_PLLDIV_ADVCO_Pos) -#define SYS_PLLDIV_INDIV_Pos 16 //PLL 输入源时钟分频 -#define SYS_PLLDIV_INDIV_Msk (0x1F << SYS_PLLDIV_INDIV_Pos) -#define SYS_PLLDIV_OUTDIV_Pos 24 //PLL 输出分频，0 8分频 1 4分频 0 2分频 -#define SYS_PLLDIV_OUTDIV_Msk (0x03 << SYS_PLLDIV_OUTDIV_Pos) - -#define SYS_PLLSET_LPFBW_Pos 0 //PLL Low Pass Filter Bandwidth -#define SYS_PLLSET_LPFBW_Msk (0x0F << SYS_PLLSET_LPFBW_Pos) -#define SYS_PLLSET_BIASADJ_Pos 4 //PLL Current Bias Adjustment -#define SYS_PLLSET_BIASADJ_Msk (0x03 << SYS_PLLSET_BIASADJ_Pos) -#define SYS_PLLSET_REFVSEL_Pos 6 //PLL Reference Voltage Select -#define SYS_PLLSET_REFVSEL_Msk (0x03 << SYS_PLLSET_REFVSEL_Pos) -#define SYS_PLLSET_CHPADJL_Pos 8 //PLL charge pump LSB current Adjustment -#define SYS_PLLSET_CHPADJL_Msk (0x07 << SYS_PLLSET_CHPADJL_Pos) -#define SYS_PLLSET_CHPADJM_Pos 11 //PLL charge pump MSB current Adjustment -#define SYS_PLLSET_CHPADJM_Msk (0x03 << SYS_PLLSET_CHPADJM_Pos) - -#define SYS_BODIE_2V2_Pos 1 //BOD 2.2V等级触发中断使能 -#define SYS_BODIE_2V2_Msk (0x01 << SYS_BODIE_2V2_Pos) - -#define SYS_BODIF_2V2_Pos 1 //BOD 2.2V等级触发中断状态，写1清零 -#define SYS_BODIF_2V2_Msk (0x01 << SYS_BODIF_2V2_Pos) - -#define SYS_ADC1IN7_SEL_Pos 0 //ADC1模块模拟通道7，1 温度传感器 2 电池电压 3 RTC电源域BG 4 主电源域BG 5 PDM33 -#define SYS_ADC1IN7_SEL_Msk (0x0F << SYS_ADC1IN7_SEL_Pos) -#define SYS_ADC1IN7_IOON_Pos 4 //ADC1模块模拟通道7所用IO开关 -#define SYS_ADC1IN7_IOON_Msk (0x01 << SYS_ADC1IN7_IOON_Pos) - -typedef struct -{ - __IO uint32_t PORTA_SEL; //给PORTA_SEL[2n+2:2n]赋相应的值，将PORTA.PINn引脚配置成GPIO、模拟、数字等功能 - //当赋值为PORTA_PINn_FUNMUX时，PORTA.PINn引脚可通过PORTA_MUX寄存器连接到各种数字外设 - __IO uint32_t PORTB_SEL; +#define SYS_CLKSEL_LFCK_Pos 0 //Low Frequency Clock Source 0 LRC 1 PLL +#define SYS_CLKSEL_LFCK_Msk (0x01 << SYS_CLKSEL_LFCK_Pos) +#define SYS_CLKSEL_HFCK_Pos 1 //High Frequency Clock Source 0 HRC 1 XTAL +#define SYS_CLKSEL_HFCK_Msk (0x01 << SYS_CLKSEL_HFCK_Pos) +#define SYS_CLKSEL_SYS_Pos 2 //ϵͳʱѡ 0 LFCK 1 HFCK +#define SYS_CLKSEL_SYS_Msk (0x01 << SYS_CLKSEL_SYS_Pos) + +#define SYS_CLKDIV_SYS_Pos 0 //ϵͳʱӷƵ 0 1Ƶ 1 2Ƶ +#define SYS_CLKDIV_SYS_Msk (0x01 << SYS_CLKDIV_SYS_Pos) +#define SYS_CLKDIV_PWM_Pos 1 //PWM ʱӷƵ 0 1Ƶ 1 8Ƶ +#define SYS_CLKDIV_PWM_Msk (0x01 << SYS_CLKDIV_PWM_Pos) +#define SYS_CLKDIV_SDRAM_Pos 2 //SDRAMʱӷƵ 0 1Ƶ 1 2Ƶ 2 4Ƶ +#define SYS_CLKDIV_SDRAM_Msk (0x03 << SYS_CLKDIV_SDRAM_Pos) +#define SYS_CLKDIV_SDIO_Pos 4 //SDIOʱӷƵ 0 1Ƶ 1 2Ƶ 2 4Ƶ 3 8Ƶ +#define SYS_CLKDIV_SDIO_Msk (0x03 << SYS_CLKDIV_SDIO_Pos) + +#define SYS_CLKEN_GPIOA_Pos 0 +#define SYS_CLKEN_GPIOA_Msk (0x01 << SYS_CLKEN_GPIOA_Pos) +#define SYS_CLKEN_GPIOB_Pos 1 +#define SYS_CLKEN_GPIOB_Msk (0x01 << SYS_CLKEN_GPIOB_Pos) +#define SYS_CLKEN_GPIOC_Pos 2 +#define SYS_CLKEN_GPIOC_Msk (0x01 << SYS_CLKEN_GPIOC_Pos) +#define SYS_CLKEN_GPIOM_Pos 4 +#define SYS_CLKEN_GPIOM_Msk (0x01 << SYS_CLKEN_GPIOM_Pos) +#define SYS_CLKEN_GPION_Pos 5 +#define SYS_CLKEN_GPION_Msk (0x01 << SYS_CLKEN_GPION_Pos) +#define SYS_CLKEN_TIMR_Pos 6 +#define SYS_CLKEN_TIMR_Msk (0x01 << SYS_CLKEN_TIMR_Pos) +#define SYS_CLKEN_WDT_Pos 7 +#define SYS_CLKEN_WDT_Msk (0x01 << SYS_CLKEN_WDT_Pos) +#define SYS_CLKEN_ADC0_Pos 8 +#define SYS_CLKEN_ADC0_Msk (0x01 << SYS_CLKEN_ADC0_Pos) +#define SYS_CLKEN_PWM_Pos 9 +#define SYS_CLKEN_PWM_Msk (0x01 << SYS_CLKEN_PWM_Pos) +#define SYS_CLKEN_RTC_Pos 10 +#define SYS_CLKEN_RTC_Msk (0x01 << SYS_CLKEN_RTC_Pos) +#define SYS_CLKEN_UART0_Pos 11 +#define SYS_CLKEN_UART0_Msk (0x01 << SYS_CLKEN_UART0_Pos) +#define SYS_CLKEN_UART1_Pos 12 +#define SYS_CLKEN_UART1_Msk (0x01 << SYS_CLKEN_UART1_Pos) +#define SYS_CLKEN_UART2_Pos 13 +#define SYS_CLKEN_UART2_Msk (0x01 << SYS_CLKEN_UART2_Pos) +#define SYS_CLKEN_UART3_Pos 14 +#define SYS_CLKEN_UART3_Msk (0x01 << SYS_CLKEN_UART3_Pos) +#define SYS_CLKEN_UART4_Pos 15 +#define SYS_CLKEN_UART4_Msk (0x01 << SYS_CLKEN_UART4_Pos) +#define SYS_CLKEN_SPI0_Pos 16 +#define SYS_CLKEN_SPI0_Msk (0x01 << SYS_CLKEN_SPI0_Pos) +#define SYS_CLKEN_I2C0_Pos 17 +#define SYS_CLKEN_I2C0_Msk (0x01 << SYS_CLKEN_I2C0_Pos) +#define SYS_CLKEN_I2C1_Pos 18 +#define SYS_CLKEN_I2C1_Msk (0x01 << SYS_CLKEN_I2C1_Pos) +#define SYS_CLKEN_I2C2_Pos 19 +#define SYS_CLKEN_I2C2_Msk (0x01 << SYS_CLKEN_I2C2_Pos) +#define SYS_CLKEN_LCD_Pos 20 +#define SYS_CLKEN_LCD_Msk (0x01 << SYS_CLKEN_LCD_Pos) +#define SYS_CLKEN_GPIOP_Pos 21 +#define SYS_CLKEN_GPIOP_Msk (0x01 << SYS_CLKEN_GPIOP_Pos) +#define SYS_CLKEN_ANAC_Pos 22 //ģƵԪʱʹ +#define SYS_CLKEN_ANAC_Msk (0x01 << SYS_CLKEN_ANAC_Pos) +#define SYS_CLKEN_CRC_Pos 23 +#define SYS_CLKEN_CRC_Msk (0x01 << SYS_CLKEN_CRC_Pos) +#define SYS_CLKEN_RTCBKP_Pos 24 +#define SYS_CLKEN_RTCBKP_Msk (0x01 << SYS_CLKEN_RTCBKP_Pos) +#define SYS_CLKEN_CAN_Pos 25 +#define SYS_CLKEN_CAN_Msk (0x01 << SYS_CLKEN_CAN_Pos) +#define SYS_CLKEN_SDRAM_Pos 26 +#define SYS_CLKEN_SDRAM_Msk (0x01 << SYS_CLKEN_SDRAM_Pos) +#define SYS_CLKEN_NORFL_Pos 27 //NOR Flash +#define SYS_CLKEN_NORFL_Msk (0x01 << SYS_CLKEN_NORFL_Pos) +#define SYS_CLKEN_RAMC_Pos 28 +#define SYS_CLKEN_RAMC_Msk (0x01 << SYS_CLKEN_RAMC_Pos) +#define SYS_CLKEN_SDIO_Pos 29 +#define SYS_CLKEN_SDIO_Msk (0x01 << SYS_CLKEN_SDIO_Pos) +#define SYS_CLKEN_ADC1_Pos 30 +#define SYS_CLKEN_ADC1_Msk (0x01 << SYS_CLKEN_ADC1_Pos) +#define SYS_CLKEN_ALIVE_Pos 31 //CHIPALIVEԴϵͳʱʹ +#define SYS_CLKEN_ALIVE_Msk (0x01 << SYS_CLKEN_ALIVE_Pos) + +#define SYS_SLEEP_SLEEP_Pos 0 //λ1ϵͳSLEEPģʽ +#define SYS_SLEEP_SLEEP_Msk (0x01 << SYS_SLEEP_SLEEP_Pos) +#define SYS_SLEEP_DEEP_Pos 1 //λ1ϵͳSTOP SLEEPģʽ +#define SYS_SLEEP_DEEP_Msk (0x01 << SYS_SLEEP_DEEP_Pos) + +#define SYS_RSTCR_SYS_Pos 0 //д1ϵͳλӲԶ +#define SYS_RSTCR_SYS_Msk (0x01 << SYS_RSTCR_SYS_Pos) +#define SYS_RSTCR_FLASH_Pos 1 //д1FLASHһθλӲԶ +#define SYS_RSTCR_FLASH_Msk (0x01 << SYS_RSTCR_FLASH_Pos) +#define SYS_RSTCR_PWM_Pos 2 //д1PWMһθλӲԶ +#define SYS_RSTCR_PWM_Msk (0x01 << SYS_RSTCR_PWM_Pos) +#define SYS_RSTCR_CPU_Pos 3 //д1CPUһθλӲԶ +#define SYS_RSTCR_CPU_Msk (0x01 << SYS_RSTCR_CPU_Pos) +#define SYS_RSTCR_DMA_Pos 4 //д1DMAһθλӲԶ +#define SYS_RSTCR_DMA_Msk (0x01 << SYS_RSTCR_DMA_Pos) +#define SYS_RSTCR_NORFLASH_Pos 5 //д1NOR FlashһθλӲԶ +#define SYS_RSTCR_NORFLASH_Msk (0x01 << SYS_RSTCR_NORFLASH_Pos) +#define SYS_RSTCR_SRAM_Pos 6 //д1SRAMһθλӲԶ +#define SYS_RSTCR_SRAM_Msk (0x01 << SYS_RSTCR_SRAM_Pos) +#define SYS_RSTCR_SDRAM_Pos 7 //д1SDRAMһθλӲԶ +#define SYS_RSTCR_SDRAM_Msk (0x01 << SYS_RSTCR_SDRAM_Pos) +#define SYS_RSTCR_SDIO_Pos 8 //д1SDIOһθλӲԶ +#define SYS_RSTCR_SDIO_Msk (0x01 << SYS_RSTCR_SDIO_Pos) +#define SYS_RSTCR_LCD_Pos 9 //д1LCDһθλӲԶ +#define SYS_RSTCR_LCD_Msk (0x01 << SYS_RSTCR_LCD_Pos) +#define SYS_RSTCR_CAN_Pos 10 //д1CANһθλӲԶ +#define SYS_RSTCR_CAN_Msk (0x01 << SYS_RSTCR_CAN_Pos) + +#define SYS_RSTSR_POR_Pos 0 //1 ֹPORλд1 +#define SYS_RSTSR_POR_Msk (0x01 << SYS_RSTSR_POR_Pos) +#define SYS_RSTSR_BOD_Pos 1 //1 ֹBODλд1 +#define SYS_RSTSR_BOD_Msk (0x01 << SYS_RSTSR_BOD_Pos) +#define SYS_RSTSR_PIN_Pos 2 //1 ֹⲿŸλд1 +#define SYS_RSTSR_PIN_Msk (0x01 << SYS_RSTSR_PIN_Pos) +#define SYS_RSTSR_WDT_Pos 3 //1 ֹWDTλд1 +#define SYS_RSTSR_WDT_Msk (0x01 << SYS_RSTSR_WDT_Pos) +#define SYS_RSTSR_SWRST_Pos 4 //Software Reset, 1 ֹλд1 +#define SYS_RSTSR_SWRST_Msk (0x01 << SYS_RSTSR_SWRST_Pos) + +#define SYS_LRCCR_OFF_Pos 0 //Low Speed RC Off +#define SYS_LRCCR_OFF_Msk (0x01 << SYS_LRCCR_OFF_Pos) + +#define SYS_LRCTRIM0_R_Pos 0 //LRCֵλ +#define SYS_LRCTRIM0_R_Msk (0x7FFF << SYS_LRCTRIM0_R_Pos) +#define SYS_LRCTRIM0_M_Pos 15 //LRCеλ +#define SYS_LRCTRIM0_M_Msk (0x3F << SYS_LRCTRIM2_M_Pos) +#define SYS_LRCTRIM0_F_Pos 21 //LRCϸλ +#define SYS_LRCTRIM0_F_Msk (0x7FF << SYS_LRCTRIM0_F_Pos) + +#define SYS_LRCTRIM1_U_Pos 0 //LRC Uλ +#define SYS_LRCTRIM1_U_Msk (0x7FFF << SYS_LRCTRIM1_U_Pos) + + +#define SYS_HRCCR_DBL_Pos 0 //Double Frequency 0 20MHz 1 40MHz +#define SYS_HRCCR_DBL_Msk (0x01 << SYS_HRCCR_DBL_Pos) +#define SYS_HRCCR_OFF_Pos 1 //High speed RC Off +#define SYS_HRCCR_OFF_Msk (0x01 << SYS_HRCCR_OFF_Pos) + +#define SYS_XTALCR_EN_Pos 0 +#define SYS_XTALCR_EN_Msk (0x01 << SYS_XTALCR_EN_Pos) + +#define SYS_PLLCR_OUTEN_Pos 0 //ֻLOCK +#define SYS_PLLCR_OUTEN_Msk (0x01 << SYS_PLLCR_OUTEN_Pos) +#define SYS_PLLCR_INSEL_Pos 1 //0 XTAL 1 HRC +#define SYS_PLLCR_INSEL_Msk (0x01 << SYS_PLLCR_INSEL_Pos) +#define SYS_PLLCR_OFF_Pos 2 +#define SYS_PLLCR_OFF_Msk (0x01 << SYS_PLLCR_OFF_Pos) + +#define SYS_PLLDIV_FBDIV_Pos 0 //PLL FeedBackƵĴ + //VCOƵ = PLLʱ / INDIV * 4 * FBDIV + //PLLƵ = PLLʱ / INDIV * 4 * FBDIV / OUTDIV = VCOƵ / OUTDIV +#define SYS_PLLDIV_FBDIV_Msk (0x1FF << SYS_PLLDIV_FBDIV_Pos) +#define SYS_PLLDIV_ADDIV_Pos 9 //ADCʱӻVCOƵʱӣADDIVƵΪADCתʱ +#define SYS_PLLDIV_ADDIV_Msk (0x1F << SYS_PLLDIV_ADDIV_Pos) +#define SYS_PLLDIV_ADVCO_Pos 14 //0 VCO16ƵΪADCʱӻ 1 VCO32ƵΪADCʱӻ 2 VCO64ƵΪADCʱӻ +#define SYS_PLLDIV_ADVCO_Msk (0x03 << SYS_PLLDIV_ADVCO_Pos) +#define SYS_PLLDIV_INDIV_Pos 16 //PLL ԴʱӷƵ +#define SYS_PLLDIV_INDIV_Msk (0x1F << SYS_PLLDIV_INDIV_Pos) +#define SYS_PLLDIV_OUTDIV_Pos 24 //PLL Ƶ0 8Ƶ 1 4Ƶ 0 2Ƶ +#define SYS_PLLDIV_OUTDIV_Msk (0x03 << SYS_PLLDIV_OUTDIV_Pos) + +#define SYS_PLLSET_LPFBW_Pos 0 //PLL Low Pass Filter Bandwidth +#define SYS_PLLSET_LPFBW_Msk (0x0F << SYS_PLLSET_LPFBW_Pos) +#define SYS_PLLSET_BIASADJ_Pos 4 //PLL Current Bias Adjustment +#define SYS_PLLSET_BIASADJ_Msk (0x03 << SYS_PLLSET_BIASADJ_Pos) +#define SYS_PLLSET_REFVSEL_Pos 6 //PLL Reference Voltage Select +#define SYS_PLLSET_REFVSEL_Msk (0x03 << SYS_PLLSET_REFVSEL_Pos) +#define SYS_PLLSET_CHPADJL_Pos 8 //PLL charge pump LSB current Adjustment +#define SYS_PLLSET_CHPADJL_Msk (0x07 << SYS_PLLSET_CHPADJL_Pos) +#define SYS_PLLSET_CHPADJM_Pos 11 //PLL charge pump MSB current Adjustment +#define SYS_PLLSET_CHPADJM_Msk (0x03 << SYS_PLLSET_CHPADJM_Pos) + +#define SYS_BODIE_2V2_Pos 1 //BOD 2.2Vȼжʹ +#define SYS_BODIE_2V2_Msk (0x01 << SYS_BODIE_2V2_Pos) + +#define SYS_BODIF_2V2_Pos 1 //BOD 2.2Vȼж״̬д1 +#define SYS_BODIF_2V2_Msk (0x01 << SYS_BODIF_2V2_Pos) + +#define SYS_ADC1IN7_SEL_Pos 0 //ADC1ģģͨ71 ¶ȴ 2 صѹ 3 RTCԴBG 4 ԴBG 5 PDM33 +#define SYS_ADC1IN7_SEL_Msk (0x0F << SYS_ADC1IN7_SEL_Pos) +#define SYS_ADC1IN7_IOON_Pos 4 //ADC1ģģͨ7IO +#define SYS_ADC1IN7_IOON_Msk (0x01 << SYS_ADC1IN7_IOON_Pos) + + + + +typedef struct { + __IO uint32_t PORTA_SEL; //PORTA_SEL[2n+2:2n]ӦֵPORTA.PINnóGPIOģ⡢ֵȹ + //ֵΪPORTA_PINn_FUNMUXʱPORTA.PINnſͨPORTA_MUXĴӵ + __IO uint32_t PORTB_SEL; + __IO uint32_t PORTC_SEL; - - uint32_t RESERVED[5]; - - __IO uint32_t PORTM_SEL0; - + + uint32_t RESERVED[5]; + + __IO uint32_t PORTM_SEL0; + __IO uint32_t PORTM_SEL1; - - uint32_t RESERVED2[2]; - + + uint32_t RESERVED2[2]; + __IO uint32_t PORTN_SEL0; - + __IO uint32_t PORTN_SEL1; - - uint32_t RESERVED3[2]; - + + uint32_t RESERVED3[2]; + __IO uint32_t PORTP_SEL0; - + __IO uint32_t PORTP_SEL1; - - uint32_t RESERVED4[46]; - + + uint32_t RESERVED4[46]; + __IO uint32_t PORTA_MUX0; - + __IO uint32_t PORTA_MUX1; - - uint32_t RESERVED5[2]; - + + uint32_t RESERVED5[2]; + __IO uint32_t PORTB_MUX0; - + __IO uint32_t PORTB_MUX1; - - uint32_t RESERVED6[2]; - + + uint32_t RESERVED6[2]; + __IO uint32_t PORTC_MUX0; - + __IO uint32_t PORTC_MUX1; - - uint32_t RESERVED7[14]; - + + uint32_t RESERVED7[14]; + __IO uint32_t PORTM_MUX0; - + __IO uint32_t PORTM_MUX1; __IO uint32_t PORTM_MUX2; - + __IO uint32_t PORTM_MUX3; - + __IO uint32_t PORTN_MUX0; - + __IO uint32_t PORTN_MUX1; - + __IO uint32_t PORTN_MUX2; - - uint32_t RESERVED8; - + + uint32_t RESERVED8; + __IO uint32_t PORTP_MUX0; - + __IO uint32_t PORTP_MUX1; - + __IO uint32_t PORTP_MUX2; - + __IO uint32_t PORTP_MUX3; - - uint32_t RESERVED9[28]; - - __IO uint32_t PORTA_PULLU; //上拉使能 - - uint32_t RESERVED10[3]; - + + uint32_t RESERVED9[28]; + + __IO uint32_t PORTA_PULLU; //ʹ + + uint32_t RESERVED10[3]; + __IO uint32_t PORTC_PULLU; - - uint32_t RESERVED11[3]; + + uint32_t RESERVED11[3]; __IO uint32_t PORTM_PULLU; - - uint32_t RESERVED12[3]; + + uint32_t RESERVED12[3]; __IO uint32_t PORTP_PULLU; - - uint32_t RESERVED13[51]; - - __IO uint32_t PORTB_PULLD; //下拉使能 - - uint32_t RESERVED14[3]; + + uint32_t RESERVED13[51]; + + __IO uint32_t PORTB_PULLD; //ʹ + + uint32_t RESERVED14[3]; __IO uint32_t PORTD_PULLD; - - uint32_t RESERVED15[3]; + + uint32_t RESERVED15[3]; __IO uint32_t PORTN_PULLD; - - uint32_t RESERVED16[135]; - - __IO uint32_t PORTM_DRIVS; //驱动强度 - - uint32_t RESERVED17[3]; + + uint32_t RESERVED16[135]; + + __IO uint32_t PORTM_DRIVS; //ǿ + + uint32_t RESERVED17[3]; __IO uint32_t PORTN_DRIVS; - - uint32_t RESERVED18[3]; + + uint32_t RESERVED18[3]; __IO uint32_t PORTP_DRIVS; - - uint32_t RESERVED19[39]; - - __IO uint32_t PORTA_INEN; //输入使能 - - uint32_t RESERVED20[3]; - + + uint32_t RESERVED19[39]; + + __IO uint32_t PORTA_INEN; //ʹ + + uint32_t RESERVED20[3]; + __IO uint32_t PORTB_INEN; - - uint32_t RESERVED21[3]; + + uint32_t RESERVED21[3]; __IO uint32_t PORTC_INEN; - - uint32_t RESERVED22[7]; + + uint32_t RESERVED22[7]; __IO uint32_t PORTM_INEN; - - uint32_t RESERVED23[3]; - + + uint32_t RESERVED23[3]; + __IO uint32_t PORTN_INEN; - - uint32_t RESERVED24[3]; + + uint32_t RESERVED24[3]; __IO uint32_t PORTP_INEN; } PORT_TypeDef; -#define PORT_PORTA_PULLU_PIN0_Pos 0 -#define PORT_PORTA_PULLU_PIN0_Msk (0x01 << PORT_PORTA_PULLU_PIN0_Pos) -#define PORT_PORTA_PULLU_PIN1_Pos 1 -#define PORT_PORTA_PULLU_PIN1_Msk (0x01 << PORT_PORTA_PULLU_PIN1_Pos) -#define PORT_PORTA_PULLU_PIN2_Pos 2 -#define PORT_PORTA_PULLU_PIN2_Msk (0x01 << PORT_PORTA_PULLU_PIN2_Pos) -#define PORT_PORTA_PULLU_PIN3_Pos 3 -#define PORT_PORTA_PULLU_PIN3_Msk (0x01 << PORT_PORTA_PULLU_PIN3_Pos) -#define PORT_PORTA_PULLU_PIN4_Pos 4 -#define PORT_PORTA_PULLU_PIN4_Msk (0x01 << PORT_PORTA_PULLU_PIN4_Pos) -#define PORT_PORTA_PULLU_PIN5_Pos 5 -#define PORT_PORTA_PULLU_PIN5_Msk (0x01 << PORT_PORTA_PULLU_PIN5_Pos) -#define PORT_PORTA_PULLU_PIN6_Pos 6 -#define PORT_PORTA_PULLU_PIN6_Msk (0x01 << PORT_PORTA_PULLU_PIN6_Pos) -#define PORT_PORTA_PULLU_PIN7_Pos 7 -#define PORT_PORTA_PULLU_PIN7_Msk (0x01 << PORT_PORTA_PULLU_PIN7_Pos) -#define PORT_PORTA_PULLU_PIN8_Pos 8 -#define PORT_PORTA_PULLU_PIN8_Msk (0x01 << PORT_PORTA_PULLU_PIN8_Pos) -#define PORT_PORTA_PULLU_PIN9_Pos 9 -#define PORT_PORTA_PULLU_PIN9_Msk (0x01 << PORT_PORTA_PULLU_PIN9_Pos) -#define PORT_PORTA_PULLU_PIN10_Pos 10 -#define PORT_PORTA_PULLU_PIN10_Msk (0x01 << PORT_PORTA_PULLU_PIN10_Pos) -#define PORT_PORTA_PULLU_PIN11_Pos 11 -#define PORT_PORTA_PULLU_PIN11_Msk (0x01 << PORT_PORTA_PULLU_PIN11_Pos) -#define PORT_PORTA_PULLU_PIN12_Pos 12 -#define PORT_PORTA_PULLU_PIN12_Msk (0x01 << PORT_PORTA_PULLU_PIN12_Pos) -#define PORT_PORTA_PULLU_PIN13_Pos 13 -#define PORT_PORTA_PULLU_PIN13_Msk (0x01 << PORT_PORTA_PULLU_PIN13_Pos) -#define PORT_PORTA_PULLU_PIN14_Pos 14 -#define PORT_PORTA_PULLU_PIN14_Msk (0x01 << PORT_PORTA_PULLU_PIN14_Pos) -#define PORT_PORTA_PULLU_PIN15_Pos 15 -#define PORT_PORTA_PULLU_PIN15_Msk (0x01 << PORT_PORTA_PULLU_PIN15_Pos) - -#define PORT_PORTC_PULLU_PIN0_Pos 0 -#define PORT_PORTC_PULLU_PIN0_Msk (0x01 << PORT_PORTC_PULLU_PIN0_Pos) -#define PORT_PORTC_PULLU_PIN1_Pos 1 -#define PORT_PORTC_PULLU_PIN1_Msk (0x01 << PORT_PORTC_PULLU_PIN1_Pos) -#define PORT_PORTC_PULLU_PIN2_Pos 2 -#define PORT_PORTC_PULLU_PIN2_Msk (0x01 << PORT_PORTC_PULLU_PIN2_Pos) -#define PORT_PORTC_PULLU_PIN3_Pos 3 -#define PORT_PORTC_PULLU_PIN3_Msk (0x01 << PORT_PORTC_PULLU_PIN3_Pos) -#define PORT_PORTC_PULLU_PIN4_Pos 4 -#define PORT_PORTC_PULLU_PIN4_Msk (0x01 << PORT_PORTC_PULLU_PIN4_Pos) -#define PORT_PORTC_PULLU_PIN5_Pos 5 -#define PORT_PORTC_PULLU_PIN5_Msk (0x01 << PORT_PORTC_PULLU_PIN5_Pos) -#define PORT_PORTC_PULLU_PIN6_Pos 6 -#define PORT_PORTC_PULLU_PIN6_Msk (0x01 << PORT_PORTC_PULLU_PIN6_Pos) -#define PORT_PORTC_PULLU_PIN7_Pos 7 -#define PORT_PORTC_PULLU_PIN7_Msk (0x01 << PORT_PORTC_PULLU_PIN7_Pos) -#define PORT_PORTC_PULLU_PIN8_Pos 8 -#define PORT_PORTC_PULLU_PIN8_Msk (0x01 << PORT_PORTC_PULLU_PIN8_Pos) -#define PORT_PORTC_PULLU_PIN9_Pos 9 -#define PORT_PORTC_PULLU_PIN9_Msk (0x01 << PORT_PORTC_PULLU_PIN9_Pos) -#define PORT_PORTC_PULLU_PIN10_Pos 10 -#define PORT_PORTC_PULLU_PIN10_Msk (0x01 << PORT_PORTC_PULLU_PIN10_Pos) -#define PORT_PORTC_PULLU_PIN11_Pos 11 -#define PORT_PORTC_PULLU_PIN11_Msk (0x01 << PORT_PORTC_PULLU_PIN11_Pos) -#define PORT_PORTC_PULLU_PIN12_Pos 12 -#define PORT_PORTC_PULLU_PIN12_Msk (0x01 << PORT_PORTC_PULLU_PIN12_Pos) -#define PORT_PORTC_PULLU_PIN13_Pos 13 -#define PORT_PORTC_PULLU_PIN13_Msk (0x01 << PORT_PORTC_PULLU_PIN13_Pos) -#define PORT_PORTC_PULLU_PIN14_Pos 14 -#define PORT_PORTC_PULLU_PIN14_Msk (0x01 << PORT_PORTC_PULLU_PIN14_Pos) -#define PORT_PORTC_PULLU_PIN15_Pos 15 -#define PORT_PORTC_PULLU_PIN15_Msk (0x01 << PORT_PORTC_PULLU_PIN15_Pos) - -#define PORT_PORTM_PULLU_PIN0_Pos 0 -#define PORT_PORTM_PULLU_PIN0_Msk (0x01 << PORT_PORTM_PULLU_PIN0_Pos) -#define PORT_PORTM_PULLU_PIN1_Pos 1 -#define PORT_PORTM_PULLU_PIN1_Msk (0x01 << PORT_PORTM_PULLU_PIN1_Pos) -#define PORT_PORTM_PULLU_PIN2_Pos 2 -#define PORT_PORTM_PULLU_PIN2_Msk (0x01 << PORT_PORTM_PULLU_PIN2_Pos) -#define PORT_PORTM_PULLU_PIN3_Pos 3 -#define PORT_PORTM_PULLU_PIN3_Msk (0x01 << PORT_PORTM_PULLU_PIN3_Pos) -#define PORT_PORTM_PULLU_PIN4_Pos 4 -#define PORT_PORTM_PULLU_PIN4_Msk (0x01 << PORT_PORTM_PULLU_PIN4_Pos) -#define PORT_PORTM_PULLU_PIN5_Pos 5 -#define PORT_PORTM_PULLU_PIN5_Msk (0x01 << PORT_PORTM_PULLU_PIN5_Pos) -#define PORT_PORTM_PULLU_PIN6_Pos 6 -#define PORT_PORTM_PULLU_PIN6_Msk (0x01 << PORT_PORTM_PULLU_PIN6_Pos) -#define PORT_PORTM_PULLU_PIN7_Pos 7 -#define PORT_PORTM_PULLU_PIN7_Msk (0x01 << PORT_PORTM_PULLU_PIN7_Pos) -#define PORT_PORTM_PULLU_PIN8_Pos 8 -#define PORT_PORTM_PULLU_PIN8_Msk (0x01 << PORT_PORTM_PULLU_PIN8_Pos) -#define PORT_PORTM_PULLU_PIN9_Pos 9 -#define PORT_PORTM_PULLU_PIN9_Msk (0x01 << PORT_PORTM_PULLU_PIN9_Pos) -#define PORT_PORTM_PULLU_PIN10_Pos 10 -#define PORT_PORTM_PULLU_PIN10_Msk (0x01 << PORT_PORTM_PULLU_PIN10_Pos) -#define PORT_PORTM_PULLU_PIN11_Pos 11 -#define PORT_PORTM_PULLU_PIN11_Msk (0x01 << PORT_PORTM_PULLU_PIN11_Pos) -#define PORT_PORTM_PULLU_PIN12_Pos 12 -#define PORT_PORTM_PULLU_PIN12_Msk (0x01 << PORT_PORTM_PULLU_PIN12_Pos) -#define PORT_PORTM_PULLU_PIN13_Pos 13 -#define PORT_PORTM_PULLU_PIN13_Msk (0x01 << PORT_PORTM_PULLU_PIN13_Pos) -#define PORT_PORTM_PULLU_PIN14_Pos 14 -#define PORT_PORTM_PULLU_PIN14_Msk (0x01 << PORT_PORTM_PULLU_PIN14_Pos) -#define PORT_PORTM_PULLU_PIN15_Pos 15 -#define PORT_PORTM_PULLU_PIN15_Msk (0x01 << PORT_PORTM_PULLU_PIN15_Pos) -#define PORT_PORTM_PULLU_PIN16_Pos 16 -#define PORT_PORTM_PULLU_PIN16_Msk (0x01 << PORT_PORTM_PULLU_PIN16_Pos) -#define PORT_PORTM_PULLU_PIN17_Pos 17 -#define PORT_PORTM_PULLU_PIN17_Msk (0x01 << PORT_PORTM_PULLU_PIN17_Pos) -#define PORT_PORTM_PULLU_PIN18_Pos 18 -#define PORT_PORTM_PULLU_PIN18_Msk (0x01 << PORT_PORTM_PULLU_PIN18_Pos) -#define PORT_PORTM_PULLU_PIN19_Pos 19 -#define PORT_PORTM_PULLU_PIN19_Msk (0x01 << PORT_PORTM_PULLU_PIN19_Pos) -#define PORT_PORTM_PULLU_PIN20_Pos 20 -#define PORT_PORTM_PULLU_PIN20_Msk (0x01 << PORT_PORTM_PULLU_PIN20_Pos) -#define PORT_PORTM_PULLU_PIN21_Pos 21 -#define PORT_PORTM_PULLU_PIN21_Msk (0x01 << PORT_PORTM_PULLU_PIN21_Pos) -#define PORT_PORTM_PULLU_PIN22_Pos 22 -#define PORT_PORTM_PULLU_PIN22_Msk (0x01 << PORT_PORTM_PULLU_PIN22_Pos) -#define PORT_PORTM_PULLU_PIN23_Pos 23 -#define PORT_PORTM_PULLU_PIN23_Msk (0x01 << PORT_PORTM_PULLU_PIN23_Pos) - -#define PORT_PORTP_PULLU_PIN0_Pos 0 -#define PORT_PORTP_PULLU_PIN0_Msk (0x01 << PORT_PORTP_PULLU_PIN0_Pos) -#define PORT_PORTP_PULLU_PIN1_Pos 1 -#define PORT_PORTP_PULLU_PIN1_Msk (0x01 << PORT_PORTP_PULLU_PIN1_Pos) -#define PORT_PORTP_PULLU_PIN2_Pos 2 -#define PORT_PORTP_PULLU_PIN2_Msk (0x01 << PORT_PORTP_PULLU_PIN2_Pos) -#define PORT_PORTP_PULLU_PIN3_Pos 3 -#define PORT_PORTP_PULLU_PIN3_Msk (0x01 << PORT_PORTP_PULLU_PIN3_Pos) -#define PORT_PORTP_PULLU_PIN4_Pos 4 -#define PORT_PORTP_PULLU_PIN4_Msk (0x01 << PORT_PORTP_PULLU_PIN4_Pos) -#define PORT_PORTP_PULLU_PIN5_Pos 5 -#define PORT_PORTP_PULLU_PIN5_Msk (0x01 << PORT_PORTP_PULLU_PIN5_Pos) -#define PORT_PORTP_PULLU_PIN6_Pos 6 -#define PORT_PORTP_PULLU_PIN6_Msk (0x01 << PORT_PORTP_PULLU_PIN6_Pos) -#define PORT_PORTP_PULLU_PIN7_Pos 7 -#define PORT_PORTP_PULLU_PIN7_Msk (0x01 << PORT_PORTP_PULLU_PIN7_Pos) -#define PORT_PORTP_PULLU_PIN8_Pos 8 -#define PORT_PORTP_PULLU_PIN8_Msk (0x01 << PORT_PORTP_PULLU_PIN8_Pos) -#define PORT_PORTP_PULLU_PIN9_Pos 9 -#define PORT_PORTP_PULLU_PIN9_Msk (0x01 << PORT_PORTP_PULLU_PIN9_Pos) -#define PORT_PORTP_PULLU_PIN10_Pos 10 -#define PORT_PORTP_PULLU_PIN10_Msk (0x01 << PORT_PORTP_PULLU_PIN10_Pos) -#define PORT_PORTP_PULLU_PIN11_Pos 11 -#define PORT_PORTP_PULLU_PIN11_Msk (0x01 << PORT_PORTP_PULLU_PIN11_Pos) -#define PORT_PORTP_PULLU_PIN12_Pos 12 -#define PORT_PORTP_PULLU_PIN12_Msk (0x01 << PORT_PORTP_PULLU_PIN12_Pos) -#define PORT_PORTP_PULLU_PIN13_Pos 13 -#define PORT_PORTP_PULLU_PIN13_Msk (0x01 << PORT_PORTP_PULLU_PIN13_Pos) -#define PORT_PORTP_PULLU_PIN14_Pos 14 -#define PORT_PORTP_PULLU_PIN14_Msk (0x01 << PORT_PORTP_PULLU_PIN14_Pos) -#define PORT_PORTP_PULLU_PIN15_Pos 15 -#define PORT_PORTP_PULLU_PIN15_Msk (0x01 << PORT_PORTP_PULLU_PIN15_Pos) -#define PORT_PORTP_PULLU_PIN16_Pos 16 -#define PORT_PORTP_PULLU_PIN16_Msk (0x01 << PORT_PORTP_PULLU_PIN16_Pos) -#define PORT_PORTP_PULLU_PIN17_Pos 17 -#define PORT_PORTP_PULLU_PIN17_Msk (0x01 << PORT_PORTP_PULLU_PIN17_Pos) -#define PORT_PORTP_PULLU_PIN18_Pos 18 -#define PORT_PORTP_PULLU_PIN18_Msk (0x01 << PORT_PORTP_PULLU_PIN18_Pos) -#define PORT_PORTP_PULLU_PIN19_Pos 19 -#define PORT_PORTP_PULLU_PIN19_Msk (0x01 << PORT_PORTP_PULLU_PIN19_Pos) -#define PORT_PORTP_PULLU_PIN20_Pos 20 -#define PORT_PORTP_PULLU_PIN20_Msk (0x01 << PORT_PORTP_PULLU_PIN20_Pos) -#define PORT_PORTP_PULLU_PIN21_Pos 21 -#define PORT_PORTP_PULLU_PIN21_Msk (0x01 << PORT_PORTP_PULLU_PIN21_Pos) -#define PORT_PORTP_PULLU_PIN22_Pos 22 -#define PORT_PORTP_PULLU_PIN22_Msk (0x01 << PORT_PORTP_PULLU_PIN22_Pos) -#define PORT_PORTP_PULLU_PIN23_Pos 23 -#define PORT_PORTP_PULLU_PIN23_Msk (0x01 << PORT_PORTP_PULLU_PIN23_Pos) - -#define PORT_PORTB_PULLD_PIN0_Pos 0 -#define PORT_PORTB_PULLD_PIN0_Msk (0x01 << PORT_PORTB_PULLD_PIN0_Pos) -#define PORT_PORTB_PULLD_PIN1_Pos 1 -#define PORT_PORTB_PULLD_PIN1_Msk (0x01 << PORT_PORTB_PULLD_PIN1_Pos) -#define PORT_PORTB_PULLD_PIN2_Pos 2 -#define PORT_PORTB_PULLD_PIN2_Msk (0x01 << PORT_PORTB_PULLD_PIN2_Pos) -#define PORT_PORTB_PULLD_PIN3_Pos 3 -#define PORT_PORTB_PULLD_PIN3_Msk (0x01 << PORT_PORTB_PULLD_PIN3_Pos) -#define PORT_PORTB_PULLD_PIN4_Pos 4 -#define PORT_PORTB_PULLD_PIN4_Msk (0x01 << PORT_PORTB_PULLD_PIN4_Pos) -#define PORT_PORTB_PULLD_PIN5_Pos 5 -#define PORT_PORTB_PULLD_PIN5_Msk (0x01 << PORT_PORTB_PULLD_PIN5_Pos) -#define PORT_PORTB_PULLD_PIN6_Pos 6 -#define PORT_PORTB_PULLD_PIN6_Msk (0x01 << PORT_PORTB_PULLD_PIN6_Pos) -#define PORT_PORTB_PULLD_PIN7_Pos 7 -#define PORT_PORTB_PULLD_PIN7_Msk (0x01 << PORT_PORTB_PULLD_PIN7_Pos) -#define PORT_PORTB_PULLD_PIN8_Pos 8 -#define PORT_PORTB_PULLD_PIN8_Msk (0x01 << PORT_PORTB_PULLD_PIN8_Pos) -#define PORT_PORTB_PULLD_PIN9_Pos 9 -#define PORT_PORTB_PULLD_PIN9_Msk (0x01 << PORT_PORTB_PULLD_PIN9_Pos) -#define PORT_PORTB_PULLD_PIN10_Pos 10 -#define PORT_PORTB_PULLD_PIN10_Msk (0x01 << PORT_PORTB_PULLD_PIN10_Pos) -#define PORT_PORTB_PULLD_PIN11_Pos 11 -#define PORT_PORTB_PULLD_PIN11_Msk (0x01 << PORT_PORTB_PULLD_PIN11_Pos) -#define PORT_PORTB_PULLD_PIN12_Pos 12 -#define PORT_PORTB_PULLD_PIN12_Msk (0x01 << PORT_PORTB_PULLD_PIN12_Pos) -#define PORT_PORTB_PULLD_PIN13_Pos 13 -#define PORT_PORTB_PULLD_PIN13_Msk (0x01 << PORT_PORTB_PULLD_PIN13_Pos) -#define PORT_PORTB_PULLD_PIN14_Pos 14 -#define PORT_PORTB_PULLD_PIN14_Msk (0x01 << PORT_PORTB_PULLD_PIN14_Pos) -#define PORT_PORTB_PULLD_PIN15_Pos 15 -#define PORT_PORTB_PULLD_PIN15_Msk (0x01 << PORT_PORTB_PULLD_PIN15_Pos) - -#define PORT_PORTN_PULLD_PIN0_Pos 0 -#define PORT_PORTN_PULLD_PIN0_Msk (0x01 << PORT_PORTN_PULLD_PIN0_Pos) -#define PORT_PORTN_PULLD_PIN1_Pos 1 -#define PORT_PORTN_PULLD_PIN1_Msk (0x01 << PORT_PORTN_PULLD_PIN1_Pos) -#define PORT_PORTN_PULLD_PIN2_Pos 2 -#define PORT_PORTN_PULLD_PIN2_Msk (0x01 << PORT_PORTN_PULLD_PIN2_Pos) -#define PORT_PORTN_PULLD_PIN3_Pos 3 -#define PORT_PORTN_PULLD_PIN3_Msk (0x01 << PORT_PORTN_PULLD_PIN3_Pos) -#define PORT_PORTN_PULLD_PIN4_Pos 4 -#define PORT_PORTN_PULLD_PIN4_Msk (0x01 << PORT_PORTN_PULLD_PIN4_Pos) -#define PORT_PORTN_PULLD_PIN5_Pos 5 -#define PORT_PORTN_PULLD_PIN5_Msk (0x01 << PORT_PORTN_PULLD_PIN5_Pos) -#define PORT_PORTN_PULLD_PIN6_Pos 6 -#define PORT_PORTN_PULLD_PIN6_Msk (0x01 << PORT_PORTN_PULLD_PIN6_Pos) -#define PORT_PORTN_PULLD_PIN7_Pos 7 -#define PORT_PORTN_PULLD_PIN7_Msk (0x01 << PORT_PORTN_PULLD_PIN7_Pos) -#define PORT_PORTN_PULLD_PIN8_Pos 8 -#define PORT_PORTN_PULLD_PIN8_Msk (0x01 << PORT_PORTN_PULLD_PIN8_Pos) -#define PORT_PORTN_PULLD_PIN9_Pos 9 -#define PORT_PORTN_PULLD_PIN9_Msk (0x01 << PORT_PORTN_PULLD_PIN9_Pos) -#define PORT_PORTN_PULLD_PIN10_Pos 10 -#define PORT_PORTN_PULLD_PIN10_Msk (0x01 << PORT_PORTN_PULLD_PIN10_Pos) -#define PORT_PORTN_PULLD_PIN11_Pos 11 -#define PORT_PORTN_PULLD_PIN11_Msk (0x01 << PORT_PORTN_PULLD_PIN11_Pos) -#define PORT_PORTN_PULLD_PIN12_Pos 12 -#define PORT_PORTN_PULLD_PIN12_Msk (0x01 << PORT_PORTN_PULLD_PIN12_Pos) -#define PORT_PORTN_PULLD_PIN13_Pos 13 -#define PORT_PORTN_PULLD_PIN13_Msk (0x01 << PORT_PORTN_PULLD_PIN13_Pos) -#define PORT_PORTN_PULLD_PIN14_Pos 14 -#define PORT_PORTN_PULLD_PIN14_Msk (0x01 << PORT_PORTN_PULLD_PIN14_Pos) -#define PORT_PORTN_PULLD_PIN15_Pos 15 -#define PORT_PORTN_PULLD_PIN15_Msk (0x01 << PORT_PORTN_PULLD_PIN15_Pos) -#define PORT_PORTN_PULLD_PIN16_Pos 16 -#define PORT_PORTN_PULLD_PIN16_Msk (0x01 << PORT_PORTN_PULLD_PIN16_Pos) -#define PORT_PORTN_PULLD_PIN17_Pos 17 -#define PORT_PORTN_PULLD_PIN17_Msk (0x01 << PORT_PORTN_PULLD_PIN17_Pos) -#define PORT_PORTN_PULLD_PIN18_Pos 18 -#define PORT_PORTN_PULLD_PIN18_Msk (0x01 << PORT_PORTN_PULLD_PIN18_Pos) -#define PORT_PORTN_PULLD_PIN19_Pos 19 -#define PORT_PORTN_PULLD_PIN19_Msk (0x01 << PORT_PORTN_PULLD_PIN19_Pos) -#define PORT_PORTN_PULLD_PIN20_Pos 20 -#define PORT_PORTN_PULLD_PIN20_Msk (0x01 << PORT_PORTN_PULLD_PIN20_Pos) -#define PORT_PORTN_PULLD_PIN21_Pos 21 -#define PORT_PORTN_PULLD_PIN21_Msk (0x01 << PORT_PORTN_PULLD_PIN21_Pos) -#define PORT_PORTN_PULLD_PIN22_Pos 22 -#define PORT_PORTN_PULLD_PIN22_Msk (0x01 << PORT_PORTN_PULLD_PIN22_Pos) -#define PORT_PORTN_PULLD_PIN23_Pos 23 -#define PORT_PORTN_PULLD_PIN23_Msk (0x01 << PORT_PORTN_PULLD_PIN23_Pos) - -#define PORT_PORTM_DRIVS_PIN0_Pos 0 -#define PORT_PORTM_DRIVS_PIN0_Msk (0x01 << PORT_PORTM_DRIVS_PIN0_Pos) -#define PORT_PORTM_DRIVS_PIN1_Pos 1 -#define PORT_PORTM_DRIVS_PIN1_Msk (0x01 << PORT_PORTM_DRIVS_PIN1_Pos) -#define PORT_PORTM_DRIVS_PIN2_Pos 2 -#define PORT_PORTM_DRIVS_PIN2_Msk (0x01 << PORT_PORTM_DRIVS_PIN2_Pos) -#define PORT_PORTM_DRIVS_PIN3_Pos 3 -#define PORT_PORTM_DRIVS_PIN3_Msk (0x01 << PORT_PORTM_DRIVS_PIN3_Pos) -#define PORT_PORTM_DRIVS_PIN4_Pos 4 -#define PORT_PORTM_DRIVS_PIN4_Msk (0x01 << PORT_PORTM_DRIVS_PIN4_Pos) -#define PORT_PORTM_DRIVS_PIN5_Pos 5 -#define PORT_PORTM_DRIVS_PIN5_Msk (0x01 << PORT_PORTM_DRIVS_PIN5_Pos) -#define PORT_PORTM_DRIVS_PIN6_Pos 6 -#define PORT_PORTM_DRIVS_PIN6_Msk (0x01 << PORT_PORTM_DRIVS_PIN6_Pos) -#define PORT_PORTM_DRIVS_PIN7_Pos 7 -#define PORT_PORTM_DRIVS_PIN7_Msk (0x01 << PORT_PORTM_DRIVS_PIN7_Pos) -#define PORT_PORTM_DRIVS_PIN8_Pos 8 -#define PORT_PORTM_DRIVS_PIN8_Msk (0x01 << PORT_PORTM_DRIVS_PIN8_Pos) -#define PORT_PORTM_DRIVS_PIN9_Pos 9 -#define PORT_PORTM_DRIVS_PIN9_Msk (0x01 << PORT_PORTM_DRIVS_PIN9_Pos) -#define PORT_PORTM_DRIVS_PIN10_Pos 10 -#define PORT_PORTM_DRIVS_PIN10_Msk (0x01 << PORT_PORTM_DRIVS_PIN10_Pos) -#define PORT_PORTM_DRIVS_PIN11_Pos 11 -#define PORT_PORTM_DRIVS_PIN11_Msk (0x01 << PORT_PORTM_DRIVS_PIN11_Pos) -#define PORT_PORTM_DRIVS_PIN12_Pos 12 -#define PORT_PORTM_DRIVS_PIN12_Msk (0x01 << PORT_PORTM_DRIVS_PIN12_Pos) -#define PORT_PORTM_DRIVS_PIN13_Pos 13 -#define PORT_PORTM_DRIVS_PIN13_Msk (0x01 << PORT_PORTM_DRIVS_PIN13_Pos) -#define PORT_PORTM_DRIVS_PIN14_Pos 14 -#define PORT_PORTM_DRIVS_PIN14_Msk (0x01 << PORT_PORTM_DRIVS_PIN14_Pos) -#define PORT_PORTM_DRIVS_PIN15_Pos 15 -#define PORT_PORTM_DRIVS_PIN15_Msk (0x01 << PORT_PORTM_DRIVS_PIN15_Pos) -#define PORT_PORTM_DRIVS_PIN16_Pos 16 -#define PORT_PORTM_DRIVS_PIN16_Msk (0x01 << PORT_PORTM_DRIVS_PIN16_Pos) -#define PORT_PORTM_DRIVS_PIN17_Pos 17 -#define PORT_PORTM_DRIVS_PIN17_Msk (0x01 << PORT_PORTM_DRIVS_PIN17_Pos) -#define PORT_PORTM_DRIVS_PIN18_Pos 18 -#define PORT_PORTM_DRIVS_PIN18_Msk (0x01 << PORT_PORTM_DRIVS_PIN18_Pos) -#define PORT_PORTM_DRIVS_PIN19_Pos 19 -#define PORT_PORTM_DRIVS_PIN19_Msk (0x01 << PORT_PORTM_DRIVS_PIN19_Pos) -#define PORT_PORTM_DRIVS_PIN20_Pos 20 -#define PORT_PORTM_DRIVS_PIN20_Msk (0x01 << PORT_PORTM_DRIVS_PIN20_Pos) -#define PORT_PORTM_DRIVS_PIN21_Pos 21 -#define PORT_PORTM_DRIVS_PIN21_Msk (0x01 << PORT_PORTM_DRIVS_PIN21_Pos) -#define PORT_PORTM_DRIVS_PIN22_Pos 22 -#define PORT_PORTM_DRIVS_PIN22_Msk (0x01 << PORT_PORTM_DRIVS_PIN22_Pos) -#define PORT_PORTM_DRIVS_PIN23_Pos 23 -#define PORT_PORTM_DRIVS_PIN23_Msk (0x01 << PORT_PORTM_DRIVS_PIN23_Pos) - -#define PORT_PORTN_DRIVS_PIN0_Pos 0 -#define PORT_PORTN_DRIVS_PIN0_Msk (0x01 << PORT_PORTN_DRIVS_PIN0_Pos) -#define PORT_PORTN_DRIVS_PIN1_Pos 1 -#define PORT_PORTN_DRIVS_PIN1_Msk (0x01 << PORT_PORTN_DRIVS_PIN1_Pos) -#define PORT_PORTN_DRIVS_PIN2_Pos 2 -#define PORT_PORTN_DRIVS_PIN2_Msk (0x01 << PORT_PORTN_DRIVS_PIN2_Pos) -#define PORT_PORTN_DRIVS_PIN3_Pos 3 -#define PORT_PORTN_DRIVS_PIN3_Msk (0x01 << PORT_PORTN_DRIVS_PIN3_Pos) -#define PORT_PORTN_DRIVS_PIN4_Pos 4 -#define PORT_PORTN_DRIVS_PIN4_Msk (0x01 << PORT_PORTN_DRIVS_PIN4_Pos) -#define PORT_PORTN_DRIVS_PIN5_Pos 5 -#define PORT_PORTN_DRIVS_PIN5_Msk (0x01 << PORT_PORTN_DRIVS_PIN5_Pos) -#define PORT_PORTN_DRIVS_PIN6_Pos 6 -#define PORT_PORTN_DRIVS_PIN6_Msk (0x01 << PORT_PORTN_DRIVS_PIN6_Pos) -#define PORT_PORTN_DRIVS_PIN7_Pos 7 -#define PORT_PORTN_DRIVS_PIN7_Msk (0x01 << PORT_PORTN_DRIVS_PIN7_Pos) -#define PORT_PORTN_DRIVS_PIN8_Pos 8 -#define PORT_PORTN_DRIVS_PIN8_Msk (0x01 << PORT_PORTN_DRIVS_PIN8_Pos) -#define PORT_PORTN_DRIVS_PIN9_Pos 9 -#define PORT_PORTN_DRIVS_PIN9_Msk (0x01 << PORT_PORTN_DRIVS_PIN9_Pos) -#define PORT_PORTN_DRIVS_PIN10_Pos 10 -#define PORT_PORTN_DRIVS_PIN10_Msk (0x01 << PORT_PORTN_DRIVS_PIN10_Pos) -#define PORT_PORTN_DRIVS_PIN11_Pos 11 -#define PORT_PORTN_DRIVS_PIN11_Msk (0x01 << PORT_PORTN_DRIVS_PIN11_Pos) -#define PORT_PORTN_DRIVS_PIN12_Pos 12 -#define PORT_PORTN_DRIVS_PIN12_Msk (0x01 << PORT_PORTN_DRIVS_PIN12_Pos) -#define PORT_PORTN_DRIVS_PIN13_Pos 13 -#define PORT_PORTN_DRIVS_PIN13_Msk (0x01 << PORT_PORTN_DRIVS_PIN13_Pos) -#define PORT_PORTN_DRIVS_PIN14_Pos 14 -#define PORT_PORTN_DRIVS_PIN14_Msk (0x01 << PORT_PORTN_DRIVS_PIN14_Pos) -#define PORT_PORTN_DRIVS_PIN15_Pos 15 -#define PORT_PORTN_DRIVS_PIN15_Msk (0x01 << PORT_PORTN_DRIVS_PIN15_Pos) -#define PORT_PORTN_DRIVS_PIN16_Pos 16 -#define PORT_PORTN_DRIVS_PIN16_Msk (0x01 << PORT_PORTN_DRIVS_PIN16_Pos) -#define PORT_PORTN_DRIVS_PIN17_Pos 17 -#define PORT_PORTN_DRIVS_PIN17_Msk (0x01 << PORT_PORTN_DRIVS_PIN17_Pos) -#define PORT_PORTN_DRIVS_PIN18_Pos 18 -#define PORT_PORTN_DRIVS_PIN18_Msk (0x01 << PORT_PORTN_DRIVS_PIN18_Pos) -#define PORT_PORTN_DRIVS_PIN19_Pos 19 -#define PORT_PORTN_DRIVS_PIN19_Msk (0x01 << PORT_PORTN_DRIVS_PIN19_Pos) -#define PORT_PORTN_DRIVS_PIN20_Pos 20 -#define PORT_PORTN_DRIVS_PIN20_Msk (0x01 << PORT_PORTN_DRIVS_PIN20_Pos) -#define PORT_PORTN_DRIVS_PIN21_Pos 21 -#define PORT_PORTN_DRIVS_PIN21_Msk (0x01 << PORT_PORTN_DRIVS_PIN21_Pos) -#define PORT_PORTN_DRIVS_PIN22_Pos 22 -#define PORT_PORTN_DRIVS_PIN22_Msk (0x01 << PORT_PORTN_DRIVS_PIN22_Pos) -#define PORT_PORTN_DRIVS_PIN23_Pos 23 -#define PORT_PORTN_DRIVS_PIN23_Msk (0x01 << PORT_PORTN_DRIVS_PIN23_Pos) - -#define PORT_PORTP_DRIVS_PIN0_Pos 0 -#define PORT_PORTP_DRIVS_PIN0_Msk (0x01 << PORT_PORTP_DRIVS_PIN0_Pos) -#define PORT_PORTP_DRIVS_PIN1_Pos 1 -#define PORT_PORTP_DRIVS_PIN1_Msk (0x01 << PORT_PORTP_DRIVS_PIN1_Pos) -#define PORT_PORTP_DRIVS_PIN2_Pos 2 -#define PORT_PORTP_DRIVS_PIN2_Msk (0x01 << PORT_PORTP_DRIVS_PIN2_Pos) -#define PORT_PORTP_DRIVS_PIN3_Pos 3 -#define PORT_PORTP_DRIVS_PIN3_Msk (0x01 << PORT_PORTP_DRIVS_PIN3_Pos) -#define PORT_PORTP_DRIVS_PIN4_Pos 4 -#define PORT_PORTP_DRIVS_PIN4_Msk (0x01 << PORT_PORTP_DRIVS_PIN4_Pos) -#define PORT_PORTP_DRIVS_PIN5_Pos 5 -#define PORT_PORTP_DRIVS_PIN5_Msk (0x01 << PORT_PORTP_DRIVS_PIN5_Pos) -#define PORT_PORTP_DRIVS_PIN6_Pos 6 -#define PORT_PORTP_DRIVS_PIN6_Msk (0x01 << PORT_PORTP_DRIVS_PIN6_Pos) -#define PORT_PORTP_DRIVS_PIN7_Pos 7 -#define PORT_PORTP_DRIVS_PIN7_Msk (0x01 << PORT_PORTP_DRIVS_PIN7_Pos) -#define PORT_PORTP_DRIVS_PIN8_Pos 8 -#define PORT_PORTP_DRIVS_PIN8_Msk (0x01 << PORT_PORTP_DRIVS_PIN8_Pos) -#define PORT_PORTP_DRIVS_PIN9_Pos 9 -#define PORT_PORTP_DRIVS_PIN9_Msk (0x01 << PORT_PORTP_DRIVS_PIN9_Pos) -#define PORT_PORTP_DRIVS_PIN10_Pos 10 -#define PORT_PORTP_DRIVS_PIN10_Msk (0x01 << PORT_PORTP_DRIVS_PIN10_Pos) -#define PORT_PORTP_DRIVS_PIN11_Pos 11 -#define PORT_PORTP_DRIVS_PIN11_Msk (0x01 << PORT_PORTP_DRIVS_PIN11_Pos) -#define PORT_PORTP_DRIVS_PIN12_Pos 12 -#define PORT_PORTP_DRIVS_PIN12_Msk (0x01 << PORT_PORTP_DRIVS_PIN12_Pos) -#define PORT_PORTP_DRIVS_PIN13_Pos 13 -#define PORT_PORTP_DRIVS_PIN13_Msk (0x01 << PORT_PORTP_DRIVS_PIN13_Pos) -#define PORT_PORTP_DRIVS_PIN14_Pos 14 -#define PORT_PORTP_DRIVS_PIN14_Msk (0x01 << PORT_PORTP_DRIVS_PIN14_Pos) -#define PORT_PORTP_DRIVS_PIN15_Pos 15 -#define PORT_PORTP_DRIVS_PIN15_Msk (0x01 << PORT_PORTP_DRIVS_PIN15_Pos) -#define PORT_PORTP_DRIVS_PIN16_Pos 16 -#define PORT_PORTP_DRIVS_PIN16_Msk (0x01 << PORT_PORTP_DRIVS_PIN16_Pos) -#define PORT_PORTP_DRIVS_PIN17_Pos 17 -#define PORT_PORTP_DRIVS_PIN17_Msk (0x01 << PORT_PORTP_DRIVS_PIN17_Pos) -#define PORT_PORTP_DRIVS_PIN18_Pos 18 -#define PORT_PORTP_DRIVS_PIN18_Msk (0x01 << PORT_PORTP_DRIVS_PIN18_Pos) -#define PORT_PORTP_DRIVS_PIN19_Pos 19 -#define PORT_PORTP_DRIVS_PIN19_Msk (0x01 << PORT_PORTP_DRIVS_PIN19_Pos) -#define PORT_PORTP_DRIVS_PIN20_Pos 20 -#define PORT_PORTP_DRIVS_PIN20_Msk (0x01 << PORT_PORTP_DRIVS_PIN20_Pos) -#define PORT_PORTP_DRIVS_PIN21_Pos 21 -#define PORT_PORTP_DRIVS_PIN21_Msk (0x01 << PORT_PORTP_DRIVS_PIN21_Pos) -#define PORT_PORTP_DRIVS_PIN22_Pos 22 -#define PORT_PORTP_DRIVS_PIN22_Msk (0x01 << PORT_PORTP_DRIVS_PIN22_Pos) -#define PORT_PORTP_DRIVS_PIN23_Pos 23 -#define PORT_PORTP_DRIVS_PIN23_Msk (0x01 << PORT_PORTP_DRIVS_PIN23_Pos) - -#define PORT_PORTA_INEN_PIN0_Pos 0 -#define PORT_PORTA_INEN_PIN0_Msk (0x01 << PORT_PORTA_INEN_PIN0_Pos) -#define PORT_PORTA_INEN_PIN1_Pos 1 -#define PORT_PORTA_INEN_PIN1_Msk (0x01 << PORT_PORTA_INEN_PIN1_Pos) -#define PORT_PORTA_INEN_PIN2_Pos 2 -#define PORT_PORTA_INEN_PIN2_Msk (0x01 << PORT_PORTA_INEN_PIN2_Pos) -#define PORT_PORTA_INEN_PIN3_Pos 3 -#define PORT_PORTA_INEN_PIN3_Msk (0x01 << PORT_PORTA_INEN_PIN3_Pos) -#define PORT_PORTA_INEN_PIN4_Pos 4 -#define PORT_PORTA_INEN_PIN4_Msk (0x01 << PORT_PORTA_INEN_PIN4_Pos) -#define PORT_PORTA_INEN_PIN5_Pos 5 -#define PORT_PORTA_INEN_PIN5_Msk (0x01 << PORT_PORTA_INEN_PIN5_Pos) -#define PORT_PORTA_INEN_PIN6_Pos 6 -#define PORT_PORTA_INEN_PIN6_Msk (0x01 << PORT_PORTA_INEN_PIN6_Pos) -#define PORT_PORTA_INEN_PIN7_Pos 7 -#define PORT_PORTA_INEN_PIN7_Msk (0x01 << PORT_PORTA_INEN_PIN7_Pos) -#define PORT_PORTA_INEN_PIN8_Pos 8 -#define PORT_PORTA_INEN_PIN8_Msk (0x01 << PORT_PORTA_INEN_PIN8_Pos) -#define PORT_PORTA_INEN_PIN9_Pos 9 -#define PORT_PORTA_INEN_PIN9_Msk (0x01 << PORT_PORTA_INEN_PIN9_Pos) -#define PORT_PORTA_INEN_PIN10_Pos 10 -#define PORT_PORTA_INEN_PIN10_Msk (0x01 << PORT_PORTA_INEN_PIN10_Pos) -#define PORT_PORTA_INEN_PIN11_Pos 11 -#define PORT_PORTA_INEN_PIN11_Msk (0x01 << PORT_PORTA_INEN_PIN11_Pos) -#define PORT_PORTA_INEN_PIN12_Pos 12 -#define PORT_PORTA_INEN_PIN12_Msk (0x01 << PORT_PORTA_INEN_PIN12_Pos) -#define PORT_PORTA_INEN_PIN13_Pos 13 -#define PORT_PORTA_INEN_PIN13_Msk (0x01 << PORT_PORTA_INEN_PIN13_Pos) -#define PORT_PORTA_INEN_PIN14_Pos 14 -#define PORT_PORTA_INEN_PIN14_Msk (0x01 << PORT_PORTA_INEN_PIN14_Pos) -#define PORT_PORTA_INEN_PIN15_Pos 15 -#define PORT_PORTA_INEN_PIN15_Msk (0x01 << PORT_PORTA_INEN_PIN15_Pos) - -#define PORT_PORTB_INEN_PIN0_Pos 0 -#define PORT_PORTB_INEN_PIN0_Msk (0x01 << PORT_PORTB_INEN_PIN0_Pos) -#define PORT_PORTB_INEN_PIN1_Pos 1 -#define PORT_PORTB_INEN_PIN1_Msk (0x01 << PORT_PORTB_INEN_PIN1_Pos) -#define PORT_PORTB_INEN_PIN2_Pos 2 -#define PORT_PORTB_INEN_PIN2_Msk (0x01 << PORT_PORTB_INEN_PIN2_Pos) -#define PORT_PORTB_INEN_PIN3_Pos 3 -#define PORT_PORTB_INEN_PIN3_Msk (0x01 << PORT_PORTB_INEN_PIN3_Pos) -#define PORT_PORTB_INEN_PIN4_Pos 4 -#define PORT_PORTB_INEN_PIN4_Msk (0x01 << PORT_PORTB_INEN_PIN4_Pos) -#define PORT_PORTB_INEN_PIN5_Pos 5 -#define PORT_PORTB_INEN_PIN5_Msk (0x01 << PORT_PORTB_INEN_PIN5_Pos) -#define PORT_PORTB_INEN_PIN6_Pos 6 -#define PORT_PORTB_INEN_PIN6_Msk (0x01 << PORT_PORTB_INEN_PIN6_Pos) -#define PORT_PORTB_INEN_PIN7_Pos 7 -#define PORT_PORTB_INEN_PIN7_Msk (0x01 << PORT_PORTB_INEN_PIN7_Pos) -#define PORT_PORTB_INEN_PIN8_Pos 8 -#define PORT_PORTB_INEN_PIN8_Msk (0x01 << PORT_PORTB_INEN_PIN8_Pos) -#define PORT_PORTB_INEN_PIN9_Pos 9 -#define PORT_PORTB_INEN_PIN9_Msk (0x01 << PORT_PORTB_INEN_PIN9_Pos) -#define PORT_PORTB_INEN_PIN10_Pos 10 -#define PORT_PORTB_INEN_PIN10_Msk (0x01 << PORT_PORTB_INEN_PIN10_Pos) -#define PORT_PORTB_INEN_PIN11_Pos 11 -#define PORT_PORTB_INEN_PIN11_Msk (0x01 << PORT_PORTB_INEN_PIN11_Pos) -#define PORT_PORTB_INEN_PIN12_Pos 12 -#define PORT_PORTB_INEN_PIN12_Msk (0x01 << PORT_PORTB_INEN_PIN12_Pos) -#define PORT_PORTB_INEN_PIN13_Pos 13 -#define PORT_PORTB_INEN_PIN13_Msk (0x01 << PORT_PORTB_INEN_PIN13_Pos) -#define PORT_PORTB_INEN_PIN14_Pos 14 -#define PORT_PORTB_INEN_PIN14_Msk (0x01 << PORT_PORTB_INEN_PIN14_Pos) -#define PORT_PORTB_INEN_PIN15_Pos 15 -#define PORT_PORTB_INEN_PIN15_Msk (0x01 << PORT_PORTB_INEN_PIN15_Pos) - -#define PORT_PORTC_INEN_PIN0_Pos 0 -#define PORT_PORTC_INEN_PIN0_Msk (0x01 << PORT_PORTC_INEN_PIN0_Pos) -#define PORT_PORTC_INEN_PIN1_Pos 1 -#define PORT_PORTC_INEN_PIN1_Msk (0x01 << PORT_PORTC_INEN_PIN1_Pos) -#define PORT_PORTC_INEN_PIN2_Pos 2 -#define PORT_PORTC_INEN_PIN2_Msk (0x01 << PORT_PORTC_INEN_PIN2_Pos) -#define PORT_PORTC_INEN_PIN3_Pos 3 -#define PORT_PORTC_INEN_PIN3_Msk (0x01 << PORT_PORTC_INEN_PIN3_Pos) -#define PORT_PORTC_INEN_PIN4_Pos 4 -#define PORT_PORTC_INEN_PIN4_Msk (0x01 << PORT_PORTC_INEN_PIN4_Pos) -#define PORT_PORTC_INEN_PIN5_Pos 5 -#define PORT_PORTC_INEN_PIN5_Msk (0x01 << PORT_PORTC_INEN_PIN5_Pos) -#define PORT_PORTC_INEN_PIN6_Pos 6 -#define PORT_PORTC_INEN_PIN6_Msk (0x01 << PORT_PORTC_INEN_PIN6_Pos) -#define PORT_PORTC_INEN_PIN7_Pos 7 -#define PORT_PORTC_INEN_PIN7_Msk (0x01 << PORT_PORTC_INEN_PIN7_Pos) -#define PORT_PORTC_INEN_PIN8_Pos 8 -#define PORT_PORTC_INEN_PIN8_Msk (0x01 << PORT_PORTC_INEN_PIN8_Pos) -#define PORT_PORTC_INEN_PIN9_Pos 9 -#define PORT_PORTC_INEN_PIN9_Msk (0x01 << PORT_PORTC_INEN_PIN9_Pos) -#define PORT_PORTC_INEN_PIN10_Pos 10 -#define PORT_PORTC_INEN_PIN10_Msk (0x01 << PORT_PORTC_INEN_PIN10_Pos) -#define PORT_PORTC_INEN_PIN11_Pos 11 -#define PORT_PORTC_INEN_PIN11_Msk (0x01 << PORT_PORTC_INEN_PIN11_Pos) -#define PORT_PORTC_INEN_PIN12_Pos 12 -#define PORT_PORTC_INEN_PIN12_Msk (0x01 << PORT_PORTC_INEN_PIN12_Pos) -#define PORT_PORTC_INEN_PIN13_Pos 13 -#define PORT_PORTC_INEN_PIN13_Msk (0x01 << PORT_PORTC_INEN_PIN13_Pos) -#define PORT_PORTC_INEN_PIN14_Pos 14 -#define PORT_PORTC_INEN_PIN14_Msk (0x01 << PORT_PORTC_INEN_PIN14_Pos) -#define PORT_PORTC_INEN_PIN15_Pos 15 -#define PORT_PORTC_INEN_PIN15_Msk (0x01 << PORT_PORTC_INEN_PIN15_Pos) - -#define PORT_PORTM_INEN_PIN0_Pos 0 -#define PORT_PORTM_INEN_PIN0_Msk (0x01 << PORT_PORTM_INEN_PIN0_Pos) -#define PORT_PORTM_INEN_PIN1_Pos 1 -#define PORT_PORTM_INEN_PIN1_Msk (0x01 << PORT_PORTM_INEN_PIN1_Pos) -#define PORT_PORTM_INEN_PIN2_Pos 2 -#define PORT_PORTM_INEN_PIN2_Msk (0x01 << PORT_PORTM_INEN_PIN2_Pos) -#define PORT_PORTM_INEN_PIN3_Pos 3 -#define PORT_PORTM_INEN_PIN3_Msk (0x01 << PORT_PORTM_INEN_PIN3_Pos) -#define PORT_PORTM_INEN_PIN4_Pos 4 -#define PORT_PORTM_INEN_PIN4_Msk (0x01 << PORT_PORTM_INEN_PIN4_Pos) -#define PORT_PORTM_INEN_PIN5_Pos 5 -#define PORT_PORTM_INEN_PIN5_Msk (0x01 << PORT_PORTM_INEN_PIN5_Pos) -#define PORT_PORTM_INEN_PIN6_Pos 6 -#define PORT_PORTM_INEN_PIN6_Msk (0x01 << PORT_PORTM_INEN_PIN6_Pos) -#define PORT_PORTM_INEN_PIN7_Pos 7 -#define PORT_PORTM_INEN_PIN7_Msk (0x01 << PORT_PORTM_INEN_PIN7_Pos) -#define PORT_PORTM_INEN_PIN8_Pos 8 -#define PORT_PORTM_INEN_PIN8_Msk (0x01 << PORT_PORTM_INEN_PIN8_Pos) -#define PORT_PORTM_INEN_PIN9_Pos 9 -#define PORT_PORTM_INEN_PIN9_Msk (0x01 << PORT_PORTM_INEN_PIN9_Pos) -#define PORT_PORTM_INEN_PIN10_Pos 10 -#define PORT_PORTM_INEN_PIN10_Msk (0x01 << PORT_PORTM_INEN_PIN10_Pos) -#define PORT_PORTM_INEN_PIN11_Pos 11 -#define PORT_PORTM_INEN_PIN11_Msk (0x01 << PORT_PORTM_INEN_PIN11_Pos) -#define PORT_PORTM_INEN_PIN12_Pos 12 -#define PORT_PORTM_INEN_PIN12_Msk (0x01 << PORT_PORTM_INEN_PIN12_Pos) -#define PORT_PORTM_INEN_PIN13_Pos 13 -#define PORT_PORTM_INEN_PIN13_Msk (0x01 << PORT_PORTM_INEN_PIN13_Pos) -#define PORT_PORTM_INEN_PIN14_Pos 14 -#define PORT_PORTM_INEN_PIN14_Msk (0x01 << PORT_PORTM_INEN_PIN14_Pos) -#define PORT_PORTM_INEN_PIN15_Pos 15 -#define PORT_PORTM_INEN_PIN15_Msk (0x01 << PORT_PORTM_INEN_PIN15_Pos) -#define PORT_PORTM_INEN_PIN16_Pos 16 -#define PORT_PORTM_INEN_PIN16_Msk (0x01 << PORT_PORTM_INEN_PIN16_Pos) -#define PORT_PORTM_INEN_PIN17_Pos 17 -#define PORT_PORTM_INEN_PIN17_Msk (0x01 << PORT_PORTM_INEN_PIN17_Pos) -#define PORT_PORTM_INEN_PIN18_Pos 18 -#define PORT_PORTM_INEN_PIN18_Msk (0x01 << PORT_PORTM_INEN_PIN18_Pos) -#define PORT_PORTM_INEN_PIN19_Pos 19 -#define PORT_PORTM_INEN_PIN19_Msk (0x01 << PORT_PORTM_INEN_PIN19_Pos) -#define PORT_PORTM_INEN_PIN20_Pos 20 -#define PORT_PORTM_INEN_PIN20_Msk (0x01 << PORT_PORTM_INEN_PIN20_Pos) -#define PORT_PORTM_INEN_PIN21_Pos 21 -#define PORT_PORTM_INEN_PIN21_Msk (0x01 << PORT_PORTM_INEN_PIN21_Pos) -#define PORT_PORTM_INEN_PIN22_Pos 22 -#define PORT_PORTM_INEN_PIN22_Msk (0x01 << PORT_PORTM_INEN_PIN22_Pos) -#define PORT_PORTM_INEN_PIN23_Pos 23 -#define PORT_PORTM_INEN_PIN23_Msk (0x01 << PORT_PORTM_INEN_PIN23_Pos) - -#define PORT_PORTN_INEN_PIN0_Pos 0 -#define PORT_PORTN_INEN_PIN0_Msk (0x01 << PORT_PORTN_INEN_PIN0_Pos) -#define PORT_PORTN_INEN_PIN1_Pos 1 -#define PORT_PORTN_INEN_PIN1_Msk (0x01 << PORT_PORTN_INEN_PIN1_Pos) -#define PORT_PORTN_INEN_PIN2_Pos 2 -#define PORT_PORTN_INEN_PIN2_Msk (0x01 << PORT_PORTN_INEN_PIN2_Pos) -#define PORT_PORTN_INEN_PIN3_Pos 3 -#define PORT_PORTN_INEN_PIN3_Msk (0x01 << PORT_PORTN_INEN_PIN3_Pos) -#define PORT_PORTN_INEN_PIN4_Pos 4 -#define PORT_PORTN_INEN_PIN4_Msk (0x01 << PORT_PORTN_INEN_PIN4_Pos) -#define PORT_PORTN_INEN_PIN5_Pos 5 -#define PORT_PORTN_INEN_PIN5_Msk (0x01 << PORT_PORTN_INEN_PIN5_Pos) -#define PORT_PORTN_INEN_PIN6_Pos 6 -#define PORT_PORTN_INEN_PIN6_Msk (0x01 << PORT_PORTN_INEN_PIN6_Pos) -#define PORT_PORTN_INEN_PIN7_Pos 7 -#define PORT_PORTN_INEN_PIN7_Msk (0x01 << PORT_PORTN_INEN_PIN7_Pos) -#define PORT_PORTN_INEN_PIN8_Pos 8 -#define PORT_PORTN_INEN_PIN8_Msk (0x01 << PORT_PORTN_INEN_PIN8_Pos) -#define PORT_PORTN_INEN_PIN9_Pos 9 -#define PORT_PORTN_INEN_PIN9_Msk (0x01 << PORT_PORTN_INEN_PIN9_Pos) -#define PORT_PORTN_INEN_PIN10_Pos 10 -#define PORT_PORTN_INEN_PIN10_Msk (0x01 << PORT_PORTN_INEN_PIN10_Pos) -#define PORT_PORTN_INEN_PIN11_Pos 11 -#define PORT_PORTN_INEN_PIN11_Msk (0x01 << PORT_PORTN_INEN_PIN11_Pos) -#define PORT_PORTN_INEN_PIN12_Pos 12 -#define PORT_PORTN_INEN_PIN12_Msk (0x01 << PORT_PORTN_INEN_PIN12_Pos) -#define PORT_PORTN_INEN_PIN13_Pos 13 -#define PORT_PORTN_INEN_PIN13_Msk (0x01 << PORT_PORTN_INEN_PIN13_Pos) -#define PORT_PORTN_INEN_PIN14_Pos 14 -#define PORT_PORTN_INEN_PIN14_Msk (0x01 << PORT_PORTN_INEN_PIN14_Pos) -#define PORT_PORTN_INEN_PIN15_Pos 15 -#define PORT_PORTN_INEN_PIN15_Msk (0x01 << PORT_PORTN_INEN_PIN15_Pos) -#define PORT_PORTN_INEN_PIN16_Pos 16 -#define PORT_PORTN_INEN_PIN16_Msk (0x01 << PORT_PORTN_INEN_PIN16_Pos) -#define PORT_PORTN_INEN_PIN17_Pos 17 -#define PORT_PORTN_INEN_PIN17_Msk (0x01 << PORT_PORTN_INEN_PIN17_Pos) -#define PORT_PORTN_INEN_PIN18_Pos 18 -#define PORT_PORTN_INEN_PIN18_Msk (0x01 << PORT_PORTN_INEN_PIN18_Pos) -#define PORT_PORTN_INEN_PIN19_Pos 19 -#define PORT_PORTN_INEN_PIN19_Msk (0x01 << PORT_PORTN_INEN_PIN19_Pos) -#define PORT_PORTN_INEN_PIN20_Pos 20 -#define PORT_PORTN_INEN_PIN20_Msk (0x01 << PORT_PORTN_INEN_PIN20_Pos) -#define PORT_PORTN_INEN_PIN21_Pos 21 -#define PORT_PORTN_INEN_PIN21_Msk (0x01 << PORT_PORTN_INEN_PIN21_Pos) -#define PORT_PORTN_INEN_PIN22_Pos 22 -#define PORT_PORTN_INEN_PIN22_Msk (0x01 << PORT_PORTN_INEN_PIN22_Pos) -#define PORT_PORTN_INEN_PIN23_Pos 23 -#define PORT_PORTN_INEN_PIN23_Msk (0x01 << PORT_PORTN_INEN_PIN23_Pos) - -#define PORT_PORTP_INEN_PIN0_Pos 0 -#define PORT_PORTP_INEN_PIN0_Msk (0x01 << PORT_PORTP_INEN_PIN0_Pos) -#define PORT_PORTP_INEN_PIN1_Pos 1 -#define PORT_PORTP_INEN_PIN1_Msk (0x01 << PORT_PORTP_INEN_PIN1_Pos) -#define PORT_PORTP_INEN_PIN2_Pos 2 -#define PORT_PORTP_INEN_PIN2_Msk (0x01 << PORT_PORTP_INEN_PIN2_Pos) -#define PORT_PORTP_INEN_PIN3_Pos 3 -#define PORT_PORTP_INEN_PIN3_Msk (0x01 << PORT_PORTP_INEN_PIN3_Pos) -#define PORT_PORTP_INEN_PIN4_Pos 4 -#define PORT_PORTP_INEN_PIN4_Msk (0x01 << PORT_PORTP_INEN_PIN4_Pos) -#define PORT_PORTP_INEN_PIN5_Pos 5 -#define PORT_PORTP_INEN_PIN5_Msk (0x01 << PORT_PORTP_INEN_PIN5_Pos) -#define PORT_PORTP_INEN_PIN6_Pos 6 -#define PORT_PORTP_INEN_PIN6_Msk (0x01 << PORT_PORTP_INEN_PIN6_Pos) -#define PORT_PORTP_INEN_PIN7_Pos 7 -#define PORT_PORTP_INEN_PIN7_Msk (0x01 << PORT_PORTP_INEN_PIN7_Pos) -#define PORT_PORTP_INEN_PIN8_Pos 8 -#define PORT_PORTP_INEN_PIN8_Msk (0x01 << PORT_PORTP_INEN_PIN8_Pos) -#define PORT_PORTP_INEN_PIN9_Pos 9 -#define PORT_PORTP_INEN_PIN9_Msk (0x01 << PORT_PORTP_INEN_PIN9_Pos) -#define PORT_PORTP_INEN_PIN10_Pos 10 -#define PORT_PORTP_INEN_PIN10_Msk (0x01 << PORT_PORTP_INEN_PIN10_Pos) -#define PORT_PORTP_INEN_PIN11_Pos 11 -#define PORT_PORTP_INEN_PIN11_Msk (0x01 << PORT_PORTP_INEN_PIN11_Pos) -#define PORT_PORTP_INEN_PIN12_Pos 12 -#define PORT_PORTP_INEN_PIN12_Msk (0x01 << PORT_PORTP_INEN_PIN12_Pos) -#define PORT_PORTP_INEN_PIN13_Pos 13 -#define PORT_PORTP_INEN_PIN13_Msk (0x01 << PORT_PORTP_INEN_PIN13_Pos) -#define PORT_PORTP_INEN_PIN14_Pos 14 -#define PORT_PORTP_INEN_PIN14_Msk (0x01 << PORT_PORTP_INEN_PIN14_Pos) -#define PORT_PORTP_INEN_PIN15_Pos 15 -#define PORT_PORTP_INEN_PIN15_Msk (0x01 << PORT_PORTP_INEN_PIN15_Pos) -#define PORT_PORTP_INEN_PIN16_Pos 16 -#define PORT_PORTP_INEN_PIN16_Msk (0x01 << PORT_PORTP_INEN_PIN16_Pos) -#define PORT_PORTP_INEN_PIN17_Pos 17 -#define PORT_PORTP_INEN_PIN17_Msk (0x01 << PORT_PORTP_INEN_PIN17_Pos) -#define PORT_PORTP_INEN_PIN18_Pos 18 -#define PORT_PORTP_INEN_PIN18_Msk (0x01 << PORT_PORTP_INEN_PIN18_Pos) -#define PORT_PORTP_INEN_PIN19_Pos 19 -#define PORT_PORTP_INEN_PIN19_Msk (0x01 << PORT_PORTP_INEN_PIN19_Pos) -#define PORT_PORTP_INEN_PIN20_Pos 20 -#define PORT_PORTP_INEN_PIN20_Msk (0x01 << PORT_PORTP_INEN_PIN20_Pos) -#define PORT_PORTP_INEN_PIN21_Pos 21 -#define PORT_PORTP_INEN_PIN21_Msk (0x01 << PORT_PORTP_INEN_PIN21_Pos) -#define PORT_PORTP_INEN_PIN22_Pos 22 -#define PORT_PORTP_INEN_PIN22_Msk (0x01 << PORT_PORTP_INEN_PIN22_Pos) -#define PORT_PORTP_INEN_PIN23_Pos 23 -#define PORT_PORTP_INEN_PIN23_Msk (0x01 << PORT_PORTP_INEN_PIN23_Pos) - -typedef struct -{ - __IO uint32_t DATA; -#define PIN0 0 -#define PIN1 1 -#define PIN2 2 -#define PIN3 3 -#define PIN4 4 -#define PIN5 5 -#define PIN6 6 -#define PIN7 7 -#define PIN8 8 -#define PIN9 9 -#define PIN10 10 -#define PIN11 11 -#define PIN12 12 -#define PIN13 13 -#define PIN14 14 -#define PIN15 15 -#define PIN16 16 -#define PIN17 17 -#define PIN18 18 -#define PIN19 19 -#define PIN20 20 -#define PIN21 21 -#define PIN22 22 -#define PIN23 23 -#define PIN24 24 - - __IO uint32_t DIR; //0 输入 1 输出 - - __IO uint32_t INTLVLTRG; //Interrupt Level Trigger 1 电平触发中断 0 边沿触发中断 - - __IO uint32_t INTBE; //Both Edge，当INTLVLTRG设为边沿触发中断时，此位置1表示上升沿和下降沿都触发中断，置0时触发边沿由INTRISEEN选择 - - __IO uint32_t INTRISEEN; //Interrupt Rise Edge Enable 1 上升沿/高电平触发中断 0 下降沿/低电平触发中断 - - __IO uint32_t INTEN; //1 中断使能 0 中断禁止 - - __IO uint32_t INTRAWSTAT; //中断检测单元是否检测到了触发中断的条件 1 检测到了中断触发条件 0 没有检测到中断触发条件 - - __IO uint32_t INTSTAT; //INTSTAT.PIN0 = INTRAWSTAT.PIN0 & INTEN.PIN0 - - __IO uint32_t INTCLR; //写1清除中断标志，只对边沿触发中断有用 -} GPIO_TypeDef; -#define GPIO_DATA_PIN0_Pos 0 -#define GPIO_DATA_PIN0_Msk (0x01 << GPIO_DATA_PIN0_Pos) -#define GPIO_DATA_PIN1_Pos 1 -#define GPIO_DATA_PIN1_Msk (0x01 << GPIO_DATA_PIN1_Pos) -#define GPIO_DATA_PIN2_Pos 2 -#define GPIO_DATA_PIN2_Msk (0x01 << GPIO_DATA_PIN2_Pos) -#define GPIO_DATA_PIN3_Pos 3 -#define GPIO_DATA_PIN3_Msk (0x01 << GPIO_DATA_PIN3_Pos) -#define GPIO_DATA_PIN4_Pos 4 -#define GPIO_DATA_PIN4_Msk (0x01 << GPIO_DATA_PIN4_Pos) -#define GPIO_DATA_PIN5_Pos 5 -#define GPIO_DATA_PIN5_Msk (0x01 << GPIO_DATA_PIN5_Pos) -#define GPIO_DATA_PIN6_Pos 6 -#define GPIO_DATA_PIN6_Msk (0x01 << GPIO_DATA_PIN6_Pos) -#define GPIO_DATA_PIN7_Pos 7 -#define GPIO_DATA_PIN7_Msk (0x01 << GPIO_DATA_PIN7_Pos) -#define GPIO_DATA_PIN8_Pos 8 -#define GPIO_DATA_PIN8_Msk (0x01 << GPIO_DATA_PIN8_Pos) -#define GPIO_DATA_PIN9_Pos 9 -#define GPIO_DATA_PIN9_Msk (0x01 << GPIO_DATA_PIN9_Pos) -#define GPIO_DATA_PIN10_Pos 10 -#define GPIO_DATA_PIN10_Msk (0x01 << GPIO_DATA_PIN10_Pos) -#define GPIO_DATA_PIN11_Pos 11 -#define GPIO_DATA_PIN11_Msk (0x01 << GPIO_DATA_PIN11_Pos) -#define GPIO_DATA_PIN12_Pos 12 -#define GPIO_DATA_PIN12_Msk (0x01 << GPIO_DATA_PIN12_Pos) -#define GPIO_DATA_PIN13_Pos 13 -#define GPIO_DATA_PIN13_Msk (0x01 << GPIO_DATA_PIN13_Pos) -#define GPIO_DATA_PIN14_Pos 14 -#define GPIO_DATA_PIN14_Msk (0x01 << GPIO_DATA_PIN14_Pos) -#define GPIO_DATA_PIN15_Pos 15 -#define GPIO_DATA_PIN15_Msk (0x01 << GPIO_DATA_PIN15_Pos) -#define GPIO_DATA_PIN16_Pos 16 -#define GPIO_DATA_PIN16_Msk (0x01 << GPIO_DATA_PIN16_Pos) -#define GPIO_DATA_PIN17_Pos 17 -#define GPIO_DATA_PIN17_Msk (0x01 << GPIO_DATA_PIN17_Pos) -#define GPIO_DATA_PIN18_Pos 18 -#define GPIO_DATA_PIN18_Msk (0x01 << GPIO_DATA_PIN18_Pos) -#define GPIO_DATA_PIN19_Pos 19 -#define GPIO_DATA_PIN19_Msk (0x01 << GPIO_DATA_PIN19_Pos) -#define GPIO_DATA_PIN20_Pos 20 -#define GPIO_DATA_PIN20_Msk (0x01 << GPIO_DATA_PIN20_Pos) -#define GPIO_DATA_PIN21_Pos 21 -#define GPIO_DATA_PIN21_Msk (0x01 << GPIO_DATA_PIN21_Pos) -#define GPIO_DATA_PIN22_Pos 22 -#define GPIO_DATA_PIN22_Msk (0x01 << GPIO_DATA_PIN22_Pos) -#define GPIO_DATA_PIN23_Pos 23 -#define GPIO_DATA_PIN23_Msk (0x01 << GPIO_DATA_PIN23_Pos) - -#define GPIO_DIR_PIN0_Pos 0 -#define GPIO_DIR_PIN0_Msk (0x01 << GPIO_DIR_PIN0_Pos) -#define GPIO_DIR_PIN1_Pos 1 -#define GPIO_DIR_PIN1_Msk (0x01 << GPIO_DIR_PIN1_Pos) -#define GPIO_DIR_PIN2_Pos 2 -#define GPIO_DIR_PIN2_Msk (0x01 << GPIO_DIR_PIN2_Pos) -#define GPIO_DIR_PIN3_Pos 3 -#define GPIO_DIR_PIN3_Msk (0x01 << GPIO_DIR_PIN3_Pos) -#define GPIO_DIR_PIN4_Pos 4 -#define GPIO_DIR_PIN4_Msk (0x01 << GPIO_DIR_PIN4_Pos) -#define GPIO_DIR_PIN5_Pos 5 -#define GPIO_DIR_PIN5_Msk (0x01 << GPIO_DIR_PIN5_Pos) -#define GPIO_DIR_PIN6_Pos 6 -#define GPIO_DIR_PIN6_Msk (0x01 << GPIO_DIR_PIN6_Pos) -#define GPIO_DIR_PIN7_Pos 7 -#define GPIO_DIR_PIN7_Msk (0x01 << GPIO_DIR_PIN7_Pos) -#define GPIO_DIR_PIN8_Pos 8 -#define GPIO_DIR_PIN8_Msk (0x01 << GPIO_DIR_PIN8_Pos) -#define GPIO_DIR_PIN9_Pos 9 -#define GPIO_DIR_PIN9_Msk (0x01 << GPIO_DIR_PIN9_Pos) -#define GPIO_DIR_PIN10_Pos 10 -#define GPIO_DIR_PIN10_Msk (0x01 << GPIO_DIR_PIN10_Pos) -#define GPIO_DIR_PIN11_Pos 11 -#define GPIO_DIR_PIN11_Msk (0x01 << GPIO_DIR_PIN11_Pos) -#define GPIO_DIR_PIN12_Pos 12 -#define GPIO_DIR_PIN12_Msk (0x01 << GPIO_DIR_PIN12_Pos) -#define GPIO_DIR_PIN13_Pos 13 -#define GPIO_DIR_PIN13_Msk (0x01 << GPIO_DIR_PIN13_Pos) -#define GPIO_DIR_PIN14_Pos 14 -#define GPIO_DIR_PIN14_Msk (0x01 << GPIO_DIR_PIN14_Pos) -#define GPIO_DIR_PIN15_Pos 15 -#define GPIO_DIR_PIN15_Msk (0x01 << GPIO_DIR_PIN15_Pos) -#define GPIO_DIR_PIN16_Pos 16 -#define GPIO_DIR_PIN16_Msk (0x01 << GPIO_DIR_PIN16_Pos) -#define GPIO_DIR_PIN17_Pos 17 -#define GPIO_DIR_PIN17_Msk (0x01 << GPIO_DIR_PIN17_Pos) -#define GPIO_DIR_PIN18_Pos 18 -#define GPIO_DIR_PIN18_Msk (0x01 << GPIO_DIR_PIN18_Pos) -#define GPIO_DIR_PIN19_Pos 19 -#define GPIO_DIR_PIN19_Msk (0x01 << GPIO_DIR_PIN19_Pos) -#define GPIO_DIR_PIN20_Pos 20 -#define GPIO_DIR_PIN20_Msk (0x01 << GPIO_DIR_PIN20_Pos) -#define GPIO_DIR_PIN21_Pos 21 -#define GPIO_DIR_PIN21_Msk (0x01 << GPIO_DIR_PIN21_Pos) -#define GPIO_DIR_PIN22_Pos 22 -#define GPIO_DIR_PIN22_Msk (0x01 << GPIO_DIR_PIN22_Pos) -#define GPIO_DIR_PIN23_Pos 23 -#define GPIO_DIR_PIN23_Msk (0x01 << GPIO_DIR_PIN23_Pos) - -#define GPIO_INTLVLTRG_PIN0_Pos 0 -#define GPIO_INTLVLTRG_PIN0_Msk (0x01 << GPIO_INTLVLTRG_PIN0_Pos) -#define GPIO_INTLVLTRG_PIN1_Pos 1 -#define GPIO_INTLVLTRG_PIN1_Msk (0x01 << GPIO_INTLVLTRG_PIN1_Pos) -#define GPIO_INTLVLTRG_PIN2_Pos 2 -#define GPIO_INTLVLTRG_PIN2_Msk (0x01 << GPIO_INTLVLTRG_PIN2_Pos) -#define GPIO_INTLVLTRG_PIN3_Pos 3 -#define GPIO_INTLVLTRG_PIN3_Msk (0x01 << GPIO_INTLVLTRG_PIN3_Pos) -#define GPIO_INTLVLTRG_PIN4_Pos 4 -#define GPIO_INTLVLTRG_PIN4_Msk (0x01 << GPIO_INTLVLTRG_PIN4_Pos) -#define GPIO_INTLVLTRG_PIN5_Pos 5 -#define GPIO_INTLVLTRG_PIN5_Msk (0x01 << GPIO_INTLVLTRG_PIN5_Pos) -#define GPIO_INTLVLTRG_PIN6_Pos 6 -#define GPIO_INTLVLTRG_PIN6_Msk (0x01 << GPIO_INTLVLTRG_PIN6_Pos) -#define GPIO_INTLVLTRG_PIN7_Pos 7 -#define GPIO_INTLVLTRG_PIN7_Msk (0x01 << GPIO_INTLVLTRG_PIN7_Pos) -#define GPIO_INTLVLTRG_PIN8_Pos 8 -#define GPIO_INTLVLTRG_PIN8_Msk (0x01 << GPIO_INTLVLTRG_PIN8_Pos) -#define GPIO_INTLVLTRG_PIN9_Pos 9 -#define GPIO_INTLVLTRG_PIN9_Msk (0x01 << GPIO_INTLVLTRG_PIN9_Pos) -#define GPIO_INTLVLTRG_PIN10_Pos 10 -#define GPIO_INTLVLTRG_PIN10_Msk (0x01 << GPIO_INTLVLTRG_PIN10_Pos) -#define GPIO_INTLVLTRG_PIN11_Pos 11 -#define GPIO_INTLVLTRG_PIN11_Msk (0x01 << GPIO_INTLVLTRG_PIN11_Pos) -#define GPIO_INTLVLTRG_PIN12_Pos 12 -#define GPIO_INTLVLTRG_PIN12_Msk (0x01 << GPIO_INTLVLTRG_PIN12_Pos) -#define GPIO_INTLVLTRG_PIN13_Pos 13 -#define GPIO_INTLVLTRG_PIN13_Msk (0x01 << GPIO_INTLVLTRG_PIN13_Pos) -#define GPIO_INTLVLTRG_PIN14_Pos 14 -#define GPIO_INTLVLTRG_PIN14_Msk (0x01 << GPIO_INTLVLTRG_PIN14_Pos) -#define GPIO_INTLVLTRG_PIN15_Pos 15 -#define GPIO_INTLVLTRG_PIN15_Msk (0x01 << GPIO_INTLVLTRG_PIN15_Pos) -#define GPIO_INTLVLTRG_PIN16_Pos 16 -#define GPIO_INTLVLTRG_PIN16_Msk (0x01 << GPIO_INTLVLTRG_PIN16_Pos) -#define GPIO_INTLVLTRG_PIN17_Pos 17 -#define GPIO_INTLVLTRG_PIN17_Msk (0x01 << GPIO_INTLVLTRG_PIN17_Pos) -#define GPIO_INTLVLTRG_PIN18_Pos 18 -#define GPIO_INTLVLTRG_PIN18_Msk (0x01 << GPIO_INTLVLTRG_PIN18_Pos) -#define GPIO_INTLVLTRG_PIN19_Pos 19 -#define GPIO_INTLVLTRG_PIN19_Msk (0x01 << GPIO_INTLVLTRG_PIN19_Pos) -#define GPIO_INTLVLTRG_PIN20_Pos 20 -#define GPIO_INTLVLTRG_PIN20_Msk (0x01 << GPIO_INTLVLTRG_PIN20_Pos) -#define GPIO_INTLVLTRG_PIN21_Pos 21 -#define GPIO_INTLVLTRG_PIN21_Msk (0x01 << GPIO_INTLVLTRG_PIN21_Pos) -#define GPIO_INTLVLTRG_PIN22_Pos 22 -#define GPIO_INTLVLTRG_PIN22_Msk (0x01 << GPIO_INTLVLTRG_PIN22_Pos) -#define GPIO_INTLVLTRG_PIN23_Pos 23 -#define GPIO_INTLVLTRG_PIN23_Msk (0x01 << GPIO_INTLVLTRG_PIN23_Pos) - -#define GPIO_INTBE_PIN0_Pos 0 -#define GPIO_INTBE_PIN0_Msk (0x01 << GPIO_INTBE_PIN0_Pos) -#define GPIO_INTBE_PIN1_Pos 1 -#define GPIO_INTBE_PIN1_Msk (0x01 << GPIO_INTBE_PIN1_Pos) -#define GPIO_INTBE_PIN2_Pos 2 -#define GPIO_INTBE_PIN2_Msk (0x01 << GPIO_INTBE_PIN2_Pos) -#define GPIO_INTBE_PIN3_Pos 3 -#define GPIO_INTBE_PIN3_Msk (0x01 << GPIO_INTBE_PIN3_Pos) -#define GPIO_INTBE_PIN4_Pos 4 -#define GPIO_INTBE_PIN4_Msk (0x01 << GPIO_INTBE_PIN4_Pos) -#define GPIO_INTBE_PIN5_Pos 5 -#define GPIO_INTBE_PIN5_Msk (0x01 << GPIO_INTBE_PIN5_Pos) -#define GPIO_INTBE_PIN6_Pos 6 -#define GPIO_INTBE_PIN6_Msk (0x01 << GPIO_INTBE_PIN6_Pos) -#define GPIO_INTBE_PIN7_Pos 7 -#define GPIO_INTBE_PIN7_Msk (0x01 << GPIO_INTBE_PIN7_Pos) -#define GPIO_INTBE_PIN8_Pos 8 -#define GPIO_INTBE_PIN8_Msk (0x01 << GPIO_INTBE_PIN8_Pos) -#define GPIO_INTBE_PIN9_Pos 9 -#define GPIO_INTBE_PIN9_Msk (0x01 << GPIO_INTBE_PIN9_Pos) -#define GPIO_INTBE_PIN10_Pos 10 -#define GPIO_INTBE_PIN10_Msk (0x01 << GPIO_INTBE_PIN10_Pos) -#define GPIO_INTBE_PIN11_Pos 11 -#define GPIO_INTBE_PIN11_Msk (0x01 << GPIO_INTBE_PIN11_Pos) -#define GPIO_INTBE_PIN12_Pos 12 -#define GPIO_INTBE_PIN12_Msk (0x01 << GPIO_INTBE_PIN12_Pos) -#define GPIO_INTBE_PIN13_Pos 13 -#define GPIO_INTBE_PIN13_Msk (0x01 << GPIO_INTBE_PIN13_Pos) -#define GPIO_INTBE_PIN14_Pos 14 -#define GPIO_INTBE_PIN14_Msk (0x01 << GPIO_INTBE_PIN14_Pos) -#define GPIO_INTBE_PIN15_Pos 15 -#define GPIO_INTBE_PIN15_Msk (0x01 << GPIO_INTBE_PIN15_Pos) -#define GPIO_INTBE_PIN16_Pos 16 -#define GPIO_INTBE_PIN16_Msk (0x01 << GPIO_INTBE_PIN16_Pos) -#define GPIO_INTBE_PIN17_Pos 17 -#define GPIO_INTBE_PIN17_Msk (0x01 << GPIO_INTBE_PIN17_Pos) -#define GPIO_INTBE_PIN18_Pos 18 -#define GPIO_INTBE_PIN18_Msk (0x01 << GPIO_INTBE_PIN18_Pos) -#define GPIO_INTBE_PIN19_Pos 19 -#define GPIO_INTBE_PIN19_Msk (0x01 << GPIO_INTBE_PIN19_Pos) -#define GPIO_INTBE_PIN20_Pos 20 -#define GPIO_INTBE_PIN20_Msk (0x01 << GPIO_INTBE_PIN20_Pos) -#define GPIO_INTBE_PIN21_Pos 21 -#define GPIO_INTBE_PIN21_Msk (0x01 << GPIO_INTBE_PIN21_Pos) -#define GPIO_INTBE_PIN22_Pos 22 -#define GPIO_INTBE_PIN22_Msk (0x01 << GPIO_INTBE_PIN22_Pos) -#define GPIO_INTBE_PIN23_Pos 23 -#define GPIO_INTBE_PIN23_Msk (0x01 << GPIO_INTBE_PIN23_Pos) - -#define GPIO_INTRISEEN_PIN0_Pos 0 -#define GPIO_INTRISEEN_PIN0_Msk (0x01 << GPIO_INTRISEEN_PIN0_Pos) -#define GPIO_INTRISEEN_PIN1_Pos 1 -#define GPIO_INTRISEEN_PIN1_Msk (0x01 << GPIO_INTRISEEN_PIN1_Pos) -#define GPIO_INTRISEEN_PIN2_Pos 2 -#define GPIO_INTRISEEN_PIN2_Msk (0x01 << GPIO_INTRISEEN_PIN2_Pos) -#define GPIO_INTRISEEN_PIN3_Pos 3 -#define GPIO_INTRISEEN_PIN3_Msk (0x01 << GPIO_INTRISEEN_PIN3_Pos) -#define GPIO_INTRISEEN_PIN4_Pos 4 -#define GPIO_INTRISEEN_PIN4_Msk (0x01 << GPIO_INTRISEEN_PIN4_Pos) -#define GPIO_INTRISEEN_PIN5_Pos 5 -#define GPIO_INTRISEEN_PIN5_Msk (0x01 << GPIO_INTRISEEN_PIN5_Pos) -#define GPIO_INTRISEEN_PIN6_Pos 6 -#define GPIO_INTRISEEN_PIN6_Msk (0x01 << GPIO_INTRISEEN_PIN6_Pos) -#define GPIO_INTRISEEN_PIN7_Pos 7 -#define GPIO_INTRISEEN_PIN7_Msk (0x01 << GPIO_INTRISEEN_PIN7_Pos) -#define GPIO_INTRISEEN_PIN8_Pos 8 -#define GPIO_INTRISEEN_PIN8_Msk (0x01 << GPIO_INTRISEEN_PIN8_Pos) -#define GPIO_INTRISEEN_PIN9_Pos 9 -#define GPIO_INTRISEEN_PIN9_Msk (0x01 << GPIO_INTRISEEN_PIN9_Pos) -#define GPIO_INTRISEEN_PIN10_Pos 10 -#define GPIO_INTRISEEN_PIN10_Msk (0x01 << GPIO_INTRISEEN_PIN10_Pos) -#define GPIO_INTRISEEN_PIN11_Pos 11 -#define GPIO_INTRISEEN_PIN11_Msk (0x01 << GPIO_INTRISEEN_PIN11_Pos) -#define GPIO_INTRISEEN_PIN12_Pos 12 -#define GPIO_INTRISEEN_PIN12_Msk (0x01 << GPIO_INTRISEEN_PIN12_Pos) -#define GPIO_INTRISEEN_PIN13_Pos 13 -#define GPIO_INTRISEEN_PIN13_Msk (0x01 << GPIO_INTRISEEN_PIN13_Pos) -#define GPIO_INTRISEEN_PIN14_Pos 14 -#define GPIO_INTRISEEN_PIN14_Msk (0x01 << GPIO_INTRISEEN_PIN14_Pos) -#define GPIO_INTRISEEN_PIN15_Pos 15 -#define GPIO_INTRISEEN_PIN15_Msk (0x01 << GPIO_INTRISEEN_PIN15_Pos) -#define GPIO_INTRISEEN_PIN16_Pos 16 -#define GPIO_INTRISEEN_PIN16_Msk (0x01 << GPIO_INTRISEEN_PIN16_Pos) -#define GPIO_INTRISEEN_PIN17_Pos 17 -#define GPIO_INTRISEEN_PIN17_Msk (0x01 << GPIO_INTRISEEN_PIN17_Pos) -#define GPIO_INTRISEEN_PIN18_Pos 18 -#define GPIO_INTRISEEN_PIN18_Msk (0x01 << GPIO_INTRISEEN_PIN18_Pos) -#define GPIO_INTRISEEN_PIN19_Pos 19 -#define GPIO_INTRISEEN_PIN19_Msk (0x01 << GPIO_INTRISEEN_PIN19_Pos) -#define GPIO_INTRISEEN_PIN20_Pos 20 -#define GPIO_INTRISEEN_PIN20_Msk (0x01 << GPIO_INTRISEEN_PIN20_Pos) -#define GPIO_INTRISEEN_PIN21_Pos 21 -#define GPIO_INTRISEEN_PIN21_Msk (0x01 << GPIO_INTRISEEN_PIN21_Pos) -#define GPIO_INTRISEEN_PIN22_Pos 22 -#define GPIO_INTRISEEN_PIN22_Msk (0x01 << GPIO_INTRISEEN_PIN22_Pos) -#define GPIO_INTRISEEN_PIN23_Pos 23 -#define GPIO_INTRISEEN_PIN23_Msk (0x01 << GPIO_INTRISEEN_PIN23_Pos) - -#define GPIO_INTEN_PIN0_Pos 0 -#define GPIO_INTEN_PIN0_Msk (0x01 << GPIO_INTEN_PIN0_Pos) -#define GPIO_INTEN_PIN1_Pos 1 -#define GPIO_INTEN_PIN1_Msk (0x01 << GPIO_INTEN_PIN1_Pos) -#define GPIO_INTEN_PIN2_Pos 2 -#define GPIO_INTEN_PIN2_Msk (0x01 << GPIO_INTEN_PIN2_Pos) -#define GPIO_INTEN_PIN3_Pos 3 -#define GPIO_INTEN_PIN3_Msk (0x01 << GPIO_INTEN_PIN3_Pos) -#define GPIO_INTEN_PIN4_Pos 4 -#define GPIO_INTEN_PIN4_Msk (0x01 << GPIO_INTEN_PIN4_Pos) -#define GPIO_INTEN_PIN5_Pos 5 -#define GPIO_INTEN_PIN5_Msk (0x01 << GPIO_INTEN_PIN5_Pos) -#define GPIO_INTEN_PIN6_Pos 6 -#define GPIO_INTEN_PIN6_Msk (0x01 << GPIO_INTEN_PIN6_Pos) -#define GPIO_INTEN_PIN7_Pos 7 -#define GPIO_INTEN_PIN7_Msk (0x01 << GPIO_INTEN_PIN7_Pos) -#define GPIO_INTEN_PIN8_Pos 8 -#define GPIO_INTEN_PIN8_Msk (0x01 << GPIO_INTEN_PIN8_Pos) -#define GPIO_INTEN_PIN9_Pos 9 -#define GPIO_INTEN_PIN9_Msk (0x01 << GPIO_INTEN_PIN9_Pos) -#define GPIO_INTEN_PIN10_Pos 10 -#define GPIO_INTEN_PIN10_Msk (0x01 << GPIO_INTEN_PIN10_Pos) -#define GPIO_INTEN_PIN11_Pos 11 -#define GPIO_INTEN_PIN11_Msk (0x01 << GPIO_INTEN_PIN11_Pos) -#define GPIO_INTEN_PIN12_Pos 12 -#define GPIO_INTEN_PIN12_Msk (0x01 << GPIO_INTEN_PIN12_Pos) -#define GPIO_INTEN_PIN13_Pos 13 -#define GPIO_INTEN_PIN13_Msk (0x01 << GPIO_INTEN_PIN13_Pos) -#define GPIO_INTEN_PIN14_Pos 14 -#define GPIO_INTEN_PIN14_Msk (0x01 << GPIO_INTEN_PIN14_Pos) -#define GPIO_INTEN_PIN15_Pos 15 -#define GPIO_INTEN_PIN15_Msk (0x01 << GPIO_INTEN_PIN15_Pos) -#define GPIO_INTEN_PIN16_Pos 16 -#define GPIO_INTEN_PIN16_Msk (0x01 << GPIO_INTEN_PIN16_Pos) -#define GPIO_INTEN_PIN17_Pos 17 -#define GPIO_INTEN_PIN17_Msk (0x01 << GPIO_INTEN_PIN17_Pos) -#define GPIO_INTEN_PIN18_Pos 18 -#define GPIO_INTEN_PIN18_Msk (0x01 << GPIO_INTEN_PIN18_Pos) -#define GPIO_INTEN_PIN19_Pos 19 -#define GPIO_INTEN_PIN19_Msk (0x01 << GPIO_INTEN_PIN19_Pos) -#define GPIO_INTEN_PIN20_Pos 20 -#define GPIO_INTEN_PIN20_Msk (0x01 << GPIO_INTEN_PIN20_Pos) -#define GPIO_INTEN_PIN21_Pos 21 -#define GPIO_INTEN_PIN21_Msk (0x01 << GPIO_INTEN_PIN21_Pos) -#define GPIO_INTEN_PIN22_Pos 22 -#define GPIO_INTEN_PIN22_Msk (0x01 << GPIO_INTEN_PIN22_Pos) -#define GPIO_INTEN_PIN23_Pos 23 -#define GPIO_INTEN_PIN23_Msk (0x01 << GPIO_INTEN_PIN23_Pos) - -#define GPIO_INTRAWSTAT_PIN0_Pos 0 -#define GPIO_INTRAWSTAT_PIN0_Msk (0x01 << GPIO_INTRAWSTAT_PIN0_Pos) -#define GPIO_INTRAWSTAT_PIN1_Pos 1 -#define GPIO_INTRAWSTAT_PIN1_Msk (0x01 << GPIO_INTRAWSTAT_PIN1_Pos) -#define GPIO_INTRAWSTAT_PIN2_Pos 2 -#define GPIO_INTRAWSTAT_PIN2_Msk (0x01 << GPIO_INTRAWSTAT_PIN2_Pos) -#define GPIO_INTRAWSTAT_PIN3_Pos 3 -#define GPIO_INTRAWSTAT_PIN3_Msk (0x01 << GPIO_INTRAWSTAT_PIN3_Pos) -#define GPIO_INTRAWSTAT_PIN4_Pos 4 -#define GPIO_INTRAWSTAT_PIN4_Msk (0x01 << GPIO_INTRAWSTAT_PIN4_Pos) -#define GPIO_INTRAWSTAT_PIN5_Pos 5 -#define GPIO_INTRAWSTAT_PIN5_Msk (0x01 << GPIO_INTRAWSTAT_PIN5_Pos) -#define GPIO_INTRAWSTAT_PIN6_Pos 6 -#define GPIO_INTRAWSTAT_PIN6_Msk (0x01 << GPIO_INTRAWSTAT_PIN6_Pos) -#define GPIO_INTRAWSTAT_PIN7_Pos 7 -#define GPIO_INTRAWSTAT_PIN7_Msk (0x01 << GPIO_INTRAWSTAT_PIN7_Pos) -#define GPIO_INTRAWSTAT_PIN8_Pos 8 -#define GPIO_INTRAWSTAT_PIN8_Msk (0x01 << GPIO_INTRAWSTAT_PIN8_Pos) -#define GPIO_INTRAWSTAT_PIN9_Pos 9 -#define GPIO_INTRAWSTAT_PIN9_Msk (0x01 << GPIO_INTRAWSTAT_PIN9_Pos) -#define GPIO_INTRAWSTAT_PIN10_Pos 10 -#define GPIO_INTRAWSTAT_PIN10_Msk (0x01 << GPIO_INTRAWSTAT_PIN10_Pos) -#define GPIO_INTRAWSTAT_PIN11_Pos 11 -#define GPIO_INTRAWSTAT_PIN11_Msk (0x01 << GPIO_INTRAWSTAT_PIN11_Pos) -#define GPIO_INTRAWSTAT_PIN12_Pos 12 -#define GPIO_INTRAWSTAT_PIN12_Msk (0x01 << GPIO_INTRAWSTAT_PIN12_Pos) -#define GPIO_INTRAWSTAT_PIN13_Pos 13 -#define GPIO_INTRAWSTAT_PIN13_Msk (0x01 << GPIO_INTRAWSTAT_PIN13_Pos) -#define GPIO_INTRAWSTAT_PIN14_Pos 14 -#define GPIO_INTRAWSTAT_PIN14_Msk (0x01 << GPIO_INTRAWSTAT_PIN14_Pos) -#define GPIO_INTRAWSTAT_PIN15_Pos 15 -#define GPIO_INTRAWSTAT_PIN15_Msk (0x01 << GPIO_INTRAWSTAT_PIN15_Pos) -#define GPIO_INTRAWSTAT_PIN16_Pos 16 -#define GPIO_INTRAWSTAT_PIN16_Msk (0x01 << GPIO_INTRAWSTAT_PIN16_Pos) -#define GPIO_INTRAWSTAT_PIN17_Pos 17 -#define GPIO_INTRAWSTAT_PIN17_Msk (0x01 << GPIO_INTRAWSTAT_PIN17_Pos) -#define GPIO_INTRAWSTAT_PIN18_Pos 18 -#define GPIO_INTRAWSTAT_PIN18_Msk (0x01 << GPIO_INTRAWSTAT_PIN18_Pos) -#define GPIO_INTRAWSTAT_PIN19_Pos 19 -#define GPIO_INTRAWSTAT_PIN19_Msk (0x01 << GPIO_INTRAWSTAT_PIN19_Pos) -#define GPIO_INTRAWSTAT_PIN20_Pos 20 -#define GPIO_INTRAWSTAT_PIN20_Msk (0x01 << GPIO_INTRAWSTAT_PIN20_Pos) -#define GPIO_INTRAWSTAT_PIN21_Pos 21 -#define GPIO_INTRAWSTAT_PIN21_Msk (0x01 << GPIO_INTRAWSTAT_PIN21_Pos) -#define GPIO_INTRAWSTAT_PIN22_Pos 22 -#define GPIO_INTRAWSTAT_PIN22_Msk (0x01 << GPIO_INTRAWSTAT_PIN22_Pos) -#define GPIO_INTRAWSTAT_PIN23_Pos 23 -#define GPIO_INTRAWSTAT_PIN23_Msk (0x01 << GPIO_INTRAWSTAT_PIN23_Pos) - -#define GPIO_INTSTAT_PIN0_Pos 0 -#define GPIO_INTSTAT_PIN0_Msk (0x01 << GPIO_INTSTAT_PIN0_Pos) -#define GPIO_INTSTAT_PIN1_Pos 1 -#define GPIO_INTSTAT_PIN1_Msk (0x01 << GPIO_INTSTAT_PIN1_Pos) -#define GPIO_INTSTAT_PIN2_Pos 2 -#define GPIO_INTSTAT_PIN2_Msk (0x01 << GPIO_INTSTAT_PIN2_Pos) -#define GPIO_INTSTAT_PIN3_Pos 3 -#define GPIO_INTSTAT_PIN3_Msk (0x01 << GPIO_INTSTAT_PIN3_Pos) -#define GPIO_INTSTAT_PIN4_Pos 4 -#define GPIO_INTSTAT_PIN4_Msk (0x01 << GPIO_INTSTAT_PIN4_Pos) -#define GPIO_INTSTAT_PIN5_Pos 5 -#define GPIO_INTSTAT_PIN5_Msk (0x01 << GPIO_INTSTAT_PIN5_Pos) -#define GPIO_INTSTAT_PIN6_Pos 6 -#define GPIO_INTSTAT_PIN6_Msk (0x01 << GPIO_INTSTAT_PIN6_Pos) -#define GPIO_INTSTAT_PIN7_Pos 7 -#define GPIO_INTSTAT_PIN7_Msk (0x01 << GPIO_INTSTAT_PIN7_Pos) -#define GPIO_INTSTAT_PIN8_Pos 8 -#define GPIO_INTSTAT_PIN8_Msk (0x01 << GPIO_INTSTAT_PIN8_Pos) -#define GPIO_INTSTAT_PIN9_Pos 9 -#define GPIO_INTSTAT_PIN9_Msk (0x01 << GPIO_INTSTAT_PIN9_Pos) -#define GPIO_INTSTAT_PIN10_Pos 10 -#define GPIO_INTSTAT_PIN10_Msk (0x01 << GPIO_INTSTAT_PIN10_Pos) -#define GPIO_INTSTAT_PIN11_Pos 11 -#define GPIO_INTSTAT_PIN11_Msk (0x01 << GPIO_INTSTAT_PIN11_Pos) -#define GPIO_INTSTAT_PIN12_Pos 12 -#define GPIO_INTSTAT_PIN12_Msk (0x01 << GPIO_INTSTAT_PIN12_Pos) -#define GPIO_INTSTAT_PIN13_Pos 13 -#define GPIO_INTSTAT_PIN13_Msk (0x01 << GPIO_INTSTAT_PIN13_Pos) -#define GPIO_INTSTAT_PIN14_Pos 14 -#define GPIO_INTSTAT_PIN14_Msk (0x01 << GPIO_INTSTAT_PIN14_Pos) -#define GPIO_INTSTAT_PIN15_Pos 15 -#define GPIO_INTSTAT_PIN15_Msk (0x01 << GPIO_INTSTAT_PIN15_Pos) -#define GPIO_INTSTAT_PIN16_Pos 16 -#define GPIO_INTSTAT_PIN16_Msk (0x01 << GPIO_INTSTAT_PIN16_Pos) -#define GPIO_INTSTAT_PIN17_Pos 17 -#define GPIO_INTSTAT_PIN17_Msk (0x01 << GPIO_INTSTAT_PIN17_Pos) -#define GPIO_INTSTAT_PIN18_Pos 18 -#define GPIO_INTSTAT_PIN18_Msk (0x01 << GPIO_INTSTAT_PIN18_Pos) -#define GPIO_INTSTAT_PIN19_Pos 19 -#define GPIO_INTSTAT_PIN19_Msk (0x01 << GPIO_INTSTAT_PIN19_Pos) -#define GPIO_INTSTAT_PIN20_Pos 20 -#define GPIO_INTSTAT_PIN20_Msk (0x01 << GPIO_INTSTAT_PIN20_Pos) -#define GPIO_INTSTAT_PIN21_Pos 21 -#define GPIO_INTSTAT_PIN21_Msk (0x01 << GPIO_INTSTAT_PIN21_Pos) -#define GPIO_INTSTAT_PIN22_Pos 22 -#define GPIO_INTSTAT_PIN22_Msk (0x01 << GPIO_INTSTAT_PIN22_Pos) -#define GPIO_INTSTAT_PIN23_Pos 23 -#define GPIO_INTSTAT_PIN23_Msk (0x01 << GPIO_INTSTAT_PIN23_Pos) - -#define GPIO_INTCLR_PIN0_Pos 0 -#define GPIO_INTCLR_PIN0_Msk (0x01 << GPIO_INTCLR_PIN0_Pos) -#define GPIO_INTCLR_PIN1_Pos 1 -#define GPIO_INTCLR_PIN1_Msk (0x01 << GPIO_INTCLR_PIN1_Pos) -#define GPIO_INTCLR_PIN2_Pos 2 -#define GPIO_INTCLR_PIN2_Msk (0x01 << GPIO_INTCLR_PIN2_Pos) -#define GPIO_INTCLR_PIN3_Pos 3 -#define GPIO_INTCLR_PIN3_Msk (0x01 << GPIO_INTCLR_PIN3_Pos) -#define GPIO_INTCLR_PIN4_Pos 4 -#define GPIO_INTCLR_PIN4_Msk (0x01 << GPIO_INTCLR_PIN4_Pos) -#define GPIO_INTCLR_PIN5_Pos 5 -#define GPIO_INTCLR_PIN5_Msk (0x01 << GPIO_INTCLR_PIN5_Pos) -#define GPIO_INTCLR_PIN6_Pos 6 -#define GPIO_INTCLR_PIN6_Msk (0x01 << GPIO_INTCLR_PIN6_Pos) -#define GPIO_INTCLR_PIN7_Pos 7 -#define GPIO_INTCLR_PIN7_Msk (0x01 << GPIO_INTCLR_PIN7_Pos) -#define GPIO_INTCLR_PIN8_Pos 8 -#define GPIO_INTCLR_PIN8_Msk (0x01 << GPIO_INTCLR_PIN8_Pos) -#define GPIO_INTCLR_PIN9_Pos 9 -#define GPIO_INTCLR_PIN9_Msk (0x01 << GPIO_INTCLR_PIN9_Pos) -#define GPIO_INTCLR_PIN10_Pos 10 -#define GPIO_INTCLR_PIN10_Msk (0x01 << GPIO_INTCLR_PIN10_Pos) -#define GPIO_INTCLR_PIN11_Pos 11 -#define GPIO_INTCLR_PIN11_Msk (0x01 << GPIO_INTCLR_PIN11_Pos) -#define GPIO_INTCLR_PIN12_Pos 12 -#define GPIO_INTCLR_PIN12_Msk (0x01 << GPIO_INTCLR_PIN12_Pos) -#define GPIO_INTCLR_PIN13_Pos 13 -#define GPIO_INTCLR_PIN13_Msk (0x01 << GPIO_INTCLR_PIN13_Pos) -#define GPIO_INTCLR_PIN14_Pos 14 -#define GPIO_INTCLR_PIN14_Msk (0x01 << GPIO_INTCLR_PIN14_Pos) -#define GPIO_INTCLR_PIN15_Pos 15 -#define GPIO_INTCLR_PIN15_Msk (0x01 << GPIO_INTCLR_PIN15_Pos) -#define GPIO_INTCLR_PIN16_Pos 16 -#define GPIO_INTCLR_PIN16_Msk (0x01 << GPIO_INTCLR_PIN16_Pos) -#define GPIO_INTCLR_PIN17_Pos 17 -#define GPIO_INTCLR_PIN17_Msk (0x01 << GPIO_INTCLR_PIN17_Pos) -#define GPIO_INTCLR_PIN18_Pos 18 -#define GPIO_INTCLR_PIN18_Msk (0x01 << GPIO_INTCLR_PIN18_Pos) -#define GPIO_INTCLR_PIN19_Pos 19 -#define GPIO_INTCLR_PIN19_Msk (0x01 << GPIO_INTCLR_PIN19_Pos) -#define GPIO_INTCLR_PIN20_Pos 20 -#define GPIO_INTCLR_PIN20_Msk (0x01 << GPIO_INTCLR_PIN20_Pos) -#define GPIO_INTCLR_PIN21_Pos 21 -#define GPIO_INTCLR_PIN21_Msk (0x01 << GPIO_INTCLR_PIN21_Pos) -#define GPIO_INTCLR_PIN22_Pos 22 -#define GPIO_INTCLR_PIN22_Msk (0x01 << GPIO_INTCLR_PIN22_Pos) -#define GPIO_INTCLR_PIN23_Pos 23 -#define GPIO_INTCLR_PIN23_Msk (0x01 << GPIO_INTCLR_PIN23_Pos) - -typedef struct -{ - __IO uint32_t LDVAL; //定时器加载值，使能后定时器从此数值开始向下递减计数 +#define PORT_PORTA_PULLU_PIN0_Pos 0 +#define PORT_PORTA_PULLU_PIN0_Msk (0x01 << PORT_PORTA_PULLU_PIN0_Pos) +#define PORT_PORTA_PULLU_PIN1_Pos 1 +#define PORT_PORTA_PULLU_PIN1_Msk (0x01 << PORT_PORTA_PULLU_PIN1_Pos) +#define PORT_PORTA_PULLU_PIN2_Pos 2 +#define PORT_PORTA_PULLU_PIN2_Msk (0x01 << PORT_PORTA_PULLU_PIN2_Pos) +#define PORT_PORTA_PULLU_PIN3_Pos 3 +#define PORT_PORTA_PULLU_PIN3_Msk (0x01 << PORT_PORTA_PULLU_PIN3_Pos) +#define PORT_PORTA_PULLU_PIN4_Pos 4 +#define PORT_PORTA_PULLU_PIN4_Msk (0x01 << PORT_PORTA_PULLU_PIN4_Pos) +#define PORT_PORTA_PULLU_PIN5_Pos 5 +#define PORT_PORTA_PULLU_PIN5_Msk (0x01 << PORT_PORTA_PULLU_PIN5_Pos) +#define PORT_PORTA_PULLU_PIN6_Pos 6 +#define PORT_PORTA_PULLU_PIN6_Msk (0x01 << PORT_PORTA_PULLU_PIN6_Pos) +#define PORT_PORTA_PULLU_PIN7_Pos 7 +#define PORT_PORTA_PULLU_PIN7_Msk (0x01 << PORT_PORTA_PULLU_PIN7_Pos) +#define PORT_PORTA_PULLU_PIN8_Pos 8 +#define PORT_PORTA_PULLU_PIN8_Msk (0x01 << PORT_PORTA_PULLU_PIN8_Pos) +#define PORT_PORTA_PULLU_PIN9_Pos 9 +#define PORT_PORTA_PULLU_PIN9_Msk (0x01 << PORT_PORTA_PULLU_PIN9_Pos) +#define PORT_PORTA_PULLU_PIN10_Pos 10 +#define PORT_PORTA_PULLU_PIN10_Msk (0x01 << PORT_PORTA_PULLU_PIN10_Pos) +#define PORT_PORTA_PULLU_PIN11_Pos 11 +#define PORT_PORTA_PULLU_PIN11_Msk (0x01 << PORT_PORTA_PULLU_PIN11_Pos) +#define PORT_PORTA_PULLU_PIN12_Pos 12 +#define PORT_PORTA_PULLU_PIN12_Msk (0x01 << PORT_PORTA_PULLU_PIN12_Pos) +#define PORT_PORTA_PULLU_PIN13_Pos 13 +#define PORT_PORTA_PULLU_PIN13_Msk (0x01 << PORT_PORTA_PULLU_PIN13_Pos) +#define PORT_PORTA_PULLU_PIN14_Pos 14 +#define PORT_PORTA_PULLU_PIN14_Msk (0x01 << PORT_PORTA_PULLU_PIN14_Pos) +#define PORT_PORTA_PULLU_PIN15_Pos 15 +#define PORT_PORTA_PULLU_PIN15_Msk (0x01 << PORT_PORTA_PULLU_PIN15_Pos) + +#define PORT_PORTC_PULLU_PIN0_Pos 0 +#define PORT_PORTC_PULLU_PIN0_Msk (0x01 << PORT_PORTC_PULLU_PIN0_Pos) +#define PORT_PORTC_PULLU_PIN1_Pos 1 +#define PORT_PORTC_PULLU_PIN1_Msk (0x01 << PORT_PORTC_PULLU_PIN1_Pos) +#define PORT_PORTC_PULLU_PIN2_Pos 2 +#define PORT_PORTC_PULLU_PIN2_Msk (0x01 << PORT_PORTC_PULLU_PIN2_Pos) +#define PORT_PORTC_PULLU_PIN3_Pos 3 +#define PORT_PORTC_PULLU_PIN3_Msk (0x01 << PORT_PORTC_PULLU_PIN3_Pos) +#define PORT_PORTC_PULLU_PIN4_Pos 4 +#define PORT_PORTC_PULLU_PIN4_Msk (0x01 << PORT_PORTC_PULLU_PIN4_Pos) +#define PORT_PORTC_PULLU_PIN5_Pos 5 +#define PORT_PORTC_PULLU_PIN5_Msk (0x01 << PORT_PORTC_PULLU_PIN5_Pos) +#define PORT_PORTC_PULLU_PIN6_Pos 6 +#define PORT_PORTC_PULLU_PIN6_Msk (0x01 << PORT_PORTC_PULLU_PIN6_Pos) +#define PORT_PORTC_PULLU_PIN7_Pos 7 +#define PORT_PORTC_PULLU_PIN7_Msk (0x01 << PORT_PORTC_PULLU_PIN7_Pos) +#define PORT_PORTC_PULLU_PIN8_Pos 8 +#define PORT_PORTC_PULLU_PIN8_Msk (0x01 << PORT_PORTC_PULLU_PIN8_Pos) +#define PORT_PORTC_PULLU_PIN9_Pos 9 +#define PORT_PORTC_PULLU_PIN9_Msk (0x01 << PORT_PORTC_PULLU_PIN9_Pos) +#define PORT_PORTC_PULLU_PIN10_Pos 10 +#define PORT_PORTC_PULLU_PIN10_Msk (0x01 << PORT_PORTC_PULLU_PIN10_Pos) +#define PORT_PORTC_PULLU_PIN11_Pos 11 +#define PORT_PORTC_PULLU_PIN11_Msk (0x01 << PORT_PORTC_PULLU_PIN11_Pos) +#define PORT_PORTC_PULLU_PIN12_Pos 12 +#define PORT_PORTC_PULLU_PIN12_Msk (0x01 << PORT_PORTC_PULLU_PIN12_Pos) +#define PORT_PORTC_PULLU_PIN13_Pos 13 +#define PORT_PORTC_PULLU_PIN13_Msk (0x01 << PORT_PORTC_PULLU_PIN13_Pos) +#define PORT_PORTC_PULLU_PIN14_Pos 14 +#define PORT_PORTC_PULLU_PIN14_Msk (0x01 << PORT_PORTC_PULLU_PIN14_Pos) +#define PORT_PORTC_PULLU_PIN15_Pos 15 +#define PORT_PORTC_PULLU_PIN15_Msk (0x01 << PORT_PORTC_PULLU_PIN15_Pos) + +#define PORT_PORTM_PULLU_PIN0_Pos 0 +#define PORT_PORTM_PULLU_PIN0_Msk (0x01 << PORT_PORTM_PULLU_PIN0_Pos) +#define PORT_PORTM_PULLU_PIN1_Pos 1 +#define PORT_PORTM_PULLU_PIN1_Msk (0x01 << PORT_PORTM_PULLU_PIN1_Pos) +#define PORT_PORTM_PULLU_PIN2_Pos 2 +#define PORT_PORTM_PULLU_PIN2_Msk (0x01 << PORT_PORTM_PULLU_PIN2_Pos) +#define PORT_PORTM_PULLU_PIN3_Pos 3 +#define PORT_PORTM_PULLU_PIN3_Msk (0x01 << PORT_PORTM_PULLU_PIN3_Pos) +#define PORT_PORTM_PULLU_PIN4_Pos 4 +#define PORT_PORTM_PULLU_PIN4_Msk (0x01 << PORT_PORTM_PULLU_PIN4_Pos) +#define PORT_PORTM_PULLU_PIN5_Pos 5 +#define PORT_PORTM_PULLU_PIN5_Msk (0x01 << PORT_PORTM_PULLU_PIN5_Pos) +#define PORT_PORTM_PULLU_PIN6_Pos 6 +#define PORT_PORTM_PULLU_PIN6_Msk (0x01 << PORT_PORTM_PULLU_PIN6_Pos) +#define PORT_PORTM_PULLU_PIN7_Pos 7 +#define PORT_PORTM_PULLU_PIN7_Msk (0x01 << PORT_PORTM_PULLU_PIN7_Pos) +#define PORT_PORTM_PULLU_PIN8_Pos 8 +#define PORT_PORTM_PULLU_PIN8_Msk (0x01 << PORT_PORTM_PULLU_PIN8_Pos) +#define PORT_PORTM_PULLU_PIN9_Pos 9 +#define PORT_PORTM_PULLU_PIN9_Msk (0x01 << PORT_PORTM_PULLU_PIN9_Pos) +#define PORT_PORTM_PULLU_PIN10_Pos 10 +#define PORT_PORTM_PULLU_PIN10_Msk (0x01 << PORT_PORTM_PULLU_PIN10_Pos) +#define PORT_PORTM_PULLU_PIN11_Pos 11 +#define PORT_PORTM_PULLU_PIN11_Msk (0x01 << PORT_PORTM_PULLU_PIN11_Pos) +#define PORT_PORTM_PULLU_PIN12_Pos 12 +#define PORT_PORTM_PULLU_PIN12_Msk (0x01 << PORT_PORTM_PULLU_PIN12_Pos) +#define PORT_PORTM_PULLU_PIN13_Pos 13 +#define PORT_PORTM_PULLU_PIN13_Msk (0x01 << PORT_PORTM_PULLU_PIN13_Pos) +#define PORT_PORTM_PULLU_PIN14_Pos 14 +#define PORT_PORTM_PULLU_PIN14_Msk (0x01 << PORT_PORTM_PULLU_PIN14_Pos) +#define PORT_PORTM_PULLU_PIN15_Pos 15 +#define PORT_PORTM_PULLU_PIN15_Msk (0x01 << PORT_PORTM_PULLU_PIN15_Pos) +#define PORT_PORTM_PULLU_PIN16_Pos 16 +#define PORT_PORTM_PULLU_PIN16_Msk (0x01 << PORT_PORTM_PULLU_PIN16_Pos) +#define PORT_PORTM_PULLU_PIN17_Pos 17 +#define PORT_PORTM_PULLU_PIN17_Msk (0x01 << PORT_PORTM_PULLU_PIN17_Pos) +#define PORT_PORTM_PULLU_PIN18_Pos 18 +#define PORT_PORTM_PULLU_PIN18_Msk (0x01 << PORT_PORTM_PULLU_PIN18_Pos) +#define PORT_PORTM_PULLU_PIN19_Pos 19 +#define PORT_PORTM_PULLU_PIN19_Msk (0x01 << PORT_PORTM_PULLU_PIN19_Pos) +#define PORT_PORTM_PULLU_PIN20_Pos 20 +#define PORT_PORTM_PULLU_PIN20_Msk (0x01 << PORT_PORTM_PULLU_PIN20_Pos) +#define PORT_PORTM_PULLU_PIN21_Pos 21 +#define PORT_PORTM_PULLU_PIN21_Msk (0x01 << PORT_PORTM_PULLU_PIN21_Pos) +#define PORT_PORTM_PULLU_PIN22_Pos 22 +#define PORT_PORTM_PULLU_PIN22_Msk (0x01 << PORT_PORTM_PULLU_PIN22_Pos) +#define PORT_PORTM_PULLU_PIN23_Pos 23 +#define PORT_PORTM_PULLU_PIN23_Msk (0x01 << PORT_PORTM_PULLU_PIN23_Pos) + +#define PORT_PORTP_PULLU_PIN0_Pos 0 +#define PORT_PORTP_PULLU_PIN0_Msk (0x01 << PORT_PORTP_PULLU_PIN0_Pos) +#define PORT_PORTP_PULLU_PIN1_Pos 1 +#define PORT_PORTP_PULLU_PIN1_Msk (0x01 << PORT_PORTP_PULLU_PIN1_Pos) +#define PORT_PORTP_PULLU_PIN2_Pos 2 +#define PORT_PORTP_PULLU_PIN2_Msk (0x01 << PORT_PORTP_PULLU_PIN2_Pos) +#define PORT_PORTP_PULLU_PIN3_Pos 3 +#define PORT_PORTP_PULLU_PIN3_Msk (0x01 << PORT_PORTP_PULLU_PIN3_Pos) +#define PORT_PORTP_PULLU_PIN4_Pos 4 +#define PORT_PORTP_PULLU_PIN4_Msk (0x01 << PORT_PORTP_PULLU_PIN4_Pos) +#define PORT_PORTP_PULLU_PIN5_Pos 5 +#define PORT_PORTP_PULLU_PIN5_Msk (0x01 << PORT_PORTP_PULLU_PIN5_Pos) +#define PORT_PORTP_PULLU_PIN6_Pos 6 +#define PORT_PORTP_PULLU_PIN6_Msk (0x01 << PORT_PORTP_PULLU_PIN6_Pos) +#define PORT_PORTP_PULLU_PIN7_Pos 7 +#define PORT_PORTP_PULLU_PIN7_Msk (0x01 << PORT_PORTP_PULLU_PIN7_Pos) +#define PORT_PORTP_PULLU_PIN8_Pos 8 +#define PORT_PORTP_PULLU_PIN8_Msk (0x01 << PORT_PORTP_PULLU_PIN8_Pos) +#define PORT_PORTP_PULLU_PIN9_Pos 9 +#define PORT_PORTP_PULLU_PIN9_Msk (0x01 << PORT_PORTP_PULLU_PIN9_Pos) +#define PORT_PORTP_PULLU_PIN10_Pos 10 +#define PORT_PORTP_PULLU_PIN10_Msk (0x01 << PORT_PORTP_PULLU_PIN10_Pos) +#define PORT_PORTP_PULLU_PIN11_Pos 11 +#define PORT_PORTP_PULLU_PIN11_Msk (0x01 << PORT_PORTP_PULLU_PIN11_Pos) +#define PORT_PORTP_PULLU_PIN12_Pos 12 +#define PORT_PORTP_PULLU_PIN12_Msk (0x01 << PORT_PORTP_PULLU_PIN12_Pos) +#define PORT_PORTP_PULLU_PIN13_Pos 13 +#define PORT_PORTP_PULLU_PIN13_Msk (0x01 << PORT_PORTP_PULLU_PIN13_Pos) +#define PORT_PORTP_PULLU_PIN14_Pos 14 +#define PORT_PORTP_PULLU_PIN14_Msk (0x01 << PORT_PORTP_PULLU_PIN14_Pos) +#define PORT_PORTP_PULLU_PIN15_Pos 15 +#define PORT_PORTP_PULLU_PIN15_Msk (0x01 << PORT_PORTP_PULLU_PIN15_Pos) +#define PORT_PORTP_PULLU_PIN16_Pos 16 +#define PORT_PORTP_PULLU_PIN16_Msk (0x01 << PORT_PORTP_PULLU_PIN16_Pos) +#define PORT_PORTP_PULLU_PIN17_Pos 17 +#define PORT_PORTP_PULLU_PIN17_Msk (0x01 << PORT_PORTP_PULLU_PIN17_Pos) +#define PORT_PORTP_PULLU_PIN18_Pos 18 +#define PORT_PORTP_PULLU_PIN18_Msk (0x01 << PORT_PORTP_PULLU_PIN18_Pos) +#define PORT_PORTP_PULLU_PIN19_Pos 19 +#define PORT_PORTP_PULLU_PIN19_Msk (0x01 << PORT_PORTP_PULLU_PIN19_Pos) +#define PORT_PORTP_PULLU_PIN20_Pos 20 +#define PORT_PORTP_PULLU_PIN20_Msk (0x01 << PORT_PORTP_PULLU_PIN20_Pos) +#define PORT_PORTP_PULLU_PIN21_Pos 21 +#define PORT_PORTP_PULLU_PIN21_Msk (0x01 << PORT_PORTP_PULLU_PIN21_Pos) +#define PORT_PORTP_PULLU_PIN22_Pos 22 +#define PORT_PORTP_PULLU_PIN22_Msk (0x01 << PORT_PORTP_PULLU_PIN22_Pos) +#define PORT_PORTP_PULLU_PIN23_Pos 23 +#define PORT_PORTP_PULLU_PIN23_Msk (0x01 << PORT_PORTP_PULLU_PIN23_Pos) + +#define PORT_PORTB_PULLD_PIN0_Pos 0 +#define PORT_PORTB_PULLD_PIN0_Msk (0x01 << PORT_PORTB_PULLD_PIN0_Pos) +#define PORT_PORTB_PULLD_PIN1_Pos 1 +#define PORT_PORTB_PULLD_PIN1_Msk (0x01 << PORT_PORTB_PULLD_PIN1_Pos) +#define PORT_PORTB_PULLD_PIN2_Pos 2 +#define PORT_PORTB_PULLD_PIN2_Msk (0x01 << PORT_PORTB_PULLD_PIN2_Pos) +#define PORT_PORTB_PULLD_PIN3_Pos 3 +#define PORT_PORTB_PULLD_PIN3_Msk (0x01 << PORT_PORTB_PULLD_PIN3_Pos) +#define PORT_PORTB_PULLD_PIN4_Pos 4 +#define PORT_PORTB_PULLD_PIN4_Msk (0x01 << PORT_PORTB_PULLD_PIN4_Pos) +#define PORT_PORTB_PULLD_PIN5_Pos 5 +#define PORT_PORTB_PULLD_PIN5_Msk (0x01 << PORT_PORTB_PULLD_PIN5_Pos) +#define PORT_PORTB_PULLD_PIN6_Pos 6 +#define PORT_PORTB_PULLD_PIN6_Msk (0x01 << PORT_PORTB_PULLD_PIN6_Pos) +#define PORT_PORTB_PULLD_PIN7_Pos 7 +#define PORT_PORTB_PULLD_PIN7_Msk (0x01 << PORT_PORTB_PULLD_PIN7_Pos) +#define PORT_PORTB_PULLD_PIN8_Pos 8 +#define PORT_PORTB_PULLD_PIN8_Msk (0x01 << PORT_PORTB_PULLD_PIN8_Pos) +#define PORT_PORTB_PULLD_PIN9_Pos 9 +#define PORT_PORTB_PULLD_PIN9_Msk (0x01 << PORT_PORTB_PULLD_PIN9_Pos) +#define PORT_PORTB_PULLD_PIN10_Pos 10 +#define PORT_PORTB_PULLD_PIN10_Msk (0x01 << PORT_PORTB_PULLD_PIN10_Pos) +#define PORT_PORTB_PULLD_PIN11_Pos 11 +#define PORT_PORTB_PULLD_PIN11_Msk (0x01 << PORT_PORTB_PULLD_PIN11_Pos) +#define PORT_PORTB_PULLD_PIN12_Pos 12 +#define PORT_PORTB_PULLD_PIN12_Msk (0x01 << PORT_PORTB_PULLD_PIN12_Pos) +#define PORT_PORTB_PULLD_PIN13_Pos 13 +#define PORT_PORTB_PULLD_PIN13_Msk (0x01 << PORT_PORTB_PULLD_PIN13_Pos) +#define PORT_PORTB_PULLD_PIN14_Pos 14 +#define PORT_PORTB_PULLD_PIN14_Msk (0x01 << PORT_PORTB_PULLD_PIN14_Pos) +#define PORT_PORTB_PULLD_PIN15_Pos 15 +#define PORT_PORTB_PULLD_PIN15_Msk (0x01 << PORT_PORTB_PULLD_PIN15_Pos) + +#define PORT_PORTN_PULLD_PIN0_Pos 0 +#define PORT_PORTN_PULLD_PIN0_Msk (0x01 << PORT_PORTN_PULLD_PIN0_Pos) +#define PORT_PORTN_PULLD_PIN1_Pos 1 +#define PORT_PORTN_PULLD_PIN1_Msk (0x01 << PORT_PORTN_PULLD_PIN1_Pos) +#define PORT_PORTN_PULLD_PIN2_Pos 2 +#define PORT_PORTN_PULLD_PIN2_Msk (0x01 << PORT_PORTN_PULLD_PIN2_Pos) +#define PORT_PORTN_PULLD_PIN3_Pos 3 +#define PORT_PORTN_PULLD_PIN3_Msk (0x01 << PORT_PORTN_PULLD_PIN3_Pos) +#define PORT_PORTN_PULLD_PIN4_Pos 4 +#define PORT_PORTN_PULLD_PIN4_Msk (0x01 << PORT_PORTN_PULLD_PIN4_Pos) +#define PORT_PORTN_PULLD_PIN5_Pos 5 +#define PORT_PORTN_PULLD_PIN5_Msk (0x01 << PORT_PORTN_PULLD_PIN5_Pos) +#define PORT_PORTN_PULLD_PIN6_Pos 6 +#define PORT_PORTN_PULLD_PIN6_Msk (0x01 << PORT_PORTN_PULLD_PIN6_Pos) +#define PORT_PORTN_PULLD_PIN7_Pos 7 +#define PORT_PORTN_PULLD_PIN7_Msk (0x01 << PORT_PORTN_PULLD_PIN7_Pos) +#define PORT_PORTN_PULLD_PIN8_Pos 8 +#define PORT_PORTN_PULLD_PIN8_Msk (0x01 << PORT_PORTN_PULLD_PIN8_Pos) +#define PORT_PORTN_PULLD_PIN9_Pos 9 +#define PORT_PORTN_PULLD_PIN9_Msk (0x01 << PORT_PORTN_PULLD_PIN9_Pos) +#define PORT_PORTN_PULLD_PIN10_Pos 10 +#define PORT_PORTN_PULLD_PIN10_Msk (0x01 << PORT_PORTN_PULLD_PIN10_Pos) +#define PORT_PORTN_PULLD_PIN11_Pos 11 +#define PORT_PORTN_PULLD_PIN11_Msk (0x01 << PORT_PORTN_PULLD_PIN11_Pos) +#define PORT_PORTN_PULLD_PIN12_Pos 12 +#define PORT_PORTN_PULLD_PIN12_Msk (0x01 << PORT_PORTN_PULLD_PIN12_Pos) +#define PORT_PORTN_PULLD_PIN13_Pos 13 +#define PORT_PORTN_PULLD_PIN13_Msk (0x01 << PORT_PORTN_PULLD_PIN13_Pos) +#define PORT_PORTN_PULLD_PIN14_Pos 14 +#define PORT_PORTN_PULLD_PIN14_Msk (0x01 << PORT_PORTN_PULLD_PIN14_Pos) +#define PORT_PORTN_PULLD_PIN15_Pos 15 +#define PORT_PORTN_PULLD_PIN15_Msk (0x01 << PORT_PORTN_PULLD_PIN15_Pos) +#define PORT_PORTN_PULLD_PIN16_Pos 16 +#define PORT_PORTN_PULLD_PIN16_Msk (0x01 << PORT_PORTN_PULLD_PIN16_Pos) +#define PORT_PORTN_PULLD_PIN17_Pos 17 +#define PORT_PORTN_PULLD_PIN17_Msk (0x01 << PORT_PORTN_PULLD_PIN17_Pos) +#define PORT_PORTN_PULLD_PIN18_Pos 18 +#define PORT_PORTN_PULLD_PIN18_Msk (0x01 << PORT_PORTN_PULLD_PIN18_Pos) +#define PORT_PORTN_PULLD_PIN19_Pos 19 +#define PORT_PORTN_PULLD_PIN19_Msk (0x01 << PORT_PORTN_PULLD_PIN19_Pos) +#define PORT_PORTN_PULLD_PIN20_Pos 20 +#define PORT_PORTN_PULLD_PIN20_Msk (0x01 << PORT_PORTN_PULLD_PIN20_Pos) +#define PORT_PORTN_PULLD_PIN21_Pos 21 +#define PORT_PORTN_PULLD_PIN21_Msk (0x01 << PORT_PORTN_PULLD_PIN21_Pos) +#define PORT_PORTN_PULLD_PIN22_Pos 22 +#define PORT_PORTN_PULLD_PIN22_Msk (0x01 << PORT_PORTN_PULLD_PIN22_Pos) +#define PORT_PORTN_PULLD_PIN23_Pos 23 +#define PORT_PORTN_PULLD_PIN23_Msk (0x01 << PORT_PORTN_PULLD_PIN23_Pos) + +#define PORT_PORTM_DRIVS_PIN0_Pos 0 +#define PORT_PORTM_DRIVS_PIN0_Msk (0x01 << PORT_PORTM_DRIVS_PIN0_Pos) +#define PORT_PORTM_DRIVS_PIN1_Pos 1 +#define PORT_PORTM_DRIVS_PIN1_Msk (0x01 << PORT_PORTM_DRIVS_PIN1_Pos) +#define PORT_PORTM_DRIVS_PIN2_Pos 2 +#define PORT_PORTM_DRIVS_PIN2_Msk (0x01 << PORT_PORTM_DRIVS_PIN2_Pos) +#define PORT_PORTM_DRIVS_PIN3_Pos 3 +#define PORT_PORTM_DRIVS_PIN3_Msk (0x01 << PORT_PORTM_DRIVS_PIN3_Pos) +#define PORT_PORTM_DRIVS_PIN4_Pos 4 +#define PORT_PORTM_DRIVS_PIN4_Msk (0x01 << PORT_PORTM_DRIVS_PIN4_Pos) +#define PORT_PORTM_DRIVS_PIN5_Pos 5 +#define PORT_PORTM_DRIVS_PIN5_Msk (0x01 << PORT_PORTM_DRIVS_PIN5_Pos) +#define PORT_PORTM_DRIVS_PIN6_Pos 6 +#define PORT_PORTM_DRIVS_PIN6_Msk (0x01 << PORT_PORTM_DRIVS_PIN6_Pos) +#define PORT_PORTM_DRIVS_PIN7_Pos 7 +#define PORT_PORTM_DRIVS_PIN7_Msk (0x01 << PORT_PORTM_DRIVS_PIN7_Pos) +#define PORT_PORTM_DRIVS_PIN8_Pos 8 +#define PORT_PORTM_DRIVS_PIN8_Msk (0x01 << PORT_PORTM_DRIVS_PIN8_Pos) +#define PORT_PORTM_DRIVS_PIN9_Pos 9 +#define PORT_PORTM_DRIVS_PIN9_Msk (0x01 << PORT_PORTM_DRIVS_PIN9_Pos) +#define PORT_PORTM_DRIVS_PIN10_Pos 10 +#define PORT_PORTM_DRIVS_PIN10_Msk (0x01 << PORT_PORTM_DRIVS_PIN10_Pos) +#define PORT_PORTM_DRIVS_PIN11_Pos 11 +#define PORT_PORTM_DRIVS_PIN11_Msk (0x01 << PORT_PORTM_DRIVS_PIN11_Pos) +#define PORT_PORTM_DRIVS_PIN12_Pos 12 +#define PORT_PORTM_DRIVS_PIN12_Msk (0x01 << PORT_PORTM_DRIVS_PIN12_Pos) +#define PORT_PORTM_DRIVS_PIN13_Pos 13 +#define PORT_PORTM_DRIVS_PIN13_Msk (0x01 << PORT_PORTM_DRIVS_PIN13_Pos) +#define PORT_PORTM_DRIVS_PIN14_Pos 14 +#define PORT_PORTM_DRIVS_PIN14_Msk (0x01 << PORT_PORTM_DRIVS_PIN14_Pos) +#define PORT_PORTM_DRIVS_PIN15_Pos 15 +#define PORT_PORTM_DRIVS_PIN15_Msk (0x01 << PORT_PORTM_DRIVS_PIN15_Pos) +#define PORT_PORTM_DRIVS_PIN16_Pos 16 +#define PORT_PORTM_DRIVS_PIN16_Msk (0x01 << PORT_PORTM_DRIVS_PIN16_Pos) +#define PORT_PORTM_DRIVS_PIN17_Pos 17 +#define PORT_PORTM_DRIVS_PIN17_Msk (0x01 << PORT_PORTM_DRIVS_PIN17_Pos) +#define PORT_PORTM_DRIVS_PIN18_Pos 18 +#define PORT_PORTM_DRIVS_PIN18_Msk (0x01 << PORT_PORTM_DRIVS_PIN18_Pos) +#define PORT_PORTM_DRIVS_PIN19_Pos 19 +#define PORT_PORTM_DRIVS_PIN19_Msk (0x01 << PORT_PORTM_DRIVS_PIN19_Pos) +#define PORT_PORTM_DRIVS_PIN20_Pos 20 +#define PORT_PORTM_DRIVS_PIN20_Msk (0x01 << PORT_PORTM_DRIVS_PIN20_Pos) +#define PORT_PORTM_DRIVS_PIN21_Pos 21 +#define PORT_PORTM_DRIVS_PIN21_Msk (0x01 << PORT_PORTM_DRIVS_PIN21_Pos) +#define PORT_PORTM_DRIVS_PIN22_Pos 22 +#define PORT_PORTM_DRIVS_PIN22_Msk (0x01 << PORT_PORTM_DRIVS_PIN22_Pos) +#define PORT_PORTM_DRIVS_PIN23_Pos 23 +#define PORT_PORTM_DRIVS_PIN23_Msk (0x01 << PORT_PORTM_DRIVS_PIN23_Pos) + +#define PORT_PORTN_DRIVS_PIN0_Pos 0 +#define PORT_PORTN_DRIVS_PIN0_Msk (0x01 << PORT_PORTN_DRIVS_PIN0_Pos) +#define PORT_PORTN_DRIVS_PIN1_Pos 1 +#define PORT_PORTN_DRIVS_PIN1_Msk (0x01 << PORT_PORTN_DRIVS_PIN1_Pos) +#define PORT_PORTN_DRIVS_PIN2_Pos 2 +#define PORT_PORTN_DRIVS_PIN2_Msk (0x01 << PORT_PORTN_DRIVS_PIN2_Pos) +#define PORT_PORTN_DRIVS_PIN3_Pos 3 +#define PORT_PORTN_DRIVS_PIN3_Msk (0x01 << PORT_PORTN_DRIVS_PIN3_Pos) +#define PORT_PORTN_DRIVS_PIN4_Pos 4 +#define PORT_PORTN_DRIVS_PIN4_Msk (0x01 << PORT_PORTN_DRIVS_PIN4_Pos) +#define PORT_PORTN_DRIVS_PIN5_Pos 5 +#define PORT_PORTN_DRIVS_PIN5_Msk (0x01 << PORT_PORTN_DRIVS_PIN5_Pos) +#define PORT_PORTN_DRIVS_PIN6_Pos 6 +#define PORT_PORTN_DRIVS_PIN6_Msk (0x01 << PORT_PORTN_DRIVS_PIN6_Pos) +#define PORT_PORTN_DRIVS_PIN7_Pos 7 +#define PORT_PORTN_DRIVS_PIN7_Msk (0x01 << PORT_PORTN_DRIVS_PIN7_Pos) +#define PORT_PORTN_DRIVS_PIN8_Pos 8 +#define PORT_PORTN_DRIVS_PIN8_Msk (0x01 << PORT_PORTN_DRIVS_PIN8_Pos) +#define PORT_PORTN_DRIVS_PIN9_Pos 9 +#define PORT_PORTN_DRIVS_PIN9_Msk (0x01 << PORT_PORTN_DRIVS_PIN9_Pos) +#define PORT_PORTN_DRIVS_PIN10_Pos 10 +#define PORT_PORTN_DRIVS_PIN10_Msk (0x01 << PORT_PORTN_DRIVS_PIN10_Pos) +#define PORT_PORTN_DRIVS_PIN11_Pos 11 +#define PORT_PORTN_DRIVS_PIN11_Msk (0x01 << PORT_PORTN_DRIVS_PIN11_Pos) +#define PORT_PORTN_DRIVS_PIN12_Pos 12 +#define PORT_PORTN_DRIVS_PIN12_Msk (0x01 << PORT_PORTN_DRIVS_PIN12_Pos) +#define PORT_PORTN_DRIVS_PIN13_Pos 13 +#define PORT_PORTN_DRIVS_PIN13_Msk (0x01 << PORT_PORTN_DRIVS_PIN13_Pos) +#define PORT_PORTN_DRIVS_PIN14_Pos 14 +#define PORT_PORTN_DRIVS_PIN14_Msk (0x01 << PORT_PORTN_DRIVS_PIN14_Pos) +#define PORT_PORTN_DRIVS_PIN15_Pos 15 +#define PORT_PORTN_DRIVS_PIN15_Msk (0x01 << PORT_PORTN_DRIVS_PIN15_Pos) +#define PORT_PORTN_DRIVS_PIN16_Pos 16 +#define PORT_PORTN_DRIVS_PIN16_Msk (0x01 << PORT_PORTN_DRIVS_PIN16_Pos) +#define PORT_PORTN_DRIVS_PIN17_Pos 17 +#define PORT_PORTN_DRIVS_PIN17_Msk (0x01 << PORT_PORTN_DRIVS_PIN17_Pos) +#define PORT_PORTN_DRIVS_PIN18_Pos 18 +#define PORT_PORTN_DRIVS_PIN18_Msk (0x01 << PORT_PORTN_DRIVS_PIN18_Pos) +#define PORT_PORTN_DRIVS_PIN19_Pos 19 +#define PORT_PORTN_DRIVS_PIN19_Msk (0x01 << PORT_PORTN_DRIVS_PIN19_Pos) +#define PORT_PORTN_DRIVS_PIN20_Pos 20 +#define PORT_PORTN_DRIVS_PIN20_Msk (0x01 << PORT_PORTN_DRIVS_PIN20_Pos) +#define PORT_PORTN_DRIVS_PIN21_Pos 21 +#define PORT_PORTN_DRIVS_PIN21_Msk (0x01 << PORT_PORTN_DRIVS_PIN21_Pos) +#define PORT_PORTN_DRIVS_PIN22_Pos 22 +#define PORT_PORTN_DRIVS_PIN22_Msk (0x01 << PORT_PORTN_DRIVS_PIN22_Pos) +#define PORT_PORTN_DRIVS_PIN23_Pos 23 +#define PORT_PORTN_DRIVS_PIN23_Msk (0x01 << PORT_PORTN_DRIVS_PIN23_Pos) + +#define PORT_PORTP_DRIVS_PIN0_Pos 0 +#define PORT_PORTP_DRIVS_PIN0_Msk (0x01 << PORT_PORTP_DRIVS_PIN0_Pos) +#define PORT_PORTP_DRIVS_PIN1_Pos 1 +#define PORT_PORTP_DRIVS_PIN1_Msk (0x01 << PORT_PORTP_DRIVS_PIN1_Pos) +#define PORT_PORTP_DRIVS_PIN2_Pos 2 +#define PORT_PORTP_DRIVS_PIN2_Msk (0x01 << PORT_PORTP_DRIVS_PIN2_Pos) +#define PORT_PORTP_DRIVS_PIN3_Pos 3 +#define PORT_PORTP_DRIVS_PIN3_Msk (0x01 << PORT_PORTP_DRIVS_PIN3_Pos) +#define PORT_PORTP_DRIVS_PIN4_Pos 4 +#define PORT_PORTP_DRIVS_PIN4_Msk (0x01 << PORT_PORTP_DRIVS_PIN4_Pos) +#define PORT_PORTP_DRIVS_PIN5_Pos 5 +#define PORT_PORTP_DRIVS_PIN5_Msk (0x01 << PORT_PORTP_DRIVS_PIN5_Pos) +#define PORT_PORTP_DRIVS_PIN6_Pos 6 +#define PORT_PORTP_DRIVS_PIN6_Msk (0x01 << PORT_PORTP_DRIVS_PIN6_Pos) +#define PORT_PORTP_DRIVS_PIN7_Pos 7 +#define PORT_PORTP_DRIVS_PIN7_Msk (0x01 << PORT_PORTP_DRIVS_PIN7_Pos) +#define PORT_PORTP_DRIVS_PIN8_Pos 8 +#define PORT_PORTP_DRIVS_PIN8_Msk (0x01 << PORT_PORTP_DRIVS_PIN8_Pos) +#define PORT_PORTP_DRIVS_PIN9_Pos 9 +#define PORT_PORTP_DRIVS_PIN9_Msk (0x01 << PORT_PORTP_DRIVS_PIN9_Pos) +#define PORT_PORTP_DRIVS_PIN10_Pos 10 +#define PORT_PORTP_DRIVS_PIN10_Msk (0x01 << PORT_PORTP_DRIVS_PIN10_Pos) +#define PORT_PORTP_DRIVS_PIN11_Pos 11 +#define PORT_PORTP_DRIVS_PIN11_Msk (0x01 << PORT_PORTP_DRIVS_PIN11_Pos) +#define PORT_PORTP_DRIVS_PIN12_Pos 12 +#define PORT_PORTP_DRIVS_PIN12_Msk (0x01 << PORT_PORTP_DRIVS_PIN12_Pos) +#define PORT_PORTP_DRIVS_PIN13_Pos 13 +#define PORT_PORTP_DRIVS_PIN13_Msk (0x01 << PORT_PORTP_DRIVS_PIN13_Pos) +#define PORT_PORTP_DRIVS_PIN14_Pos 14 +#define PORT_PORTP_DRIVS_PIN14_Msk (0x01 << PORT_PORTP_DRIVS_PIN14_Pos) +#define PORT_PORTP_DRIVS_PIN15_Pos 15 +#define PORT_PORTP_DRIVS_PIN15_Msk (0x01 << PORT_PORTP_DRIVS_PIN15_Pos) +#define PORT_PORTP_DRIVS_PIN16_Pos 16 +#define PORT_PORTP_DRIVS_PIN16_Msk (0x01 << PORT_PORTP_DRIVS_PIN16_Pos) +#define PORT_PORTP_DRIVS_PIN17_Pos 17 +#define PORT_PORTP_DRIVS_PIN17_Msk (0x01 << PORT_PORTP_DRIVS_PIN17_Pos) +#define PORT_PORTP_DRIVS_PIN18_Pos 18 +#define PORT_PORTP_DRIVS_PIN18_Msk (0x01 << PORT_PORTP_DRIVS_PIN18_Pos) +#define PORT_PORTP_DRIVS_PIN19_Pos 19 +#define PORT_PORTP_DRIVS_PIN19_Msk (0x01 << PORT_PORTP_DRIVS_PIN19_Pos) +#define PORT_PORTP_DRIVS_PIN20_Pos 20 +#define PORT_PORTP_DRIVS_PIN20_Msk (0x01 << PORT_PORTP_DRIVS_PIN20_Pos) +#define PORT_PORTP_DRIVS_PIN21_Pos 21 +#define PORT_PORTP_DRIVS_PIN21_Msk (0x01 << PORT_PORTP_DRIVS_PIN21_Pos) +#define PORT_PORTP_DRIVS_PIN22_Pos 22 +#define PORT_PORTP_DRIVS_PIN22_Msk (0x01 << PORT_PORTP_DRIVS_PIN22_Pos) +#define PORT_PORTP_DRIVS_PIN23_Pos 23 +#define PORT_PORTP_DRIVS_PIN23_Msk (0x01 << PORT_PORTP_DRIVS_PIN23_Pos) + +#define PORT_PORTA_INEN_PIN0_Pos 0 +#define PORT_PORTA_INEN_PIN0_Msk (0x01 << PORT_PORTA_INEN_PIN0_Pos) +#define PORT_PORTA_INEN_PIN1_Pos 1 +#define PORT_PORTA_INEN_PIN1_Msk (0x01 << PORT_PORTA_INEN_PIN1_Pos) +#define PORT_PORTA_INEN_PIN2_Pos 2 +#define PORT_PORTA_INEN_PIN2_Msk (0x01 << PORT_PORTA_INEN_PIN2_Pos) +#define PORT_PORTA_INEN_PIN3_Pos 3 +#define PORT_PORTA_INEN_PIN3_Msk (0x01 << PORT_PORTA_INEN_PIN3_Pos) +#define PORT_PORTA_INEN_PIN4_Pos 4 +#define PORT_PORTA_INEN_PIN4_Msk (0x01 << PORT_PORTA_INEN_PIN4_Pos) +#define PORT_PORTA_INEN_PIN5_Pos 5 +#define PORT_PORTA_INEN_PIN5_Msk (0x01 << PORT_PORTA_INEN_PIN5_Pos) +#define PORT_PORTA_INEN_PIN6_Pos 6 +#define PORT_PORTA_INEN_PIN6_Msk (0x01 << PORT_PORTA_INEN_PIN6_Pos) +#define PORT_PORTA_INEN_PIN7_Pos 7 +#define PORT_PORTA_INEN_PIN7_Msk (0x01 << PORT_PORTA_INEN_PIN7_Pos) +#define PORT_PORTA_INEN_PIN8_Pos 8 +#define PORT_PORTA_INEN_PIN8_Msk (0x01 << PORT_PORTA_INEN_PIN8_Pos) +#define PORT_PORTA_INEN_PIN9_Pos 9 +#define PORT_PORTA_INEN_PIN9_Msk (0x01 << PORT_PORTA_INEN_PIN9_Pos) +#define PORT_PORTA_INEN_PIN10_Pos 10 +#define PORT_PORTA_INEN_PIN10_Msk (0x01 << PORT_PORTA_INEN_PIN10_Pos) +#define PORT_PORTA_INEN_PIN11_Pos 11 +#define PORT_PORTA_INEN_PIN11_Msk (0x01 << PORT_PORTA_INEN_PIN11_Pos) +#define PORT_PORTA_INEN_PIN12_Pos 12 +#define PORT_PORTA_INEN_PIN12_Msk (0x01 << PORT_PORTA_INEN_PIN12_Pos) +#define PORT_PORTA_INEN_PIN13_Pos 13 +#define PORT_PORTA_INEN_PIN13_Msk (0x01 << PORT_PORTA_INEN_PIN13_Pos) +#define PORT_PORTA_INEN_PIN14_Pos 14 +#define PORT_PORTA_INEN_PIN14_Msk (0x01 << PORT_PORTA_INEN_PIN14_Pos) +#define PORT_PORTA_INEN_PIN15_Pos 15 +#define PORT_PORTA_INEN_PIN15_Msk (0x01 << PORT_PORTA_INEN_PIN15_Pos) + +#define PORT_PORTB_INEN_PIN0_Pos 0 +#define PORT_PORTB_INEN_PIN0_Msk (0x01 << PORT_PORTB_INEN_PIN0_Pos) +#define PORT_PORTB_INEN_PIN1_Pos 1 +#define PORT_PORTB_INEN_PIN1_Msk (0x01 << PORT_PORTB_INEN_PIN1_Pos) +#define PORT_PORTB_INEN_PIN2_Pos 2 +#define PORT_PORTB_INEN_PIN2_Msk (0x01 << PORT_PORTB_INEN_PIN2_Pos) +#define PORT_PORTB_INEN_PIN3_Pos 3 +#define PORT_PORTB_INEN_PIN3_Msk (0x01 << PORT_PORTB_INEN_PIN3_Pos) +#define PORT_PORTB_INEN_PIN4_Pos 4 +#define PORT_PORTB_INEN_PIN4_Msk (0x01 << PORT_PORTB_INEN_PIN4_Pos) +#define PORT_PORTB_INEN_PIN5_Pos 5 +#define PORT_PORTB_INEN_PIN5_Msk (0x01 << PORT_PORTB_INEN_PIN5_Pos) +#define PORT_PORTB_INEN_PIN6_Pos 6 +#define PORT_PORTB_INEN_PIN6_Msk (0x01 << PORT_PORTB_INEN_PIN6_Pos) +#define PORT_PORTB_INEN_PIN7_Pos 7 +#define PORT_PORTB_INEN_PIN7_Msk (0x01 << PORT_PORTB_INEN_PIN7_Pos) +#define PORT_PORTB_INEN_PIN8_Pos 8 +#define PORT_PORTB_INEN_PIN8_Msk (0x01 << PORT_PORTB_INEN_PIN8_Pos) +#define PORT_PORTB_INEN_PIN9_Pos 9 +#define PORT_PORTB_INEN_PIN9_Msk (0x01 << PORT_PORTB_INEN_PIN9_Pos) +#define PORT_PORTB_INEN_PIN10_Pos 10 +#define PORT_PORTB_INEN_PIN10_Msk (0x01 << PORT_PORTB_INEN_PIN10_Pos) +#define PORT_PORTB_INEN_PIN11_Pos 11 +#define PORT_PORTB_INEN_PIN11_Msk (0x01 << PORT_PORTB_INEN_PIN11_Pos) +#define PORT_PORTB_INEN_PIN12_Pos 12 +#define PORT_PORTB_INEN_PIN12_Msk (0x01 << PORT_PORTB_INEN_PIN12_Pos) +#define PORT_PORTB_INEN_PIN13_Pos 13 +#define PORT_PORTB_INEN_PIN13_Msk (0x01 << PORT_PORTB_INEN_PIN13_Pos) +#define PORT_PORTB_INEN_PIN14_Pos 14 +#define PORT_PORTB_INEN_PIN14_Msk (0x01 << PORT_PORTB_INEN_PIN14_Pos) +#define PORT_PORTB_INEN_PIN15_Pos 15 +#define PORT_PORTB_INEN_PIN15_Msk (0x01 << PORT_PORTB_INEN_PIN15_Pos) + +#define PORT_PORTC_INEN_PIN0_Pos 0 +#define PORT_PORTC_INEN_PIN0_Msk (0x01 << PORT_PORTC_INEN_PIN0_Pos) +#define PORT_PORTC_INEN_PIN1_Pos 1 +#define PORT_PORTC_INEN_PIN1_Msk (0x01 << PORT_PORTC_INEN_PIN1_Pos) +#define PORT_PORTC_INEN_PIN2_Pos 2 +#define PORT_PORTC_INEN_PIN2_Msk (0x01 << PORT_PORTC_INEN_PIN2_Pos) +#define PORT_PORTC_INEN_PIN3_Pos 3 +#define PORT_PORTC_INEN_PIN3_Msk (0x01 << PORT_PORTC_INEN_PIN3_Pos) +#define PORT_PORTC_INEN_PIN4_Pos 4 +#define PORT_PORTC_INEN_PIN4_Msk (0x01 << PORT_PORTC_INEN_PIN4_Pos) +#define PORT_PORTC_INEN_PIN5_Pos 5 +#define PORT_PORTC_INEN_PIN5_Msk (0x01 << PORT_PORTC_INEN_PIN5_Pos) +#define PORT_PORTC_INEN_PIN6_Pos 6 +#define PORT_PORTC_INEN_PIN6_Msk (0x01 << PORT_PORTC_INEN_PIN6_Pos) +#define PORT_PORTC_INEN_PIN7_Pos 7 +#define PORT_PORTC_INEN_PIN7_Msk (0x01 << PORT_PORTC_INEN_PIN7_Pos) +#define PORT_PORTC_INEN_PIN8_Pos 8 +#define PORT_PORTC_INEN_PIN8_Msk (0x01 << PORT_PORTC_INEN_PIN8_Pos) +#define PORT_PORTC_INEN_PIN9_Pos 9 +#define PORT_PORTC_INEN_PIN9_Msk (0x01 << PORT_PORTC_INEN_PIN9_Pos) +#define PORT_PORTC_INEN_PIN10_Pos 10 +#define PORT_PORTC_INEN_PIN10_Msk (0x01 << PORT_PORTC_INEN_PIN10_Pos) +#define PORT_PORTC_INEN_PIN11_Pos 11 +#define PORT_PORTC_INEN_PIN11_Msk (0x01 << PORT_PORTC_INEN_PIN11_Pos) +#define PORT_PORTC_INEN_PIN12_Pos 12 +#define PORT_PORTC_INEN_PIN12_Msk (0x01 << PORT_PORTC_INEN_PIN12_Pos) +#define PORT_PORTC_INEN_PIN13_Pos 13 +#define PORT_PORTC_INEN_PIN13_Msk (0x01 << PORT_PORTC_INEN_PIN13_Pos) +#define PORT_PORTC_INEN_PIN14_Pos 14 +#define PORT_PORTC_INEN_PIN14_Msk (0x01 << PORT_PORTC_INEN_PIN14_Pos) +#define PORT_PORTC_INEN_PIN15_Pos 15 +#define PORT_PORTC_INEN_PIN15_Msk (0x01 << PORT_PORTC_INEN_PIN15_Pos) + +#define PORT_PORTM_INEN_PIN0_Pos 0 +#define PORT_PORTM_INEN_PIN0_Msk (0x01 << PORT_PORTM_INEN_PIN0_Pos) +#define PORT_PORTM_INEN_PIN1_Pos 1 +#define PORT_PORTM_INEN_PIN1_Msk (0x01 << PORT_PORTM_INEN_PIN1_Pos) +#define PORT_PORTM_INEN_PIN2_Pos 2 +#define PORT_PORTM_INEN_PIN2_Msk (0x01 << PORT_PORTM_INEN_PIN2_Pos) +#define PORT_PORTM_INEN_PIN3_Pos 3 +#define PORT_PORTM_INEN_PIN3_Msk (0x01 << PORT_PORTM_INEN_PIN3_Pos) +#define PORT_PORTM_INEN_PIN4_Pos 4 +#define PORT_PORTM_INEN_PIN4_Msk (0x01 << PORT_PORTM_INEN_PIN4_Pos) +#define PORT_PORTM_INEN_PIN5_Pos 5 +#define PORT_PORTM_INEN_PIN5_Msk (0x01 << PORT_PORTM_INEN_PIN5_Pos) +#define PORT_PORTM_INEN_PIN6_Pos 6 +#define PORT_PORTM_INEN_PIN6_Msk (0x01 << PORT_PORTM_INEN_PIN6_Pos) +#define PORT_PORTM_INEN_PIN7_Pos 7 +#define PORT_PORTM_INEN_PIN7_Msk (0x01 << PORT_PORTM_INEN_PIN7_Pos) +#define PORT_PORTM_INEN_PIN8_Pos 8 +#define PORT_PORTM_INEN_PIN8_Msk (0x01 << PORT_PORTM_INEN_PIN8_Pos) +#define PORT_PORTM_INEN_PIN9_Pos 9 +#define PORT_PORTM_INEN_PIN9_Msk (0x01 << PORT_PORTM_INEN_PIN9_Pos) +#define PORT_PORTM_INEN_PIN10_Pos 10 +#define PORT_PORTM_INEN_PIN10_Msk (0x01 << PORT_PORTM_INEN_PIN10_Pos) +#define PORT_PORTM_INEN_PIN11_Pos 11 +#define PORT_PORTM_INEN_PIN11_Msk (0x01 << PORT_PORTM_INEN_PIN11_Pos) +#define PORT_PORTM_INEN_PIN12_Pos 12 +#define PORT_PORTM_INEN_PIN12_Msk (0x01 << PORT_PORTM_INEN_PIN12_Pos) +#define PORT_PORTM_INEN_PIN13_Pos 13 +#define PORT_PORTM_INEN_PIN13_Msk (0x01 << PORT_PORTM_INEN_PIN13_Pos) +#define PORT_PORTM_INEN_PIN14_Pos 14 +#define PORT_PORTM_INEN_PIN14_Msk (0x01 << PORT_PORTM_INEN_PIN14_Pos) +#define PORT_PORTM_INEN_PIN15_Pos 15 +#define PORT_PORTM_INEN_PIN15_Msk (0x01 << PORT_PORTM_INEN_PIN15_Pos) +#define PORT_PORTM_INEN_PIN16_Pos 16 +#define PORT_PORTM_INEN_PIN16_Msk (0x01 << PORT_PORTM_INEN_PIN16_Pos) +#define PORT_PORTM_INEN_PIN17_Pos 17 +#define PORT_PORTM_INEN_PIN17_Msk (0x01 << PORT_PORTM_INEN_PIN17_Pos) +#define PORT_PORTM_INEN_PIN18_Pos 18 +#define PORT_PORTM_INEN_PIN18_Msk (0x01 << PORT_PORTM_INEN_PIN18_Pos) +#define PORT_PORTM_INEN_PIN19_Pos 19 +#define PORT_PORTM_INEN_PIN19_Msk (0x01 << PORT_PORTM_INEN_PIN19_Pos) +#define PORT_PORTM_INEN_PIN20_Pos 20 +#define PORT_PORTM_INEN_PIN20_Msk (0x01 << PORT_PORTM_INEN_PIN20_Pos) +#define PORT_PORTM_INEN_PIN21_Pos 21 +#define PORT_PORTM_INEN_PIN21_Msk (0x01 << PORT_PORTM_INEN_PIN21_Pos) +#define PORT_PORTM_INEN_PIN22_Pos 22 +#define PORT_PORTM_INEN_PIN22_Msk (0x01 << PORT_PORTM_INEN_PIN22_Pos) +#define PORT_PORTM_INEN_PIN23_Pos 23 +#define PORT_PORTM_INEN_PIN23_Msk (0x01 << PORT_PORTM_INEN_PIN23_Pos) + +#define PORT_PORTN_INEN_PIN0_Pos 0 +#define PORT_PORTN_INEN_PIN0_Msk (0x01 << PORT_PORTN_INEN_PIN0_Pos) +#define PORT_PORTN_INEN_PIN1_Pos 1 +#define PORT_PORTN_INEN_PIN1_Msk (0x01 << PORT_PORTN_INEN_PIN1_Pos) +#define PORT_PORTN_INEN_PIN2_Pos 2 +#define PORT_PORTN_INEN_PIN2_Msk (0x01 << PORT_PORTN_INEN_PIN2_Pos) +#define PORT_PORTN_INEN_PIN3_Pos 3 +#define PORT_PORTN_INEN_PIN3_Msk (0x01 << PORT_PORTN_INEN_PIN3_Pos) +#define PORT_PORTN_INEN_PIN4_Pos 4 +#define PORT_PORTN_INEN_PIN4_Msk (0x01 << PORT_PORTN_INEN_PIN4_Pos) +#define PORT_PORTN_INEN_PIN5_Pos 5 +#define PORT_PORTN_INEN_PIN5_Msk (0x01 << PORT_PORTN_INEN_PIN5_Pos) +#define PORT_PORTN_INEN_PIN6_Pos 6 +#define PORT_PORTN_INEN_PIN6_Msk (0x01 << PORT_PORTN_INEN_PIN6_Pos) +#define PORT_PORTN_INEN_PIN7_Pos 7 +#define PORT_PORTN_INEN_PIN7_Msk (0x01 << PORT_PORTN_INEN_PIN7_Pos) +#define PORT_PORTN_INEN_PIN8_Pos 8 +#define PORT_PORTN_INEN_PIN8_Msk (0x01 << PORT_PORTN_INEN_PIN8_Pos) +#define PORT_PORTN_INEN_PIN9_Pos 9 +#define PORT_PORTN_INEN_PIN9_Msk (0x01 << PORT_PORTN_INEN_PIN9_Pos) +#define PORT_PORTN_INEN_PIN10_Pos 10 +#define PORT_PORTN_INEN_PIN10_Msk (0x01 << PORT_PORTN_INEN_PIN10_Pos) +#define PORT_PORTN_INEN_PIN11_Pos 11 +#define PORT_PORTN_INEN_PIN11_Msk (0x01 << PORT_PORTN_INEN_PIN11_Pos) +#define PORT_PORTN_INEN_PIN12_Pos 12 +#define PORT_PORTN_INEN_PIN12_Msk (0x01 << PORT_PORTN_INEN_PIN12_Pos) +#define PORT_PORTN_INEN_PIN13_Pos 13 +#define PORT_PORTN_INEN_PIN13_Msk (0x01 << PORT_PORTN_INEN_PIN13_Pos) +#define PORT_PORTN_INEN_PIN14_Pos 14 +#define PORT_PORTN_INEN_PIN14_Msk (0x01 << PORT_PORTN_INEN_PIN14_Pos) +#define PORT_PORTN_INEN_PIN15_Pos 15 +#define PORT_PORTN_INEN_PIN15_Msk (0x01 << PORT_PORTN_INEN_PIN15_Pos) +#define PORT_PORTN_INEN_PIN16_Pos 16 +#define PORT_PORTN_INEN_PIN16_Msk (0x01 << PORT_PORTN_INEN_PIN16_Pos) +#define PORT_PORTN_INEN_PIN17_Pos 17 +#define PORT_PORTN_INEN_PIN17_Msk (0x01 << PORT_PORTN_INEN_PIN17_Pos) +#define PORT_PORTN_INEN_PIN18_Pos 18 +#define PORT_PORTN_INEN_PIN18_Msk (0x01 << PORT_PORTN_INEN_PIN18_Pos) +#define PORT_PORTN_INEN_PIN19_Pos 19 +#define PORT_PORTN_INEN_PIN19_Msk (0x01 << PORT_PORTN_INEN_PIN19_Pos) +#define PORT_PORTN_INEN_PIN20_Pos 20 +#define PORT_PORTN_INEN_PIN20_Msk (0x01 << PORT_PORTN_INEN_PIN20_Pos) +#define PORT_PORTN_INEN_PIN21_Pos 21 +#define PORT_PORTN_INEN_PIN21_Msk (0x01 << PORT_PORTN_INEN_PIN21_Pos) +#define PORT_PORTN_INEN_PIN22_Pos 22 +#define PORT_PORTN_INEN_PIN22_Msk (0x01 << PORT_PORTN_INEN_PIN22_Pos) +#define PORT_PORTN_INEN_PIN23_Pos 23 +#define PORT_PORTN_INEN_PIN23_Msk (0x01 << PORT_PORTN_INEN_PIN23_Pos) + +#define PORT_PORTP_INEN_PIN0_Pos 0 +#define PORT_PORTP_INEN_PIN0_Msk (0x01 << PORT_PORTP_INEN_PIN0_Pos) +#define PORT_PORTP_INEN_PIN1_Pos 1 +#define PORT_PORTP_INEN_PIN1_Msk (0x01 << PORT_PORTP_INEN_PIN1_Pos) +#define PORT_PORTP_INEN_PIN2_Pos 2 +#define PORT_PORTP_INEN_PIN2_Msk (0x01 << PORT_PORTP_INEN_PIN2_Pos) +#define PORT_PORTP_INEN_PIN3_Pos 3 +#define PORT_PORTP_INEN_PIN3_Msk (0x01 << PORT_PORTP_INEN_PIN3_Pos) +#define PORT_PORTP_INEN_PIN4_Pos 4 +#define PORT_PORTP_INEN_PIN4_Msk (0x01 << PORT_PORTP_INEN_PIN4_Pos) +#define PORT_PORTP_INEN_PIN5_Pos 5 +#define PORT_PORTP_INEN_PIN5_Msk (0x01 << PORT_PORTP_INEN_PIN5_Pos) +#define PORT_PORTP_INEN_PIN6_Pos 6 +#define PORT_PORTP_INEN_PIN6_Msk (0x01 << PORT_PORTP_INEN_PIN6_Pos) +#define PORT_PORTP_INEN_PIN7_Pos 7 +#define PORT_PORTP_INEN_PIN7_Msk (0x01 << PORT_PORTP_INEN_PIN7_Pos) +#define PORT_PORTP_INEN_PIN8_Pos 8 +#define PORT_PORTP_INEN_PIN8_Msk (0x01 << PORT_PORTP_INEN_PIN8_Pos) +#define PORT_PORTP_INEN_PIN9_Pos 9 +#define PORT_PORTP_INEN_PIN9_Msk (0x01 << PORT_PORTP_INEN_PIN9_Pos) +#define PORT_PORTP_INEN_PIN10_Pos 10 +#define PORT_PORTP_INEN_PIN10_Msk (0x01 << PORT_PORTP_INEN_PIN10_Pos) +#define PORT_PORTP_INEN_PIN11_Pos 11 +#define PORT_PORTP_INEN_PIN11_Msk (0x01 << PORT_PORTP_INEN_PIN11_Pos) +#define PORT_PORTP_INEN_PIN12_Pos 12 +#define PORT_PORTP_INEN_PIN12_Msk (0x01 << PORT_PORTP_INEN_PIN12_Pos) +#define PORT_PORTP_INEN_PIN13_Pos 13 +#define PORT_PORTP_INEN_PIN13_Msk (0x01 << PORT_PORTP_INEN_PIN13_Pos) +#define PORT_PORTP_INEN_PIN14_Pos 14 +#define PORT_PORTP_INEN_PIN14_Msk (0x01 << PORT_PORTP_INEN_PIN14_Pos) +#define PORT_PORTP_INEN_PIN15_Pos 15 +#define PORT_PORTP_INEN_PIN15_Msk (0x01 << PORT_PORTP_INEN_PIN15_Pos) +#define PORT_PORTP_INEN_PIN16_Pos 16 +#define PORT_PORTP_INEN_PIN16_Msk (0x01 << PORT_PORTP_INEN_PIN16_Pos) +#define PORT_PORTP_INEN_PIN17_Pos 17 +#define PORT_PORTP_INEN_PIN17_Msk (0x01 << PORT_PORTP_INEN_PIN17_Pos) +#define PORT_PORTP_INEN_PIN18_Pos 18 +#define PORT_PORTP_INEN_PIN18_Msk (0x01 << PORT_PORTP_INEN_PIN18_Pos) +#define PORT_PORTP_INEN_PIN19_Pos 19 +#define PORT_PORTP_INEN_PIN19_Msk (0x01 << PORT_PORTP_INEN_PIN19_Pos) +#define PORT_PORTP_INEN_PIN20_Pos 20 +#define PORT_PORTP_INEN_PIN20_Msk (0x01 << PORT_PORTP_INEN_PIN20_Pos) +#define PORT_PORTP_INEN_PIN21_Pos 21 +#define PORT_PORTP_INEN_PIN21_Msk (0x01 << PORT_PORTP_INEN_PIN21_Pos) +#define PORT_PORTP_INEN_PIN22_Pos 22 +#define PORT_PORTP_INEN_PIN22_Msk (0x01 << PORT_PORTP_INEN_PIN22_Pos) +#define PORT_PORTP_INEN_PIN23_Pos 23 +#define PORT_PORTP_INEN_PIN23_Msk (0x01 << PORT_PORTP_INEN_PIN23_Pos) + + + + +typedef struct { + __IO uint32_t DATA; +#define PIN0 0 +#define PIN1 1 +#define PIN2 2 +#define PIN3 3 +#define PIN4 4 +#define PIN5 5 +#define PIN6 6 +#define PIN7 7 +#define PIN8 8 +#define PIN9 9 +#define PIN10 10 +#define PIN11 11 +#define PIN12 12 +#define PIN13 13 +#define PIN14 14 +#define PIN15 15 +#define PIN16 16 +#define PIN17 17 +#define PIN18 18 +#define PIN19 19 +#define PIN20 20 +#define PIN21 21 +#define PIN22 22 +#define PIN23 23 +#define PIN24 24 + + __IO uint32_t DIR; //0 1 + + __IO uint32_t INTLVLTRG; //Interrupt Level Trigger 1 ƽж 0 شж + + __IO uint32_t INTBE; //Both EdgeINTLVLTRGΪشжʱλ1ʾغ½ضжϣ0ʱINTRISEENѡ + + __IO uint32_t INTRISEEN; //Interrupt Rise Edge Enable 1 /ߵƽж 0 ½/͵ƽж + + __IO uint32_t INTEN; //1 жʹ 0 жϽֹ + + __IO uint32_t INTRAWSTAT; //жϼⵥԪǷ⵽˴жϵ 1 ⵽жϴ 0 ûм⵽жϴ + + __IO uint32_t INTSTAT; //INTSTAT.PIN0 = INTRAWSTAT.PIN0 & INTEN.PIN0 + + __IO uint32_t INTCLR; //д1жϱ־ֻԱشж +} GPIO_TypeDef; - __I uint32_t CVAL; //定时器当前值，LDVAL-CVAL 可计算出计时时长 - __IO uint32_t CTRL; +#define GPIO_DATA_PIN0_Pos 0 +#define GPIO_DATA_PIN0_Msk (0x01 << GPIO_DATA_PIN0_Pos) +#define GPIO_DATA_PIN1_Pos 1 +#define GPIO_DATA_PIN1_Msk (0x01 << GPIO_DATA_PIN1_Pos) +#define GPIO_DATA_PIN2_Pos 2 +#define GPIO_DATA_PIN2_Msk (0x01 << GPIO_DATA_PIN2_Pos) +#define GPIO_DATA_PIN3_Pos 3 +#define GPIO_DATA_PIN3_Msk (0x01 << GPIO_DATA_PIN3_Pos) +#define GPIO_DATA_PIN4_Pos 4 +#define GPIO_DATA_PIN4_Msk (0x01 << GPIO_DATA_PIN4_Pos) +#define GPIO_DATA_PIN5_Pos 5 +#define GPIO_DATA_PIN5_Msk (0x01 << GPIO_DATA_PIN5_Pos) +#define GPIO_DATA_PIN6_Pos 6 +#define GPIO_DATA_PIN6_Msk (0x01 << GPIO_DATA_PIN6_Pos) +#define GPIO_DATA_PIN7_Pos 7 +#define GPIO_DATA_PIN7_Msk (0x01 << GPIO_DATA_PIN7_Pos) +#define GPIO_DATA_PIN8_Pos 8 +#define GPIO_DATA_PIN8_Msk (0x01 << GPIO_DATA_PIN8_Pos) +#define GPIO_DATA_PIN9_Pos 9 +#define GPIO_DATA_PIN9_Msk (0x01 << GPIO_DATA_PIN9_Pos) +#define GPIO_DATA_PIN10_Pos 10 +#define GPIO_DATA_PIN10_Msk (0x01 << GPIO_DATA_PIN10_Pos) +#define GPIO_DATA_PIN11_Pos 11 +#define GPIO_DATA_PIN11_Msk (0x01 << GPIO_DATA_PIN11_Pos) +#define GPIO_DATA_PIN12_Pos 12 +#define GPIO_DATA_PIN12_Msk (0x01 << GPIO_DATA_PIN12_Pos) +#define GPIO_DATA_PIN13_Pos 13 +#define GPIO_DATA_PIN13_Msk (0x01 << GPIO_DATA_PIN13_Pos) +#define GPIO_DATA_PIN14_Pos 14 +#define GPIO_DATA_PIN14_Msk (0x01 << GPIO_DATA_PIN14_Pos) +#define GPIO_DATA_PIN15_Pos 15 +#define GPIO_DATA_PIN15_Msk (0x01 << GPIO_DATA_PIN15_Pos) +#define GPIO_DATA_PIN16_Pos 16 +#define GPIO_DATA_PIN16_Msk (0x01 << GPIO_DATA_PIN16_Pos) +#define GPIO_DATA_PIN17_Pos 17 +#define GPIO_DATA_PIN17_Msk (0x01 << GPIO_DATA_PIN17_Pos) +#define GPIO_DATA_PIN18_Pos 18 +#define GPIO_DATA_PIN18_Msk (0x01 << GPIO_DATA_PIN18_Pos) +#define GPIO_DATA_PIN19_Pos 19 +#define GPIO_DATA_PIN19_Msk (0x01 << GPIO_DATA_PIN19_Pos) +#define GPIO_DATA_PIN20_Pos 20 +#define GPIO_DATA_PIN20_Msk (0x01 << GPIO_DATA_PIN20_Pos) +#define GPIO_DATA_PIN21_Pos 21 +#define GPIO_DATA_PIN21_Msk (0x01 << GPIO_DATA_PIN21_Pos) +#define GPIO_DATA_PIN22_Pos 22 +#define GPIO_DATA_PIN22_Msk (0x01 << GPIO_DATA_PIN22_Pos) +#define GPIO_DATA_PIN23_Pos 23 +#define GPIO_DATA_PIN23_Msk (0x01 << GPIO_DATA_PIN23_Pos) + +#define GPIO_DIR_PIN0_Pos 0 +#define GPIO_DIR_PIN0_Msk (0x01 << GPIO_DIR_PIN0_Pos) +#define GPIO_DIR_PIN1_Pos 1 +#define GPIO_DIR_PIN1_Msk (0x01 << GPIO_DIR_PIN1_Pos) +#define GPIO_DIR_PIN2_Pos 2 +#define GPIO_DIR_PIN2_Msk (0x01 << GPIO_DIR_PIN2_Pos) +#define GPIO_DIR_PIN3_Pos 3 +#define GPIO_DIR_PIN3_Msk (0x01 << GPIO_DIR_PIN3_Pos) +#define GPIO_DIR_PIN4_Pos 4 +#define GPIO_DIR_PIN4_Msk (0x01 << GPIO_DIR_PIN4_Pos) +#define GPIO_DIR_PIN5_Pos 5 +#define GPIO_DIR_PIN5_Msk (0x01 << GPIO_DIR_PIN5_Pos) +#define GPIO_DIR_PIN6_Pos 6 +#define GPIO_DIR_PIN6_Msk (0x01 << GPIO_DIR_PIN6_Pos) +#define GPIO_DIR_PIN7_Pos 7 +#define GPIO_DIR_PIN7_Msk (0x01 << GPIO_DIR_PIN7_Pos) +#define GPIO_DIR_PIN8_Pos 8 +#define GPIO_DIR_PIN8_Msk (0x01 << GPIO_DIR_PIN8_Pos) +#define GPIO_DIR_PIN9_Pos 9 +#define GPIO_DIR_PIN9_Msk (0x01 << GPIO_DIR_PIN9_Pos) +#define GPIO_DIR_PIN10_Pos 10 +#define GPIO_DIR_PIN10_Msk (0x01 << GPIO_DIR_PIN10_Pos) +#define GPIO_DIR_PIN11_Pos 11 +#define GPIO_DIR_PIN11_Msk (0x01 << GPIO_DIR_PIN11_Pos) +#define GPIO_DIR_PIN12_Pos 12 +#define GPIO_DIR_PIN12_Msk (0x01 << GPIO_DIR_PIN12_Pos) +#define GPIO_DIR_PIN13_Pos 13 +#define GPIO_DIR_PIN13_Msk (0x01 << GPIO_DIR_PIN13_Pos) +#define GPIO_DIR_PIN14_Pos 14 +#define GPIO_DIR_PIN14_Msk (0x01 << GPIO_DIR_PIN14_Pos) +#define GPIO_DIR_PIN15_Pos 15 +#define GPIO_DIR_PIN15_Msk (0x01 << GPIO_DIR_PIN15_Pos) +#define GPIO_DIR_PIN16_Pos 16 +#define GPIO_DIR_PIN16_Msk (0x01 << GPIO_DIR_PIN16_Pos) +#define GPIO_DIR_PIN17_Pos 17 +#define GPIO_DIR_PIN17_Msk (0x01 << GPIO_DIR_PIN17_Pos) +#define GPIO_DIR_PIN18_Pos 18 +#define GPIO_DIR_PIN18_Msk (0x01 << GPIO_DIR_PIN18_Pos) +#define GPIO_DIR_PIN19_Pos 19 +#define GPIO_DIR_PIN19_Msk (0x01 << GPIO_DIR_PIN19_Pos) +#define GPIO_DIR_PIN20_Pos 20 +#define GPIO_DIR_PIN20_Msk (0x01 << GPIO_DIR_PIN20_Pos) +#define GPIO_DIR_PIN21_Pos 21 +#define GPIO_DIR_PIN21_Msk (0x01 << GPIO_DIR_PIN21_Pos) +#define GPIO_DIR_PIN22_Pos 22 +#define GPIO_DIR_PIN22_Msk (0x01 << GPIO_DIR_PIN22_Pos) +#define GPIO_DIR_PIN23_Pos 23 +#define GPIO_DIR_PIN23_Msk (0x01 << GPIO_DIR_PIN23_Pos) + +#define GPIO_INTLVLTRG_PIN0_Pos 0 +#define GPIO_INTLVLTRG_PIN0_Msk (0x01 << GPIO_INTLVLTRG_PIN0_Pos) +#define GPIO_INTLVLTRG_PIN1_Pos 1 +#define GPIO_INTLVLTRG_PIN1_Msk (0x01 << GPIO_INTLVLTRG_PIN1_Pos) +#define GPIO_INTLVLTRG_PIN2_Pos 2 +#define GPIO_INTLVLTRG_PIN2_Msk (0x01 << GPIO_INTLVLTRG_PIN2_Pos) +#define GPIO_INTLVLTRG_PIN3_Pos 3 +#define GPIO_INTLVLTRG_PIN3_Msk (0x01 << GPIO_INTLVLTRG_PIN3_Pos) +#define GPIO_INTLVLTRG_PIN4_Pos 4 +#define GPIO_INTLVLTRG_PIN4_Msk (0x01 << GPIO_INTLVLTRG_PIN4_Pos) +#define GPIO_INTLVLTRG_PIN5_Pos 5 +#define GPIO_INTLVLTRG_PIN5_Msk (0x01 << GPIO_INTLVLTRG_PIN5_Pos) +#define GPIO_INTLVLTRG_PIN6_Pos 6 +#define GPIO_INTLVLTRG_PIN6_Msk (0x01 << GPIO_INTLVLTRG_PIN6_Pos) +#define GPIO_INTLVLTRG_PIN7_Pos 7 +#define GPIO_INTLVLTRG_PIN7_Msk (0x01 << GPIO_INTLVLTRG_PIN7_Pos) +#define GPIO_INTLVLTRG_PIN8_Pos 8 +#define GPIO_INTLVLTRG_PIN8_Msk (0x01 << GPIO_INTLVLTRG_PIN8_Pos) +#define GPIO_INTLVLTRG_PIN9_Pos 9 +#define GPIO_INTLVLTRG_PIN9_Msk (0x01 << GPIO_INTLVLTRG_PIN9_Pos) +#define GPIO_INTLVLTRG_PIN10_Pos 10 +#define GPIO_INTLVLTRG_PIN10_Msk (0x01 << GPIO_INTLVLTRG_PIN10_Pos) +#define GPIO_INTLVLTRG_PIN11_Pos 11 +#define GPIO_INTLVLTRG_PIN11_Msk (0x01 << GPIO_INTLVLTRG_PIN11_Pos) +#define GPIO_INTLVLTRG_PIN12_Pos 12 +#define GPIO_INTLVLTRG_PIN12_Msk (0x01 << GPIO_INTLVLTRG_PIN12_Pos) +#define GPIO_INTLVLTRG_PIN13_Pos 13 +#define GPIO_INTLVLTRG_PIN13_Msk (0x01 << GPIO_INTLVLTRG_PIN13_Pos) +#define GPIO_INTLVLTRG_PIN14_Pos 14 +#define GPIO_INTLVLTRG_PIN14_Msk (0x01 << GPIO_INTLVLTRG_PIN14_Pos) +#define GPIO_INTLVLTRG_PIN15_Pos 15 +#define GPIO_INTLVLTRG_PIN15_Msk (0x01 << GPIO_INTLVLTRG_PIN15_Pos) +#define GPIO_INTLVLTRG_PIN16_Pos 16 +#define GPIO_INTLVLTRG_PIN16_Msk (0x01 << GPIO_INTLVLTRG_PIN16_Pos) +#define GPIO_INTLVLTRG_PIN17_Pos 17 +#define GPIO_INTLVLTRG_PIN17_Msk (0x01 << GPIO_INTLVLTRG_PIN17_Pos) +#define GPIO_INTLVLTRG_PIN18_Pos 18 +#define GPIO_INTLVLTRG_PIN18_Msk (0x01 << GPIO_INTLVLTRG_PIN18_Pos) +#define GPIO_INTLVLTRG_PIN19_Pos 19 +#define GPIO_INTLVLTRG_PIN19_Msk (0x01 << GPIO_INTLVLTRG_PIN19_Pos) +#define GPIO_INTLVLTRG_PIN20_Pos 20 +#define GPIO_INTLVLTRG_PIN20_Msk (0x01 << GPIO_INTLVLTRG_PIN20_Pos) +#define GPIO_INTLVLTRG_PIN21_Pos 21 +#define GPIO_INTLVLTRG_PIN21_Msk (0x01 << GPIO_INTLVLTRG_PIN21_Pos) +#define GPIO_INTLVLTRG_PIN22_Pos 22 +#define GPIO_INTLVLTRG_PIN22_Msk (0x01 << GPIO_INTLVLTRG_PIN22_Pos) +#define GPIO_INTLVLTRG_PIN23_Pos 23 +#define GPIO_INTLVLTRG_PIN23_Msk (0x01 << GPIO_INTLVLTRG_PIN23_Pos) + +#define GPIO_INTBE_PIN0_Pos 0 +#define GPIO_INTBE_PIN0_Msk (0x01 << GPIO_INTBE_PIN0_Pos) +#define GPIO_INTBE_PIN1_Pos 1 +#define GPIO_INTBE_PIN1_Msk (0x01 << GPIO_INTBE_PIN1_Pos) +#define GPIO_INTBE_PIN2_Pos 2 +#define GPIO_INTBE_PIN2_Msk (0x01 << GPIO_INTBE_PIN2_Pos) +#define GPIO_INTBE_PIN3_Pos 3 +#define GPIO_INTBE_PIN3_Msk (0x01 << GPIO_INTBE_PIN3_Pos) +#define GPIO_INTBE_PIN4_Pos 4 +#define GPIO_INTBE_PIN4_Msk (0x01 << GPIO_INTBE_PIN4_Pos) +#define GPIO_INTBE_PIN5_Pos 5 +#define GPIO_INTBE_PIN5_Msk (0x01 << GPIO_INTBE_PIN5_Pos) +#define GPIO_INTBE_PIN6_Pos 6 +#define GPIO_INTBE_PIN6_Msk (0x01 << GPIO_INTBE_PIN6_Pos) +#define GPIO_INTBE_PIN7_Pos 7 +#define GPIO_INTBE_PIN7_Msk (0x01 << GPIO_INTBE_PIN7_Pos) +#define GPIO_INTBE_PIN8_Pos 8 +#define GPIO_INTBE_PIN8_Msk (0x01 << GPIO_INTBE_PIN8_Pos) +#define GPIO_INTBE_PIN9_Pos 9 +#define GPIO_INTBE_PIN9_Msk (0x01 << GPIO_INTBE_PIN9_Pos) +#define GPIO_INTBE_PIN10_Pos 10 +#define GPIO_INTBE_PIN10_Msk (0x01 << GPIO_INTBE_PIN10_Pos) +#define GPIO_INTBE_PIN11_Pos 11 +#define GPIO_INTBE_PIN11_Msk (0x01 << GPIO_INTBE_PIN11_Pos) +#define GPIO_INTBE_PIN12_Pos 12 +#define GPIO_INTBE_PIN12_Msk (0x01 << GPIO_INTBE_PIN12_Pos) +#define GPIO_INTBE_PIN13_Pos 13 +#define GPIO_INTBE_PIN13_Msk (0x01 << GPIO_INTBE_PIN13_Pos) +#define GPIO_INTBE_PIN14_Pos 14 +#define GPIO_INTBE_PIN14_Msk (0x01 << GPIO_INTBE_PIN14_Pos) +#define GPIO_INTBE_PIN15_Pos 15 +#define GPIO_INTBE_PIN15_Msk (0x01 << GPIO_INTBE_PIN15_Pos) +#define GPIO_INTBE_PIN16_Pos 16 +#define GPIO_INTBE_PIN16_Msk (0x01 << GPIO_INTBE_PIN16_Pos) +#define GPIO_INTBE_PIN17_Pos 17 +#define GPIO_INTBE_PIN17_Msk (0x01 << GPIO_INTBE_PIN17_Pos) +#define GPIO_INTBE_PIN18_Pos 18 +#define GPIO_INTBE_PIN18_Msk (0x01 << GPIO_INTBE_PIN18_Pos) +#define GPIO_INTBE_PIN19_Pos 19 +#define GPIO_INTBE_PIN19_Msk (0x01 << GPIO_INTBE_PIN19_Pos) +#define GPIO_INTBE_PIN20_Pos 20 +#define GPIO_INTBE_PIN20_Msk (0x01 << GPIO_INTBE_PIN20_Pos) +#define GPIO_INTBE_PIN21_Pos 21 +#define GPIO_INTBE_PIN21_Msk (0x01 << GPIO_INTBE_PIN21_Pos) +#define GPIO_INTBE_PIN22_Pos 22 +#define GPIO_INTBE_PIN22_Msk (0x01 << GPIO_INTBE_PIN22_Pos) +#define GPIO_INTBE_PIN23_Pos 23 +#define GPIO_INTBE_PIN23_Msk (0x01 << GPIO_INTBE_PIN23_Pos) + +#define GPIO_INTRISEEN_PIN0_Pos 0 +#define GPIO_INTRISEEN_PIN0_Msk (0x01 << GPIO_INTRISEEN_PIN0_Pos) +#define GPIO_INTRISEEN_PIN1_Pos 1 +#define GPIO_INTRISEEN_PIN1_Msk (0x01 << GPIO_INTRISEEN_PIN1_Pos) +#define GPIO_INTRISEEN_PIN2_Pos 2 +#define GPIO_INTRISEEN_PIN2_Msk (0x01 << GPIO_INTRISEEN_PIN2_Pos) +#define GPIO_INTRISEEN_PIN3_Pos 3 +#define GPIO_INTRISEEN_PIN3_Msk (0x01 << GPIO_INTRISEEN_PIN3_Pos) +#define GPIO_INTRISEEN_PIN4_Pos 4 +#define GPIO_INTRISEEN_PIN4_Msk (0x01 << GPIO_INTRISEEN_PIN4_Pos) +#define GPIO_INTRISEEN_PIN5_Pos 5 +#define GPIO_INTRISEEN_PIN5_Msk (0x01 << GPIO_INTRISEEN_PIN5_Pos) +#define GPIO_INTRISEEN_PIN6_Pos 6 +#define GPIO_INTRISEEN_PIN6_Msk (0x01 << GPIO_INTRISEEN_PIN6_Pos) +#define GPIO_INTRISEEN_PIN7_Pos 7 +#define GPIO_INTRISEEN_PIN7_Msk (0x01 << GPIO_INTRISEEN_PIN7_Pos) +#define GPIO_INTRISEEN_PIN8_Pos 8 +#define GPIO_INTRISEEN_PIN8_Msk (0x01 << GPIO_INTRISEEN_PIN8_Pos) +#define GPIO_INTRISEEN_PIN9_Pos 9 +#define GPIO_INTRISEEN_PIN9_Msk (0x01 << GPIO_INTRISEEN_PIN9_Pos) +#define GPIO_INTRISEEN_PIN10_Pos 10 +#define GPIO_INTRISEEN_PIN10_Msk (0x01 << GPIO_INTRISEEN_PIN10_Pos) +#define GPIO_INTRISEEN_PIN11_Pos 11 +#define GPIO_INTRISEEN_PIN11_Msk (0x01 << GPIO_INTRISEEN_PIN11_Pos) +#define GPIO_INTRISEEN_PIN12_Pos 12 +#define GPIO_INTRISEEN_PIN12_Msk (0x01 << GPIO_INTRISEEN_PIN12_Pos) +#define GPIO_INTRISEEN_PIN13_Pos 13 +#define GPIO_INTRISEEN_PIN13_Msk (0x01 << GPIO_INTRISEEN_PIN13_Pos) +#define GPIO_INTRISEEN_PIN14_Pos 14 +#define GPIO_INTRISEEN_PIN14_Msk (0x01 << GPIO_INTRISEEN_PIN14_Pos) +#define GPIO_INTRISEEN_PIN15_Pos 15 +#define GPIO_INTRISEEN_PIN15_Msk (0x01 << GPIO_INTRISEEN_PIN15_Pos) +#define GPIO_INTRISEEN_PIN16_Pos 16 +#define GPIO_INTRISEEN_PIN16_Msk (0x01 << GPIO_INTRISEEN_PIN16_Pos) +#define GPIO_INTRISEEN_PIN17_Pos 17 +#define GPIO_INTRISEEN_PIN17_Msk (0x01 << GPIO_INTRISEEN_PIN17_Pos) +#define GPIO_INTRISEEN_PIN18_Pos 18 +#define GPIO_INTRISEEN_PIN18_Msk (0x01 << GPIO_INTRISEEN_PIN18_Pos) +#define GPIO_INTRISEEN_PIN19_Pos 19 +#define GPIO_INTRISEEN_PIN19_Msk (0x01 << GPIO_INTRISEEN_PIN19_Pos) +#define GPIO_INTRISEEN_PIN20_Pos 20 +#define GPIO_INTRISEEN_PIN20_Msk (0x01 << GPIO_INTRISEEN_PIN20_Pos) +#define GPIO_INTRISEEN_PIN21_Pos 21 +#define GPIO_INTRISEEN_PIN21_Msk (0x01 << GPIO_INTRISEEN_PIN21_Pos) +#define GPIO_INTRISEEN_PIN22_Pos 22 +#define GPIO_INTRISEEN_PIN22_Msk (0x01 << GPIO_INTRISEEN_PIN22_Pos) +#define GPIO_INTRISEEN_PIN23_Pos 23 +#define GPIO_INTRISEEN_PIN23_Msk (0x01 << GPIO_INTRISEEN_PIN23_Pos) + +#define GPIO_INTEN_PIN0_Pos 0 +#define GPIO_INTEN_PIN0_Msk (0x01 << GPIO_INTEN_PIN0_Pos) +#define GPIO_INTEN_PIN1_Pos 1 +#define GPIO_INTEN_PIN1_Msk (0x01 << GPIO_INTEN_PIN1_Pos) +#define GPIO_INTEN_PIN2_Pos 2 +#define GPIO_INTEN_PIN2_Msk (0x01 << GPIO_INTEN_PIN2_Pos) +#define GPIO_INTEN_PIN3_Pos 3 +#define GPIO_INTEN_PIN3_Msk (0x01 << GPIO_INTEN_PIN3_Pos) +#define GPIO_INTEN_PIN4_Pos 4 +#define GPIO_INTEN_PIN4_Msk (0x01 << GPIO_INTEN_PIN4_Pos) +#define GPIO_INTEN_PIN5_Pos 5 +#define GPIO_INTEN_PIN5_Msk (0x01 << GPIO_INTEN_PIN5_Pos) +#define GPIO_INTEN_PIN6_Pos 6 +#define GPIO_INTEN_PIN6_Msk (0x01 << GPIO_INTEN_PIN6_Pos) +#define GPIO_INTEN_PIN7_Pos 7 +#define GPIO_INTEN_PIN7_Msk (0x01 << GPIO_INTEN_PIN7_Pos) +#define GPIO_INTEN_PIN8_Pos 8 +#define GPIO_INTEN_PIN8_Msk (0x01 << GPIO_INTEN_PIN8_Pos) +#define GPIO_INTEN_PIN9_Pos 9 +#define GPIO_INTEN_PIN9_Msk (0x01 << GPIO_INTEN_PIN9_Pos) +#define GPIO_INTEN_PIN10_Pos 10 +#define GPIO_INTEN_PIN10_Msk (0x01 << GPIO_INTEN_PIN10_Pos) +#define GPIO_INTEN_PIN11_Pos 11 +#define GPIO_INTEN_PIN11_Msk (0x01 << GPIO_INTEN_PIN11_Pos) +#define GPIO_INTEN_PIN12_Pos 12 +#define GPIO_INTEN_PIN12_Msk (0x01 << GPIO_INTEN_PIN12_Pos) +#define GPIO_INTEN_PIN13_Pos 13 +#define GPIO_INTEN_PIN13_Msk (0x01 << GPIO_INTEN_PIN13_Pos) +#define GPIO_INTEN_PIN14_Pos 14 +#define GPIO_INTEN_PIN14_Msk (0x01 << GPIO_INTEN_PIN14_Pos) +#define GPIO_INTEN_PIN15_Pos 15 +#define GPIO_INTEN_PIN15_Msk (0x01 << GPIO_INTEN_PIN15_Pos) +#define GPIO_INTEN_PIN16_Pos 16 +#define GPIO_INTEN_PIN16_Msk (0x01 << GPIO_INTEN_PIN16_Pos) +#define GPIO_INTEN_PIN17_Pos 17 +#define GPIO_INTEN_PIN17_Msk (0x01 << GPIO_INTEN_PIN17_Pos) +#define GPIO_INTEN_PIN18_Pos 18 +#define GPIO_INTEN_PIN18_Msk (0x01 << GPIO_INTEN_PIN18_Pos) +#define GPIO_INTEN_PIN19_Pos 19 +#define GPIO_INTEN_PIN19_Msk (0x01 << GPIO_INTEN_PIN19_Pos) +#define GPIO_INTEN_PIN20_Pos 20 +#define GPIO_INTEN_PIN20_Msk (0x01 << GPIO_INTEN_PIN20_Pos) +#define GPIO_INTEN_PIN21_Pos 21 +#define GPIO_INTEN_PIN21_Msk (0x01 << GPIO_INTEN_PIN21_Pos) +#define GPIO_INTEN_PIN22_Pos 22 +#define GPIO_INTEN_PIN22_Msk (0x01 << GPIO_INTEN_PIN22_Pos) +#define GPIO_INTEN_PIN23_Pos 23 +#define GPIO_INTEN_PIN23_Msk (0x01 << GPIO_INTEN_PIN23_Pos) + +#define GPIO_INTRAWSTAT_PIN0_Pos 0 +#define GPIO_INTRAWSTAT_PIN0_Msk (0x01 << GPIO_INTRAWSTAT_PIN0_Pos) +#define GPIO_INTRAWSTAT_PIN1_Pos 1 +#define GPIO_INTRAWSTAT_PIN1_Msk (0x01 << GPIO_INTRAWSTAT_PIN1_Pos) +#define GPIO_INTRAWSTAT_PIN2_Pos 2 +#define GPIO_INTRAWSTAT_PIN2_Msk (0x01 << GPIO_INTRAWSTAT_PIN2_Pos) +#define GPIO_INTRAWSTAT_PIN3_Pos 3 +#define GPIO_INTRAWSTAT_PIN3_Msk (0x01 << GPIO_INTRAWSTAT_PIN3_Pos) +#define GPIO_INTRAWSTAT_PIN4_Pos 4 +#define GPIO_INTRAWSTAT_PIN4_Msk (0x01 << GPIO_INTRAWSTAT_PIN4_Pos) +#define GPIO_INTRAWSTAT_PIN5_Pos 5 +#define GPIO_INTRAWSTAT_PIN5_Msk (0x01 << GPIO_INTRAWSTAT_PIN5_Pos) +#define GPIO_INTRAWSTAT_PIN6_Pos 6 +#define GPIO_INTRAWSTAT_PIN6_Msk (0x01 << GPIO_INTRAWSTAT_PIN6_Pos) +#define GPIO_INTRAWSTAT_PIN7_Pos 7 +#define GPIO_INTRAWSTAT_PIN7_Msk (0x01 << GPIO_INTRAWSTAT_PIN7_Pos) +#define GPIO_INTRAWSTAT_PIN8_Pos 8 +#define GPIO_INTRAWSTAT_PIN8_Msk (0x01 << GPIO_INTRAWSTAT_PIN8_Pos) +#define GPIO_INTRAWSTAT_PIN9_Pos 9 +#define GPIO_INTRAWSTAT_PIN9_Msk (0x01 << GPIO_INTRAWSTAT_PIN9_Pos) +#define GPIO_INTRAWSTAT_PIN10_Pos 10 +#define GPIO_INTRAWSTAT_PIN10_Msk (0x01 << GPIO_INTRAWSTAT_PIN10_Pos) +#define GPIO_INTRAWSTAT_PIN11_Pos 11 +#define GPIO_INTRAWSTAT_PIN11_Msk (0x01 << GPIO_INTRAWSTAT_PIN11_Pos) +#define GPIO_INTRAWSTAT_PIN12_Pos 12 +#define GPIO_INTRAWSTAT_PIN12_Msk (0x01 << GPIO_INTRAWSTAT_PIN12_Pos) +#define GPIO_INTRAWSTAT_PIN13_Pos 13 +#define GPIO_INTRAWSTAT_PIN13_Msk (0x01 << GPIO_INTRAWSTAT_PIN13_Pos) +#define GPIO_INTRAWSTAT_PIN14_Pos 14 +#define GPIO_INTRAWSTAT_PIN14_Msk (0x01 << GPIO_INTRAWSTAT_PIN14_Pos) +#define GPIO_INTRAWSTAT_PIN15_Pos 15 +#define GPIO_INTRAWSTAT_PIN15_Msk (0x01 << GPIO_INTRAWSTAT_PIN15_Pos) +#define GPIO_INTRAWSTAT_PIN16_Pos 16 +#define GPIO_INTRAWSTAT_PIN16_Msk (0x01 << GPIO_INTRAWSTAT_PIN16_Pos) +#define GPIO_INTRAWSTAT_PIN17_Pos 17 +#define GPIO_INTRAWSTAT_PIN17_Msk (0x01 << GPIO_INTRAWSTAT_PIN17_Pos) +#define GPIO_INTRAWSTAT_PIN18_Pos 18 +#define GPIO_INTRAWSTAT_PIN18_Msk (0x01 << GPIO_INTRAWSTAT_PIN18_Pos) +#define GPIO_INTRAWSTAT_PIN19_Pos 19 +#define GPIO_INTRAWSTAT_PIN19_Msk (0x01 << GPIO_INTRAWSTAT_PIN19_Pos) +#define GPIO_INTRAWSTAT_PIN20_Pos 20 +#define GPIO_INTRAWSTAT_PIN20_Msk (0x01 << GPIO_INTRAWSTAT_PIN20_Pos) +#define GPIO_INTRAWSTAT_PIN21_Pos 21 +#define GPIO_INTRAWSTAT_PIN21_Msk (0x01 << GPIO_INTRAWSTAT_PIN21_Pos) +#define GPIO_INTRAWSTAT_PIN22_Pos 22 +#define GPIO_INTRAWSTAT_PIN22_Msk (0x01 << GPIO_INTRAWSTAT_PIN22_Pos) +#define GPIO_INTRAWSTAT_PIN23_Pos 23 +#define GPIO_INTRAWSTAT_PIN23_Msk (0x01 << GPIO_INTRAWSTAT_PIN23_Pos) + +#define GPIO_INTSTAT_PIN0_Pos 0 +#define GPIO_INTSTAT_PIN0_Msk (0x01 << GPIO_INTSTAT_PIN0_Pos) +#define GPIO_INTSTAT_PIN1_Pos 1 +#define GPIO_INTSTAT_PIN1_Msk (0x01 << GPIO_INTSTAT_PIN1_Pos) +#define GPIO_INTSTAT_PIN2_Pos 2 +#define GPIO_INTSTAT_PIN2_Msk (0x01 << GPIO_INTSTAT_PIN2_Pos) +#define GPIO_INTSTAT_PIN3_Pos 3 +#define GPIO_INTSTAT_PIN3_Msk (0x01 << GPIO_INTSTAT_PIN3_Pos) +#define GPIO_INTSTAT_PIN4_Pos 4 +#define GPIO_INTSTAT_PIN4_Msk (0x01 << GPIO_INTSTAT_PIN4_Pos) +#define GPIO_INTSTAT_PIN5_Pos 5 +#define GPIO_INTSTAT_PIN5_Msk (0x01 << GPIO_INTSTAT_PIN5_Pos) +#define GPIO_INTSTAT_PIN6_Pos 6 +#define GPIO_INTSTAT_PIN6_Msk (0x01 << GPIO_INTSTAT_PIN6_Pos) +#define GPIO_INTSTAT_PIN7_Pos 7 +#define GPIO_INTSTAT_PIN7_Msk (0x01 << GPIO_INTSTAT_PIN7_Pos) +#define GPIO_INTSTAT_PIN8_Pos 8 +#define GPIO_INTSTAT_PIN8_Msk (0x01 << GPIO_INTSTAT_PIN8_Pos) +#define GPIO_INTSTAT_PIN9_Pos 9 +#define GPIO_INTSTAT_PIN9_Msk (0x01 << GPIO_INTSTAT_PIN9_Pos) +#define GPIO_INTSTAT_PIN10_Pos 10 +#define GPIO_INTSTAT_PIN10_Msk (0x01 << GPIO_INTSTAT_PIN10_Pos) +#define GPIO_INTSTAT_PIN11_Pos 11 +#define GPIO_INTSTAT_PIN11_Msk (0x01 << GPIO_INTSTAT_PIN11_Pos) +#define GPIO_INTSTAT_PIN12_Pos 12 +#define GPIO_INTSTAT_PIN12_Msk (0x01 << GPIO_INTSTAT_PIN12_Pos) +#define GPIO_INTSTAT_PIN13_Pos 13 +#define GPIO_INTSTAT_PIN13_Msk (0x01 << GPIO_INTSTAT_PIN13_Pos) +#define GPIO_INTSTAT_PIN14_Pos 14 +#define GPIO_INTSTAT_PIN14_Msk (0x01 << GPIO_INTSTAT_PIN14_Pos) +#define GPIO_INTSTAT_PIN15_Pos 15 +#define GPIO_INTSTAT_PIN15_Msk (0x01 << GPIO_INTSTAT_PIN15_Pos) +#define GPIO_INTSTAT_PIN16_Pos 16 +#define GPIO_INTSTAT_PIN16_Msk (0x01 << GPIO_INTSTAT_PIN16_Pos) +#define GPIO_INTSTAT_PIN17_Pos 17 +#define GPIO_INTSTAT_PIN17_Msk (0x01 << GPIO_INTSTAT_PIN17_Pos) +#define GPIO_INTSTAT_PIN18_Pos 18 +#define GPIO_INTSTAT_PIN18_Msk (0x01 << GPIO_INTSTAT_PIN18_Pos) +#define GPIO_INTSTAT_PIN19_Pos 19 +#define GPIO_INTSTAT_PIN19_Msk (0x01 << GPIO_INTSTAT_PIN19_Pos) +#define GPIO_INTSTAT_PIN20_Pos 20 +#define GPIO_INTSTAT_PIN20_Msk (0x01 << GPIO_INTSTAT_PIN20_Pos) +#define GPIO_INTSTAT_PIN21_Pos 21 +#define GPIO_INTSTAT_PIN21_Msk (0x01 << GPIO_INTSTAT_PIN21_Pos) +#define GPIO_INTSTAT_PIN22_Pos 22 +#define GPIO_INTSTAT_PIN22_Msk (0x01 << GPIO_INTSTAT_PIN22_Pos) +#define GPIO_INTSTAT_PIN23_Pos 23 +#define GPIO_INTSTAT_PIN23_Msk (0x01 << GPIO_INTSTAT_PIN23_Pos) + +#define GPIO_INTCLR_PIN0_Pos 0 +#define GPIO_INTCLR_PIN0_Msk (0x01 << GPIO_INTCLR_PIN0_Pos) +#define GPIO_INTCLR_PIN1_Pos 1 +#define GPIO_INTCLR_PIN1_Msk (0x01 << GPIO_INTCLR_PIN1_Pos) +#define GPIO_INTCLR_PIN2_Pos 2 +#define GPIO_INTCLR_PIN2_Msk (0x01 << GPIO_INTCLR_PIN2_Pos) +#define GPIO_INTCLR_PIN3_Pos 3 +#define GPIO_INTCLR_PIN3_Msk (0x01 << GPIO_INTCLR_PIN3_Pos) +#define GPIO_INTCLR_PIN4_Pos 4 +#define GPIO_INTCLR_PIN4_Msk (0x01 << GPIO_INTCLR_PIN4_Pos) +#define GPIO_INTCLR_PIN5_Pos 5 +#define GPIO_INTCLR_PIN5_Msk (0x01 << GPIO_INTCLR_PIN5_Pos) +#define GPIO_INTCLR_PIN6_Pos 6 +#define GPIO_INTCLR_PIN6_Msk (0x01 << GPIO_INTCLR_PIN6_Pos) +#define GPIO_INTCLR_PIN7_Pos 7 +#define GPIO_INTCLR_PIN7_Msk (0x01 << GPIO_INTCLR_PIN7_Pos) +#define GPIO_INTCLR_PIN8_Pos 8 +#define GPIO_INTCLR_PIN8_Msk (0x01 << GPIO_INTCLR_PIN8_Pos) +#define GPIO_INTCLR_PIN9_Pos 9 +#define GPIO_INTCLR_PIN9_Msk (0x01 << GPIO_INTCLR_PIN9_Pos) +#define GPIO_INTCLR_PIN10_Pos 10 +#define GPIO_INTCLR_PIN10_Msk (0x01 << GPIO_INTCLR_PIN10_Pos) +#define GPIO_INTCLR_PIN11_Pos 11 +#define GPIO_INTCLR_PIN11_Msk (0x01 << GPIO_INTCLR_PIN11_Pos) +#define GPIO_INTCLR_PIN12_Pos 12 +#define GPIO_INTCLR_PIN12_Msk (0x01 << GPIO_INTCLR_PIN12_Pos) +#define GPIO_INTCLR_PIN13_Pos 13 +#define GPIO_INTCLR_PIN13_Msk (0x01 << GPIO_INTCLR_PIN13_Pos) +#define GPIO_INTCLR_PIN14_Pos 14 +#define GPIO_INTCLR_PIN14_Msk (0x01 << GPIO_INTCLR_PIN14_Pos) +#define GPIO_INTCLR_PIN15_Pos 15 +#define GPIO_INTCLR_PIN15_Msk (0x01 << GPIO_INTCLR_PIN15_Pos) +#define GPIO_INTCLR_PIN16_Pos 16 +#define GPIO_INTCLR_PIN16_Msk (0x01 << GPIO_INTCLR_PIN16_Pos) +#define GPIO_INTCLR_PIN17_Pos 17 +#define GPIO_INTCLR_PIN17_Msk (0x01 << GPIO_INTCLR_PIN17_Pos) +#define GPIO_INTCLR_PIN18_Pos 18 +#define GPIO_INTCLR_PIN18_Msk (0x01 << GPIO_INTCLR_PIN18_Pos) +#define GPIO_INTCLR_PIN19_Pos 19 +#define GPIO_INTCLR_PIN19_Msk (0x01 << GPIO_INTCLR_PIN19_Pos) +#define GPIO_INTCLR_PIN20_Pos 20 +#define GPIO_INTCLR_PIN20_Msk (0x01 << GPIO_INTCLR_PIN20_Pos) +#define GPIO_INTCLR_PIN21_Pos 21 +#define GPIO_INTCLR_PIN21_Msk (0x01 << GPIO_INTCLR_PIN21_Pos) +#define GPIO_INTCLR_PIN22_Pos 22 +#define GPIO_INTCLR_PIN22_Msk (0x01 << GPIO_INTCLR_PIN22_Pos) +#define GPIO_INTCLR_PIN23_Pos 23 +#define GPIO_INTCLR_PIN23_Msk (0x01 << GPIO_INTCLR_PIN23_Pos) + + + + +typedef struct { + __IO uint32_t LDVAL; //ʱֵʹܺʱӴֵʼµݼ + + __I uint32_t CVAL; //ʱǰֵLDVAL-CVAL ɼʱʱ + + __IO uint32_t CTRL; } TIMR_TypeDef; -#define TIMR_CTRL_EN_Pos 0 //此位赋1导致TIMR从LDVAL开始向下递减计数 -#define TIMR_CTRL_EN_Msk (0x01 << TIMR_CTRL_EN_Pos) -#define TIMR_CTRL_CLKSRC_Pos 1 //时钟源：0 内部系统时钟 1 外部引脚脉冲计数 -#define TIMR_CTRL_CLKSRC_Msk (0x01 << TIMR_CTRL_CLKSRC_Pos) -#define TIMR_CTRL_CASCADE_Pos 2 //1 TIMRx的计数时钟为TIMRx-1的溢出信号 -#define TIMR_CTRL_CASCADE_Msk (0x01 << TIMR_CTRL_CASCADE_Pos) - -typedef struct -{ - __IO uint32_t PCTRL; //Pulse Control，脉宽测量模块控制寄存器 - - __I uint32_t PCVAL; //脉宽测量定时器当前值 - - uint32_t RESERVED[2]; - __IO uint32_t IE; +#define TIMR_CTRL_EN_Pos 0 //λ1TIMRLDVALʼµݼ +#define TIMR_CTRL_EN_Msk (0x01 << TIMR_CTRL_EN_Pos) +#define TIMR_CTRL_CLKSRC_Pos 1 //ʱԴ0 ڲϵͳʱ 1 ⲿ +#define TIMR_CTRL_CLKSRC_Msk (0x01 << TIMR_CTRL_CLKSRC_Pos) +#define TIMR_CTRL_CASCADE_Pos 2 //1 TIMRxļʱΪTIMRx-1ź +#define TIMR_CTRL_CASCADE_Msk (0x01 << TIMR_CTRL_CASCADE_Pos) - __IO uint32_t IF; - __IO uint32_t HALT; -} TIMRG_TypeDef; +typedef struct { + __IO uint32_t PCTRL; //Pulse ControlģƼĴ -#define TIMRG_PCTRL_EN_Pos 0 //开始测量脉宽，脉宽内32位计数器从0开始向上计数 -#define TIMRG_PCTRL_EN_Msk (0x01 << TIMRG_PCTRL_EN_Pos) -#define TIMRG_PCTRL_HIGH_Pos 1 //0 测量低电平长度 1 测量高电平长度 -#define TIMRG_PCTRL_HIGH_Msk (0x01 << TIMRG_PCTRL_HIGH_Pos) -#define TIMRG_PCTRL_CLKSRC_Pos 2 //时钟源：0 内部系统时钟 1 脉宽测量模块变成一个计数器，不再具有脉宽测量功能 -#define TIMRG_PCTRL_CLKSRC_Msk (0x01 << TIMRG_PCTRL_CLKSRC_Pos) - -#define TIMRG_IE_TIMR0_Pos 0 -#define TIMRG_IE_TIMR0_Msk (0x01 << TIMRG_IE_TIMR0_Pos) -#define TIMRG_IE_TIMR1_Pos 1 -#define TIMRG_IE_TIMR1_Msk (0x01 << TIMRG_IE_TIMR1_Pos) -#define TIMRG_IE_TIMR2_Pos 2 -#define TIMRG_IE_TIMR2_Msk (0x01 << TIMRG_IE_TIMR2_Pos) -#define TIMRG_IE_TIMR3_Pos 3 -#define TIMRG_IE_TIMR3_Msk (0x01 << TIMRG_IE_TIMR3_Pos) -#define TIMRG_IE_TIMR4_Pos 4 -#define TIMRG_IE_TIMR4_Msk (0x01 << TIMRG_IE_TIMR4_Pos) -#define TIMRG_IE_TIMR5_Pos 5 -#define TIMRG_IE_TIMR5_Msk (0x01 << TIMRG_IE_TIMR5_Pos) -#define TIMRG_IE_PULSE_Pos 16 -#define TIMRG_IE_PULSE_Msk (0x01 << TIMRG_IE_PULSE_Pos) - -#define TIMRG_IF_TIMR0_Pos 0 //写1清零 -#define TIMRG_IF_TIMR0_Msk (0x01 << TIMRG_IF_TIMR0_Pos) -#define TIMRG_IF_TIMR1_Pos 1 -#define TIMRG_IF_TIMR1_Msk (0x01 << TIMRG_IF_TIMR1_Pos) -#define TIMRG_IF_TIMR2_Pos 2 -#define TIMRG_IF_TIMR2_Msk (0x01 << TIMRG_IF_TIMR2_Pos) -#define TIMRG_IF_TIMR3_Pos 3 -#define TIMRG_IF_TIMR3_Msk (0x01 << TIMRG_IF_TIMR3_Pos) -#define TIMRG_IF_TIMR4_Pos 4 -#define TIMRG_IF_TIMR4_Msk (0x01 << TIMRG_IF_TIMR4_Pos) -#define TIMRG_IF_TIMR5_Pos 5 -#define TIMRG_IF_TIMR5_Msk (0x01 << TIMRG_IF_TIMR5_Pos) -#define TIMRG_IF_PULSE_Pos 16 -#define TIMRG_IF_PULSE_Msk (0x01 << TIMRG_IF_PULSE_Pos) - -#define TIMRG_HALT_TIMR0_Pos 0 //1 暂停计数 -#define TIMRG_HALT_TIMR0_Msk (0x01 << TIMRG_HALT_TIMR0_Pos) -#define TIMRG_HALT_TIMR1_Pos 1 -#define TIMRG_HALT_TIMR1_Msk (0x01 << TIMRG_HALT_TIMR1_Pos) -#define TIMRG_HALT_TIMR2_Pos 2 -#define TIMRG_HALT_TIMR2_Msk (0x01 << TIMRG_HALT_TIMR2_Pos) -#define TIMRG_HALT_TIMR3_Pos 3 -#define TIMRG_HALT_TIMR3_Msk (0x01 << TIMRG_HALT_TIMR3_Pos) -#define TIMRG_HALT_TIMR4_Pos 4 -#define TIMRG_HALT_TIMR4_Msk (0x01 << TIMRG_HALT_TIMR4_Pos) -#define TIMRG_HALT_TIMR5_Pos 5 -#define TIMRG_HALT_TIMR5_Msk (0x01 << TIMRG_HALT_TIMR5_Pos) - -typedef struct -{ - __IO uint32_t DATA; + __I uint32_t PCVAL; //ʱǰֵ - __IO uint32_t CTRL; + uint32_t RESERVED[2]; - __IO uint32_t BAUD; + __IO uint32_t IE; - __IO uint32_t FIFO; + __IO uint32_t IF; - __IO uint32_t LINCR; + __IO uint32_t HALT; +} TIMRG_TypeDef; - union { - __IO uint32_t CTSCR; - __IO uint32_t RTSCR; - }; +#define TIMRG_PCTRL_EN_Pos 0 //ʼ32λ0ʼϼ +#define TIMRG_PCTRL_EN_Msk (0x01 << TIMRG_PCTRL_EN_Pos) +#define TIMRG_PCTRL_HIGH_Pos 1 //0 ͵ƽ 1 ߵƽ +#define TIMRG_PCTRL_HIGH_Msk (0x01 << TIMRG_PCTRL_HIGH_Pos) +#define TIMRG_PCTRL_CLKSRC_Pos 2 //ʱԴ0 ڲϵͳʱ 1 ģһپ +#define TIMRG_PCTRL_CLKSRC_Msk (0x01 << TIMRG_PCTRL_CLKSRC_Pos) + +#define TIMRG_IE_TIMR0_Pos 0 +#define TIMRG_IE_TIMR0_Msk (0x01 << TIMRG_IE_TIMR0_Pos) +#define TIMRG_IE_TIMR1_Pos 1 +#define TIMRG_IE_TIMR1_Msk (0x01 << TIMRG_IE_TIMR1_Pos) +#define TIMRG_IE_TIMR2_Pos 2 +#define TIMRG_IE_TIMR2_Msk (0x01 << TIMRG_IE_TIMR2_Pos) +#define TIMRG_IE_TIMR3_Pos 3 +#define TIMRG_IE_TIMR3_Msk (0x01 << TIMRG_IE_TIMR3_Pos) +#define TIMRG_IE_TIMR4_Pos 4 +#define TIMRG_IE_TIMR4_Msk (0x01 << TIMRG_IE_TIMR4_Pos) +#define TIMRG_IE_TIMR5_Pos 5 +#define TIMRG_IE_TIMR5_Msk (0x01 << TIMRG_IE_TIMR5_Pos) +#define TIMRG_IE_PULSE_Pos 16 +#define TIMRG_IE_PULSE_Msk (0x01 << TIMRG_IE_PULSE_Pos) + +#define TIMRG_IF_TIMR0_Pos 0 //д1 +#define TIMRG_IF_TIMR0_Msk (0x01 << TIMRG_IF_TIMR0_Pos) +#define TIMRG_IF_TIMR1_Pos 1 +#define TIMRG_IF_TIMR1_Msk (0x01 << TIMRG_IF_TIMR1_Pos) +#define TIMRG_IF_TIMR2_Pos 2 +#define TIMRG_IF_TIMR2_Msk (0x01 << TIMRG_IF_TIMR2_Pos) +#define TIMRG_IF_TIMR3_Pos 3 +#define TIMRG_IF_TIMR3_Msk (0x01 << TIMRG_IF_TIMR3_Pos) +#define TIMRG_IF_TIMR4_Pos 4 +#define TIMRG_IF_TIMR4_Msk (0x01 << TIMRG_IF_TIMR4_Pos) +#define TIMRG_IF_TIMR5_Pos 5 +#define TIMRG_IF_TIMR5_Msk (0x01 << TIMRG_IF_TIMR5_Pos) +#define TIMRG_IF_PULSE_Pos 16 +#define TIMRG_IF_PULSE_Msk (0x01 << TIMRG_IF_PULSE_Pos) + +#define TIMRG_HALT_TIMR0_Pos 0 //1 ͣ +#define TIMRG_HALT_TIMR0_Msk (0x01 << TIMRG_HALT_TIMR0_Pos) +#define TIMRG_HALT_TIMR1_Pos 1 +#define TIMRG_HALT_TIMR1_Msk (0x01 << TIMRG_HALT_TIMR1_Pos) +#define TIMRG_HALT_TIMR2_Pos 2 +#define TIMRG_HALT_TIMR2_Msk (0x01 << TIMRG_HALT_TIMR2_Pos) +#define TIMRG_HALT_TIMR3_Pos 3 +#define TIMRG_HALT_TIMR3_Msk (0x01 << TIMRG_HALT_TIMR3_Pos) +#define TIMRG_HALT_TIMR4_Pos 4 +#define TIMRG_HALT_TIMR4_Msk (0x01 << TIMRG_HALT_TIMR4_Pos) +#define TIMRG_HALT_TIMR5_Pos 5 +#define TIMRG_HALT_TIMR5_Msk (0x01 << TIMRG_HALT_TIMR5_Pos) + + + + +typedef struct { + __IO uint32_t DATA; + + __IO uint32_t CTRL; + + __IO uint32_t BAUD; + + __IO uint32_t FIFO; + + __IO uint32_t LINCR; + + union { + __IO uint32_t CTSCR; + + __IO uint32_t RTSCR; + }; } UART_TypeDef; -#define UART_DATA_DATA_Pos 0 -#define UART_DATA_DATA_Msk (0x1FF << UART_DATA_DATA_Pos) -#define UART_DATA_VALID_Pos 9 //当DATA字段有有效的接收数据时，该位硬件置1，读取数据后自动清零 -#define UART_DATA_VALID_Msk (0x01 << UART_DATA_VALID_Pos) -#define UART_DATA_PAERR_Pos 10 //Parity Error -#define UART_DATA_PAERR_Msk (0x01 << UART_DATA_PAERR_Pos) - -#define UART_CTRL_TXIDLE_Pos 0 //TX IDLE: 0 正在发送数据 1 空闲状态，没有数据发送 -#define UART_CTRL_TXIDLE_Msk (0x01 << UART_CTRL_TXIDLE_Pos) -#define UART_CTRL_TXFF_Pos 1 //TX FIFO Full -#define UART_CTRL_TXFF_Msk (0x01 << UART_CTRL_TXFF_Pos) -#define UART_CTRL_TXIE_Pos 2 //TX 中断使能: 1 TX FF 中数据少于设定个数时产生中断 -#define UART_CTRL_TXIE_Msk (0x01 << UART_CTRL_TXIE_Pos) -#define UART_CTRL_RXNE_Pos 3 //RX FIFO Not Empty -#define UART_CTRL_RXNE_Msk (0x01 << UART_CTRL_RXNE_Pos) -#define UART_CTRL_RXIE_Pos 4 //RX 中断使能: 1 RX FF 中数据达到设定个数时产生中断 -#define UART_CTRL_RXIE_Msk (0x01 << UART_CTRL_RXIE_Pos) -#define UART_CTRL_RXOV_Pos 5 //RX FIFO Overflow，写1清零 -#define UART_CTRL_RXOV_Msk (0x01 << UART_CTRL_RXOV_Pos) -#define UART_CTRL_TXDOIE_Pos 6 //TX Done 中断使能，发送FIFO空且发送发送移位寄存器已将最后一位发送出去 -#define UART_CTRL_TXDOIE_Msk (0x01 << UART_CTRL_TXDOIE_Pos) -#define UART_CTRL_EN_Pos 9 -#define UART_CTRL_EN_Msk (0x01 << UART_CTRL_EN_Pos) -#define UART_CTRL_LOOP_Pos 10 -#define UART_CTRL_LOOP_Msk (0x01 << UART_CTRL_LOOP_Pos) -#define UART_CTRL_BAUDEN_Pos 13 //必须写1 -#define UART_CTRL_BAUDEN_Msk (0x01 << UART_CTRL_BAUDEN_Pos) -#define UART_CTRL_TOIE_Pos 14 //TimeOut 中断使能，接收到上个字符后，超过 TOTIME/BAUDRAUD 秒没有接收到新的数据 -#define UART_CTRL_TOIE_Msk (0x01 << UART_CTRL_TOIE_Pos) -#define UART_CTRL_BRKDET_Pos 15 //LIN Break Detect，检测到LIN Break，即RX线上检测到连续11位低电平 -#define UART_CTRL_BRKDET_Msk (0x01 << UART_CTRL_BRKDET_Pos) -#define UART_CTRL_BRKIE_Pos 16 //LIN Break Detect 中断使能 -#define UART_CTRL_BRKIE_Msk (0x01 << UART_CTRL_BRKIE_Pos) -#define UART_CTRL_GENBRK_Pos 17 //Generate LIN Break，发送LIN Break -#define UART_CTRL_GENBRK_Msk (0x01 << UART_CTRL_GENBRK_Pos) -#define UART_CTRL_DATA9b_Pos 18 //1 9位数据位 0 8位数据位 -#define UART_CTRL_DATA9b_Msk (0x01 << UART_CTRL_DATA9b_Pos) -#define UART_CTRL_PARITY_Pos 19 //000 无校验 001 奇校验 011 偶校验 101 固定为1 111 固定为0 -#define UART_CTRL_PARITY_Msk (0x07 << UART_CTRL_PARITY_Pos) -#define UART_CTRL_STOP2b_Pos 22 //1 2位停止位 0 1位停止位 -#define UART_CTRL_STOP2b_Msk (0x03 << UART_CTRL_STOP2b_Pos) -#define UART_CTRL_TOTIME_Pos 24 //TimeOut 时长 = TOTIME/(BAUDRAUD/10) 秒 -#define UART_CTRL_TOTIME_Msk (0xFFu << UART_CTRL_TOTIME_Pos) - -#define UART_BAUD_BAUD_Pos 0 //串口波特率 = SYS_Freq/16/BAUD - 1 -#define UART_BAUD_BAUD_Msk (0x3FFF << UART_BAUD_BAUD_Pos) -#define UART_BAUD_TXD_Pos 14 //通过此位可直接读取串口TXD引脚上的电平 -#define UART_BAUD_TXD_Msk (0x01 << UART_BAUD_TXD_Pos) -#define UART_BAUD_RXD_Pos 15 //通过此位可直接读取串口RXD引脚上的电平 -#define UART_BAUD_RXD_Msk (0x01 << UART_BAUD_RXD_Pos) -#define UART_BAUD_RXTOIF_Pos 16 //接收&超时的中断标志 = RXIF | TOIF -#define UART_BAUD_RXTOIF_Msk (0x01 << UART_BAUD_RXTOIF_Pos) -#define UART_BAUD_TXIF_Pos 17 //发送中断标志 = TXTHRF & TXIE -#define UART_BAUD_TXIF_Msk (0x01 << UART_BAUD_TXIF_Pos) -#define UART_BAUD_BRKIF_Pos 18 //LIN Break Detect 中断标志，检测到LIN Break时若BRKIE=1，此位由硬件置位 -#define UART_BAUD_BRKIF_Msk (0x01 << UART_BAUD_BRKIF_Pos) -#define UART_BAUD_RXTHRF_Pos 19 //RX FIFO Threshold Flag，RX FIFO中数据达到设定个数（RXLVL >= RXTHR）时硬件置1 -#define UART_BAUD_RXTHRF_Msk (0x01 << UART_BAUD_RXTHRF_Pos) -#define UART_BAUD_TXTHRF_Pos 20 //TX FIFO Threshold Flag，TX FIFO中数据少于设定个数（TXLVL <= TXTHR）时硬件置1 -#define UART_BAUD_TXTHRF_Msk (0x01 << UART_BAUD_TXTHRF_Pos) -#define UART_BAUD_TOIF_Pos 21 //TimeOut 中断标志，超过 TOTIME/BAUDRAUD 秒没有接收到新的数据时若TOIE=1，此位由硬件置位 -#define UART_BAUD_TOIF_Msk (0x01 << UART_BAUD_TOIF_Pos) -#define UART_BAUD_RXIF_Pos 22 //接收中断标志 = RXTHRF & RXIE -#define UART_BAUD_RXIF_Msk (0x01 << UART_BAUD_RXIF_Pos) -#define UART_BAUD_ABREN_Pos 23 //Auto Baudrate Enable，写1启动自动波特率校准，完成后自动清零 -#define UART_BAUD_ABREN_Msk (0x01 << UART_BAUD_ABREN_Pos) -#define UART_BAUD_ABRBIT_Pos 24 //Auto Baudrate Bit，用于计算波特率的检测位长，0 1位，通过测起始位 脉宽计算波特率，要求发送端发送0xFF \ - // 1 2位，通过测起始位加1位数据位脉宽计算波特率，要求发送端发送0xFE \ - // 1 4位，通过测起始位加3位数据位脉宽计算波特率，要求发送端发送0xF8 \ - // 1 8位，通过测起始位加7位数据位脉宽计算波特率，要求发送端发送0x80 -#define UART_BAUD_ABRBIT_Msk (0x03 << UART_BAUD_ABRBIT_Pos) -#define UART_BAUD_ABRERR_Pos 26 //Auto Baudrate Error，0 自动波特率校准成功 1 自动波特率校准失败 -#define UART_BAUD_ABRERR_Msk (0x01 << UART_BAUD_ABRERR_Pos) -#define UART_BAUD_TXDOIF_Pos 27 //TX Done 中断标志，发送FIFO空且发送发送移位寄存器已将最后一位发送出去 -#define UART_BAUD_TXDOIF_Msk (0x01 << UART_BAUD_TXDOIF_Pos) - -#define UART_FIFO_RXLVL_Pos 0 //RX FIFO Level，RX FIFO 中字符个数 -#define UART_FIFO_RXLVL_Msk (0xFF << UART_FIFO_RXLVL_Pos) -#define UART_FIFO_TXLVL_Pos 8 //TX FIFO Level，TX FIFO 中字符个数 -#define UART_FIFO_TXLVL_Msk (0xFF << UART_FIFO_TXLVL_Pos) -#define UART_FIFO_RXTHR_Pos 16 //RX FIFO Threshold，RX中断触发门限，中断使能时 RXLVL >= RXTHR 触发RX中断 -#define UART_FIFO_RXTHR_Msk (0xFF << UART_FIFO_RXTHR_Pos) -#define UART_FIFO_TXTHR_Pos 24 //TX FIFO Threshold，TX中断触发门限，中断使能时 TXLVL <= TXTHR 触发TX中断 -#define UART_FIFO_TXTHR_Msk (0xFFu << UART_FIFO_TXTHR_Pos) - -#define UART_LINCR_BRKDETIE_Pos 0 //检测到LIN Break中断使能 -#define UART_LINCR_BRKDETIE_Msk (0x01 << UART_LINCR_BRKDETIE_Pos) -#define UART_LINCR_BRKDETIF_Pos 1 //检测到LIN Break中断状态 -#define UART_LINCR_BRKDETIF_Msk (0x01 << UART_LINCR_BRKDETIF_Pos) -#define UART_LINCR_GENBRKIE_Pos 2 //发送LIN Break完成中断使能 -#define UART_LINCR_GENBRKIE_Msk (0x01 << UART_LINCR_GENBRKIE_Pos) -#define UART_LINCR_GENBRKIF_Pos 3 //发送LIN Break完成中断状态 -#define UART_LINCR_GENBRKIF_Msk (0x01 << UART_LINCR_GENBRKIF_Pos) -#define UART_LINCR_GENBRK_Pos 4 //发送LIN Break，发送完成自动清零 -#define UART_LINCR_GENBRK_Msk (0x01 << UART_LINCR_GENBRK_Pos) - -#define UART_CTSCR_EN_Pos 0 //CTS流控使能 -#define UART_CTSCR_EN_Msk (0x01 << UART_CTSCR_EN_Pos) -#define UART_CTSCR_POL_Pos 2 //CTS信号极性，0 低有效，CTS输入为低表示可以发送数据 -#define UART_CTSCR_POL_Msk (0x01 << UART_CTSCR_POL_Pos) -#define UART_CTSCR_STAT_Pos 7 //CTS信号的当前状态 -#define UART_CTSCR_STAT_Msk (0x01 << UART_CTSCR_STAT_Pos) - -#define UART_RTSCR_EN_Pos 1 //RTS流控使能 -#define UART_RTSCR_EN_Msk (0x01 << UART_RTSCR_EN_Pos) -#define UART_RTSCR_POL_Pos 3 //RTS信号极性 0 低有效，RTS输入为低表示可以接收数据 -#define UART_RTSCR_POL_Msk (0x01 << UART_RTSCR_POL_Pos) -#define UART_RTSCR_THR_Pos 4 //RTS流控的触发阈值 0 1字节 1 2字节 2 4字节 3 6字节 -#define UART_RTSCR_THR_Msk (0x07 << UART_RTSCR_THR_Pos) -#define UART_RTSCR_STAT_Pos 8 //RTS信号的当前状态 -#define UART_RTSCR_STAT_Msk (0x01 << UART_RTSCR_STAT_Pos) - -typedef struct -{ - __IO uint32_t CTRL; - - __IO uint32_t DATA; - - __IO uint32_t STAT; - - __IO uint32_t IE; - __IO uint32_t IF; +#define UART_DATA_DATA_Pos 0 +#define UART_DATA_DATA_Msk (0x1FF << UART_DATA_DATA_Pos) +#define UART_DATA_VALID_Pos 9 //DATAֶЧĽʱλӲ1ȡݺԶ +#define UART_DATA_VALID_Msk (0x01 << UART_DATA_VALID_Pos) +#define UART_DATA_PAERR_Pos 10 //Parity Error +#define UART_DATA_PAERR_Msk (0x01 << UART_DATA_PAERR_Pos) + +#define UART_CTRL_TXIDLE_Pos 0 //TX IDLE: 0 ڷ 1 ״̬ûݷ +#define UART_CTRL_TXIDLE_Msk (0x01 << UART_CTRL_TXIDLE_Pos) +#define UART_CTRL_TXFF_Pos 1 //TX FIFO Full +#define UART_CTRL_TXFF_Msk (0x01 << UART_CTRL_TXFF_Pos) +#define UART_CTRL_TXIE_Pos 2 //TX жʹ: 1 TX FF 趨ʱж +#define UART_CTRL_TXIE_Msk (0x01 << UART_CTRL_TXIE_Pos) +#define UART_CTRL_RXNE_Pos 3 //RX FIFO Not Empty +#define UART_CTRL_RXNE_Msk (0x01 << UART_CTRL_RXNE_Pos) +#define UART_CTRL_RXIE_Pos 4 //RX жʹ: 1 RX FF ݴﵽ趨ʱж +#define UART_CTRL_RXIE_Msk (0x01 << UART_CTRL_RXIE_Pos) +#define UART_CTRL_RXOV_Pos 5 //RX FIFO Overflowд1 +#define UART_CTRL_RXOV_Msk (0x01 << UART_CTRL_RXOV_Pos) +#define UART_CTRL_TXDOIE_Pos 6 //TX Done жʹܣFIFOҷͷλĴѽһλͳȥ +#define UART_CTRL_TXDOIE_Msk (0x01 << UART_CTRL_TXDOIE_Pos) +#define UART_CTRL_EN_Pos 9 +#define UART_CTRL_EN_Msk (0x01 << UART_CTRL_EN_Pos) +#define UART_CTRL_LOOP_Pos 10 +#define UART_CTRL_LOOP_Msk (0x01 << UART_CTRL_LOOP_Pos) +#define UART_CTRL_BAUDEN_Pos 13 //д1 +#define UART_CTRL_BAUDEN_Msk (0x01 << UART_CTRL_BAUDEN_Pos) +#define UART_CTRL_TOIE_Pos 14 //TimeOut жʹܣյϸַ󣬳 TOTIME/BAUDRAUD ûнյµ +#define UART_CTRL_TOIE_Msk (0x01 << UART_CTRL_TOIE_Pos) +#define UART_CTRL_BRKDET_Pos 15 //LIN Break Detect⵽LIN BreakRXϼ⵽11λ͵ƽ +#define UART_CTRL_BRKDET_Msk (0x01 << UART_CTRL_BRKDET_Pos) +#define UART_CTRL_BRKIE_Pos 16 //LIN Break Detect жʹ +#define UART_CTRL_BRKIE_Msk (0x01 << UART_CTRL_BRKIE_Pos) +#define UART_CTRL_GENBRK_Pos 17 //Generate LIN BreakLIN Break +#define UART_CTRL_GENBRK_Msk (0x01 << UART_CTRL_GENBRK_Pos) +#define UART_CTRL_DATA9b_Pos 18 //1 9λλ 0 8λλ +#define UART_CTRL_DATA9b_Msk (0x01 << UART_CTRL_DATA9b_Pos) +#define UART_CTRL_PARITY_Pos 19 //000 У 001 У 011 żУ 101 ̶Ϊ1 111 ̶Ϊ0 +#define UART_CTRL_PARITY_Msk (0x07 << UART_CTRL_PARITY_Pos) +#define UART_CTRL_STOP2b_Pos 22 //1 2λֹͣλ 0 1λֹͣλ +#define UART_CTRL_STOP2b_Msk (0x03 << UART_CTRL_STOP2b_Pos) +#define UART_CTRL_TOTIME_Pos 24 //TimeOut ʱ = TOTIME/(BAUDRAUD/10) +#define UART_CTRL_TOTIME_Msk (0xFFu<< UART_CTRL_TOTIME_Pos) + +#define UART_BAUD_BAUD_Pos 0 //ڲ = SYS_Freq/16/BAUD - 1 +#define UART_BAUD_BAUD_Msk (0x3FFF << UART_BAUD_BAUD_Pos) +#define UART_BAUD_TXD_Pos 14 //ͨλֱӶȡTXDϵĵƽ +#define UART_BAUD_TXD_Msk (0x01 << UART_BAUD_TXD_Pos) +#define UART_BAUD_RXD_Pos 15 //ͨλֱӶȡRXDϵĵƽ +#define UART_BAUD_RXD_Msk (0x01 << UART_BAUD_RXD_Pos) +#define UART_BAUD_RXTOIF_Pos 16 //&ʱжϱ־ = RXIF | TOIF +#define UART_BAUD_RXTOIF_Msk (0x01 << UART_BAUD_RXTOIF_Pos) +#define UART_BAUD_TXIF_Pos 17 //жϱ־ = TXTHRF & TXIE +#define UART_BAUD_TXIF_Msk (0x01 << UART_BAUD_TXIF_Pos) +#define UART_BAUD_BRKIF_Pos 18 //LIN Break Detect жϱ־⵽LIN BreakʱBRKIE=1λӲλ +#define UART_BAUD_BRKIF_Msk (0x01 << UART_BAUD_BRKIF_Pos) +#define UART_BAUD_RXTHRF_Pos 19 //RX FIFO Threshold FlagRX FIFOݴﵽ趨RXLVL >= RXTHRʱӲ1 +#define UART_BAUD_RXTHRF_Msk (0x01 << UART_BAUD_RXTHRF_Pos) +#define UART_BAUD_TXTHRF_Pos 20 //TX FIFO Threshold FlagTX FIFO趨TXLVL <= TXTHRʱӲ1 +#define UART_BAUD_TXTHRF_Msk (0x01 << UART_BAUD_TXTHRF_Pos) +#define UART_BAUD_TOIF_Pos 21 //TimeOut жϱ־ TOTIME/BAUDRAUD ûнյµʱTOIE=1λӲλ +#define UART_BAUD_TOIF_Msk (0x01 << UART_BAUD_TOIF_Pos) +#define UART_BAUD_RXIF_Pos 22 //жϱ־ = RXTHRF & RXIE +#define UART_BAUD_RXIF_Msk (0x01 << UART_BAUD_RXIF_Pos) +#define UART_BAUD_ABREN_Pos 23 //Auto Baudrate Enableд1ԶУ׼ɺԶ +#define UART_BAUD_ABREN_Msk (0x01 << UART_BAUD_ABREN_Pos) +#define UART_BAUD_ABRBIT_Pos 24 //Auto Baudrate Bitڼ㲨ʵļλ0 1λͨʼλ 㲨ʣҪͶ˷0xFF + // 1 2λͨʼλ1λλ㲨ʣҪͶ˷0xFE + // 1 4λͨʼλ3λλ㲨ʣҪͶ˷0xF8 + // 1 8λͨʼλ7λλ㲨ʣҪͶ˷0x80 +#define UART_BAUD_ABRBIT_Msk (0x03 << UART_BAUD_ABRBIT_Pos) +#define UART_BAUD_ABRERR_Pos 26 //Auto Baudrate Error0 ԶУ׼ɹ 1 ԶУ׼ʧ +#define UART_BAUD_ABRERR_Msk (0x01 << UART_BAUD_ABRERR_Pos) +#define UART_BAUD_TXDOIF_Pos 27 //TX Done жϱ־FIFOҷͷλĴѽһλͳȥ +#define UART_BAUD_TXDOIF_Msk (0x01 << UART_BAUD_TXDOIF_Pos) + +#define UART_FIFO_RXLVL_Pos 0 //RX FIFO LevelRX FIFO ַ +#define UART_FIFO_RXLVL_Msk (0xFF << UART_FIFO_RXLVL_Pos) +#define UART_FIFO_TXLVL_Pos 8 //TX FIFO LevelTX FIFO ַ +#define UART_FIFO_TXLVL_Msk (0xFF << UART_FIFO_TXLVL_Pos) +#define UART_FIFO_RXTHR_Pos 16 //RX FIFO ThresholdRXжϴޣжʹʱ RXLVL >= RXTHR RXж +#define UART_FIFO_RXTHR_Msk (0xFF << UART_FIFO_RXTHR_Pos) +#define UART_FIFO_TXTHR_Pos 24 //TX FIFO ThresholdTXжϴޣжʹʱ TXLVL <= TXTHR TXж +#define UART_FIFO_TXTHR_Msk (0xFFu<< UART_FIFO_TXTHR_Pos) + +#define UART_LINCR_BRKDETIE_Pos 0 //⵽LIN Breakжʹ +#define UART_LINCR_BRKDETIE_Msk (0x01 << UART_LINCR_BRKDETIE_Pos) +#define UART_LINCR_BRKDETIF_Pos 1 //⵽LIN Breakж״̬ +#define UART_LINCR_BRKDETIF_Msk (0x01 << UART_LINCR_BRKDETIF_Pos) +#define UART_LINCR_GENBRKIE_Pos 2 //LIN Breakжʹ +#define UART_LINCR_GENBRKIE_Msk (0x01 << UART_LINCR_GENBRKIE_Pos) +#define UART_LINCR_GENBRKIF_Pos 3 //LIN Breakж״̬ +#define UART_LINCR_GENBRKIF_Msk (0x01 << UART_LINCR_GENBRKIF_Pos) +#define UART_LINCR_GENBRK_Pos 4 //LIN BreakԶ +#define UART_LINCR_GENBRK_Msk (0x01 << UART_LINCR_GENBRK_Pos) + +#define UART_CTSCR_EN_Pos 0 //CTSʹ +#define UART_CTSCR_EN_Msk (0x01 << UART_CTSCR_EN_Pos) +#define UART_CTSCR_POL_Pos 2 //CTSźżԣ0 ЧCTSΪͱʾԷ +#define UART_CTSCR_POL_Msk (0x01 << UART_CTSCR_POL_Pos) +#define UART_CTSCR_STAT_Pos 7 //CTSźŵĵǰ״̬ +#define UART_CTSCR_STAT_Msk (0x01 << UART_CTSCR_STAT_Pos) + +#define UART_RTSCR_EN_Pos 1 //RTSʹ +#define UART_RTSCR_EN_Msk (0x01 << UART_RTSCR_EN_Pos) +#define UART_RTSCR_POL_Pos 3 //RTSźż 0 ЧRTSΪͱʾԽ +#define UART_RTSCR_POL_Msk (0x01 << UART_RTSCR_POL_Pos) +#define UART_RTSCR_THR_Pos 4 //RTSصĴֵ 0 1ֽ 1 2ֽ 2 4ֽ 3 6ֽ +#define UART_RTSCR_THR_Msk (0x07 << UART_RTSCR_THR_Pos) +#define UART_RTSCR_STAT_Pos 8 //RTSźŵĵǰ״̬ +#define UART_RTSCR_STAT_Msk (0x01 << UART_RTSCR_STAT_Pos) + + + + +typedef struct { + __IO uint32_t CTRL; + + __IO uint32_t DATA; + + __IO uint32_t STAT; + + __IO uint32_t IE; + + __IO uint32_t IF; } SPI_TypeDef; -#define SPI_CTRL_CLKDIV_Pos 0 //Clock Divider, SPI工作时钟 = SYS_Freq/pow(2, CLKDIV+2) -#define SPI_CTRL_CLKDIV_Msk (0x07 << SPI_CTRL_CLKDIV_Pos) -#define SPI_CTRL_EN_Pos 3 -#define SPI_CTRL_EN_Msk (0x01 << SPI_CTRL_EN_Pos) -#define SPI_CTRL_SIZE_Pos 4 //Data Size Select, 取值3--15，表示4--16位 -#define SPI_CTRL_SIZE_Msk (0x0F << SPI_CTRL_SIZE_Pos) -#define SPI_CTRL_CPHA_Pos 8 //0 在SCLK的第一个跳变沿采样数据 1 在SCLK的第二个跳变沿采样数据 -#define SPI_CTRL_CPHA_Msk (0x01 << SPI_CTRL_CPHA_Pos) -#define SPI_CTRL_CPOL_Pos 9 //0 空闲状态下SCLK为低电平 1 空闲状态下SCLK为高电平 -#define SPI_CTRL_CPOL_Msk (0x01 << SPI_CTRL_CPOL_Pos) -#define SPI_CTRL_FFS_Pos 10 //Frame Format Select, 0 SPI 1 TI SSI 2 SPI 3 SPI -#define SPI_CTRL_FFS_Msk (0x03 << SPI_CTRL_FFS_Pos) -#define SPI_CTRL_MSTR_Pos 12 //Master, 1 主模式 0 从模式 -#define SPI_CTRL_MSTR_Msk (0x01 << SPI_CTRL_MSTR_Pos) -#define SPI_CTRL_FAST_Pos 13 //1 SPI工作时钟 = SYS_Freq/2 0 SPI工作时钟由SPI->CTRL.CLKDIV设置 -#define SPI_CTRL_FAST_Msk (0x01 << SPI_CTRL_FAST_Pos) -#define SPI_CTRL_FILTE_Pos 16 //1 对SPI输入信号进行去抖操作 0 对SPI输入信号不进行去抖操作 -#define SPI_CTRL_FILTE_Msk (0x01 << SPI_CTRL_FILTE_Pos) -#define SPI_CTRL_SSN_H_Pos 17 //0 传输过程中SSN始终为0 1 传输过程中每字符之间会将SSN拉高半个SCLK周期 -#define SPI_CTRL_SSN_H_Msk (0x01 << SPI_CTRL_SSN_H_Pos) -#define SPI_CTRL_TFCLR_Pos 24 //TX FIFO Clear -#define SPI_CTRL_TFCLR_Msk (0x01 << SPI_CTRL_TFCLR_Pos) -#define SPI_CTRL_RFCLR_Pos 25 //RX FIFO Clear -#define SPI_CTRL_RFCLR_Msk (0x01 << SPI_CTRL_RFCLR_Pos) - -#define SPI_STAT_WTC_Pos 0 //Word Transmit Complete，每传输完成一个数据字由硬件置1，软件写1清零 -#define SPI_STAT_WTC_Msk (0x01 << SPI_STAT_WTC_Pos) -#define SPI_STAT_TFE_Pos 1 //发送FIFO Empty -#define SPI_STAT_TFE_Msk (0x01 << SPI_STAT_TFE_Pos) -#define SPI_STAT_TFNF_Pos 2 //发送FIFO Not Full -#define SPI_STAT_TFNF_Msk (0x01 << SPI_STAT_TFNF_Pos) -#define SPI_STAT_RFNE_Pos 3 //接收FIFO Not Empty -#define SPI_STAT_RFNE_Msk (0x01 << SPI_STAT_RFNE_Pos) -#define SPI_STAT_RFF_Pos 4 //接收FIFO Full -#define SPI_STAT_RFF_Msk (0x01 << SPI_STAT_RFF_Pos) -#define SPI_STAT_RFOVF_Pos 5 //接收FIFO Overflow -#define SPI_STAT_RFOVF_Msk (0x01 << SPI_STAT_RFOVF_Pos) -#define SPI_STAT_TFLVL_Pos 6 //发送FIFO中数据个数， 0 TFNF=0时表示FIFO内有8个数据，TFNF=1时表示FIFO内有0个数据 1--7 FIFO内有1--7个数据 -#define SPI_STAT_TFLVL_Msk (0x07 << SPI_STAT_TFLVL_Pos) -#define SPI_STAT_RFLVL_Pos 9 //接收FIFO中数据个数， 0 RFF=1时表示FIFO内有8个数据， RFF=0时表示FIFO内有0个数据 1--7 FIFO内有1--7个数据 -#define SPI_STAT_RFLVL_Msk (0x07 << SPI_STAT_RFLVL_Pos) -#define SPI_STAT_BUSY_Pos 15 -#define SPI_STAT_BUSY_Msk (0x01 << SPI_STAT_BUSY_Pos) - -#define SPI_IE_RFOVF_Pos 0 -#define SPI_IE_RFOVF_Msk (0x01 << SPI_IE_RFOVF_Pos) -#define SPI_IE_RFF_Pos 1 -#define SPI_IE_RFF_Msk (0x01 << SPI_IE_RFF_Pos) -#define SPI_IE_RFHF_Pos 2 -#define SPI_IE_RFHF_Msk (0x01 << SPI_IE_RFHF_Pos) -#define SPI_IE_TFE_Pos 3 -#define SPI_IE_TFE_Msk (0x01 << SPI_IE_TFE_Pos) -#define SPI_IE_TFHF_Pos 4 -#define SPI_IE_TFHF_Msk (0x01 << SPI_IE_TFHF_Pos) -#define SPI_IE_WTC_Pos 8 //Word Transmit Complete -#define SPI_IE_WTC_Msk (0x01 << SPI_IE_WTC_Pos) -#define SPI_IE_FTC_Pos 9 //Frame Transmit Complete -#define SPI_IE_FTC_Msk (0x01 << SPI_IE_FTC_Pos) - -#define SPI_IF_RFOVF_Pos 0 //写1清零 -#define SPI_IF_RFOVF_Msk (0x01 << SPI_IF_RFOVF_Pos) -#define SPI_IF_RFF_Pos 1 -#define SPI_IF_RFF_Msk (0x01 << SPI_IF_RFF_Pos) -#define SPI_IF_RFHF_Pos 2 -#define SPI_IF_RFHF_Msk (0x01 << SPI_IF_RFHF_Pos) -#define SPI_IF_TFE_Pos 3 -#define SPI_IF_TFE_Msk (0x01 << SPI_IF_TFE_Pos) -#define SPI_IF_TFHF_Pos 4 -#define SPI_IF_TFHF_Msk (0x01 << SPI_IF_TFHF_Pos) -#define SPI_IF_WTC_Pos 8 //Word Transmit Complete，每传输完成一个数据字由硬件置1 -#define SPI_IF_WTC_Msk (0x01 << SPI_IF_WTC_Pos) -#define SPI_IF_FTC_Pos 9 //Frame Transmit Complete，WTC置位时若TX FIFO是空的，则FTC置位 -#define SPI_IF_FTC_Msk (0x01 << SPI_IF_FTC_Pos) - -typedef struct -{ - __IO uint32_t CLKDIV; //[15:0] 须将内部工作频率分到SCL频率的5倍，即CLKDIV = SYS_Freq/5/SCL_Freq - 1 - - __IO uint32_t CTRL; - - __IO uint32_t MSTDAT; - - __IO uint32_t MSTCMD; - __IO uint32_t SLVCR; - - __IO uint32_t SLVIF; - - __IO uint32_t SLVTX; - - __IO uint32_t SLVRX; +#define SPI_CTRL_CLKDIV_Pos 0 //Clock Divider, SPIʱ = SYS_Freq/pow(2, CLKDIV+2) +#define SPI_CTRL_CLKDIV_Msk (0x07 << SPI_CTRL_CLKDIV_Pos) +#define SPI_CTRL_EN_Pos 3 +#define SPI_CTRL_EN_Msk (0x01 << SPI_CTRL_EN_Pos) +#define SPI_CTRL_SIZE_Pos 4 //Data Size Select, ȡֵ3--15ʾ4--16λ +#define SPI_CTRL_SIZE_Msk (0x0F << SPI_CTRL_SIZE_Pos) +#define SPI_CTRL_CPHA_Pos 8 //0 SCLKĵһز 1 SCLKĵڶز +#define SPI_CTRL_CPHA_Msk (0x01 << SPI_CTRL_CPHA_Pos) +#define SPI_CTRL_CPOL_Pos 9 //0 ״̬SCLKΪ͵ƽ 1 ״̬SCLKΪߵƽ +#define SPI_CTRL_CPOL_Msk (0x01 << SPI_CTRL_CPOL_Pos) +#define SPI_CTRL_FFS_Pos 10 //Frame Format Select, 0 SPI 1 TI SSI 2 SPI 3 SPI +#define SPI_CTRL_FFS_Msk (0x03 << SPI_CTRL_FFS_Pos) +#define SPI_CTRL_MSTR_Pos 12 //Master, 1 ģʽ 0 ģʽ +#define SPI_CTRL_MSTR_Msk (0x01 << SPI_CTRL_MSTR_Pos) +#define SPI_CTRL_FAST_Pos 13 //1 SPIʱ = SYS_Freq/2 0 SPIʱSPI->CTRL.CLKDIV +#define SPI_CTRL_FAST_Msk (0x01 << SPI_CTRL_FAST_Pos) +#define SPI_CTRL_FILTE_Pos 16 //1 SPIźŽȥ 0 SPIźŲȥ +#define SPI_CTRL_FILTE_Msk (0x01 << SPI_CTRL_FILTE_Pos) +#define SPI_CTRL_SSN_H_Pos 17 //0 SSNʼΪ0 1 ÿַ֮ὫSSN߰SCLK +#define SPI_CTRL_SSN_H_Msk (0x01 << SPI_CTRL_SSN_H_Pos) +#define SPI_CTRL_TFCLR_Pos 24 //TX FIFO Clear +#define SPI_CTRL_TFCLR_Msk (0x01 << SPI_CTRL_TFCLR_Pos) +#define SPI_CTRL_RFCLR_Pos 25 //RX FIFO Clear +#define SPI_CTRL_RFCLR_Msk (0x01 << SPI_CTRL_RFCLR_Pos) + +#define SPI_STAT_WTC_Pos 0 //Word Transmit CompleteÿһӲ1д1 +#define SPI_STAT_WTC_Msk (0x01 << SPI_STAT_WTC_Pos) +#define SPI_STAT_TFE_Pos 1 //FIFO Empty +#define SPI_STAT_TFE_Msk (0x01 << SPI_STAT_TFE_Pos) +#define SPI_STAT_TFNF_Pos 2 //FIFO Not Full +#define SPI_STAT_TFNF_Msk (0x01 << SPI_STAT_TFNF_Pos) +#define SPI_STAT_RFNE_Pos 3 //FIFO Not Empty +#define SPI_STAT_RFNE_Msk (0x01 << SPI_STAT_RFNE_Pos) +#define SPI_STAT_RFF_Pos 4 //FIFO Full +#define SPI_STAT_RFF_Msk (0x01 << SPI_STAT_RFF_Pos) +#define SPI_STAT_RFOVF_Pos 5 //FIFO Overflow +#define SPI_STAT_RFOVF_Msk (0x01 << SPI_STAT_RFOVF_Pos) +#define SPI_STAT_TFLVL_Pos 6 //FIFOݸ 0 TFNF=0ʱʾFIFO8ݣTFNF=1ʱʾFIFO0 1--7 FIFO1--7 +#define SPI_STAT_TFLVL_Msk (0x07 << SPI_STAT_TFLVL_Pos) +#define SPI_STAT_RFLVL_Pos 9 //FIFOݸ 0 RFF=1ʱʾFIFO8ݣ RFF=0ʱʾFIFO0 1--7 FIFO1--7 +#define SPI_STAT_RFLVL_Msk (0x07 << SPI_STAT_RFLVL_Pos) +#define SPI_STAT_BUSY_Pos 15 +#define SPI_STAT_BUSY_Msk (0x01 << SPI_STAT_BUSY_Pos) + +#define SPI_IE_RFOVF_Pos 0 +#define SPI_IE_RFOVF_Msk (0x01 << SPI_IE_RFOVF_Pos) +#define SPI_IE_RFF_Pos 1 +#define SPI_IE_RFF_Msk (0x01 << SPI_IE_RFF_Pos) +#define SPI_IE_RFHF_Pos 2 +#define SPI_IE_RFHF_Msk (0x01 << SPI_IE_RFHF_Pos) +#define SPI_IE_TFE_Pos 3 +#define SPI_IE_TFE_Msk (0x01 << SPI_IE_TFE_Pos) +#define SPI_IE_TFHF_Pos 4 +#define SPI_IE_TFHF_Msk (0x01 << SPI_IE_TFHF_Pos) +#define SPI_IE_WTC_Pos 8 //Word Transmit Complete +#define SPI_IE_WTC_Msk (0x01 << SPI_IE_WTC_Pos) +#define SPI_IE_FTC_Pos 9 //Frame Transmit Complete +#define SPI_IE_FTC_Msk (0x01 << SPI_IE_FTC_Pos) + +#define SPI_IF_RFOVF_Pos 0 //д1 +#define SPI_IF_RFOVF_Msk (0x01 << SPI_IF_RFOVF_Pos) +#define SPI_IF_RFF_Pos 1 +#define SPI_IF_RFF_Msk (0x01 << SPI_IF_RFF_Pos) +#define SPI_IF_RFHF_Pos 2 +#define SPI_IF_RFHF_Msk (0x01 << SPI_IF_RFHF_Pos) +#define SPI_IF_TFE_Pos 3 +#define SPI_IF_TFE_Msk (0x01 << SPI_IF_TFE_Pos) +#define SPI_IF_TFHF_Pos 4 +#define SPI_IF_TFHF_Msk (0x01 << SPI_IF_TFHF_Pos) +#define SPI_IF_WTC_Pos 8 //Word Transmit CompleteÿһӲ1 +#define SPI_IF_WTC_Msk (0x01 << SPI_IF_WTC_Pos) +#define SPI_IF_FTC_Pos 9 //Frame Transmit CompleteWTCλʱTX FIFOǿյģFTCλ +#define SPI_IF_FTC_Msk (0x01 << SPI_IF_FTC_Pos) + + + + +typedef struct { + __IO uint32_t CLKDIV; //[15:0] 뽫ڲƵʷֵSCLƵʵ5CLKDIV = SYS_Freq/5/SCL_Freq - 1 + + __IO uint32_t CTRL; + + __IO uint32_t MSTDAT; + + __IO uint32_t MSTCMD; + + __IO uint32_t SLVCR; + + __IO uint32_t SLVIF; + + __IO uint32_t SLVTX; + + __IO uint32_t SLVRX; } I2C_TypeDef; -#define I2C_CTRL_MSTIE_Pos 6 -#define I2C_CTRL_MSTIE_Msk (0x01 << I2C_CTRL_MSTIE_Pos) -#define I2C_CTRL_EN_Pos 7 -#define I2C_CTRL_EN_Msk (0x01 << I2C_CTRL_EN_Pos) - -#define I2C_MSTCMD_IF_Pos 0 //1 有等待处理的中断，写1清零 有两种情况下此位硬件置位：1、一个字节传输完成 2、总线访问权丢失 -#define I2C_MSTCMD_IF_Msk (0x01 << I2C_MSTCMD_IF_Pos) -#define I2C_MSTCMD_TIP_Pos 1 //Transmission In Process -#define I2C_MSTCMD_TIP_Msk (0x01 << I2C_MSTCMD_TIP_Pos) -#define I2C_MSTCMD_ACK_Pos 3 //接收模式下，0 向发送端反馈ACK 1 向发送端反馈NACK -#define I2C_MSTCMD_ACK_Msk (0x01 << I2C_MSTCMD_ACK_Pos) -#define I2C_MSTCMD_WR_Pos 4 // 向Slave写数据时，把这一位写1，自动清零 -#define I2C_MSTCMD_WR_Msk (0x01 << I2C_MSTCMD_WR_Pos) -#define I2C_MSTCMD_RD_Pos 5 //写：从Slave读数据时，把这一位写1，自动清零 读：当I2C模块失去总线的访问权时硬件置1 -#define I2C_MSTCMD_RD_Msk (0x01 << I2C_MSTCMD_RD_Pos) -#define I2C_MSTCMD_BUSY_Pos 6 //读：当检测到START之后，这一位变1；当检测到STOP之后，这一位变0 -#define I2C_MSTCMD_BUSY_Msk (0x01 << I2C_MSTCMD_BUSY_Pos) -#define I2C_MSTCMD_STO_Pos 6 //写：产生STOP，自动清零 -#define I2C_MSTCMD_STO_Msk (0x01 << I2C_MSTCMD_STO_Pos) -#define I2C_MSTCMD_RXACK_Pos 7 //读：接收到的Slave的ACK位，0 收到ACK 1 收到NACK -#define I2C_MSTCMD_RXACK_Msk (0x01 << I2C_MSTCMD_RXACK_Pos) -#define I2C_MSTCMD_STA_Pos 7 //写：产生START，自动清零 -#define I2C_MSTCMD_STA_Msk (0x01 << I2C_MSTCMD_STA_Pos) - -#define I2C_SLVCR_IM_RXEND_Pos 0 //接收完成中断禁止 -#define I2C_SLVCR_IM_RXEND_Msk (0x01 << I2C_SLVCR_IM_RXEND_Pos) -#define I2C_SLVCR_IM_TXEND_Pos 1 //发送完成中断禁止 -#define I2C_SLVCR_IM_TXEND_Msk (0x01 << I2C_SLVCR_IM_TXEND_Pos) -#define I2C_SLVCR_IM_STADET_Pos 2 //检测到起始中断禁止 -#define I2C_SLVCR_IM_STADET_Msk (0x01 << I2C_SLVCR_IM_STADET_Pos) -#define I2C_SLVCR_IM_STODET_Pos 3 //检测到停止中断禁止 -#define I2C_SLVCR_IM_STODET_Msk (0x01 << I2C_SLVCR_IM_STODET_Pos) -#define I2C_SLVCR_IM_RDREQ_Pos 4 //接收到读请求中断禁止 -#define I2C_SLVCR_IM_RDREQ_Msk (0x01 << I2C_SLVCR_IM_RDREQ_Pos) -#define I2C_SLVCR_IM_WRREQ_Pos 5 //接收到写请求中断禁止 -#define I2C_SLVCR_IM_WRREQ_Msk (0x01 << I2C_SLVCR_IM_WRREQ_Pos) -#define I2C_SLVCR_ADDR7b_Pos 16 //1 7位地址模式 0 10位地址模式 -#define I2C_SLVCR_ADDR7b_Msk (0x01 << I2C_SLVCR_ADDR7b_Pos) -#define I2C_SLVCR_ACK_Pos 17 //1 应答ACK 0 应答NACK -#define I2C_SLVCR_ACK_Msk (0x01 << I2C_SLVCR_ACK_Pos) -#define I2C_SLVCR_SLAVE_Pos 18 //1 从机模式 0 主机模式 -#define I2C_SLVCR_SLAVE_Msk (0x01 << I2C_SLVCR_SLAVE_Pos) -#define I2C_SLVCR_DEBOUNCE_Pos 19 //去抖动使能 -#define I2C_SLVCR_DEBOUNCE_Msk (0x01 << I2C_SLVCR_DEBOUNCE_Pos) -#define I2C_SLVCR_ADDR_Pos 20 //从机地址 -#define I2C_SLVCR_ADDR_Msk (0x3FF << I2C_SLVCR_ADDR_Pos) - -#define I2C_SLVIF_RXEND_Pos 0 //接收完成中断标志，写1清零 -#define I2C_SLVIF_RXEND_Msk (0x01 << I2C_SLVIF_RXEND_Pos) -#define I2C_SLVIF_TXEND_Pos 1 //发送完成中断标志，写1清零 -#define I2C_SLVIF_TXEND_Msk (0x01 << I2C_SLVIF_TXEND_Pos) -#define I2C_SLVIF_STADET_Pos 2 //检测到起始中断标志，写1清零 -#define I2C_SLVIF_STADET_Msk (0x01 << I2C_SLVIF_STADET_Pos) -#define I2C_SLVIF_STODET_Pos 3 //检测到停止中断标志，写1清零 -#define I2C_SLVIF_STODET_Msk (0x01 << I2C_SLVIF_STODET_Pos) -#define I2C_SLVIF_RDREQ_Pos 4 //接收到读请求中断标志 -#define I2C_SLVIF_RDREQ_Msk (0x01 << I2C_SLVIF_RDREQ_Pos) -#define I2C_SLVIF_WRREQ_Pos 5 //接收到写请求中断标志 -#define I2C_SLVIF_WRREQ_Msk (0x01 << I2C_SLVIF_WRREQ_Pos) -#define I2C_SLVIF_ACTIVE_Pos 6 //slave 有效 -#define I2C_SLVIF_ACTIVE_Msk (0x01 << I2C_SLVIF_ACTIVE_Pos) - -typedef struct -{ - __IO uint32_t CTRL; - - __IO uint32_t START; - - __IO uint32_t IE; - - __IO uint32_t IF; - - struct - { - __IO uint32_t STAT; - - __IO uint32_t DATA; - uint32_t RESERVED[2]; - } CH[8]; - - __IO uint32_t CTRL1; - - __IO uint32_t CTRL2; - - uint32_t RESERVED[2]; - - __IO uint32_t CALIBSET; - - __IO uint32_t CALIBEN; +#define I2C_CTRL_MSTIE_Pos 6 +#define I2C_CTRL_MSTIE_Msk (0x01 << I2C_CTRL_MSTIE_Pos) +#define I2C_CTRL_EN_Pos 7 +#define I2C_CTRL_EN_Msk (0x01 << I2C_CTRL_EN_Pos) + +#define I2C_MSTCMD_IF_Pos 0 //1 еȴжϣд1 ´λӲλ1һֽڴ 2߷Ȩʧ +#define I2C_MSTCMD_IF_Msk (0x01 << I2C_MSTCMD_IF_Pos) +#define I2C_MSTCMD_TIP_Pos 1 //Transmission In Process +#define I2C_MSTCMD_TIP_Msk (0x01 << I2C_MSTCMD_TIP_Pos) +#define I2C_MSTCMD_ACK_Pos 3 //ģʽ£0 Ͷ˷ACK 1 Ͷ˷NACK +#define I2C_MSTCMD_ACK_Msk (0x01 << I2C_MSTCMD_ACK_Pos) +#define I2C_MSTCMD_WR_Pos 4 // Slaveдʱһλд1Զ +#define I2C_MSTCMD_WR_Msk (0x01 << I2C_MSTCMD_WR_Pos) +#define I2C_MSTCMD_RD_Pos 5 //дSlaveʱһλд1Զ I2CģʧȥߵķȨʱӲ1 +#define I2C_MSTCMD_RD_Msk (0x01 << I2C_MSTCMD_RD_Pos) +#define I2C_MSTCMD_BUSY_Pos 6 //⵽START֮һλ1⵽STOP֮һλ0 +#define I2C_MSTCMD_BUSY_Msk (0x01 << I2C_MSTCMD_BUSY_Pos) +#define I2C_MSTCMD_STO_Pos 6 //дSTOPԶ +#define I2C_MSTCMD_STO_Msk (0x01 << I2C_MSTCMD_STO_Pos) +#define I2C_MSTCMD_RXACK_Pos 7 //յSlaveACKλ0 յACK 1 յNACK +#define I2C_MSTCMD_RXACK_Msk (0x01 << I2C_MSTCMD_RXACK_Pos) +#define I2C_MSTCMD_STA_Pos 7 //дSTARTԶ +#define I2C_MSTCMD_STA_Msk (0x01 << I2C_MSTCMD_STA_Pos) + +#define I2C_SLVCR_IM_RXEND_Pos 0 //жϽֹ +#define I2C_SLVCR_IM_RXEND_Msk (0x01 << I2C_SLVCR_IM_RXEND_Pos) +#define I2C_SLVCR_IM_TXEND_Pos 1 //жϽֹ +#define I2C_SLVCR_IM_TXEND_Msk (0x01 << I2C_SLVCR_IM_TXEND_Pos) +#define I2C_SLVCR_IM_STADET_Pos 2 //⵽ʼжϽֹ +#define I2C_SLVCR_IM_STADET_Msk (0x01 << I2C_SLVCR_IM_STADET_Pos) +#define I2C_SLVCR_IM_STODET_Pos 3 //⵽ֹͣжϽֹ +#define I2C_SLVCR_IM_STODET_Msk (0x01 << I2C_SLVCR_IM_STODET_Pos) +#define I2C_SLVCR_IM_RDREQ_Pos 4 //յжϽֹ +#define I2C_SLVCR_IM_RDREQ_Msk (0x01 << I2C_SLVCR_IM_RDREQ_Pos) +#define I2C_SLVCR_IM_WRREQ_Pos 5 //յджϽֹ +#define I2C_SLVCR_IM_WRREQ_Msk (0x01 << I2C_SLVCR_IM_WRREQ_Pos) +#define I2C_SLVCR_ADDR7b_Pos 16 //1 7λַģʽ 0 10λַģʽ +#define I2C_SLVCR_ADDR7b_Msk (0x01 << I2C_SLVCR_ADDR7b_Pos) +#define I2C_SLVCR_ACK_Pos 17 //1 ӦACK 0 ӦNACK +#define I2C_SLVCR_ACK_Msk (0x01 << I2C_SLVCR_ACK_Pos) +#define I2C_SLVCR_SLAVE_Pos 18 //1 ӻģʽ 0 ģʽ +#define I2C_SLVCR_SLAVE_Msk (0x01 << I2C_SLVCR_SLAVE_Pos) +#define I2C_SLVCR_DEBOUNCE_Pos 19 //ȥʹ +#define I2C_SLVCR_DEBOUNCE_Msk (0x01 << I2C_SLVCR_DEBOUNCE_Pos) +#define I2C_SLVCR_ADDR_Pos 20 //ӻַ +#define I2C_SLVCR_ADDR_Msk (0x3FF << I2C_SLVCR_ADDR_Pos) + +#define I2C_SLVIF_RXEND_Pos 0 //жϱ־д1 +#define I2C_SLVIF_RXEND_Msk (0x01 << I2C_SLVIF_RXEND_Pos) +#define I2C_SLVIF_TXEND_Pos 1 //жϱ־д1 +#define I2C_SLVIF_TXEND_Msk (0x01 << I2C_SLVIF_TXEND_Pos) +#define I2C_SLVIF_STADET_Pos 2 //⵽ʼжϱ־д1 +#define I2C_SLVIF_STADET_Msk (0x01 << I2C_SLVIF_STADET_Pos) +#define I2C_SLVIF_STODET_Pos 3 //⵽ֹͣжϱ־д1 +#define I2C_SLVIF_STODET_Msk (0x01 << I2C_SLVIF_STODET_Pos) +#define I2C_SLVIF_RDREQ_Pos 4 //յжϱ־ +#define I2C_SLVIF_RDREQ_Msk (0x01 << I2C_SLVIF_RDREQ_Pos) +#define I2C_SLVIF_WRREQ_Pos 5 //յджϱ־ +#define I2C_SLVIF_WRREQ_Msk (0x01 << I2C_SLVIF_WRREQ_Pos) +#define I2C_SLVIF_ACTIVE_Pos 6 //slave Ч +#define I2C_SLVIF_ACTIVE_Msk (0x01 << I2C_SLVIF_ACTIVE_Pos) + + + + +typedef struct { + __IO uint32_t CTRL; + + __IO uint32_t START; + + __IO uint32_t IE; + + __IO uint32_t IF; + + struct { + __IO uint32_t STAT; + + __IO uint32_t DATA; + + uint32_t RESERVED[2]; + } CH[8]; + + __IO uint32_t CTRL1; + + __IO uint32_t CTRL2; + + uint32_t RESERVED[2]; + + __IO uint32_t CALIBSET; + + __IO uint32_t CALIBEN; } ADC_TypeDef; -#define ADC_CTRL_CH0_Pos 0 //通道选中 -#define ADC_CTRL_CH0_Msk (0x01 << ADC_CTRL_CH0_Pos) -#define ADC_CTRL_CH1_Pos 1 -#define ADC_CTRL_CH1_Msk (0x01 << ADC_CTRL_CH1_Pos) -#define ADC_CTRL_CH2_Pos 2 -#define ADC_CTRL_CH2_Msk (0x01 << ADC_CTRL_CH2_Pos) -#define ADC_CTRL_CH3_Pos 3 -#define ADC_CTRL_CH3_Msk (0x01 << ADC_CTRL_CH3_Pos) -#define ADC_CTRL_CH4_Pos 4 -#define ADC_CTRL_CH4_Msk (0x01 << ADC_CTRL_CH4_Pos) -#define ADC_CTRL_CH5_Pos 5 -#define ADC_CTRL_CH5_Msk (0x01 << ADC_CTRL_CH5_Pos) -#define ADC_CTRL_CH6_Pos 6 -#define ADC_CTRL_CH6_Msk (0x01 << ADC_CTRL_CH6_Pos) -#define ADC_CTRL_CH7_Pos 7 -#define ADC_CTRL_CH7_Msk (0x01 << ADC_CTRL_CH7_Pos) -#define ADC_CTRL_AVG_Pos 8 //0 1次采样 1 2次采样取平均值 3 4次采样取平均值 7 8次采样取平均值 15 16次采样取平均值 -#define ADC_CTRL_AVG_Msk (0x0F << ADC_CTRL_AVG_Pos) -#define ADC_CTRL_EN_Pos 12 -#define ADC_CTRL_EN_Msk (0x01 << ADC_CTRL_EN_Pos) -#define ADC_CTRL_CONT_Pos 13 //Continuous conversion，只在软件启动模式下有效，0 单次转换，转换完成后START位自动清除停止转换 -#define ADC_CTRL_CONT_Msk (0x01 << ADC_CTRL_CONT_Pos) // 1 连续转换，启动后一直采样、转换，直到软件清除START位 -#define ADC_CTRL_TRIG_Pos 14 //转换触发方式：0 软件启动转换 1 PWM触发 -#define ADC_CTRL_TRIG_Msk (0x01 << ADC_CTRL_TRIG_Pos) -#define ADC_CTRL_CLKSRC_Pos 15 //0 VCO 1 HRC -#define ADC_CTRL_CLKSRC_Msk (0x01 << ADC_CTRL_CLKSRC_Pos) -#define ADC_CTRL_FIFOCLR_Pos 24 //[24] CH0_FIFO_CLR [25] CH1_FIFO_CLR ... [31] CH7_FIFO_CLR -#define ADC_CTRL_FIFOCLR_Msk (0xFFu << ADC_CTRL_FIFOCLR_Pos) - -#define ADC_START_GO_Pos 0 //软件触发模式下，写1启动ADC采样和转换，在单次模式下转换完成后硬件自动清零，在扫描模式下必须软件写0停止ADC转换 -#define ADC_START_GO_Msk (0x01 << ADC_START_GO_Pos) -#define ADC_START_BUSY_Pos 4 -#define ADC_START_BUSY_Msk (0x01 << ADC_START_BUSY_Pos) - -#define ADC_IE_CH0EOC_Pos 0 //End Of Convertion -#define ADC_IE_CH0EOC_Msk (0x01 << ADC_IE_CH0EOC_Pos) -#define ADC_IE_CH0OVF_Pos 1 //Overflow -#define ADC_IE_CH0OVF_Msk (0x01 << ADC_IE_CH0OVF_Pos) -#define ADC_IE_CH0HFULL_Pos 2 //FIFO Half Full -#define ADC_IE_CH0HFULL_Msk (0x01 << ADC_IE_CH0HFULL_Pos) -#define ADC_IE_CH0FULL_Pos 3 //FIFO Full -#define ADC_IE_CH0FULL_Msk (0x01 << ADC_IE_CH0FULL_Pos) -#define ADC_IE_CH1EOC_Pos 4 -#define ADC_IE_CH1EOC_Msk (0x01 << ADC_IE_CH1EOC_Pos) -#define ADC_IE_CH1OVF_Pos 5 -#define ADC_IE_CH1OVF_Msk (0x01 << ADC_IE_CH1OVF_Pos) -#define ADC_IE_CH1HFULL_Pos 6 -#define ADC_IE_CH1HFULL_Msk (0x01 << ADC_IE_CH1HFULL_Pos) -#define ADC_IE_CH1FULL_Pos 7 -#define ADC_IE_CH1FULL_Msk (0x01 << ADC_IE_CH1FULL_Pos) -#define ADC_IE_CH2EOC_Pos 8 -#define ADC_IE_CH2EOC_Msk (0x01 << ADC_IE_CH2EOC_Pos) -#define ADC_IE_CH2OVF_Pos 9 -#define ADC_IE_CH2OVF_Msk (0x01 << ADC_IE_CH2OVF_Pos) -#define ADC_IE_CH2HFULL_Pos 10 -#define ADC_IE_CH2HFULL_Msk (0x01 << ADC_IE_CH2HFULL_Pos) -#define ADC_IE_CH2FULL_Pos 11 -#define ADC_IE_CH2FULL_Msk (0x01 << ADC_IE_CH2FULL_Pos) -#define ADC_IE_CH3EOC_Pos 12 -#define ADC_IE_CH3EOC_Msk (0x01 << ADC_IE_CH3EOC_Pos) -#define ADC_IE_CH3OVF_Pos 13 -#define ADC_IE_CH3OVF_Msk (0x01 << ADC_IE_CH3OVF_Pos) -#define ADC_IE_CH3HFULL_Pos 14 -#define ADC_IE_CH3HFULL_Msk (0x01 << ADC_IE_CH3HFULL_Pos) -#define ADC_IE_CH3FULL_Pos 15 -#define ADC_IE_CH3FULL_Msk (0x01 << ADC_IE_CH3FULL_Pos) -#define ADC_IE_CH4EOC_Pos 16 -#define ADC_IE_CH4EOC_Msk (0x01 << ADC_IE_CH4EOC_Pos) -#define ADC_IE_CH4OVF_Pos 17 -#define ADC_IE_CH4OVF_Msk (0x01 << ADC_IE_CH4OVF_Pos) -#define ADC_IE_CH4HFULL_Pos 18 -#define ADC_IE_CH4HFULL_Msk (0x01 << ADC_IE_CH4HFULL_Pos) -#define ADC_IE_CH4FULL_Pos 19 -#define ADC_IE_CH4FULL_Msk (0x01 << ADC_IE_CH4FULL_Pos) -#define ADC_IE_CH5EOC_Pos 20 -#define ADC_IE_CH5EOC_Msk (0x01 << ADC_IE_CH5EOC_Pos) -#define ADC_IE_CH5OVF_Pos 21 -#define ADC_IE_CH5OVF_Msk (0x01 << ADC_IE_CH5OVF_Pos) -#define ADC_IE_CH5HFULL_Pos 22 -#define ADC_IE_CH5HFULL_Msk (0x01 << ADC_IE_CH5HFULL_Pos) -#define ADC_IE_CH5FULL_Pos 23 -#define ADC_IE_CH5FULL_Msk (0x01 << ADC_IE_CH5FULL_Pos) -#define ADC_IE_CH6EOC_Pos 24 -#define ADC_IE_CH6EOC_Msk (0x01 << ADC_IE_CH6EOC_Pos) -#define ADC_IE_CH6OVF_Pos 25 -#define ADC_IE_CH6OVF_Msk (0x01 << ADC_IE_CH6OVF_Pos) -#define ADC_IE_CH6HFULL_Pos 26 -#define ADC_IE_CH6HFULL_Msk (0x01 << ADC_IE_CH6HFULL_Pos) -#define ADC_IE_CH6FULL_Pos 27 -#define ADC_IE_CH6FULL_Msk (0x01 << ADC_IE_CH6FULL_Pos) -#define ADC_IE_CH7EOC_Pos 28 -#define ADC_IE_CH7EOC_Msk (0x01 << ADC_IE_CH7EOC_Pos) -#define ADC_IE_CH7OVF_Pos 29 -#define ADC_IE_CH7OVF_Msk (0x01 << ADC_IE_CH7OVF_Pos) -#define ADC_IE_CH7HFULL_Pos 30 -#define ADC_IE_CH7HFULL_Msk (0x01 << ADC_IE_CH7HFULL_Pos) -#define ADC_IE_CH7FULL_Pos 31 -#define ADC_IE_CH7FULL_Msk (0x01u << ADC_IE_CH7FULL_Pos) - -#define ADC_IF_CH0EOC_Pos 0 //写1清零 -#define ADC_IF_CH0EOC_Msk (0x01 << ADC_IF_CH0EOC_Pos) -#define ADC_IF_CH0OVF_Pos 1 //写1清零 -#define ADC_IF_CH0OVF_Msk (0x01 << ADC_IF_CH0OVF_Pos) -#define ADC_IF_CH0HFULL_Pos 2 //写1清零 -#define ADC_IF_CH0HFULL_Msk (0x01 << ADC_IF_CH0HFULL_Pos) -#define ADC_IF_CH0FULL_Pos 3 //写1清零 -#define ADC_IF_CH0FULL_Msk (0x01 << ADC_IF_CH0FULL_Pos) -#define ADC_IF_CH1EOC_Pos 4 -#define ADC_IF_CH1EOC_Msk (0x01 << ADC_IF_CH1EOC_Pos) -#define ADC_IF_CH1OVF_Pos 5 -#define ADC_IF_CH1OVF_Msk (0x01 << ADC_IF_CH1OVF_Pos) -#define ADC_IF_CH1HFULL_Pos 6 -#define ADC_IF_CH1HFULL_Msk (0x01 << ADC_IF_CH1HFULL_Pos) -#define ADC_IF_CH1FULL_Pos 7 -#define ADC_IF_CH1FULL_Msk (0x01 << ADC_IF_CH1FULL_Pos) -#define ADC_IF_CH2EOC_Pos 8 -#define ADC_IF_CH2EOC_Msk (0x01 << ADC_IF_CH2EOC_Pos) -#define ADC_IF_CH2OVF_Pos 9 -#define ADC_IF_CH2OVF_Msk (0x01 << ADC_IF_CH2OVF_Pos) -#define ADC_IF_CH2HFULL_Pos 10 -#define ADC_IF_CH2HFULL_Msk (0x01 << ADC_IF_CH2HFULL_Pos) -#define ADC_IF_CH2FULL_Pos 11 -#define ADC_IF_CH2FULL_Msk (0x01 << ADC_IF_CH2FULL_Pos) -#define ADC_IF_CH3EOC_Pos 12 -#define ADC_IF_CH3EOC_Msk (0x01 << ADC_IF_CH3EOC_Pos) -#define ADC_IF_CH3OVF_Pos 13 -#define ADC_IF_CH3OVF_Msk (0x01 << ADC_IF_CH3OVF_Pos) -#define ADC_IF_CH3HFULL_Pos 14 -#define ADC_IF_CH3HFULL_Msk (0x01 << ADC_IF_CH3HFULL_Pos) -#define ADC_IF_CH3FULL_Pos 15 -#define ADC_IF_CH3FULL_Msk (0x01 << ADC_IF_CH3FULL_Pos) -#define ADC_IF_CH4EOC_Pos 16 -#define ADC_IF_CH4EOC_Msk (0x01 << ADC_IF_CH4EOC_Pos) -#define ADC_IF_CH4OVF_Pos 17 -#define ADC_IF_CH4OVF_Msk (0x01 << ADC_IF_CH4OVF_Pos) -#define ADC_IF_CH4HFULL_Pos 18 -#define ADC_IF_CH4HFULL_Msk (0x01 << ADC_IF_CH4HFULL_Pos) -#define ADC_IF_CH4FULL_Pos 19 -#define ADC_IF_CH4FULL_Msk (0x01 << ADC_IF_CH4FULL_Pos) -#define ADC_IF_CH5EOC_Pos 20 -#define ADC_IF_CH5EOC_Msk (0x01 << ADC_IF_CH5EOC_Pos) -#define ADC_IF_CH5OVF_Pos 21 -#define ADC_IF_CH5OVF_Msk (0x01 << ADC_IF_CH5OVF_Pos) -#define ADC_IF_CH5HFULL_Pos 22 -#define ADC_IF_CH5HFULL_Msk (0x01 << ADC_IF_CH5HFULL_Pos) -#define ADC_IF_CH5FULL_Pos 23 -#define ADC_IF_CH5FULL_Msk (0x01 << ADC_IF_CH5FULL_Pos) -#define ADC_IF_CH6EOC_Pos 24 -#define ADC_IF_CH6EOC_Msk (0x01 << ADC_IF_CH6EOC_Pos) -#define ADC_IF_CH6OVF_Pos 25 -#define ADC_IF_CH6OVF_Msk (0x01 << ADC_IF_CH6OVF_Pos) -#define ADC_IF_CH6HFULL_Pos 26 -#define ADC_IF_CH6HFULL_Msk (0x01 << ADC_IF_CH6HFULL_Pos) -#define ADC_IF_CH6FULL_Pos 27 -#define ADC_IF_CH6FULL_Msk (0x01 << ADC_IF_CH6FULL_Pos) -#define ADC_IF_CH7EOC_Pos 28 -#define ADC_IF_CH7EOC_Msk (0x01 << ADC_IF_CH7EOC_Pos) -#define ADC_IF_CH7OVF_Pos 29 -#define ADC_IF_CH7OVF_Msk (0x01 << ADC_IF_CH7OVF_Pos) -#define ADC_IF_CH7HFULL_Pos 30 -#define ADC_IF_CH7HFULL_Msk (0x01 << ADC_IF_CH7HFULL_Pos) -#define ADC_IF_CH7FULL_Pos 31 -#define ADC_IF_CH7FULL_Msk (0x01 << ADC_IF_CH7FULL_Pos) - -#define ADC_STAT_EOC_Pos 0 //写1清零 -#define ADC_STAT_EOC_Msk (0x01 << ADC_STAT_EOC_Pos) -#define ADC_STAT_OVF_Pos 1 //读数据寄存器清除 -#define ADC_STAT_OVF_Msk (0x01 << ADC_STAT_OVF_Pos) -#define ADC_STAT_HFULL_Pos 2 -#define ADC_STAT_HFULL_Msk (0x01 << ADC_STAT_HFULL_Pos) -#define ADC_STAT_FULL_Pos 3 -#define ADC_STAT_FULL_Msk (0x01 << ADC_STAT_FULL_Pos) -#define ADC_STAT_EMPTY_Pos 4 -#define ADC_STAT_EMPTY_Msk (0x01 << ADC_STAT_EMPTY_Pos) - -#define ADC_CTRL1_RIN_Pos 4 //输入阻抗：0 无穷大 1 105K 2 90K 3 75K 4 60K 5 45K 6 30K 7 15K -#define ADC_CTRL1_RIN_Msk (0x07 << ADC_CTRL1_RIN_Pos) - -#define ADC_CTRL2_RESET_Pos 0 //数字电路复位 -#define ADC_CTRL2_RESET_Msk (0x01 << ADC_CTRL2_RESET_Pos) -#define ADC_CTRL2_ADCEVCM_Pos 1 //ADC External VCM，ADC与PGA输出共模电平选择 -#define ADC_CTRL2_ADCEVCM_Msk (0x01 << ADC_CTRL2_ADCEVCM_Pos) -#define ADC_CTRL2_PGAIVCM_Pos 2 //PGA Internal VCM，PGA输入共模电平选择 -#define ADC_CTRL2_PGAIVCM_Msk (0x01 << ADC_CTRL2_PGAIVCM_Pos) -#define ADC_CTRL2_PGAGAIN_Pos 3 //0 25.1dB 1 21.6dB 2 11.1dB 3 3.5dB 4 0dB(1.8V) 5 -2.9dB 6 -5.3dB -#define ADC_CTRL2_PGAGAIN_Msk (0x07 << ADC_CTRL2_PGAGAIN_Pos) -#define ADC_CTRL2_REFPOUT_Pos 23 //1 ADC 内部 1.2V REFP电压输出到外部REFP引脚，用于测量，或在需要1.2V外部REFP时节省成本 -#define ADC_CTRL2_REFPOUT_Msk (0x01 << ADC_CTRL2_REFPOUT_Pos -#define ADC_CTRL2_CLKDIV_Pos 24 //时钟分频，只在时钟源为HRC时有效 -#define ADC_CTRL2_CLKDIV_Msk (0x1F << ADC_CTRL2_CLKDIV_Pos) -#define ADC_CTRL2_PGAVCM_Pos 29 -#define ADC_CTRL2_PGAVCM_Msk (0x07u << ADC_CTRL2_PGAVCM_Pos) - -#define ADC_CALIBSET_OFFSET_Pos 0 -#define ADC_CALIBSET_OFFSET_Msk (0x1FF << ADC_CALIBSET_OFFSET_Pos) -#define ADC_CALIBSET_K_Pos 16 -#define ADC_CALIBSET_K_Msk (0x1FF << ADC_CALIBSET_K_Pos) - -#define ADC_CALIBEN_OFFSET_Pos 0 -#define ADC_CALIBEN_OFFSET_Msk (0x01 << ADC_CALIBEN_OFFSET_Pos) -#define ADC_CALIBEN_K_Pos 1 -#define ADC_CALIBEN_K_Msk (0x01 << ADC_CALIBEN_K_Pos) - -typedef struct -{ - __IO uint32_t MODE; //0 普通模式，A、B两路输出互相独立 - //1 互补模式，A、B两路输出都由PERA、HIGHA控制，B路输出与A路输出极性相反，且DZA、DZB控制A、B路输出上升沿推迟时间 - //2 单次模式，同普通模式，但一个周期后自动停止 - //3 对称模式，A、B两路输出互相独立，以两个计数周期产生一个波形输出周期，分辨率提升一倍、频率降低一倍 - //4 对称互补模式，对称模式和互补模式的综合 - - __IO uint32_t PERA; //[15:0] 周期 - __IO uint32_t HIGHA; //[15:0] 高电平持续时长 - - __IO uint32_t DZA; //[9:0] 死区，即上升沿推迟时长，必须小于HIGHA - - __IO uint32_t PERB; - - __IO uint32_t HIGHB; - - __IO uint32_t DZB; - - __IO uint32_t INIOUT; //Init Output level，初始输出电平 +#define ADC_CTRL_CH0_Pos 0 //ͨѡ +#define ADC_CTRL_CH0_Msk (0x01 << ADC_CTRL_CH0_Pos) +#define ADC_CTRL_CH1_Pos 1 +#define ADC_CTRL_CH1_Msk (0x01 << ADC_CTRL_CH1_Pos) +#define ADC_CTRL_CH2_Pos 2 +#define ADC_CTRL_CH2_Msk (0x01 << ADC_CTRL_CH2_Pos) +#define ADC_CTRL_CH3_Pos 3 +#define ADC_CTRL_CH3_Msk (0x01 << ADC_CTRL_CH3_Pos) +#define ADC_CTRL_CH4_Pos 4 +#define ADC_CTRL_CH4_Msk (0x01 << ADC_CTRL_CH4_Pos) +#define ADC_CTRL_CH5_Pos 5 +#define ADC_CTRL_CH5_Msk (0x01 << ADC_CTRL_CH5_Pos) +#define ADC_CTRL_CH6_Pos 6 +#define ADC_CTRL_CH6_Msk (0x01 << ADC_CTRL_CH6_Pos) +#define ADC_CTRL_CH7_Pos 7 +#define ADC_CTRL_CH7_Msk (0x01 << ADC_CTRL_CH7_Pos) +#define ADC_CTRL_AVG_Pos 8 //0 1β 1 2βȡƽֵ 3 4βȡƽֵ 7 8βȡƽֵ 15 16βȡƽֵ +#define ADC_CTRL_AVG_Msk (0x0F << ADC_CTRL_AVG_Pos) +#define ADC_CTRL_EN_Pos 12 +#define ADC_CTRL_EN_Msk (0x01 << ADC_CTRL_EN_Pos) +#define ADC_CTRL_CONT_Pos 13 //Continuous conversionֻģʽЧ0 תתɺSTARTλԶֹͣת +#define ADC_CTRL_CONT_Msk (0x01 << ADC_CTRL_CONT_Pos) // 1 תһֱתֱSTARTλ +#define ADC_CTRL_TRIG_Pos 14 //תʽ0 ת 1 PWM +#define ADC_CTRL_TRIG_Msk (0x01 << ADC_CTRL_TRIG_Pos) +#define ADC_CTRL_CLKSRC_Pos 15 //0 VCO 1 HRC +#define ADC_CTRL_CLKSRC_Msk (0x01 << ADC_CTRL_CLKSRC_Pos) +#define ADC_CTRL_FIFOCLR_Pos 24 //[24] CH0_FIFO_CLR [25] CH1_FIFO_CLR ... [31] CH7_FIFO_CLR +#define ADC_CTRL_FIFOCLR_Msk (0xFFu<< ADC_CTRL_FIFOCLR_Pos) + +#define ADC_START_GO_Pos 0 //ģʽ£д1ADCתڵģʽתɺӲԶ㣬ɨģʽ±д0ֹͣADCת +#define ADC_START_GO_Msk (0x01 << ADC_START_GO_Pos) +#define ADC_START_BUSY_Pos 4 +#define ADC_START_BUSY_Msk (0x01 << ADC_START_BUSY_Pos) + +#define ADC_IE_CH0EOC_Pos 0 //End Of Convertion +#define ADC_IE_CH0EOC_Msk (0x01 << ADC_IE_CH0EOC_Pos) +#define ADC_IE_CH0OVF_Pos 1 //Overflow +#define ADC_IE_CH0OVF_Msk (0x01 << ADC_IE_CH0OVF_Pos) +#define ADC_IE_CH0HFULL_Pos 2 //FIFO Half Full +#define ADC_IE_CH0HFULL_Msk (0x01 << ADC_IE_CH0HFULL_Pos) +#define ADC_IE_CH0FULL_Pos 3 //FIFO Full +#define ADC_IE_CH0FULL_Msk (0x01 << ADC_IE_CH0FULL_Pos) +#define ADC_IE_CH1EOC_Pos 4 +#define ADC_IE_CH1EOC_Msk (0x01 << ADC_IE_CH1EOC_Pos) +#define ADC_IE_CH1OVF_Pos 5 +#define ADC_IE_CH1OVF_Msk (0x01 << ADC_IE_CH1OVF_Pos) +#define ADC_IE_CH1HFULL_Pos 6 +#define ADC_IE_CH1HFULL_Msk (0x01 << ADC_IE_CH1HFULL_Pos) +#define ADC_IE_CH1FULL_Pos 7 +#define ADC_IE_CH1FULL_Msk (0x01 << ADC_IE_CH1FULL_Pos) +#define ADC_IE_CH2EOC_Pos 8 +#define ADC_IE_CH2EOC_Msk (0x01 << ADC_IE_CH2EOC_Pos) +#define ADC_IE_CH2OVF_Pos 9 +#define ADC_IE_CH2OVF_Msk (0x01 << ADC_IE_CH2OVF_Pos) +#define ADC_IE_CH2HFULL_Pos 10 +#define ADC_IE_CH2HFULL_Msk (0x01 << ADC_IE_CH2HFULL_Pos) +#define ADC_IE_CH2FULL_Pos 11 +#define ADC_IE_CH2FULL_Msk (0x01 << ADC_IE_CH2FULL_Pos) +#define ADC_IE_CH3EOC_Pos 12 +#define ADC_IE_CH3EOC_Msk (0x01 << ADC_IE_CH3EOC_Pos) +#define ADC_IE_CH3OVF_Pos 13 +#define ADC_IE_CH3OVF_Msk (0x01 << ADC_IE_CH3OVF_Pos) +#define ADC_IE_CH3HFULL_Pos 14 +#define ADC_IE_CH3HFULL_Msk (0x01 << ADC_IE_CH3HFULL_Pos) +#define ADC_IE_CH3FULL_Pos 15 +#define ADC_IE_CH3FULL_Msk (0x01 << ADC_IE_CH3FULL_Pos) +#define ADC_IE_CH4EOC_Pos 16 +#define ADC_IE_CH4EOC_Msk (0x01 << ADC_IE_CH4EOC_Pos) +#define ADC_IE_CH4OVF_Pos 17 +#define ADC_IE_CH4OVF_Msk (0x01 << ADC_IE_CH4OVF_Pos) +#define ADC_IE_CH4HFULL_Pos 18 +#define ADC_IE_CH4HFULL_Msk (0x01 << ADC_IE_CH4HFULL_Pos) +#define ADC_IE_CH4FULL_Pos 19 +#define ADC_IE_CH4FULL_Msk (0x01 << ADC_IE_CH4FULL_Pos) +#define ADC_IE_CH5EOC_Pos 20 +#define ADC_IE_CH5EOC_Msk (0x01 << ADC_IE_CH5EOC_Pos) +#define ADC_IE_CH5OVF_Pos 21 +#define ADC_IE_CH5OVF_Msk (0x01 << ADC_IE_CH5OVF_Pos) +#define ADC_IE_CH5HFULL_Pos 22 +#define ADC_IE_CH5HFULL_Msk (0x01 << ADC_IE_CH5HFULL_Pos) +#define ADC_IE_CH5FULL_Pos 23 +#define ADC_IE_CH5FULL_Msk (0x01 << ADC_IE_CH5FULL_Pos) +#define ADC_IE_CH6EOC_Pos 24 +#define ADC_IE_CH6EOC_Msk (0x01 << ADC_IE_CH6EOC_Pos) +#define ADC_IE_CH6OVF_Pos 25 +#define ADC_IE_CH6OVF_Msk (0x01 << ADC_IE_CH6OVF_Pos) +#define ADC_IE_CH6HFULL_Pos 26 +#define ADC_IE_CH6HFULL_Msk (0x01 << ADC_IE_CH6HFULL_Pos) +#define ADC_IE_CH6FULL_Pos 27 +#define ADC_IE_CH6FULL_Msk (0x01 << ADC_IE_CH6FULL_Pos) +#define ADC_IE_CH7EOC_Pos 28 +#define ADC_IE_CH7EOC_Msk (0x01 << ADC_IE_CH7EOC_Pos) +#define ADC_IE_CH7OVF_Pos 29 +#define ADC_IE_CH7OVF_Msk (0x01 << ADC_IE_CH7OVF_Pos) +#define ADC_IE_CH7HFULL_Pos 30 +#define ADC_IE_CH7HFULL_Msk (0x01 << ADC_IE_CH7HFULL_Pos) +#define ADC_IE_CH7FULL_Pos 31 +#define ADC_IE_CH7FULL_Msk (0x01u<< ADC_IE_CH7FULL_Pos) + +#define ADC_IF_CH0EOC_Pos 0 //д1 +#define ADC_IF_CH0EOC_Msk (0x01 << ADC_IF_CH0EOC_Pos) +#define ADC_IF_CH0OVF_Pos 1 //д1 +#define ADC_IF_CH0OVF_Msk (0x01 << ADC_IF_CH0OVF_Pos) +#define ADC_IF_CH0HFULL_Pos 2 //д1 +#define ADC_IF_CH0HFULL_Msk (0x01 << ADC_IF_CH0HFULL_Pos) +#define ADC_IF_CH0FULL_Pos 3 //д1 +#define ADC_IF_CH0FULL_Msk (0x01 << ADC_IF_CH0FULL_Pos) +#define ADC_IF_CH1EOC_Pos 4 +#define ADC_IF_CH1EOC_Msk (0x01 << ADC_IF_CH1EOC_Pos) +#define ADC_IF_CH1OVF_Pos 5 +#define ADC_IF_CH1OVF_Msk (0x01 << ADC_IF_CH1OVF_Pos) +#define ADC_IF_CH1HFULL_Pos 6 +#define ADC_IF_CH1HFULL_Msk (0x01 << ADC_IF_CH1HFULL_Pos) +#define ADC_IF_CH1FULL_Pos 7 +#define ADC_IF_CH1FULL_Msk (0x01 << ADC_IF_CH1FULL_Pos) +#define ADC_IF_CH2EOC_Pos 8 +#define ADC_IF_CH2EOC_Msk (0x01 << ADC_IF_CH2EOC_Pos) +#define ADC_IF_CH2OVF_Pos 9 +#define ADC_IF_CH2OVF_Msk (0x01 << ADC_IF_CH2OVF_Pos) +#define ADC_IF_CH2HFULL_Pos 10 +#define ADC_IF_CH2HFULL_Msk (0x01 << ADC_IF_CH2HFULL_Pos) +#define ADC_IF_CH2FULL_Pos 11 +#define ADC_IF_CH2FULL_Msk (0x01 << ADC_IF_CH2FULL_Pos) +#define ADC_IF_CH3EOC_Pos 12 +#define ADC_IF_CH3EOC_Msk (0x01 << ADC_IF_CH3EOC_Pos) +#define ADC_IF_CH3OVF_Pos 13 +#define ADC_IF_CH3OVF_Msk (0x01 << ADC_IF_CH3OVF_Pos) +#define ADC_IF_CH3HFULL_Pos 14 +#define ADC_IF_CH3HFULL_Msk (0x01 << ADC_IF_CH3HFULL_Pos) +#define ADC_IF_CH3FULL_Pos 15 +#define ADC_IF_CH3FULL_Msk (0x01 << ADC_IF_CH3FULL_Pos) +#define ADC_IF_CH4EOC_Pos 16 +#define ADC_IF_CH4EOC_Msk (0x01 << ADC_IF_CH4EOC_Pos) +#define ADC_IF_CH4OVF_Pos 17 +#define ADC_IF_CH4OVF_Msk (0x01 << ADC_IF_CH4OVF_Pos) +#define ADC_IF_CH4HFULL_Pos 18 +#define ADC_IF_CH4HFULL_Msk (0x01 << ADC_IF_CH4HFULL_Pos) +#define ADC_IF_CH4FULL_Pos 19 +#define ADC_IF_CH4FULL_Msk (0x01 << ADC_IF_CH4FULL_Pos) +#define ADC_IF_CH5EOC_Pos 20 +#define ADC_IF_CH5EOC_Msk (0x01 << ADC_IF_CH5EOC_Pos) +#define ADC_IF_CH5OVF_Pos 21 +#define ADC_IF_CH5OVF_Msk (0x01 << ADC_IF_CH5OVF_Pos) +#define ADC_IF_CH5HFULL_Pos 22 +#define ADC_IF_CH5HFULL_Msk (0x01 << ADC_IF_CH5HFULL_Pos) +#define ADC_IF_CH5FULL_Pos 23 +#define ADC_IF_CH5FULL_Msk (0x01 << ADC_IF_CH5FULL_Pos) +#define ADC_IF_CH6EOC_Pos 24 +#define ADC_IF_CH6EOC_Msk (0x01 << ADC_IF_CH6EOC_Pos) +#define ADC_IF_CH6OVF_Pos 25 +#define ADC_IF_CH6OVF_Msk (0x01 << ADC_IF_CH6OVF_Pos) +#define ADC_IF_CH6HFULL_Pos 26 +#define ADC_IF_CH6HFULL_Msk (0x01 << ADC_IF_CH6HFULL_Pos) +#define ADC_IF_CH6FULL_Pos 27 +#define ADC_IF_CH6FULL_Msk (0x01 << ADC_IF_CH6FULL_Pos) +#define ADC_IF_CH7EOC_Pos 28 +#define ADC_IF_CH7EOC_Msk (0x01 << ADC_IF_CH7EOC_Pos) +#define ADC_IF_CH7OVF_Pos 29 +#define ADC_IF_CH7OVF_Msk (0x01 << ADC_IF_CH7OVF_Pos) +#define ADC_IF_CH7HFULL_Pos 30 +#define ADC_IF_CH7HFULL_Msk (0x01 << ADC_IF_CH7HFULL_Pos) +#define ADC_IF_CH7FULL_Pos 31 +#define ADC_IF_CH7FULL_Msk (0x01 << ADC_IF_CH7FULL_Pos) + +#define ADC_STAT_EOC_Pos 0 //д1 +#define ADC_STAT_EOC_Msk (0x01 << ADC_STAT_EOC_Pos) +#define ADC_STAT_OVF_Pos 1 //ݼĴ +#define ADC_STAT_OVF_Msk (0x01 << ADC_STAT_OVF_Pos) +#define ADC_STAT_HFULL_Pos 2 +#define ADC_STAT_HFULL_Msk (0x01 << ADC_STAT_HFULL_Pos) +#define ADC_STAT_FULL_Pos 3 +#define ADC_STAT_FULL_Msk (0x01 << ADC_STAT_FULL_Pos) +#define ADC_STAT_EMPTY_Pos 4 +#define ADC_STAT_EMPTY_Msk (0x01 << ADC_STAT_EMPTY_Pos) + +#define ADC_CTRL1_RIN_Pos 4 //迹0 1 105K 2 90K 3 75K 4 60K 5 45K 6 30K 7 15K +#define ADC_CTRL1_RIN_Msk (0x07 << ADC_CTRL1_RIN_Pos) + +#define ADC_CTRL2_RESET_Pos 0 //ֵ·λ +#define ADC_CTRL2_RESET_Msk (0x01 << ADC_CTRL2_RESET_Pos) +#define ADC_CTRL2_ADCEVCM_Pos 1 //ADC External VCMADCPGAģƽѡ +#define ADC_CTRL2_ADCEVCM_Msk (0x01 << ADC_CTRL2_ADCEVCM_Pos) +#define ADC_CTRL2_PGAIVCM_Pos 2 //PGA Internal VCMPGA빲ģƽѡ +#define ADC_CTRL2_PGAIVCM_Msk (0x01 << ADC_CTRL2_PGAIVCM_Pos) +#define ADC_CTRL2_PGAGAIN_Pos 3 //0 25.1dB 1 21.6dB 2 11.1dB 3 3.5dB 4 0dB(1.8V) 5 -2.9dB 6 -5.3dB +#define ADC_CTRL2_PGAGAIN_Msk (0x07 << ADC_CTRL2_PGAGAIN_Pos) +#define ADC_CTRL2_REFPOUT_Pos 23 //1 ADC ڲ 1.2V REFPѹⲿREFPţڲҪ1.2VⲿREFPʱʡɱ +#define ADC_CTRL2_REFPOUT_Msk (0x01 << ADC_CTRL2_REFPOUT_Pos +#define ADC_CTRL2_CLKDIV_Pos 24 //ʱӷƵֻʱԴΪHRCʱЧ +#define ADC_CTRL2_CLKDIV_Msk (0x1F << ADC_CTRL2_CLKDIV_Pos) +#define ADC_CTRL2_PGAVCM_Pos 29 +#define ADC_CTRL2_PGAVCM_Msk (0x07u<< ADC_CTRL2_PGAVCM_Pos) + +#define ADC_CALIBSET_OFFSET_Pos 0 +#define ADC_CALIBSET_OFFSET_Msk (0x1FF<< ADC_CALIBSET_OFFSET_Pos) +#define ADC_CALIBSET_K_Pos 16 +#define ADC_CALIBSET_K_Msk (0x1FF<< ADC_CALIBSET_K_Pos) + +#define ADC_CALIBEN_OFFSET_Pos 0 +#define ADC_CALIBEN_OFFSET_Msk (0x01 << ADC_CALIBEN_OFFSET_Pos) +#define ADC_CALIBEN_K_Pos 1 +#define ADC_CALIBEN_K_Msk (0x01 << ADC_CALIBEN_K_Pos) + + + + +typedef struct { + __IO uint32_t MODE; //0 ͨģʽAB· + //1 ģʽAB·PERAHIGHAƣB·A·෴DZADZBAB·Ƴʱ + //2 ģʽͬͨģʽһںԶֹͣ + //3 ԳģʽAB·ڲһڣֱһƵʽһ + //4 ԳƻģʽԳģʽͻģʽۺ + + __IO uint32_t PERA; //[15:0] + + __IO uint32_t HIGHA; //[15:0] ߵƽʱ + + __IO uint32_t DZA; //[9:0] ƳʱСHIGHA + + __IO uint32_t PERB; + + __IO uint32_t HIGHB; + + __IO uint32_t DZB; + + __IO uint32_t INIOUT; //Init Output levelʼƽ } PWM_TypeDef; -#define PWM_INIOUT_PWMA_Pos 0 -#define PWM_INIOUT_PWMA_Msk (0x01 << PWM_INIOUT_PWMA_Pos) -#define PWM_INIOUT_PWMB_Pos 1 -#define PWM_INIOUT_PWMB_Msk (0x01 << PWM_INIOUT_PWMB_Pos) -typedef struct -{ - __IO uint32_t FORCEH; +#define PWM_INIOUT_PWMA_Pos 0 +#define PWM_INIOUT_PWMA_Msk (0x01 << PWM_INIOUT_PWMA_Pos) +#define PWM_INIOUT_PWMB_Pos 1 +#define PWM_INIOUT_PWMB_Msk (0x01 << PWM_INIOUT_PWMB_Pos) + +typedef struct { + __IO uint32_t FORCEH; + __IO uint32_t ADTRG0A; __IO uint32_t ADTRG0B; - + __IO uint32_t ADTRG1A; __IO uint32_t ADTRG1B; - + __IO uint32_t ADTRG2A; __IO uint32_t ADTRG2B; - + __IO uint32_t ADTRG3A; __IO uint32_t ADTRG3B; - + __IO uint32_t ADTRG4A; __IO uint32_t ADTRG4B; - + __IO uint32_t ADTRG5A; - __IO uint32_t ADTRG5B; - - uint32_t RESERVED[3]; - - __IO uint32_t HALT; //刹车控制 - - __IO uint32_t CHEN; - - __IO uint32_t IE; - - __IO uint32_t IF; - - __IO uint32_t IM; //Interrupt Mask - - __IO uint32_t IRS; //Interrupt Raw Stat + __IO uint32_t ADTRG5B; + + uint32_t RESERVED[3]; + + __IO uint32_t HALT; //ɲ + + __IO uint32_t CHEN; + + __IO uint32_t IE; + + __IO uint32_t IF; + + __IO uint32_t IM; //Interrupt Mask + + __IO uint32_t IRS; //Interrupt Raw Stat } PWMG_TypeDef; -#define PWMG_FORCEH_PWM0_Pos 0 -#define PWMG_FORCEH_PWM0_Msk (0x01 << PWMG_FORCEH_PWM0_Pos) -#define PWMG_FORCEH_PWM1_Pos 1 -#define PWMG_FORCEH_PWM1_Msk (0x01 << PWMG_FORCEH_PWM1_Pos) -#define PWMG_FORCEH_PWM2_Pos 2 -#define PWMG_FORCEH_PWM2_Msk (0x01 << PWMG_FORCEH_PWM2_Pos) -#define PWMG_FORCEH_PWM3_Pos 3 -#define PWMG_FORCEH_PWM3_Msk (0x01 << PWMG_FORCEH_PWM3_Pos) -#define PWMG_FORCEH_PWM4_Pos 4 -#define PWMG_FORCEH_PWM4_Msk (0x01 << PWMG_FORCEH_PWM4_Pos) -#define PWMG_FORCEH_PWM5_Pos 5 -#define PWMG_FORCEH_PWM5_Msk (0x01 << PWMG_FORCEH_PWM5_Pos) - -#define PWMG_ADTRG_VALUE_Pos 0 -#define PWMG_ADTRG_VALUE_Msk (0xFFFF << PWMG_ADTRG0A_VALUE_Pos) -#define PWMG_ADTRG_EVEN_Pos 16 //1 偶数周期生效 0 奇数周期生效 -#define PWMG_ADTRG_EVEN_Msk (0x01 << PWMG_ADTRG0A_EVEN_Pos) -#define PWMG_ADTRG_EN_Pos 17 -#define PWMG_ADTRG_EN_Msk (0x01 << PWMG_ADTRG0A_EN_Pos) - -#define PWMG_HALT_EN_Pos 0 -#define PWMG_HALT_EN_Msk (0x01 << PWMG_HALT_EN_Pos) -#define PWMG_HALT_PWM0_Pos 1 -#define PWMG_HALT_PWM0_Msk (0x01 << PWMG_HALT_PWM0_Pos) -#define PWMG_HALT_PWM1_Pos 2 -#define PWMG_HALT_PWM1_Msk (0x01 << PWMG_HALT_PWM1_Pos) -#define PWMG_HALT_PWM2_Pos 3 -#define PWMG_HALT_PWM2_Msk (0x01 << PWMG_HALT_PWM2_Pos) -#define PWMG_HALT_PWM3_Pos 4 -#define PWMG_HALT_PWM3_Msk (0x01 << PWMG_HALT_PWM3_Pos) -#define PWMG_HALT_PWM4_Pos 5 -#define PWMG_HALT_PWM4_Msk (0x01 << PWMG_HALT_PWM4_Pos) -#define PWMG_HALT_PWM5_Pos 6 -#define PWMG_HALT_PWM5_Msk (0x01 << PWMG_HALT_PWM5_Pos) -#define PWMG_HALT_STOPCNT_Pos 7 //1 刹车时将PWM计数器清零，停止计数 0 刹车时，PWM计数器继续计数 -#define PWMG_HALT_STOPCNT_Msk (0x01 << PWMG_HALT_STOPCNT_Pos) -#define PWMG_HALT_INLVL_Pos 8 //1 刹车输入高电平有效 -#define PWMG_HALT_INLVL_Msk (0x01 << PWMG_HALT_INLVL_Pos) -#define PWMG_HALT_OUTLVL_Pos 9 //1 刹车过程中输出高电平 -#define PWMG_HALT_OUTLVL_Msk (0x01 << PWMG_HALT_OUTLVL_Pos) -#define PWMG_HALT_STAT_Pos 10 //1 正在刹车 -#define PWMG_HALT_STAT_Msk (0x01 << PWMG_HALT_STAT_Pos) - -#define PWMG_CHEN_PWM0A_Pos 0 -#define PWMG_CHEN_PWM0A_Msk (0x01 << PWMG_CHEN_PWM0A_Pos) -#define PWMG_CHEN_PWM0B_Pos 1 -#define PWMG_CHEN_PWM0B_Msk (0x01 << PWMG_CHEN_PWM0B_Pos) -#define PWMG_CHEN_PWM1A_Pos 2 -#define PWMG_CHEN_PWM1A_Msk (0x01 << PWMG_CHEN_PWM1A_Pos) -#define PWMG_CHEN_PWM1B_Pos 3 -#define PWMG_CHEN_PWM1B_Msk (0x01 << PWMG_CHEN_PWM1B_Pos) -#define PWMG_CHEN_PWM2A_Pos 4 -#define PWMG_CHEN_PWM2A_Msk (0x01 << PWMG_CHEN_PWM2A_Pos) -#define PWMG_CHEN_PWM2B_Pos 5 -#define PWMG_CHEN_PWM2B_Msk (0x01 << PWMG_CHEN_PWM2B_Pos) -#define PWMG_CHEN_PWM3A_Pos 6 -#define PWMG_CHEN_PWM3A_Msk (0x01 << PWMG_CHEN_PWM3A_Pos) -#define PWMG_CHEN_PWM3B_Pos 7 -#define PWMG_CHEN_PWM3B_Msk (0x01 << PWMG_CHEN_PWM3B_Pos) -#define PWMG_CHEN_PWM4A_Pos 8 -#define PWMG_CHEN_PWM4A_Msk (0x01 << PWMG_CHEN_PWM4A_Pos) -#define PWMG_CHEN_PWM4B_Pos 9 -#define PWMG_CHEN_PWM4B_Msk (0x01 << PWMG_CHEN_PWM4B_Pos) -#define PWMG_CHEN_PWM5A_Pos 10 -#define PWMG_CHEN_PWM5A_Msk (0x01 << PWMG_CHEN_PWM5A_Pos) -#define PWMG_CHEN_PWM5B_Pos 11 -#define PWMG_CHEN_PWM5B_Msk (0x01 << PWMG_CHEN_PWM5B_Pos) - -#define PWMG_IE_NEWP0A_Pos 0 -#define PWMG_IE_NEWP0A_Msk (0x01 << PWMG_IE_NEWP0A_Pos) -#define PWMG_IE_NEWP0B_Pos 1 -#define PWMG_IE_NEWP0B_Msk (0x01 << PWMG_IE_NEWP0B_Pos) -#define PWMG_IE_NEWP1A_Pos 2 -#define PWMG_IE_NEWP1A_Msk (0x01 << PWMG_IE_NEWP1A_Pos) -#define PWMG_IE_NEWP1B_Pos 3 -#define PWMG_IE_NEWP1B_Msk (0x01 << PWMG_IE_NEWP1B_Pos) -#define PWMG_IE_NEWP2A_Pos 4 -#define PWMG_IE_NEWP2A_Msk (0x01 << PWMG_IE_NEWP2A_Pos) -#define PWMG_IE_NEWP2B_Pos 5 -#define PWMG_IE_NEWP2B_Msk (0x01 << PWMG_IE_NEWP2B_Pos) -#define PWMG_IE_NEWP3A_Pos 6 -#define PWMG_IE_NEWP3A_Msk (0x01 << PWMG_IE_NEWP3A_Pos) -#define PWMG_IE_NEWP3B_Pos 7 -#define PWMG_IE_NEWP3B_Msk (0x01 << PWMG_IE_NEWP3B_Pos) -#define PWMG_IE_NEWP4A_Pos 8 -#define PWMG_IE_NEWP4A_Msk (0x01 << PWMG_IE_NEWP4A_Pos) -#define PWMG_IE_NEWP4B_Pos 9 -#define PWMG_IE_NEWP4B_Msk (0x01 << PWMG_IE_NEWP4B_Pos) -#define PWMG_IE_NEWP5A_Pos 10 -#define PWMG_IE_NEWP5A_Msk (0x01 << PWMG_IE_NEWP5A_Pos) -#define PWMG_IE_NEWP5B_Pos 11 -#define PWMG_IE_NEWP5B_Msk (0x01 << PWMG_IE_NEWP5B_Pos) -#define PWMG_IE_HEND0A_Pos 12 -#define PWMG_IE_HEND0A_Msk (0x01 << PWMG_IE_HEND0A_Pos) -#define PWMG_IE_HEND0B_Pos 13 -#define PWMG_IE_HEND0B_Msk (0x01 << PWMG_IE_HEND0B_Pos) -#define PWMG_IE_HEND1A_Pos 14 -#define PWMG_IE_HEND1A_Msk (0x01 << PWMG_IE_HEND1A_Pos) -#define PWMG_IE_HEND1B_Pos 15 -#define PWMG_IE_HEND1B_Msk (0x01 << PWMG_IE_HEND1B_Pos) -#define PWMG_IE_HEND2A_Pos 16 -#define PWMG_IE_HEND2A_Msk (0x01 << PWMG_IE_HEND2A_Pos) -#define PWMG_IE_HEND2B_Pos 17 -#define PWMG_IE_HEND2B_Msk (0x01 << PWMG_IE_HEND2B_Pos) -#define PWMG_IE_HEND3A_Pos 18 -#define PWMG_IE_HEND3A_Msk (0x01 << PWMG_IE_HEND3A_Pos) -#define PWMG_IE_HEND3B_Pos 19 -#define PWMG_IE_HEND3B_Msk (0x01 << PWMG_IE_HEND3B_Pos) -#define PWMG_IE_HEND4A_Pos 20 -#define PWMG_IE_HEND4A_Msk (0x01 << PWMG_IE_HEND4A_Pos) -#define PWMG_IE_HEND4B_Pos 21 -#define PWMG_IE_HEND4B_Msk (0x01 << PWMG_IE_HEND4B_Pos) -#define PWMG_IE_HEND5A_Pos 22 -#define PWMG_IE_HEND5A_Msk (0x01 << PWMG_IE_HEND5A_Pos) -#define PWMG_IE_HEND5B_Pos 23 -#define PWMG_IE_HEND5B_Msk (0x01 << PWMG_IE_HEND5B_Pos) -#define PWMG_IE_HALT_Pos 24 -#define PWMG_IE_HALT_Msk (0x01 << PWMG_IE_HALT_Pos) - -#define PWMG_IF_NEWP0A_Pos 0 -#define PWMG_IF_NEWP0A_Msk (0x01 << PWMG_IF_NEWP0A_Pos) -#define PWMG_IF_NEWP0B_Pos 1 -#define PWMG_IF_NEWP0B_Msk (0x01 << PWMG_IF_NEWP0B_Pos) -#define PWMG_IF_NEWP1A_Pos 2 -#define PWMG_IF_NEWP1A_Msk (0x01 << PWMG_IF_NEWP1A_Pos) -#define PWMG_IF_NEWP1B_Pos 3 -#define PWMG_IF_NEWP1B_Msk (0x01 << PWMG_IF_NEWP1B_Pos) -#define PWMG_IF_NEWP2A_Pos 4 -#define PWMG_IF_NEWP2A_Msk (0x01 << PWMG_IF_NEWP2A_Pos) -#define PWMG_IF_NEWP2B_Pos 5 -#define PWMG_IF_NEWP2B_Msk (0x01 << PWMG_IF_NEWP2B_Pos) -#define PWMG_IF_NEWP3A_Pos 6 -#define PWMG_IF_NEWP3A_Msk (0x01 << PWMG_IF_NEWP3A_Pos) -#define PWMG_IF_NEWP3B_Pos 7 -#define PWMG_IF_NEWP3B_Msk (0x01 << PWMG_IF_NEWP3B_Pos) -#define PWMG_IF_NEWP4A_Pos 8 -#define PWMG_IF_NEWP4A_Msk (0x01 << PWMG_IF_NEWP4A_Pos) -#define PWMG_IF_NEWP4B_Pos 9 -#define PWMG_IF_NEWP4B_Msk (0x01 << PWMG_IF_NEWP4B_Pos) -#define PWMG_IF_NEWP5A_Pos 10 -#define PWMG_IF_NEWP5A_Msk (0x01 << PWMG_IF_NEWP5A_Pos) -#define PWMG_IF_NEWP5B_Pos 11 -#define PWMG_IF_NEWP5B_Msk (0x01 << PWMG_IF_NEWP5B_Pos) -#define PWMG_IF_HEND0A_Pos 12 -#define PWMG_IF_HEND0A_Msk (0x01 << PWMG_IF_HEND0A_Pos) -#define PWMG_IF_HEND0B_Pos 13 -#define PWMG_IF_HEND0B_Msk (0x01 << PWMG_IF_HEND0B_Pos) -#define PWMG_IF_HEND1A_Pos 14 -#define PWMG_IF_HEND1A_Msk (0x01 << PWMG_IF_HEND1A_Pos) -#define PWMG_IF_HEND1B_Pos 15 -#define PWMG_IF_HEND1B_Msk (0x01 << PWMG_IF_HEND1B_Pos) -#define PWMG_IF_HEND2A_Pos 16 -#define PWMG_IF_HEND2A_Msk (0x01 << PWMG_IF_HEND2A_Pos) -#define PWMG_IF_HEND2B_Pos 17 -#define PWMG_IF_HEND2B_Msk (0x01 << PWMG_IF_HEND2B_Pos) -#define PWMG_IF_HEND3A_Pos 18 -#define PWMG_IF_HEND3A_Msk (0x01 << PWMG_IF_HEND3A_Pos) -#define PWMG_IF_HEND3B_Pos 19 -#define PWMG_IF_HEND3B_Msk (0x01 << PWMG_IF_HEND3B_Pos) -#define PWMG_IF_HEND4A_Pos 20 -#define PWMG_IF_HEND4A_Msk (0x01 << PWMG_IF_HEND4A_Pos) -#define PWMG_IF_HEND4B_Pos 21 -#define PWMG_IF_HEND4B_Msk (0x01 << PWMG_IF_HEND4B_Pos) -#define PWMG_IF_HEND5A_Pos 22 -#define PWMG_IF_HEND5A_Msk (0x01 << PWMG_IF_HEND5A_Pos) -#define PWMG_IF_HEND5B_Pos 23 -#define PWMG_IF_HEND5B_Msk (0x01 << PWMG_IF_HEND5B_Pos) -#define PWMG_IF_HALT_Pos 24 -#define PWMG_IF_HALT_Msk (0x01 << PWMG_IF_HALT_Pos) - -#define PWMG_IM_NEWP0A_Pos 0 //Interrupt Mask -#define PWMG_IM_NEWP0A_Msk (0x01 << PWMG_IM_NEWP0A_Pos) -#define PWMG_IM_NEWP0B_Pos 1 -#define PWMG_IM_NEWP0B_Msk (0x01 << PWMG_IM_NEWP0B_Pos) -#define PWMG_IM_NEWP1A_Pos 2 -#define PWMG_IM_NEWP1A_Msk (0x01 << PWMG_IM_NEWP1A_Pos) -#define PWMG_IM_NEWP1B_Pos 3 -#define PWMG_IM_NEWP1B_Msk (0x01 << PWMG_IM_NEWP1B_Pos) -#define PWMG_IM_NEWP2A_Pos 4 -#define PWMG_IM_NEWP2A_Msk (0x01 << PWMG_IM_NEWP2A_Pos) -#define PWMG_IM_NEWP2B_Pos 5 -#define PWMG_IM_NEWP2B_Msk (0x01 << PWMG_IM_NEWP2B_Pos) -#define PWMG_IM_NEWP3A_Pos 6 -#define PWMG_IM_NEWP3A_Msk (0x01 << PWMG_IM_NEWP3A_Pos) -#define PWMG_IM_NEWP3B_Pos 7 -#define PWMG_IM_NEWP3B_Msk (0x01 << PWMG_IM_NEWP3B_Pos) -#define PWMG_IM_NEWP4A_Pos 8 -#define PWMG_IM_NEWP4A_Msk (0x01 << PWMG_IM_NEWP4A_Pos) -#define PWMG_IM_NEWP4B_Pos 9 -#define PWMG_IM_NEWP4B_Msk (0x01 << PWMG_IM_NEWP4B_Pos) -#define PWMG_IM_NEWP5A_Pos 10 -#define PWMG_IM_NEWP5A_Msk (0x01 << PWMG_IM_NEWP5A_Pos) -#define PWMG_IM_NEWP5B_Pos 11 -#define PWMG_IM_NEWP5B_Msk (0x01 << PWMG_IM_NEWP5B_Pos) -#define PWMG_IM_HEND0A_Pos 12 -#define PWMG_IM_HEND0A_Msk (0x01 << PWMG_IM_HEND0A_Pos) -#define PWMG_IM_HEND0B_Pos 13 -#define PWMG_IM_HEND0B_Msk (0x01 << PWMG_IM_HEND0B_Pos) -#define PWMG_IM_HEND1A_Pos 14 -#define PWMG_IM_HEND1A_Msk (0x01 << PWMG_IM_HEND1A_Pos) -#define PWMG_IM_HEND1B_Pos 15 -#define PWMG_IM_HEND1B_Msk (0x01 << PWMG_IM_HEND1B_Pos) -#define PWMG_IM_HEND2A_Pos 16 -#define PWMG_IM_HEND2A_Msk (0x01 << PWMG_IM_HEND2A_Pos) -#define PWMG_IM_HEND2B_Pos 17 -#define PWMG_IM_HEND2B_Msk (0x01 << PWMG_IM_HEND2B_Pos) -#define PWMG_IM_HEND3A_Pos 18 -#define PWMG_IM_HEND3A_Msk (0x01 << PWMG_IM_HEND3A_Pos) -#define PWMG_IM_HEND3B_Pos 19 -#define PWMG_IM_HEND3B_Msk (0x01 << PWMG_IM_HEND3B_Pos) -#define PWMG_IM_HEND4A_Pos 20 -#define PWMG_IM_HEND4A_Msk (0x01 << PWMG_IM_HEND4A_Pos) -#define PWMG_IM_HEND4B_Pos 21 -#define PWMG_IM_HEND4B_Msk (0x01 << PWMG_IM_HEND4B_Pos) -#define PWMG_IM_HEND5A_Pos 22 -#define PWMG_IM_HEND5A_Msk (0x01 << PWMG_IM_HEND5A_Pos) -#define PWMG_IM_HEND5B_Pos 23 -#define PWMG_IM_HEND5B_Msk (0x01 << PWMG_IM_HEND5B_Pos) -#define PWMG_IM_HALT_Pos 24 -#define PWMG_IM_HALT_Msk (0x01 << PWMG_IM_HALT_Pos) - -#define PWMG_IRS_NEWP0A_Pos 0 //Interrupt Raw State -#define PWMG_IRS_NEWP0A_Msk (0x01 << PWMG_IRS_NEWP0A_Pos) -#define PWMG_IRS_NEWP0B_Pos 1 -#define PWMG_IRS_NEWP0B_Msk (0x01 << PWMG_IRS_NEWP0B_Pos) -#define PWMG_IRS_NEWP1A_Pos 2 -#define PWMG_IRS_NEWP1A_Msk (0x01 << PWMG_IRS_NEWP1A_Pos) -#define PWMG_IRS_NEWP1B_Pos 3 -#define PWMG_IRS_NEWP1B_Msk (0x01 << PWMG_IRS_NEWP1B_Pos) -#define PWMG_IRS_NEWP2A_Pos 4 -#define PWMG_IRS_NEWP2A_Msk (0x01 << PWMG_IRS_NEWP2A_Pos) -#define PWMG_IRS_NEWP2B_Pos 5 -#define PWMG_IRS_NEWP2B_Msk (0x01 << PWMG_IRS_NEWP2B_Pos) -#define PWMG_IRS_NEWP3A_Pos 6 -#define PWMG_IRS_NEWP3A_Msk (0x01 << PWMG_IRS_NEWP3A_Pos) -#define PWMG_IRS_NEWP3B_Pos 7 -#define PWMG_IRS_NEWP3B_Msk (0x01 << PWMG_IRS_NEWP3B_Pos) -#define PWMG_IRS_NEWP4A_Pos 8 -#define PWMG_IRS_NEWP4A_Msk (0x01 << PWMG_IRS_NEWP4A_Pos) -#define PWMG_IRS_NEWP4B_Pos 9 -#define PWMG_IRS_NEWP4B_Msk (0x01 << PWMG_IRS_NEWP4B_Pos) -#define PWMG_IRS_NEWP5A_Pos 10 -#define PWMG_IRS_NEWP5A_Msk (0x01 << PWMG_IRS_NEWP5A_Pos) -#define PWMG_IRS_NEWP5B_Pos 11 -#define PWMG_IRS_NEWP5B_Msk (0x01 << PWMG_IRS_NEWP5B_Pos) -#define PWMG_IRS_HEND0A_Pos 12 -#define PWMG_IRS_HEND0A_Msk (0x01 << PWMG_IRS_HEND0A_Pos) -#define PWMG_IRS_HEND0B_Pos 13 -#define PWMG_IRS_HEND0B_Msk (0x01 << PWMG_IRS_HEND0B_Pos) -#define PWMG_IRS_HEND1A_Pos 14 -#define PWMG_IRS_HEND1A_Msk (0x01 << PWMG_IRS_HEND1A_Pos) -#define PWMG_IRS_HEND1B_Pos 15 -#define PWMG_IRS_HEND1B_Msk (0x01 << PWMG_IRS_HEND1B_Pos) -#define PWMG_IRS_HEND2A_Pos 16 -#define PWMG_IRS_HEND2A_Msk (0x01 << PWMG_IRS_HEND2A_Pos) -#define PWMG_IRS_HEND2B_Pos 17 -#define PWMG_IRS_HEND2B_Msk (0x01 << PWMG_IRS_HEND2B_Pos) -#define PWMG_IRS_HEND3A_Pos 18 -#define PWMG_IRS_HEND3A_Msk (0x01 << PWMG_IRS_HEND3A_Pos) -#define PWMG_IRS_HEND3B_Pos 19 -#define PWMG_IRS_HEND3B_Msk (0x01 << PWMG_IRS_HEND3B_Pos) -#define PWMG_IRS_HEND4A_Pos 20 -#define PWMG_IRS_HEND4A_Msk (0x01 << PWMG_IRS_HEND4A_Pos) -#define PWMG_IRS_HEND4B_Pos 21 -#define PWMG_IRS_HEND4B_Msk (0x01 << PWMG_IRS_HEND4B_Pos) -#define PWMG_IRS_HEND5A_Pos 22 -#define PWMG_IRS_HEND5A_Msk (0x01 << PWMG_IRS_HEND5A_Pos) -#define PWMG_IRS_HEND5B_Pos 23 -#define PWMG_IRS_HEND5B_Msk (0x01 << PWMG_IRS_HEND5B_Pos) -#define PWMG_IRS_HALT_Pos 24 -#define PWMG_IRS_HALT_Msk (0x01 << PWMG_IRS_HALT_Pos) - -typedef struct -{ - __IO uint32_t EN; //[0] ENABLE - - __IO uint32_t IE; //只有为1时，IF[CHx]在DMA传输结束时才能变为1，否则将一直保持在0 - - __IO uint32_t IM; //当为1时，即使IF[CHx]为1，dma_int也不会因此变1 - - __IO uint32_t IF; //写1清零 - - uint32_t RESERVED[12]; - - struct - { - __IO uint32_t CR; - - __IO uint32_t AM; //Adress Mode - - __IO uint32_t SRC; - - __IO uint32_t SRCSGADDR1; //只在Scatter Gather模式下使用 - - __IO uint32_t SRCSGADDR2; //只在Scatter Gather模式下使用 - - __IO uint32_t SRCSGADDR3; //只在Scatter Gather模式下使用 - - __IO uint32_t SRCSGLEN; //只在Scatter Gather模式下使用 - - __IO uint32_t DST; - - __IO uint32_t DSTSGADDR1; //只在Scatter Gather模式下使用 - - __IO uint32_t DSTSGADDR2; //只在Scatter Gather模式下使用 - - __IO uint32_t DSTSGADDR3; //只在Scatter Gather模式下使用 - - __IO uint32_t DSTSGLEN; //只在Scatter Gather模式下使用 - uint32_t RESERVED[4]; - } CH[3]; +#define PWMG_FORCEH_PWM0_Pos 0 +#define PWMG_FORCEH_PWM0_Msk (0x01 << PWMG_FORCEH_PWM0_Pos) +#define PWMG_FORCEH_PWM1_Pos 1 +#define PWMG_FORCEH_PWM1_Msk (0x01 << PWMG_FORCEH_PWM1_Pos) +#define PWMG_FORCEH_PWM2_Pos 2 +#define PWMG_FORCEH_PWM2_Msk (0x01 << PWMG_FORCEH_PWM2_Pos) +#define PWMG_FORCEH_PWM3_Pos 3 +#define PWMG_FORCEH_PWM3_Msk (0x01 << PWMG_FORCEH_PWM3_Pos) +#define PWMG_FORCEH_PWM4_Pos 4 +#define PWMG_FORCEH_PWM4_Msk (0x01 << PWMG_FORCEH_PWM4_Pos) +#define PWMG_FORCEH_PWM5_Pos 5 +#define PWMG_FORCEH_PWM5_Msk (0x01 << PWMG_FORCEH_PWM5_Pos) + +#define PWMG_ADTRG_VALUE_Pos 0 +#define PWMG_ADTRG_VALUE_Msk (0xFFFF << PWMG_ADTRG0A_VALUE_Pos) +#define PWMG_ADTRG_EVEN_Pos 16 //1 żЧ 0 Ч +#define PWMG_ADTRG_EVEN_Msk (0x01 << PWMG_ADTRG0A_EVEN_Pos) +#define PWMG_ADTRG_EN_Pos 17 +#define PWMG_ADTRG_EN_Msk (0x01 << PWMG_ADTRG0A_EN_Pos) + +#define PWMG_HALT_EN_Pos 0 +#define PWMG_HALT_EN_Msk (0x01 << PWMG_HALT_EN_Pos) +#define PWMG_HALT_PWM0_Pos 1 +#define PWMG_HALT_PWM0_Msk (0x01 << PWMG_HALT_PWM0_Pos) +#define PWMG_HALT_PWM1_Pos 2 +#define PWMG_HALT_PWM1_Msk (0x01 << PWMG_HALT_PWM1_Pos) +#define PWMG_HALT_PWM2_Pos 3 +#define PWMG_HALT_PWM2_Msk (0x01 << PWMG_HALT_PWM2_Pos) +#define PWMG_HALT_PWM3_Pos 4 +#define PWMG_HALT_PWM3_Msk (0x01 << PWMG_HALT_PWM3_Pos) +#define PWMG_HALT_PWM4_Pos 5 +#define PWMG_HALT_PWM4_Msk (0x01 << PWMG_HALT_PWM4_Pos) +#define PWMG_HALT_PWM5_Pos 6 +#define PWMG_HALT_PWM5_Msk (0x01 << PWMG_HALT_PWM5_Pos) +#define PWMG_HALT_STOPCNT_Pos 7 //1 ɲʱPWM㣬ֹͣ 0 ɲʱPWM +#define PWMG_HALT_STOPCNT_Msk (0x01 << PWMG_HALT_STOPCNT_Pos) +#define PWMG_HALT_INLVL_Pos 8 //1 ɲߵƽЧ +#define PWMG_HALT_INLVL_Msk (0x01 << PWMG_HALT_INLVL_Pos) +#define PWMG_HALT_OUTLVL_Pos 9 //1 ɲߵƽ +#define PWMG_HALT_OUTLVL_Msk (0x01 << PWMG_HALT_OUTLVL_Pos) +#define PWMG_HALT_STAT_Pos 10 //1 ɲ +#define PWMG_HALT_STAT_Msk (0x01 << PWMG_HALT_STAT_Pos) + +#define PWMG_CHEN_PWM0A_Pos 0 +#define PWMG_CHEN_PWM0A_Msk (0x01 << PWMG_CHEN_PWM0A_Pos) +#define PWMG_CHEN_PWM0B_Pos 1 +#define PWMG_CHEN_PWM0B_Msk (0x01 << PWMG_CHEN_PWM0B_Pos) +#define PWMG_CHEN_PWM1A_Pos 2 +#define PWMG_CHEN_PWM1A_Msk (0x01 << PWMG_CHEN_PWM1A_Pos) +#define PWMG_CHEN_PWM1B_Pos 3 +#define PWMG_CHEN_PWM1B_Msk (0x01 << PWMG_CHEN_PWM1B_Pos) +#define PWMG_CHEN_PWM2A_Pos 4 +#define PWMG_CHEN_PWM2A_Msk (0x01 << PWMG_CHEN_PWM2A_Pos) +#define PWMG_CHEN_PWM2B_Pos 5 +#define PWMG_CHEN_PWM2B_Msk (0x01 << PWMG_CHEN_PWM2B_Pos) +#define PWMG_CHEN_PWM3A_Pos 6 +#define PWMG_CHEN_PWM3A_Msk (0x01 << PWMG_CHEN_PWM3A_Pos) +#define PWMG_CHEN_PWM3B_Pos 7 +#define PWMG_CHEN_PWM3B_Msk (0x01 << PWMG_CHEN_PWM3B_Pos) +#define PWMG_CHEN_PWM4A_Pos 8 +#define PWMG_CHEN_PWM4A_Msk (0x01 << PWMG_CHEN_PWM4A_Pos) +#define PWMG_CHEN_PWM4B_Pos 9 +#define PWMG_CHEN_PWM4B_Msk (0x01 << PWMG_CHEN_PWM4B_Pos) +#define PWMG_CHEN_PWM5A_Pos 10 +#define PWMG_CHEN_PWM5A_Msk (0x01 << PWMG_CHEN_PWM5A_Pos) +#define PWMG_CHEN_PWM5B_Pos 11 +#define PWMG_CHEN_PWM5B_Msk (0x01 << PWMG_CHEN_PWM5B_Pos) + + +#define PWMG_IE_NEWP0A_Pos 0 +#define PWMG_IE_NEWP0A_Msk (0x01 << PWMG_IE_NEWP0A_Pos) +#define PWMG_IE_NEWP0B_Pos 1 +#define PWMG_IE_NEWP0B_Msk (0x01 << PWMG_IE_NEWP0B_Pos) +#define PWMG_IE_NEWP1A_Pos 2 +#define PWMG_IE_NEWP1A_Msk (0x01 << PWMG_IE_NEWP1A_Pos) +#define PWMG_IE_NEWP1B_Pos 3 +#define PWMG_IE_NEWP1B_Msk (0x01 << PWMG_IE_NEWP1B_Pos) +#define PWMG_IE_NEWP2A_Pos 4 +#define PWMG_IE_NEWP2A_Msk (0x01 << PWMG_IE_NEWP2A_Pos) +#define PWMG_IE_NEWP2B_Pos 5 +#define PWMG_IE_NEWP2B_Msk (0x01 << PWMG_IE_NEWP2B_Pos) +#define PWMG_IE_NEWP3A_Pos 6 +#define PWMG_IE_NEWP3A_Msk (0x01 << PWMG_IE_NEWP3A_Pos) +#define PWMG_IE_NEWP3B_Pos 7 +#define PWMG_IE_NEWP3B_Msk (0x01 << PWMG_IE_NEWP3B_Pos) +#define PWMG_IE_NEWP4A_Pos 8 +#define PWMG_IE_NEWP4A_Msk (0x01 << PWMG_IE_NEWP4A_Pos) +#define PWMG_IE_NEWP4B_Pos 9 +#define PWMG_IE_NEWP4B_Msk (0x01 << PWMG_IE_NEWP4B_Pos) +#define PWMG_IE_NEWP5A_Pos 10 +#define PWMG_IE_NEWP5A_Msk (0x01 << PWMG_IE_NEWP5A_Pos) +#define PWMG_IE_NEWP5B_Pos 11 +#define PWMG_IE_NEWP5B_Msk (0x01 << PWMG_IE_NEWP5B_Pos) +#define PWMG_IE_HEND0A_Pos 12 +#define PWMG_IE_HEND0A_Msk (0x01 << PWMG_IE_HEND0A_Pos) +#define PWMG_IE_HEND0B_Pos 13 +#define PWMG_IE_HEND0B_Msk (0x01 << PWMG_IE_HEND0B_Pos) +#define PWMG_IE_HEND1A_Pos 14 +#define PWMG_IE_HEND1A_Msk (0x01 << PWMG_IE_HEND1A_Pos) +#define PWMG_IE_HEND1B_Pos 15 +#define PWMG_IE_HEND1B_Msk (0x01 << PWMG_IE_HEND1B_Pos) +#define PWMG_IE_HEND2A_Pos 16 +#define PWMG_IE_HEND2A_Msk (0x01 << PWMG_IE_HEND2A_Pos) +#define PWMG_IE_HEND2B_Pos 17 +#define PWMG_IE_HEND2B_Msk (0x01 << PWMG_IE_HEND2B_Pos) +#define PWMG_IE_HEND3A_Pos 18 +#define PWMG_IE_HEND3A_Msk (0x01 << PWMG_IE_HEND3A_Pos) +#define PWMG_IE_HEND3B_Pos 19 +#define PWMG_IE_HEND3B_Msk (0x01 << PWMG_IE_HEND3B_Pos) +#define PWMG_IE_HEND4A_Pos 20 +#define PWMG_IE_HEND4A_Msk (0x01 << PWMG_IE_HEND4A_Pos) +#define PWMG_IE_HEND4B_Pos 21 +#define PWMG_IE_HEND4B_Msk (0x01 << PWMG_IE_HEND4B_Pos) +#define PWMG_IE_HEND5A_Pos 22 +#define PWMG_IE_HEND5A_Msk (0x01 << PWMG_IE_HEND5A_Pos) +#define PWMG_IE_HEND5B_Pos 23 +#define PWMG_IE_HEND5B_Msk (0x01 << PWMG_IE_HEND5B_Pos) +#define PWMG_IE_HALT_Pos 24 +#define PWMG_IE_HALT_Msk (0x01 << PWMG_IE_HALT_Pos) + +#define PWMG_IF_NEWP0A_Pos 0 +#define PWMG_IF_NEWP0A_Msk (0x01 << PWMG_IF_NEWP0A_Pos) +#define PWMG_IF_NEWP0B_Pos 1 +#define PWMG_IF_NEWP0B_Msk (0x01 << PWMG_IF_NEWP0B_Pos) +#define PWMG_IF_NEWP1A_Pos 2 +#define PWMG_IF_NEWP1A_Msk (0x01 << PWMG_IF_NEWP1A_Pos) +#define PWMG_IF_NEWP1B_Pos 3 +#define PWMG_IF_NEWP1B_Msk (0x01 << PWMG_IF_NEWP1B_Pos) +#define PWMG_IF_NEWP2A_Pos 4 +#define PWMG_IF_NEWP2A_Msk (0x01 << PWMG_IF_NEWP2A_Pos) +#define PWMG_IF_NEWP2B_Pos 5 +#define PWMG_IF_NEWP2B_Msk (0x01 << PWMG_IF_NEWP2B_Pos) +#define PWMG_IF_NEWP3A_Pos 6 +#define PWMG_IF_NEWP3A_Msk (0x01 << PWMG_IF_NEWP3A_Pos) +#define PWMG_IF_NEWP3B_Pos 7 +#define PWMG_IF_NEWP3B_Msk (0x01 << PWMG_IF_NEWP3B_Pos) +#define PWMG_IF_NEWP4A_Pos 8 +#define PWMG_IF_NEWP4A_Msk (0x01 << PWMG_IF_NEWP4A_Pos) +#define PWMG_IF_NEWP4B_Pos 9 +#define PWMG_IF_NEWP4B_Msk (0x01 << PWMG_IF_NEWP4B_Pos) +#define PWMG_IF_NEWP5A_Pos 10 +#define PWMG_IF_NEWP5A_Msk (0x01 << PWMG_IF_NEWP5A_Pos) +#define PWMG_IF_NEWP5B_Pos 11 +#define PWMG_IF_NEWP5B_Msk (0x01 << PWMG_IF_NEWP5B_Pos) +#define PWMG_IF_HEND0A_Pos 12 +#define PWMG_IF_HEND0A_Msk (0x01 << PWMG_IF_HEND0A_Pos) +#define PWMG_IF_HEND0B_Pos 13 +#define PWMG_IF_HEND0B_Msk (0x01 << PWMG_IF_HEND0B_Pos) +#define PWMG_IF_HEND1A_Pos 14 +#define PWMG_IF_HEND1A_Msk (0x01 << PWMG_IF_HEND1A_Pos) +#define PWMG_IF_HEND1B_Pos 15 +#define PWMG_IF_HEND1B_Msk (0x01 << PWMG_IF_HEND1B_Pos) +#define PWMG_IF_HEND2A_Pos 16 +#define PWMG_IF_HEND2A_Msk (0x01 << PWMG_IF_HEND2A_Pos) +#define PWMG_IF_HEND2B_Pos 17 +#define PWMG_IF_HEND2B_Msk (0x01 << PWMG_IF_HEND2B_Pos) +#define PWMG_IF_HEND3A_Pos 18 +#define PWMG_IF_HEND3A_Msk (0x01 << PWMG_IF_HEND3A_Pos) +#define PWMG_IF_HEND3B_Pos 19 +#define PWMG_IF_HEND3B_Msk (0x01 << PWMG_IF_HEND3B_Pos) +#define PWMG_IF_HEND4A_Pos 20 +#define PWMG_IF_HEND4A_Msk (0x01 << PWMG_IF_HEND4A_Pos) +#define PWMG_IF_HEND4B_Pos 21 +#define PWMG_IF_HEND4B_Msk (0x01 << PWMG_IF_HEND4B_Pos) +#define PWMG_IF_HEND5A_Pos 22 +#define PWMG_IF_HEND5A_Msk (0x01 << PWMG_IF_HEND5A_Pos) +#define PWMG_IF_HEND5B_Pos 23 +#define PWMG_IF_HEND5B_Msk (0x01 << PWMG_IF_HEND5B_Pos) +#define PWMG_IF_HALT_Pos 24 +#define PWMG_IF_HALT_Msk (0x01 << PWMG_IF_HALT_Pos) + +#define PWMG_IM_NEWP0A_Pos 0 //Interrupt Mask +#define PWMG_IM_NEWP0A_Msk (0x01 << PWMG_IM_NEWP0A_Pos) +#define PWMG_IM_NEWP0B_Pos 1 +#define PWMG_IM_NEWP0B_Msk (0x01 << PWMG_IM_NEWP0B_Pos) +#define PWMG_IM_NEWP1A_Pos 2 +#define PWMG_IM_NEWP1A_Msk (0x01 << PWMG_IM_NEWP1A_Pos) +#define PWMG_IM_NEWP1B_Pos 3 +#define PWMG_IM_NEWP1B_Msk (0x01 << PWMG_IM_NEWP1B_Pos) +#define PWMG_IM_NEWP2A_Pos 4 +#define PWMG_IM_NEWP2A_Msk (0x01 << PWMG_IM_NEWP2A_Pos) +#define PWMG_IM_NEWP2B_Pos 5 +#define PWMG_IM_NEWP2B_Msk (0x01 << PWMG_IM_NEWP2B_Pos) +#define PWMG_IM_NEWP3A_Pos 6 +#define PWMG_IM_NEWP3A_Msk (0x01 << PWMG_IM_NEWP3A_Pos) +#define PWMG_IM_NEWP3B_Pos 7 +#define PWMG_IM_NEWP3B_Msk (0x01 << PWMG_IM_NEWP3B_Pos) +#define PWMG_IM_NEWP4A_Pos 8 +#define PWMG_IM_NEWP4A_Msk (0x01 << PWMG_IM_NEWP4A_Pos) +#define PWMG_IM_NEWP4B_Pos 9 +#define PWMG_IM_NEWP4B_Msk (0x01 << PWMG_IM_NEWP4B_Pos) +#define PWMG_IM_NEWP5A_Pos 10 +#define PWMG_IM_NEWP5A_Msk (0x01 << PWMG_IM_NEWP5A_Pos) +#define PWMG_IM_NEWP5B_Pos 11 +#define PWMG_IM_NEWP5B_Msk (0x01 << PWMG_IM_NEWP5B_Pos) +#define PWMG_IM_HEND0A_Pos 12 +#define PWMG_IM_HEND0A_Msk (0x01 << PWMG_IM_HEND0A_Pos) +#define PWMG_IM_HEND0B_Pos 13 +#define PWMG_IM_HEND0B_Msk (0x01 << PWMG_IM_HEND0B_Pos) +#define PWMG_IM_HEND1A_Pos 14 +#define PWMG_IM_HEND1A_Msk (0x01 << PWMG_IM_HEND1A_Pos) +#define PWMG_IM_HEND1B_Pos 15 +#define PWMG_IM_HEND1B_Msk (0x01 << PWMG_IM_HEND1B_Pos) +#define PWMG_IM_HEND2A_Pos 16 +#define PWMG_IM_HEND2A_Msk (0x01 << PWMG_IM_HEND2A_Pos) +#define PWMG_IM_HEND2B_Pos 17 +#define PWMG_IM_HEND2B_Msk (0x01 << PWMG_IM_HEND2B_Pos) +#define PWMG_IM_HEND3A_Pos 18 +#define PWMG_IM_HEND3A_Msk (0x01 << PWMG_IM_HEND3A_Pos) +#define PWMG_IM_HEND3B_Pos 19 +#define PWMG_IM_HEND3B_Msk (0x01 << PWMG_IM_HEND3B_Pos) +#define PWMG_IM_HEND4A_Pos 20 +#define PWMG_IM_HEND4A_Msk (0x01 << PWMG_IM_HEND4A_Pos) +#define PWMG_IM_HEND4B_Pos 21 +#define PWMG_IM_HEND4B_Msk (0x01 << PWMG_IM_HEND4B_Pos) +#define PWMG_IM_HEND5A_Pos 22 +#define PWMG_IM_HEND5A_Msk (0x01 << PWMG_IM_HEND5A_Pos) +#define PWMG_IM_HEND5B_Pos 23 +#define PWMG_IM_HEND5B_Msk (0x01 << PWMG_IM_HEND5B_Pos) +#define PWMG_IM_HALT_Pos 24 +#define PWMG_IM_HALT_Msk (0x01 << PWMG_IM_HALT_Pos) + +#define PWMG_IRS_NEWP0A_Pos 0 //Interrupt Raw State +#define PWMG_IRS_NEWP0A_Msk (0x01 << PWMG_IRS_NEWP0A_Pos) +#define PWMG_IRS_NEWP0B_Pos 1 +#define PWMG_IRS_NEWP0B_Msk (0x01 << PWMG_IRS_NEWP0B_Pos) +#define PWMG_IRS_NEWP1A_Pos 2 +#define PWMG_IRS_NEWP1A_Msk (0x01 << PWMG_IRS_NEWP1A_Pos) +#define PWMG_IRS_NEWP1B_Pos 3 +#define PWMG_IRS_NEWP1B_Msk (0x01 << PWMG_IRS_NEWP1B_Pos) +#define PWMG_IRS_NEWP2A_Pos 4 +#define PWMG_IRS_NEWP2A_Msk (0x01 << PWMG_IRS_NEWP2A_Pos) +#define PWMG_IRS_NEWP2B_Pos 5 +#define PWMG_IRS_NEWP2B_Msk (0x01 << PWMG_IRS_NEWP2B_Pos) +#define PWMG_IRS_NEWP3A_Pos 6 +#define PWMG_IRS_NEWP3A_Msk (0x01 << PWMG_IRS_NEWP3A_Pos) +#define PWMG_IRS_NEWP3B_Pos 7 +#define PWMG_IRS_NEWP3B_Msk (0x01 << PWMG_IRS_NEWP3B_Pos) +#define PWMG_IRS_NEWP4A_Pos 8 +#define PWMG_IRS_NEWP4A_Msk (0x01 << PWMG_IRS_NEWP4A_Pos) +#define PWMG_IRS_NEWP4B_Pos 9 +#define PWMG_IRS_NEWP4B_Msk (0x01 << PWMG_IRS_NEWP4B_Pos) +#define PWMG_IRS_NEWP5A_Pos 10 +#define PWMG_IRS_NEWP5A_Msk (0x01 << PWMG_IRS_NEWP5A_Pos) +#define PWMG_IRS_NEWP5B_Pos 11 +#define PWMG_IRS_NEWP5B_Msk (0x01 << PWMG_IRS_NEWP5B_Pos) +#define PWMG_IRS_HEND0A_Pos 12 +#define PWMG_IRS_HEND0A_Msk (0x01 << PWMG_IRS_HEND0A_Pos) +#define PWMG_IRS_HEND0B_Pos 13 +#define PWMG_IRS_HEND0B_Msk (0x01 << PWMG_IRS_HEND0B_Pos) +#define PWMG_IRS_HEND1A_Pos 14 +#define PWMG_IRS_HEND1A_Msk (0x01 << PWMG_IRS_HEND1A_Pos) +#define PWMG_IRS_HEND1B_Pos 15 +#define PWMG_IRS_HEND1B_Msk (0x01 << PWMG_IRS_HEND1B_Pos) +#define PWMG_IRS_HEND2A_Pos 16 +#define PWMG_IRS_HEND2A_Msk (0x01 << PWMG_IRS_HEND2A_Pos) +#define PWMG_IRS_HEND2B_Pos 17 +#define PWMG_IRS_HEND2B_Msk (0x01 << PWMG_IRS_HEND2B_Pos) +#define PWMG_IRS_HEND3A_Pos 18 +#define PWMG_IRS_HEND3A_Msk (0x01 << PWMG_IRS_HEND3A_Pos) +#define PWMG_IRS_HEND3B_Pos 19 +#define PWMG_IRS_HEND3B_Msk (0x01 << PWMG_IRS_HEND3B_Pos) +#define PWMG_IRS_HEND4A_Pos 20 +#define PWMG_IRS_HEND4A_Msk (0x01 << PWMG_IRS_HEND4A_Pos) +#define PWMG_IRS_HEND4B_Pos 21 +#define PWMG_IRS_HEND4B_Msk (0x01 << PWMG_IRS_HEND4B_Pos) +#define PWMG_IRS_HEND5A_Pos 22 +#define PWMG_IRS_HEND5A_Msk (0x01 << PWMG_IRS_HEND5A_Pos) +#define PWMG_IRS_HEND5B_Pos 23 +#define PWMG_IRS_HEND5B_Msk (0x01 << PWMG_IRS_HEND5B_Pos) +#define PWMG_IRS_HALT_Pos 24 +#define PWMG_IRS_HALT_Msk (0x01 << PWMG_IRS_HALT_Pos) + + + + +typedef struct { + __IO uint32_t EN; //[0] ENABLE + + __IO uint32_t IE; //ֻΪ1ʱIF[CHx]DMAʱܱΪ1һֱ0 + + __IO uint32_t IM; //Ϊ1ʱʹIF[CHx]Ϊ1dma_intҲ˱1 + + __IO uint32_t IF; //д1 + + uint32_t RESERVED[12]; + + struct { + __IO uint32_t CR; + + __IO uint32_t AM; //Adress Mode + + __IO uint32_t SRC; + + __IO uint32_t SRCSGADDR1; //ֻScatter Gatherģʽʹ + + __IO uint32_t SRCSGADDR2; //ֻScatter Gatherģʽʹ + + __IO uint32_t SRCSGADDR3; //ֻScatter Gatherģʽʹ + + __IO uint32_t SRCSGLEN; //ֻScatter Gatherģʽʹ + + __IO uint32_t DST; + + __IO uint32_t DSTSGADDR1; //ֻScatter Gatherģʽʹ + + __IO uint32_t DSTSGADDR2; //ֻScatter Gatherģʽʹ + + __IO uint32_t DSTSGADDR3; //ֻScatter Gatherģʽʹ + + __IO uint32_t DSTSGLEN; //ֻScatter Gatherģʽʹ + + uint32_t RESERVED[4]; + } CH[3]; } DMA_TypeDef; -#define DMA_IE_CH0_Pos 0 -#define DMA_IE_CH0_Msk (0x01 << DMA_IE_CH0_Pos) -#define DMA_IE_CH1_Pos 1 -#define DMA_IE_CH1_Msk (0x01 << DMA_IE_CH1_Pos) -#define DMA_IE_CH2_Pos 2 -#define DMA_IE_CH2_Msk (0x01 << DMA_IE_CH2_Pos) -#define DMA_IE_CH3_Pos 3 -#define DMA_IE_CH3_Msk (0x01 << DMA_IE_CH3_Pos) -#define DMA_IE_CH4_Pos 4 -#define DMA_IE_CH4_Msk (0x01 << DMA_IE_CH4_Pos) -#define DMA_IE_CH5_Pos 5 -#define DMA_IE_CH5_Msk (0x01 << DMA_IE_CH5_Pos) -#define DMA_IE_CH6_Pos 6 -#define DMA_IE_CH6_Msk (0x01 << DMA_IE_CH6_Pos) -#define DMA_IE_CH7_Pos 7 -#define DMA_IE_CH7_Msk (0x01 << DMA_IE_CH7_Pos) - -#define DMA_IM_CH0_Pos 0 -#define DMA_IM_CH0_Msk (0x01 << DMA_IM_CH0_Pos) -#define DMA_IM_CH1_Pos 1 -#define DMA_IM_CH1_Msk (0x01 << DMA_IM_CH1_Pos) -#define DMA_IM_CH2_Pos 2 -#define DMA_IM_CH2_Msk (0x01 << DMA_IM_CH2_Pos) -#define DMA_IM_CH3_Pos 3 -#define DMA_IM_CH3_Msk (0x01 << DMA_IM_CH3_Pos) -#define DMA_IM_CH4_Pos 4 -#define DMA_IM_CH4_Msk (0x01 << DMA_IM_CH4_Pos) -#define DMA_IM_CH5_Pos 5 -#define DMA_IM_CH5_Msk (0x01 << DMA_IM_CH5_Pos) -#define DMA_IM_CH6_Pos 6 -#define DMA_IM_CH6_Msk (0x01 << DMA_IM_CH6_Pos) -#define DMA_IM_CH7_Pos 7 -#define DMA_IM_CH7_Msk (0x01 << DMA_IM_CH7_Pos) - -#define DMA_IF_CH0_Pos 0 -#define DMA_IF_CH0_Msk (0x01 << DMA_IF_CH0_Pos) -#define DMA_IF_CH1_Pos 1 -#define DMA_IF_CH1_Msk (0x01 << DMA_IF_CH1_Pos) -#define DMA_IF_CH2_Pos 2 -#define DMA_IF_CH2_Msk (0x01 << DMA_IF_CH2_Pos) -#define DMA_IF_CH3_Pos 3 -#define DMA_IF_CH3_Msk (0x01 << DMA_IF_CH3_Pos) -#define DMA_IF_CH4_Pos 4 -#define DMA_IF_CH4_Msk (0x01 << DMA_IF_CH4_Pos) -#define DMA_IF_CH5_Pos 5 -#define DMA_IF_CH5_Msk (0x01 << DMA_IF_CH5_Pos) -#define DMA_IF_CH6_Pos 6 -#define DMA_IF_CH6_Msk (0x01 << DMA_IF_CH6_Pos) -#define DMA_IF_CH7_Pos 7 -#define DMA_IF_CH7_Msk (0x01 << DMA_IF_CH7_Pos) - -#define DMA_CR_LEN_Pos 0 //此通道传输总长度，0对应1字节，最大4096字节 -#define DMA_CR_LEN_Msk (0xFFF << DMA_CR_LEN_Pos) -#define DMA_CR_RXEN_Pos 16 -#define DMA_CR_RXEN_Msk (0x01 << DMA_CR_RXEN_Pos) -#define DMA_CR_TXEN_Pos 17 -#define DMA_CR_TXEN_Msk (0x01 << DMA_CR_TXEN_Pos) -#define DMA_CR_AUTORE_Pos 18 //Auto Restart, 通道在传输完成后，是否自动重新启动 -#define DMA_CR_AUTORE_Msk (0x01 << DMA_CR_AUTORE_Pos) - -#define DMA_AM_SRCAM_Pos 0 //Address Mode 0 地址固定 1 地址递增 2 scatter gather模式 -#define DMA_AM_SRCAM_Msk (0x03 << DMA_AM_SRCAM_Pos) -#define DMA_AM_DSTAM_Pos 8 -#define DMA_AM_DSTAM_Msk (0x03 << DMA_AM_DSTAM_Pos) -#define DMA_AM_BURST_Pos 16 -#define DMA_AM_BURST_Msk (0x01 << DMA_AM_BURST_Pos) - -typedef struct -{ - __IO uint32_t CR; //Control Register - - __O uint32_t CMD; //Command Register - - __I uint32_t SR; //Status Register - - __I uint32_t IF; //Interrupt Flag - - __IO uint32_t IE; //Interrupt Enable - - uint32_t RESERVED; - - __IO uint32_t BT0; //Bit Time Register 0 - - __IO uint32_t BT1; //Bit Time Register 1 - - uint32_t RESERVED2[3]; - - __I uint32_t ALC; //Arbitration Lost Capture, 仲裁丢失捕捉 - - __I uint32_t ECC; //Error code capture, 错误代码捕捉 - - __IO uint32_t EWLIM; //Error Warning Limit, 错误报警限制 - - __IO uint32_t RXERR; //RX错误计数 - - __IO uint32_t TXERR; //TX错误计数 - - union { - struct - { //在复位时可读写，正常工作模式下不可访问 - __IO uint32_t ACR[4]; //Acceptance Check Register, 验收寄存器 - - __IO uint32_t AMR[4]; //Acceptance Mask Register, 验收屏蔽寄存器；对应位写0，ID必须和验收寄存器匹配 - uint32_t RESERVED[5]; - } FILTER; - - union { //在正常工作模式下可读写，复位时不可访问 - struct - { - __O uint32_t INFO; - - __O uint32_t DATA[12]; - } TXFRAME; - - struct - { - __I uint32_t INFO; - - __I uint32_t DATA[12]; - } RXFRAME; - }; - }; - - __I uint32_t RMCNT; //Receive Message Count - - uint32_t RESERVED3[66]; - - struct - { //TXFRAME的读接口 - __I uint32_t INFO; - - __I uint32_t DATA[12]; - } TXFRAME_R; +#define DMA_IE_CH0_Pos 0 +#define DMA_IE_CH0_Msk (0x01 << DMA_IE_CH0_Pos) +#define DMA_IE_CH1_Pos 1 +#define DMA_IE_CH1_Msk (0x01 << DMA_IE_CH1_Pos) +#define DMA_IE_CH2_Pos 2 +#define DMA_IE_CH2_Msk (0x01 << DMA_IE_CH2_Pos) +#define DMA_IE_CH3_Pos 3 +#define DMA_IE_CH3_Msk (0x01 << DMA_IE_CH3_Pos) +#define DMA_IE_CH4_Pos 4 +#define DMA_IE_CH4_Msk (0x01 << DMA_IE_CH4_Pos) +#define DMA_IE_CH5_Pos 5 +#define DMA_IE_CH5_Msk (0x01 << DMA_IE_CH5_Pos) +#define DMA_IE_CH6_Pos 6 +#define DMA_IE_CH6_Msk (0x01 << DMA_IE_CH6_Pos) +#define DMA_IE_CH7_Pos 7 +#define DMA_IE_CH7_Msk (0x01 << DMA_IE_CH7_Pos) + +#define DMA_IM_CH0_Pos 0 +#define DMA_IM_CH0_Msk (0x01 << DMA_IM_CH0_Pos) +#define DMA_IM_CH1_Pos 1 +#define DMA_IM_CH1_Msk (0x01 << DMA_IM_CH1_Pos) +#define DMA_IM_CH2_Pos 2 +#define DMA_IM_CH2_Msk (0x01 << DMA_IM_CH2_Pos) +#define DMA_IM_CH3_Pos 3 +#define DMA_IM_CH3_Msk (0x01 << DMA_IM_CH3_Pos) +#define DMA_IM_CH4_Pos 4 +#define DMA_IM_CH4_Msk (0x01 << DMA_IM_CH4_Pos) +#define DMA_IM_CH5_Pos 5 +#define DMA_IM_CH5_Msk (0x01 << DMA_IM_CH5_Pos) +#define DMA_IM_CH6_Pos 6 +#define DMA_IM_CH6_Msk (0x01 << DMA_IM_CH6_Pos) +#define DMA_IM_CH7_Pos 7 +#define DMA_IM_CH7_Msk (0x01 << DMA_IM_CH7_Pos) + +#define DMA_IF_CH0_Pos 0 +#define DMA_IF_CH0_Msk (0x01 << DMA_IF_CH0_Pos) +#define DMA_IF_CH1_Pos 1 +#define DMA_IF_CH1_Msk (0x01 << DMA_IF_CH1_Pos) +#define DMA_IF_CH2_Pos 2 +#define DMA_IF_CH2_Msk (0x01 << DMA_IF_CH2_Pos) +#define DMA_IF_CH3_Pos 3 +#define DMA_IF_CH3_Msk (0x01 << DMA_IF_CH3_Pos) +#define DMA_IF_CH4_Pos 4 +#define DMA_IF_CH4_Msk (0x01 << DMA_IF_CH4_Pos) +#define DMA_IF_CH5_Pos 5 +#define DMA_IF_CH5_Msk (0x01 << DMA_IF_CH5_Pos) +#define DMA_IF_CH6_Pos 6 +#define DMA_IF_CH6_Msk (0x01 << DMA_IF_CH6_Pos) +#define DMA_IF_CH7_Pos 7 +#define DMA_IF_CH7_Msk (0x01 << DMA_IF_CH7_Pos) + +#define DMA_CR_LEN_Pos 0 //ͨܳȣ0Ӧ1ֽڣ4096ֽ +#define DMA_CR_LEN_Msk (0xFFF << DMA_CR_LEN_Pos) +#define DMA_CR_RXEN_Pos 16 +#define DMA_CR_RXEN_Msk (0x01 << DMA_CR_RXEN_Pos) +#define DMA_CR_TXEN_Pos 17 +#define DMA_CR_TXEN_Msk (0x01 << DMA_CR_TXEN_Pos) +#define DMA_CR_AUTORE_Pos 18 //Auto Restart, ͨڴɺǷԶ +#define DMA_CR_AUTORE_Msk (0x01 << DMA_CR_AUTORE_Pos) + +#define DMA_AM_SRCAM_Pos 0 //Address Mode 0 ̶ַ 1 ַ 2 scatter gatherģʽ +#define DMA_AM_SRCAM_Msk (0x03 << DMA_AM_SRCAM_Pos) +#define DMA_AM_DSTAM_Pos 8 +#define DMA_AM_DSTAM_Msk (0x03 << DMA_AM_DSTAM_Pos) +#define DMA_AM_BURST_Pos 16 +#define DMA_AM_BURST_Msk (0x01 << DMA_AM_BURST_Pos) + + + + +typedef struct { + __IO uint32_t CR; //Control Register + + __O uint32_t CMD; //Command Register + + __I uint32_t SR; //Status Register + + __I uint32_t IF; //Interrupt Flagȡ + + __IO uint32_t IE; //Interrupt Enable + + uint32_t RESERVED; + + __IO uint32_t BT0; //Bit Time Register 0 + + __IO uint32_t BT1; //Bit Time Register 1 + + uint32_t RESERVED2[3]; + + __I uint32_t ALC; //Arbitration Lost Capture, ٲöʧ׽ + + __I uint32_t ECC; //Error code capture, 벶׽ + + __IO uint32_t EWLIM; //Error Warning Limit, 󱨾 + + __IO uint32_t RXERR; //RX + + __IO uint32_t TXERR; //TX + + union { + struct { //ڸλʱɶдģʽ²ɷ + __IO uint32_t ACR[4]; //Acceptance Check Register, ռĴ + + __IO uint32_t AMR[4]; //Acceptance Mask Register, μĴӦλд0IDռĴƥ + + uint32_t RESERVED[5]; + } FILTER; + + union { //ģʽ¿ɶдλʱɷ + struct { + __O uint32_t INFO; + + __O uint32_t DATA[12]; + } TXFRAME; + + struct { + __I uint32_t INFO; + + __I uint32_t DATA[12]; + } RXFRAME; + }; + }; + + __I uint32_t RMCNT; //Receive Message Count + + uint32_t RESERVED3[66]; + + struct { //TXFRAMEĶӿ + __I uint32_t INFO; + + __I uint32_t DATA[12]; + } TXFRAME_R; } CAN_TypeDef; -#define CAN_CR_RST_Pos 0 -#define CAN_CR_RST_Msk (0x01 << CAN_CR_RST_Pos) -#define CAN_CR_LOM_Pos 1 //Listen Only Mode -#define CAN_CR_LOM_Msk (0x01 << CAN_CR_LOM_Pos) -#define CAN_CR_STM_Pos 2 //Self Test Mode, 此模式下即使没有应答，CAN控制器也可以成功发送 -#define CAN_CR_STM_Msk (0x01 << CAN_CR_STM_Pos) -#define CAN_CR_AFM_Pos 3 //Acceptance Filter Mode, 1 单个验收滤波器（32位） 0 两个验收滤波器（16位） -#define CAN_CR_AFM_Msk (0x01 << CAN_CR_AFM_Pos) -#define CAN_CR_SLEEP_Pos 4 //写1进入睡眠模式，有总线活动或中断时唤醒并自动清零此位 -#define CAN_CR_SLEEP_Msk (0x01 << CAN_CR_SLEEP_Pos) - -#define CAN_CMD_TXREQ_Pos 0 //Transmission Request -#define CAN_CMD_TXREQ_Msk (0x01 << CAN_CMD_TXREQ_Pos) -#define CAN_CMD_ABTTX_Pos 1 //Abort Transmission -#define CAN_CMD_ABTTX_Msk (0x01 << CAN_CMD_ABTTX_Pos) -#define CAN_CMD_RRB_Pos 2 //Release Receive Buffer -#define CAN_CMD_RRB_Msk (0x01 << CAN_CMD_RRB_Pos) -#define CAN_CMD_CLROV_Pos 3 //Clear Data Overrun -#define CAN_CMD_CLROV_Msk (0x01 << CAN_CMD_CLROV_Pos) -#define CAN_CMD_SRR_Pos 4 //Self Reception Request -#define CAN_CMD_SRR_Msk (0x01 << CAN_CMD_SRR_Pos) - -#define CAN_SR_RXDA_Pos 0 //Receive Data Available，接收FIFO中有完整消息可以读取 -#define CAN_SR_RXDA_Msk (0x01 << CAN_SR_RXDA_Pos) -#define CAN_SR_RXOV_Pos 1 //Receive FIFO Overrun，新接收的信息由于接收FIFO已满而丢掉 -#define CAN_SR_RXOV_Msk (0x01 << CAN_SR_RXOV_Pos) -#define CAN_SR_TXBR_Pos 2 //Transmit Buffer Release，0 正在处理前面的发送，现在不能写新的消息 1 可以写入新的消息发送 -#define CAN_SR_TXBR_Msk (0x01 << CAN_SR_TXBR_Pos) -#define CAN_SR_TXOK_Pos 3 //Transmit OK，successfully completed -#define CAN_SR_TXOK_Msk (0x01 << CAN_SR_TXOK_Pos) -#define CAN_SR_RXBUSY_Pos 4 //Receive Busy，正在接收 -#define CAN_SR_RXBUSY_Msk (0x01 << CAN_SR_RXBUSY_Pos) -#define CAN_SR_TXBUSY_Pos 5 //Transmit Busy，正在发送 -#define CAN_SR_TXBUSY_Msk (0x01 << CAN_SR_TXBUSY_Pos) -#define CAN_SR_ERRWARN_Pos 6 //1 至少一个错误计数器达到 Warning Limit -#define CAN_SR_ERRWARN_Msk (0x01 << CAN_SR_ERRWARN_Pos) -#define CAN_SR_BUSOFF_Pos 7 //1 CAN 控制器处于总线关闭状态，没有参与到总线活动 -#define CAN_SR_BUSOFF_Msk (0x01 << CAN_SR_BUSOFF_Pos) - -#define CAN_IF_RXDA_Pos 0 //IF.RXDA = SR.RXDA & IE.RXDA -#define CAN_IF_RXDA_Msk (0x01 << CAN_IF_RXDA_Pos) -#define CAN_IF_TXBR_Pos 1 //当IE.TXBR=1时，SR.TXBR由0变成1将置位此位 -#define CAN_IF_TXBR_Msk (0x01 << CAN_IF_TXBR_Pos) -#define CAN_IF_ERRWARN_Pos 2 //当IE.ERRWARN=1时，SR.ERRWARN或SR.BUSOFF 0-to-1 或 1-to-0将置位此位 -#define CAN_IF_ERRWARN_Msk (0x01 << CAN_IF_ERRWARN_Pos) -#define CAN_IF_RXOV_Pos 3 //IF.RXOV = SR.RXOV & IE.RXOV -#define CAN_IF_RXOV_Msk (0x01 << CAN_IF_RXOV_Pos) -#define CAN_IF_WKUP_Pos 4 //当IE.WKUP=1时，在睡眠模式下的CAN控制器检测到总线活动时硬件置位 -#define CAN_IF_WKUP_Msk (0x01 << CAN_IF_WKUP_Pos) -#define CAN_IF_ERRPASS_Pos 5 // -#define CAN_IF_ERRPASS_Msk (0x01 << CAN_IF_ERRPASS_Pos) -#define CAN_IF_ARBLOST_Pos 6 //Arbitration Lost，当IE.ARBLOST=1时，CAN控制器丢失仲裁变成接收方时硬件置位 -#define CAN_IF_ARBLOST_Msk (0x01 << CAN_IF_ARBLOST_Pos) -#define CAN_IF_BUSERR_Pos 7 //当IE.BUSERR=1时，CAN控制器检测到总线错误时硬件置位 -#define CAN_IF_BUSERR_Msk (0x01 << CAN_IF_BUSERR_Pos) - -#define CAN_IE_RXDA_Pos 0 -#define CAN_IE_RXDA_Msk (0x01 << CAN_IE_RXDA_Pos) -#define CAN_IE_TXBR_Pos 1 -#define CAN_IE_TXBR_Msk (0x01 << CAN_IE_TXBR_Pos) -#define CAN_IE_ERRWARN_Pos 2 -#define CAN_IE_ERRWARN_Msk (0x01 << CAN_IE_ERRWARN_Pos) -#define CAN_IE_RXOV_Pos 3 -#define CAN_IE_RXOV_Msk (0x01 << CAN_IE_RXOV_Pos) -#define CAN_IE_WKUP_Pos 4 -#define CAN_IE_WKUP_Msk (0x01 << CAN_IE_WKUP_Pos) -#define CAN_IE_ERRPASS_Pos 5 -#define CAN_IE_ERRPASS_Msk (0x01 << CAN_IE_ERRPASS_Pos) -#define CAN_IE_ARBLOST_Pos 6 -#define CAN_IE_ARBLOST_Msk (0x01 << CAN_IE_ARBLOST_Pos) -#define CAN_IE_BUSERR_Pos 7 -#define CAN_IE_BUSERR_Msk (0x01 << CAN_IE_BUSERR_Pos) - -#define CAN_BT0_BRP_Pos 0 //Baud Rate Prescaler，CAN时间单位=2*Tsysclk*(BRP+1) -#define CAN_BT0_BRP_Msk (0x3F << CAN_BT0_BRP_Pos) -#define CAN_BT0_SJW_Pos 6 //Synchronization Jump Width -#define CAN_BT0_SJW_Msk (0x03 << CAN_BT0_SJW_Pos) - -#define CAN_BT1_TSEG1_Pos 0 //t_tseg1 = CAN时间单位 * (TSEG1+1) -#define CAN_BT1_TSEG1_Msk (0x0F << CAN_BT1_TSEG1_Pos) -#define CAN_BT1_TSEG2_Pos 4 //t_tseg2 = CAN时间单位 * (TSEG2+1) -#define CAN_BT1_TSEG2_Msk (0x07 << CAN_BT1_TSEG2_Pos) -#define CAN_BT1_SAM_Pos 7 //采样次数 0: sampled once 1: sampled three times -#define CAN_BT1_SAM_Msk (0x01 << CAN_BT1_SAM_Pos) - -#define CAN_ECC_SEGCODE_Pos 0 //Segment Code -#define CAN_ECC_SEGCODE_Msk (0x1F << CAN_ECC_SEGCODE_Pos) -#define CAN_ECC_DIR_Pos 5 //0 error occurred during transmission 1 during reception -#define CAN_ECC_DIR_Msk (0x01 << CAN_ECC_DIR_Pos) -#define CAN_ECC_ERRCODE_Pos 6 //Error Code：0 Bit error 1 Form error 2 Stuff error 3 other error -#define CAN_ECC_ERRCODE_Msk (0x03 << CAN_ECC_ERRCODE_Pos) - -#define CAN_INFO_DLC_Pos 0 //Data Length Control -#define CAN_INFO_DLC_Msk (0x0F << CAN_INFO_DLC_Pos) -#define CAN_INFO_RTR_Pos 6 //Remote Frame，1 远程帧 0 数据帧 -#define CAN_INFO_RTR_Msk (0x01 << CAN_INFO_RTR_Pos) -#define CAN_INFO_FF_Pos 7 //Frame Format，0 标准帧格式 1 扩展帧格式 -#define CAN_INFO_FF_Msk (0x01 << CAN_INFO_FF_Pos) - -typedef struct -{ - __IO uint32_t IE; //[0] 为0的时候，IF[0]维持为0 - - __IO uint32_t IF; //[0] 当完成指定长度的数据传输时置1，写1清零 - - __IO uint32_t IM; //[0] 当该寄存器为1时，LCDC的中断不会输出给系统的中断控制寄存器 +#define CAN_CR_RST_Pos 0 +#define CAN_CR_RST_Msk (0x01 << CAN_CR_RST_Pos) +#define CAN_CR_LOM_Pos 1 //Listen Only Mode +#define CAN_CR_LOM_Msk (0x01 << CAN_CR_LOM_Pos) +#define CAN_CR_STM_Pos 2 //Self Test Mode, ģʽ¼ʹûӦCANҲԳɹ +#define CAN_CR_STM_Msk (0x01 << CAN_CR_STM_Pos) +#define CAN_CR_AFM_Pos 3 //Acceptance Filter Mode, 1 ˲32λ 0 ˲16λ +#define CAN_CR_AFM_Msk (0x01 << CAN_CR_AFM_Pos) +#define CAN_CR_SLEEP_Pos 4 //д1˯ģʽ߻жʱѲԶλ +#define CAN_CR_SLEEP_Msk (0x01 << CAN_CR_SLEEP_Pos) + +#define CAN_CMD_TXREQ_Pos 0 //Transmission Request +#define CAN_CMD_TXREQ_Msk (0x01 << CAN_CMD_TXREQ_Pos) +#define CAN_CMD_ABTTX_Pos 1 //Abort Transmission +#define CAN_CMD_ABTTX_Msk (0x01 << CAN_CMD_ABTTX_Pos) +#define CAN_CMD_RRB_Pos 2 //Release Receive Buffer +#define CAN_CMD_RRB_Msk (0x01 << CAN_CMD_RRB_Pos) +#define CAN_CMD_CLROV_Pos 3 //Clear Data Overrun +#define CAN_CMD_CLROV_Msk (0x01 << CAN_CMD_CLROV_Pos) +#define CAN_CMD_SRR_Pos 4 //Self Reception Request +#define CAN_CMD_SRR_Msk (0x01 << CAN_CMD_SRR_Pos) + +#define CAN_SR_RXDA_Pos 0 //Receive Data AvailableFIFOϢԶȡ +#define CAN_SR_RXDA_Msk (0x01 << CAN_SR_RXDA_Pos) +#define CAN_SR_RXOV_Pos 1 //Receive FIFO Overrun½յϢڽFIFO +#define CAN_SR_RXOV_Msk (0x01 << CAN_SR_RXOV_Pos) +#define CAN_SR_TXBR_Pos 2 //Transmit Buffer Release0 ڴǰķͣڲдµϢ 1 дµϢ +#define CAN_SR_TXBR_Msk (0x01 << CAN_SR_TXBR_Pos) +#define CAN_SR_TXOK_Pos 3 //Transmit OKsuccessfully completed +#define CAN_SR_TXOK_Msk (0x01 << CAN_SR_TXOK_Pos) +#define CAN_SR_RXBUSY_Pos 4 //Receive Busyڽ +#define CAN_SR_RXBUSY_Msk (0x01 << CAN_SR_RXBUSY_Pos) +#define CAN_SR_TXBUSY_Pos 5 //Transmit Busyڷ +#define CAN_SR_TXBUSY_Msk (0x01 << CAN_SR_TXBUSY_Pos) +#define CAN_SR_ERRWARN_Pos 6 //1 һﵽ Warning Limit +#define CAN_SR_ERRWARN_Msk (0x01 << CAN_SR_ERRWARN_Pos) +#define CAN_SR_BUSOFF_Pos 7 //1 CAN ߹ر״̬ûв뵽߻ +#define CAN_SR_BUSOFF_Msk (0x01 << CAN_SR_BUSOFF_Pos) + +#define CAN_IF_RXDA_Pos 0 //IF.RXDA = SR.RXDA & IE.RXDA +#define CAN_IF_RXDA_Msk (0x01 << CAN_IF_RXDA_Pos) +#define CAN_IF_TXBR_Pos 1 //IE.TXBR=1ʱSR.TXBR01λλ +#define CAN_IF_TXBR_Msk (0x01 << CAN_IF_TXBR_Pos) +#define CAN_IF_ERRWARN_Pos 2 //IE.ERRWARN=1ʱSR.ERRWARNSR.BUSOFF 0-to-1 1-to-0λλ +#define CAN_IF_ERRWARN_Msk (0x01 << CAN_IF_ERRWARN_Pos) +#define CAN_IF_RXOV_Pos 3 //IF.RXOV = SR.RXOV & IE.RXOV +#define CAN_IF_RXOV_Msk (0x01 << CAN_IF_RXOV_Pos) +#define CAN_IF_WKUP_Pos 4 //IE.WKUP=1ʱ˯ģʽµCAN⵽߻ʱӲλ +#define CAN_IF_WKUP_Msk (0x01 << CAN_IF_WKUP_Pos) +#define CAN_IF_ERRPASS_Pos 5 // +#define CAN_IF_ERRPASS_Msk (0x01 << CAN_IF_ERRPASS_Pos) +#define CAN_IF_ARBLOST_Pos 6 //Arbitration LostIE.ARBLOST=1ʱCANʧٲñɽշʱӲλ +#define CAN_IF_ARBLOST_Msk (0x01 << CAN_IF_ARBLOST_Pos) +#define CAN_IF_BUSERR_Pos 7 //IE.BUSERR=1ʱCAN⵽ߴʱӲλ +#define CAN_IF_BUSERR_Msk (0x01 << CAN_IF_BUSERR_Pos) + +#define CAN_IE_RXDA_Pos 0 +#define CAN_IE_RXDA_Msk (0x01 << CAN_IE_RXDA_Pos) +#define CAN_IE_TXBR_Pos 1 +#define CAN_IE_TXBR_Msk (0x01 << CAN_IE_TXBR_Pos) +#define CAN_IE_ERRWARN_Pos 2 +#define CAN_IE_ERRWARN_Msk (0x01 << CAN_IE_ERRWARN_Pos) +#define CAN_IE_RXOV_Pos 3 +#define CAN_IE_RXOV_Msk (0x01 << CAN_IE_RXOV_Pos) +#define CAN_IE_WKUP_Pos 4 +#define CAN_IE_WKUP_Msk (0x01 << CAN_IE_WKUP_Pos) +#define CAN_IE_ERRPASS_Pos 5 +#define CAN_IE_ERRPASS_Msk (0x01 << CAN_IE_ERRPASS_Pos) +#define CAN_IE_ARBLOST_Pos 6 +#define CAN_IE_ARBLOST_Msk (0x01 << CAN_IE_ARBLOST_Pos) +#define CAN_IE_BUSERR_Pos 7 +#define CAN_IE_BUSERR_Msk (0x01 << CAN_IE_BUSERR_Pos) + +#define CAN_BT0_BRP_Pos 0 //Baud Rate PrescalerCANʱ䵥λ=2*Tsysclk*(BRP+1) +#define CAN_BT0_BRP_Msk (0x3F << CAN_BT0_BRP_Pos) +#define CAN_BT0_SJW_Pos 6 //Synchronization Jump Width +#define CAN_BT0_SJW_Msk (0x03 << CAN_BT0_SJW_Pos) + +#define CAN_BT1_TSEG1_Pos 0 //t_tseg1 = CANʱ䵥λ * (TSEG1+1) +#define CAN_BT1_TSEG1_Msk (0x0F << CAN_BT1_TSEG1_Pos) +#define CAN_BT1_TSEG2_Pos 4 //t_tseg2 = CANʱ䵥λ * (TSEG2+1) +#define CAN_BT1_TSEG2_Msk (0x07 << CAN_BT1_TSEG2_Pos) +#define CAN_BT1_SAM_Pos 7 // 0: sampled once 1: sampled three times +#define CAN_BT1_SAM_Msk (0x01 << CAN_BT1_SAM_Pos) + +#define CAN_ECC_SEGCODE_Pos 0 //Segment Code +#define CAN_ECC_SEGCODE_Msk (0x1F << CAN_ECC_SEGCODE_Pos) +#define CAN_ECC_DIR_Pos 5 //0 error occurred during transmission 1 during reception +#define CAN_ECC_DIR_Msk (0x01 << CAN_ECC_DIR_Pos) +#define CAN_ECC_ERRCODE_Pos 6 //Error Code0 Bit error 1 Form error 2 Stuff error 3 other error +#define CAN_ECC_ERRCODE_Msk (0x03 << CAN_ECC_ERRCODE_Pos) + +#define CAN_INFO_DLC_Pos 0 //Data Length Control +#define CAN_INFO_DLC_Msk (0x0F << CAN_INFO_DLC_Pos) +#define CAN_INFO_RTR_Pos 6 //Remote Frame1 Զ֡ 0 ֡ +#define CAN_INFO_RTR_Msk (0x01 << CAN_INFO_RTR_Pos) +#define CAN_INFO_FF_Pos 7 //Frame Format0 ׼֡ʽ 1 չ֡ʽ +#define CAN_INFO_FF_Msk (0x01 << CAN_INFO_FF_Pos) + + + + +typedef struct { + __IO uint32_t IE; //[0] Ϊ0ʱIF[0]άΪ0 + + __IO uint32_t IF; //[0] ָȵݴʱ1д1 + + __IO uint32_t IM; //[0] üĴΪ1ʱLCDCжϲϵͳжϿƼĴ + __IO uint32_t START; - - __IO uint32_t SRCADDR; //数据源地址寄存器，必须字对齐（即地址的低2位必须是0） - + + __IO uint32_t SRCADDR; //ԴַĴֶ루ַĵ2λ0 + __IO uint32_t CR0; - + __IO uint32_t CR1; - - __IO uint32_t PRECMDV; //在MPU接口中，发送数据前，RS拉低的那一拍，数据总线上的值 + + __IO uint32_t PRECMDV; //MPUӿУǰRS͵һģϵֵ } LCD_TypeDef; -#define LCD_START_MPUEN_Pos 0 //0 RGB接口 1 MPU接口 -#define LCD_START_MPUEN_Msk (0x01 << LCD_START_MPUEN_Pos) -#define LCD_START_GO_Pos 1 //写1开始传输数据，数据传输结束后自动清零 -#define LCD_START_GO_Msk (0x01 << LCD_START_GO_Pos) -#define LCD_START_BURST_Pos 2 -#define LCD_START_BURST_Msk (0x01 << LCD_START_BURST_Pos) - -#define LCD_CR0_VPIX_Pos 0 //当portrait为0时，表示垂直方向的像素个数，0表示1个，最大为767 \ - //当portrait为1时，表示水平方向的像素个数，0表示1个，最大为767 -#define LCD_CR0_VPIX_Msk (0x3FF << LCD_CR0_VPIX_Pos) -#define LCD_CR0_HPIX_Pos 10 //当portrait为0时，表示水平方向的像素个数，0表示1个，最大为1023 \ - //当portrait为1时，表示垂直方向的像素个数，0表示1个，最大为1023 -#define LCD_CR0_HPIX_Msk (0x3FF << LCD_CR0_HPIX_Pos) -#define LCD_CR0_DCLK_Pos 20 //0 DOTCLK一直翻转 1 DOTCLK在空闲时停在1 -#define LCD_CR0_DCLK_Msk (0x01 << LCD_CR0_DCLK_Pos) -#define LCD_CR0_HLOW_Pos 21 //输出HSYNC低电平持续多少个DOTCLK周期，0表示1个周期 -#define LCD_CR0_HLOW_Msk (0x03 << LCD_CR0_HLOW_Pos) - -#define LCD_CR1_VFP_Pos 1 -#define LCD_CR1_VFP_Msk (0x07 << LCD_CR1_VFP_Pos) -#define LCD_CR1_VBP_Pos 4 -#define LCD_CR1_VBP_Msk (0x1F << LCD_CR1_VBP_Pos) -#define LCD_CR1_HFP_Pos 9 -#define LCD_CR1_HFP_Msk (0x1F << LCD_CR1_HFP_Pos) -#define LCD_CR1_HBP_Pos 14 -#define LCD_CR1_HBP_Msk (0x7F << LCD_CR1_HBP_Pos) -#define LCD_CR1_DCLKDIV_Pos 21 //DOTCLK相对于模块时钟的分频比，0表示2分频，1表示4分频 ... -#define LCD_CR1_DCLKDIV_Msk (0x1F << LCD_CR1_DCLKDIV_Pos) -#define LCD_CR1_DCLKINV_Pos 26 //1 输出DOTCLK反向，应用于用DOTCLK下降沿采样数据的屏 -#define LCD_CR1_DCLKINV_Msk (0x01 << LCD_CR1_DCLKINV_Pos) - -typedef struct -{ - __IO uint32_t DMA_MEM_ADDR; - __IO uint32_t BLK; //Block Size and Count +#define LCD_START_GO_Pos 1 //д1ʼݣݴԶ +#define LCD_START_GO_Msk (0x01 << LCD_START_GO_Pos) +#define LCD_START_BURST_Pos 2 +#define LCD_START_BURST_Msk (0x01 << LCD_START_BURST_Pos) - __IO uint32_t ARG; //Argument +#define LCD_CR0_VPIX_Pos 0 //portraitΪ0ʱʾֱظ0ʾ1Ϊ767 + //portraitΪ1ʱʾˮƽظ0ʾ1Ϊ767 +#define LCD_CR0_VPIX_Msk (0x3FF << LCD_CR0_VPIX_Pos) +#define LCD_CR0_HPIX_Pos 10 //portraitΪ0ʱʾˮƽظ0ʾ1Ϊ1023 + //portraitΪ1ʱʾֱظ0ʾ1Ϊ1023 +#define LCD_CR0_HPIX_Msk (0x3FF << LCD_CR0_HPIX_Pos) +#define LCD_CR0_DCLK_Pos 20 //0 DOTCLKһֱת 1 DOTCLKڿʱͣ1 +#define LCD_CR0_DCLK_Msk (0x01 << LCD_CR0_DCLK_Pos) +#define LCD_CR0_HLOW_Pos 21 //HSYNC͵ƽٸDOTCLKڣ0ʾ1 +#define LCD_CR0_HLOW_Msk (0x03 << LCD_CR0_HLOW_Pos) - __IO uint32_t CMD; //Command +#define LCD_CR1_VFP_Pos 1 +#define LCD_CR1_VFP_Msk (0x07 << LCD_CR1_VFP_Pos) +#define LCD_CR1_VBP_Pos 4 +#define LCD_CR1_VBP_Msk (0x1F << LCD_CR1_VBP_Pos) +#define LCD_CR1_HFP_Pos 9 +#define LCD_CR1_HFP_Msk (0x1F << LCD_CR1_HFP_Pos) +#define LCD_CR1_HBP_Pos 14 +#define LCD_CR1_HBP_Msk (0x7F << LCD_CR1_HBP_Pos) +#define LCD_CR1_DCLKDIV_Pos 21 //DOTCLKģʱӵķƵȣ0ʾ2Ƶ1ʾ4Ƶ ... +#define LCD_CR1_DCLKDIV_Msk (0x1F << LCD_CR1_DCLKDIV_Pos) +#define LCD_CR1_DCLKINV_Pos 26 //1 DOTCLKӦDOTCLK½زݵ +#define LCD_CR1_DCLKINV_Msk (0x01 << LCD_CR1_DCLKINV_Pos) - __IO uint32_t RESP[4]; //Response - __IO uint32_t DATA; - __IO uint32_t STAT; +typedef struct { + __IO uint32_t DMA_MEM_ADDR; + + __IO uint32_t BLK; //Block Size and Count + + __IO uint32_t ARG; //Argument + + __IO uint32_t CMD; //Command + + __IO uint32_t RESP[4]; //Response + + __IO uint32_t DATA; + + __IO uint32_t STAT; + __IO uint32_t CR1; - + __IO uint32_t CR2; - + __IO uint32_t IF; - - __IO uint32_t IFE; //Interrupt Flag Enable - - __IO uint32_t IE; //Interrupt Enalbe - + + __IO uint32_t IFE; //Interrupt Flag Enable + + __IO uint32_t IE; //Interrupt Enalbe + __IO uint32_t CMD12ERR; - + __IO uint32_t INFO; - + __IO uint32_t MAXCURR; } SDIO_TypeDef; -#define SDIO_BLK_SIZE_Pos 0 //0x200 512字节 0x400 1024字节 0x800 2048字节 -#define SDIO_BLK_SIZE_Msk (0xFFF << SDIO_BLK_SIZE_Pos) -#define SDIO_BLK_COUNT_Pos 16 //0 Stop Transfer 1 1块 2 2块 ... ... -#define SDIO_BLK_COUNT_Msk (0xFFF << SDIO_BLK_COUNT_Pos) - -#define SDIO_CMD_DMAEN_Pos 0 -#define SDIO_CMD_DMAEN_Msk (0x01 << SDIO_CMD_DMAEN_Pos) -#define SDIO_CMD_BLKCNTEN_Pos 1 -#define SDIO_CMD_BLKCNTEN_Msk (0x01 << SDIO_CMD_BLKCNTEN_Pos) -#define SDIO_CMD_AUTOCMD12_Pos 2 -#define SDIO_CMD_AUTOCMD12_Msk (0x01 << SDIO_CMD_AUTOCMD12_Pos) -#define SDIO_CMD_DIRREAD_Pos 4 //0 Write, Host to Card 1 Read, Card to Host -#define SDIO_CMD_DIRREAD_Msk (0x01 << SDIO_CMD_DIRREAD_Pos) -#define SDIO_CMD_MULTBLK_Pos 5 //0 Single Block 1 Multiple Block -#define SDIO_CMD_MULTBLK_Msk (0x01 << SDIO_CMD_MULTBLK_Pos) -#define SDIO_CMD_RESPTYPE_Pos 16 //响应类型，0 无响应 1 136位响应 2 48位响应 3 48位响应，Busy after response -#define SDIO_CMD_RESPTYPE_Msk (0x03 << SDIO_CMD_RESPTYPE_Pos) -#define SDIO_CMD_CRCCHECK_Pos 19 //Command CRC Check Enable -#define SDIO_CMD_CRCCHECK_Msk (0x01 << SDIO_CMD_CRCCHECK_Pos) -#define SDIO_CMD_IDXCHECK_Pos 20 //Command Index Check Enable -#define SDIO_CMD_IDXCHECK_Msk (0x01 << SDIO_CMD_IDXCHECK_Pos) -#define SDIO_CMD_HAVEDATA_Pos 21 //0 No Data Present 1 Data Present -#define SDIO_CMD_HAVEDATA_Msk (0x01 << SDIO_CMD_HAVEDATA_Pos) -#define SDIO_CMD_CMDTYPE_Pos 22 //0 NORMAL 1 SUSPEND 2 RESUME 3 ABORT -#define SDIO_CMD_CMDTYPE_Msk (0x03 << SDIO_CMD_CMDTYPE_Pos) -#define SDIO_CMD_CMDINDX_Pos 24 //Command Index，CMD0-63、ACMD0-63 -#define SDIO_CMD_CMDINDX_Msk (0x3F << SDIO_CMD_CMDINDX_Pos) - -#define SDIO_CR1_4BIT_Pos 1 //1 4 bit mode 0 1 bit mode -#define SDIO_CR1_4BIT_Msk (0x01 << SDIO_CR1_4BIT_Pos) -#define SDIO_CR1_8BIT_Pos 5 //1 8 bit mode is selected 0 8 bit mode is not selected -#define SDIO_CR1_8BIT_Msk (0x01 << SDIO_CR1_8BIT_Pos) -#define SDIO_CR1_CDBIT_Pos 6 //0 No Card 1 Card Inserted -#define SDIO_CR1_CDBIT_Msk (0x01 << SDIO_CR1_CDBIT_Pos) -#define SDIO_CR1_CDSRC_Pos 7 //Card Detect Source, 1 CR1.CDBIT位 0 SD_Detect引脚 -#define SDIO_CR1_CDSRC_Msk (0x01 << SDIO_CR1_CDSRC_Pos) -#define SDIO_CR1_PWRON_Pos 8 //1 Power on 0 Power off -#define SDIO_CR1_PWRON_Msk (0x01 << SDIO_CR1_PWRON_Pos) -#define SDIO_CR1_VOLT_Pos 9 //7 3.3V 6 3.0V 5 1.8V -#define SDIO_CR1_VOLT_Msk (0x07 << SDIO_CR1_VOLT_Pos) - -#define SDIO_CR2_CLKEN_Pos 0 //Internal Clock Enable -#define SDIO_CR2_CLKEN_Msk (0x01 << SDIO_CR2_CLKEN_Pos) -#define SDIO_CR2_CLKRDY_Pos 1 //Internal Clock Stable/Ready -#define SDIO_CR2_CLKRDY_Msk (0x01 << SDIO_CR2_CLKRDY_Pos) -#define SDIO_CR2_SDCLKEN_Pos 2 //SDCLK Enable -#define SDIO_CR2_SDCLKEN_Msk (0x01 << SDIO_CR2_SDCLKEN_Pos) -#define SDIO_CR2_SDCLKDIV_Pos 8 //SDCLK Frequency Div, 0x00 不分频 0x01 2分频 0x02 4分频 0x04 8分频 0x08 16分频 ... 0x80 256分频 -#define SDIO_CR2_SDCLKDIV_Msk (0xFF << SDIO_CR2_SDCLKDIV_Pos) -#define SDIO_CR2_TIMEOUT_Pos 16 //0 TMCLK*2^13 1 TMCLK*2^14 ... 14 TMCLK*2^27 -#define SDIO_CR2_TIMEOUT_Msk (0x0F << SDIO_CR2_TIMEOUT_Pos) -#define SDIO_CR2_RSTALL_Pos 24 //Software Reset for All -#define SDIO_CR2_RSTALL_Msk (0x01 << SDIO_CR2_RSTALL_Pos) -#define SDIO_CR2_RSTCMD_Pos 25 //Software Reset for CMD Line -#define SDIO_CR2_RSTCMD_Msk (0x01 << SDIO_CR2_RSTCMD_Pos) -#define SDIO_CR2_RSTDAT_Pos 26 //Software Reset for DAT Line -#define SDIO_CR2_RSTDAT_Msk (0x01 << SDIO_CR2_RSTDAT_Pos) - -#define SDIO_IF_CMDDONE_Pos 0 -#define SDIO_IF_CMDDONE_Msk (0x01 << SDIO_IF_CMDDONE_Pos) -#define SDIO_IF_TRXDONE_Pos 1 -#define SDIO_IF_TRXDONE_Msk (0x01 << SDIO_IF_TRXDONE_Pos) -#define SDIO_IF_BLKGAP_Pos 2 -#define SDIO_IF_BLKGAP_Msk (0x01 << SDIO_IF_BLKGAP_Pos) -#define SDIO_IF_DMADONE_Pos 3 -#define SDIO_IF_DMADONE_Msk (0x01 << SDIO_IF_DMADONE_Pos) -#define SDIO_IF_BUFWRRDY_Pos 4 -#define SDIO_IF_BUFWRRDY_Msk (0x01 << SDIO_IF_BUFWRRDY_Pos) -#define SDIO_IF_BUFRDRDY_Pos 5 -#define SDIO_IF_BUFRDRDY_Msk (0x01 << SDIO_IF_BUFRDRDY_Pos) -#define SDIO_IF_CARDINSR_Pos 6 -#define SDIO_IF_CARDINSR_Msk (0x01 << SDIO_IF_CARDINSR_Pos) -#define SDIO_IF_CARDRMOV_Pos 7 -#define SDIO_IF_CARDRMOV_Msk (0x01 << SDIO_IF_CARDRMOV_Pos) -#define SDIO_IF_CARD_Pos 8 -#define SDIO_IF_CARD_Msk (0x01 << SDIO_IF_CARD_Pos) -#define SDIO_IF_ERROR_Pos 15 -#define SDIO_IF_ERROR_Msk (0x01 << SDIO_IF_ERROR_Pos) -#define SDIO_IF_CMDTIMEOUT_Pos 16 -#define SDIO_IF_CMDTIMEOUT_Msk (0x01 << SDIO_IF_CMDTIMEOUT_Pos) -#define SDIO_IF_CMDCRCERR_Pos 17 -#define SDIO_IF_CMDCRCERR_Msk (0x01 << SDIO_IF_CMDCRCERR_Pos) -#define SDIO_IF_CMDENDERR_Pos 18 -#define SDIO_IF_CMDENDERR_Msk (0x01 << SDIO_IF_CMDENDCERR_Pos) -#define SDIO_IF_CMDIDXERR_Pos 19 -#define SDIO_IF_CMDIDXERR_Msk (0x01 << SDIO_IF_CMDIDXCERR_Pos) -#define SDIO_IF_DATTIMEOUT_Pos 20 -#define SDIO_IF_DATTIMEOUT_Msk (0x01 << SDIO_IF_DATTIMEOUT_Pos) -#define SDIO_IF_DATCRCERR_Pos 21 -#define SDIO_IF_DATCRCERR_Msk (0x01 << SDIO_IF_DATCRCERR_Pos) -#define SDIO_IF_DATENDERR_Pos 22 -#define SDIO_IF_DATENDERR_Msk (0x01 << SDIO_IF_DATENDCERR_Pos) -#define SDIO_IF_CURLIMERR_Pos 23 -#define SDIO_IF_CURLIMERR_Msk (0x01 << SDIO_IF_CURLIMERR_Pos) -#define SDIO_IF_CMD12ERR_Pos 24 -#define SDIO_IF_CMD12ERR_Msk (0x01 << SDIO_IF_CMD12ERR_Pos) -#define SDIO_IF_DMAERR_Pos 25 -#define SDIO_IF_DMAERR_Msk (0x01 << SDIO_IF_DMAERR_Pos) -#define SDIO_IF_RESPERR_Pos 28 -#define SDIO_IF_RESPERR_Msk (0x01 << SDIO_IF_RESPERR_Pos) - -#define SDIO_IE_CMDDONE_Pos 0 //Command Complete Status Enable -#define SDIO_IE_CMDDONE_Msk (0x01 << SDIO_IE_CMDDONE_Pos) -#define SDIO_IE_TRXDONE_Pos 1 //Transfer Complete Status Enable -#define SDIO_IE_TRXDONE_Msk (0x01 << SDIO_IE_TRXDONE_Pos) -#define SDIO_IE_BLKGAP_Pos 2 //Block Gap Event Status Enable -#define SDIO_IE_BLKGAP_Msk (0x01 << SDIO_IE_BLKGAP_Pos) -#define SDIO_IE_DMADONE_Pos 3 //DMA Interrupt Status Enable -#define SDIO_IE_DMADONE_Msk (0x01 << SDIO_IE_DMADONE_Pos) -#define SDIO_IE_BUFWRRDY_Pos 4 //Buffer Write Ready Status Enable -#define SDIO_IE_BUFWRRDY_Msk (0x01 << SDIO_IE_BUFWRRDY_Pos) -#define SDIO_IE_BUFRDRDY_Pos 5 //Buffer Read Ready Status Enable -#define SDIO_IE_BUFRDRDY_Msk (0x01 << SDIO_IE_BUFRDRDY_Pos) -#define SDIO_IE_CARDINSR_Pos 6 //Card Insertion Status Enable -#define SDIO_IE_CARDINSR_Msk (0x01 << SDIO_IE_CARDINSR_Pos) -#define SDIO_IE_CARDRMOV_Pos 7 //Card Removal Status Enable -#define SDIO_IE_CARDRMOV_Msk (0x01 << SDIO_IE_CARDRMOV_Pos) -#define SDIO_IE_CARD_Pos 8 -#define SDIO_IE_CARD_Msk (0x01 << SDIO_IE_CARD_Pos) -#define SDIO_IE_CMDTIMEOUT_Pos 16 //Command Timeout Error Status Enable -#define SDIO_IE_CMDTIMEOUT_Msk (0x01 << SDIO_IE_CMDTIMEOUT_Pos) -#define SDIO_IE_CMDCRCERR_Pos 17 //Command CRC Error Status Enable -#define SDIO_IE_CMDCRCERR_Msk (0x01 << SDIO_IE_CMDCRCERR_Pos) -#define SDIO_IE_CMDENDERR_Pos 18 //Command End Bit Error Status Enable -#define SDIO_IE_CMDENDERR_Msk (0x01 << SDIO_IE_CMDENDCERR_Pos) -#define SDIO_IE_CMDIDXERR_Pos 19 //Command Index Error Status Enable -#define SDIO_IE_CMDIDXERR_Msk (0x01 << SDIO_IE_CMDIDXCERR_Pos) -#define SDIO_IE_DATTIMEOUT_Pos 20 //Data Timeout Error Status Enable -#define SDIO_IE_DATTIMEOUT_Msk (0x01 << SDIO_IE_DATTIMEOUT_Pos) -#define SDIO_IE_DATCRCERR_Pos 21 //Data CRC Error Status Enable -#define SDIO_IE_DATCRCERR_Msk (0x01 << SDIO_IE_DATCRCERR_Pos) -#define SDIO_IE_DATENDERR_Pos 22 //Data End Bit Error Status Enable -#define SDIO_IE_DATENDERR_Msk (0x01 << SDIO_IE_DATENDCERR_Pos) -#define SDIO_IE_CURLIMERR_Pos 23 //Current Limit Error Status Enable -#define SDIO_IE_CURLIMERR_Msk (0x01 << SDIO_IE_CURLIMERR_Pos) -#define SDIO_IE_CMD12ERR_Pos 24 //Auto CMD12 Error Status Enable -#define SDIO_IE_CMD12ERR_Msk (0x01 << SDIO_IE_CMD12ERR_Pos) -#define SDIO_IE_DMAERR_Pos 25 //ADMA Error Status Enable -#define SDIO_IE_DMAERR_Msk (0x01 << SDIO_IE_DMAERR_Pos) -#define SDIO_IE_RESPERR_Pos 28 //Target Response Error Status Enable -#define SDIO_IE_RESPERR_Msk (0x01 << SDIO_IE_RESPERR_Pos) - -#define SDIO_IM_CMDDONE_Pos 0 -#define SDIO_IM_CMDDONE_Msk (0x01 << SDIO_IM_CMDDONE_Pos) -#define SDIO_IM_TRXDONE_Pos 1 -#define SDIO_IM_TRXDONE_Msk (0x01 << SDIO_IM_TRXDONE_Pos) -#define SDIO_IM_BLKGAP_Pos 2 -#define SDIO_IM_BLKGAP_Msk (0x01 << SDIO_IM_BLKGAP_Pos) -#define SDIO_IM_DMADONE_Pos 3 -#define SDIO_IM_DMADONE_Msk (0x01 << SDIO_IM_DMADONE_Pos) -#define SDIO_IM_BUFWRRDY_Pos 4 -#define SDIO_IM_BUFWRRDY_Msk (0x01 << SDIO_IM_BUFWRRDY_Pos) -#define SDIO_IM_BUFRDRDY_Pos 5 -#define SDIO_IM_BUFRDRDY_Msk (0x01 << SDIO_IM_BUFRDRDY_Pos) -#define SDIO_IM_CARDINSR_Pos 6 -#define SDIO_IM_CARDINSR_Msk (0x01 << SDIO_IM_CARDINSR_Pos) -#define SDIO_IM_CARDRMOV_Pos 7 -#define SDIO_IM_CARDRMOV_Msk (0x01 << SDIO_IM_CARDRMOV_Pos) -#define SDIO_IM_CARD_Pos 8 -#define SDIO_IM_CARD_Msk (0x01 << SDIO_IM_CARD_Pos) -#define SDIO_IM_CMDTIMEOUT_Pos 16 -#define SDIO_IM_CMDTIMEOUT_Msk (0x01 << SDIO_IM_CMDTIMEOUT_Pos) -#define SDIO_IM_CMDCRCERR_Pos 17 -#define SDIO_IM_CMDCRCERR_Msk (0x01 << SDIO_IM_CMDCRCERR_Pos) -#define SDIO_IM_CMDENDERR_Pos 18 -#define SDIO_IM_CMDENDERR_Msk (0x01 << SDIO_IM_CMDENDCERR_Pos) -#define SDIO_IM_CMDIDXERR_Pos 19 -#define SDIO_IM_CMDIDXERR_Msk (0x01 << SDIO_IM_CMDIDXCERR_Pos) -#define SDIO_IM_DATTIMEOUT_Pos 20 -#define SDIO_IM_DATTIMEOUT_Msk (0x01 << SDIO_IM_DATTIMEOUT_Pos) -#define SDIO_IM_DATCRCERR_Pos 21 -#define SDIO_IM_DATCRCERR_Msk (0x01 << SDIO_IM_DATCRCERR_Pos) -#define SDIO_IM_DATENDERR_Pos 22 -#define SDIO_IM_DATENDERR_Msk (0x01 << SDIO_IM_DATENDCERR_Pos) -#define SDIO_IM_CURLIMERR_Pos 23 -#define SDIO_IM_CURLIMERR_Msk (0x01 << SDIO_IM_CURLIMERR_Pos) -#define SDIO_IM_CMD12ERR_Pos 24 -#define SDIO_IM_CMD12ERR_Msk (0x01 << SDIO_IM_CMD12ERR_Pos) -#define SDIO_IM_DMAERR_Pos 25 -#define SDIO_IM_DMAERR_Msk (0x01 << SDIO_IM_DMAERR_Pos) -#define SDIO_IM_RESPERR_Pos 28 -#define SDIO_IM_RESPERR_Msk (0x01 << SDIO_IM_RESPERR_Pos) - -typedef struct -{ - __IO uint32_t DATA; - __IO uint32_t ADDR; - __IO uint32_t _ERASE; //和mmcsd_cmd.h(59)名字冲突，这里修改为_ERASE - __IO uint32_t CACHE; - __IO uint32_t CFG0; - __IO uint32_t CFG1; - __IO uint32_t CFG2; - __IO uint32_t CFG3; - __IO uint32_t STAT; + +#define SDIO_BLK_SIZE_Pos 0 //0x200 512ֽ 0x400 1024ֽ 0x800 2048ֽ +#define SDIO_BLK_SIZE_Msk (0xFFF << SDIO_BLK_SIZE_Pos) +#define SDIO_BLK_COUNT_Pos 16 //0 Stop Transfer 1 1 2 2 ... ... +#define SDIO_BLK_COUNT_Msk (0xFFF << SDIO_BLK_COUNT_Pos) + +#define SDIO_CMD_DMAEN_Pos 0 +#define SDIO_CMD_DMAEN_Msk (0x01 << SDIO_CMD_DMAEN_Pos) +#define SDIO_CMD_BLKCNTEN_Pos 1 +#define SDIO_CMD_BLKCNTEN_Msk (0x01 << SDIO_CMD_BLKCNTEN_Pos) +#define SDIO_CMD_AUTOCMD12_Pos 2 +#define SDIO_CMD_AUTOCMD12_Msk (0x01 << SDIO_CMD_AUTOCMD12_Pos) +#define SDIO_CMD_DIRREAD_Pos 4 //0 Write, Host to Card 1 Read, Card to Host +#define SDIO_CMD_DIRREAD_Msk (0x01 << SDIO_CMD_DIRREAD_Pos) +#define SDIO_CMD_MULTBLK_Pos 5 //0 Single Block 1 Multiple Block +#define SDIO_CMD_MULTBLK_Msk (0x01 << SDIO_CMD_MULTBLK_Pos) +#define SDIO_CMD_RESPTYPE_Pos 16 //Ӧͣ0 Ӧ 1 136λӦ 2 48λӦ 3 48λӦBusy after response +#define SDIO_CMD_RESPTYPE_Msk (0x03 << SDIO_CMD_RESPTYPE_Pos) +#define SDIO_CMD_CRCCHECK_Pos 19 //Command CRC Check Enable +#define SDIO_CMD_CRCCHECK_Msk (0x01 << SDIO_CMD_CRCCHECK_Pos) +#define SDIO_CMD_IDXCHECK_Pos 20 //Command Index Check Enable +#define SDIO_CMD_IDXCHECK_Msk (0x01 << SDIO_CMD_IDXCHECK_Pos) +#define SDIO_CMD_HAVEDATA_Pos 21 //0 No Data Present 1 Data Present +#define SDIO_CMD_HAVEDATA_Msk (0x01 << SDIO_CMD_HAVEDATA_Pos) +#define SDIO_CMD_CMDTYPE_Pos 22 //0 NORMAL 1 SUSPEND 2 RESUME 3 ABORT +#define SDIO_CMD_CMDTYPE_Msk (0x03 << SDIO_CMD_CMDTYPE_Pos) +#define SDIO_CMD_CMDINDX_Pos 24 //Command IndexCMD0-63ACMD0-63 +#define SDIO_CMD_CMDINDX_Msk (0x3F << SDIO_CMD_CMDINDX_Pos) + +#define SDIO_CR1_4BIT_Pos 1 //1 4 bit mode 0 1 bit mode +#define SDIO_CR1_4BIT_Msk (0x01 << SDIO_CR1_4BIT_Pos) +#define SDIO_CR1_8BIT_Pos 5 //1 8 bit mode is selected 0 8 bit mode is not selected +#define SDIO_CR1_8BIT_Msk (0x01 << SDIO_CR1_8BIT_Pos) +#define SDIO_CR1_CDBIT_Pos 6 //0 No Card 1 Card Inserted +#define SDIO_CR1_CDBIT_Msk (0x01 << SDIO_CR1_CDBIT_Pos) +#define SDIO_CR1_CDSRC_Pos 7 //Card Detect Source, 1 CR1.CDBITλ 0 SD_Detect +#define SDIO_CR1_CDSRC_Msk (0x01 << SDIO_CR1_CDSRC_Pos) +#define SDIO_CR1_PWRON_Pos 8 //1 Power on 0 Power off +#define SDIO_CR1_PWRON_Msk (0x01 << SDIO_CR1_PWRON_Pos) +#define SDIO_CR1_VOLT_Pos 9 //7 3.3V 6 3.0V 5 1.8V +#define SDIO_CR1_VOLT_Msk (0x07 << SDIO_CR1_VOLT_Pos) + +#define SDIO_CR2_CLKEN_Pos 0 //Internal Clock Enable +#define SDIO_CR2_CLKEN_Msk (0x01 << SDIO_CR2_CLKEN_Pos) +#define SDIO_CR2_CLKRDY_Pos 1 //Internal Clock Stable/Ready +#define SDIO_CR2_CLKRDY_Msk (0x01 << SDIO_CR2_CLKRDY_Pos) +#define SDIO_CR2_SDCLKEN_Pos 2 //SDCLK Enable +#define SDIO_CR2_SDCLKEN_Msk (0x01 << SDIO_CR2_SDCLKEN_Pos) +#define SDIO_CR2_SDCLKDIV_Pos 8 //SDCLK Frequency Div, 0x00 Ƶ 0x01 2Ƶ 0x02 4Ƶ 0x04 8Ƶ 0x08 16Ƶ ... 0x80 256Ƶ +#define SDIO_CR2_SDCLKDIV_Msk (0xFF << SDIO_CR2_SDCLKDIV_Pos) +#define SDIO_CR2_TIMEOUT_Pos 16 //0 TMCLK*2^13 1 TMCLK*2^14 ... 14 TMCLK*2^27 +#define SDIO_CR2_TIMEOUT_Msk (0x0F << SDIO_CR2_TIMEOUT_Pos) +#define SDIO_CR2_RSTALL_Pos 24 //Software Reset for All +#define SDIO_CR2_RSTALL_Msk (0x01 << SDIO_CR2_RSTALL_Pos) +#define SDIO_CR2_RSTCMD_Pos 25 //Software Reset for CMD Line +#define SDIO_CR2_RSTCMD_Msk (0x01 << SDIO_CR2_RSTCMD_Pos) +#define SDIO_CR2_RSTDAT_Pos 26 //Software Reset for DAT Line +#define SDIO_CR2_RSTDAT_Msk (0x01 << SDIO_CR2_RSTDAT_Pos) + +#define SDIO_IF_CMDDONE_Pos 0 +#define SDIO_IF_CMDDONE_Msk (0x01 << SDIO_IF_CMDDONE_Pos) +#define SDIO_IF_TRXDONE_Pos 1 +#define SDIO_IF_TRXDONE_Msk (0x01 << SDIO_IF_TRXDONE_Pos) +#define SDIO_IF_BLKGAP_Pos 2 +#define SDIO_IF_BLKGAP_Msk (0x01 << SDIO_IF_BLKGAP_Pos) +#define SDIO_IF_DMADONE_Pos 3 +#define SDIO_IF_DMADONE_Msk (0x01 << SDIO_IF_DMADONE_Pos) +#define SDIO_IF_BUFWRRDY_Pos 4 +#define SDIO_IF_BUFWRRDY_Msk (0x01 << SDIO_IF_BUFWRRDY_Pos) +#define SDIO_IF_BUFRDRDY_Pos 5 +#define SDIO_IF_BUFRDRDY_Msk (0x01 << SDIO_IF_BUFRDRDY_Pos) +#define SDIO_IF_CARDINSR_Pos 6 +#define SDIO_IF_CARDINSR_Msk (0x01 << SDIO_IF_CARDINSR_Pos) +#define SDIO_IF_CARDRMOV_Pos 7 +#define SDIO_IF_CARDRMOV_Msk (0x01 << SDIO_IF_CARDRMOV_Pos) +#define SDIO_IF_CARD_Pos 8 +#define SDIO_IF_CARD_Msk (0x01 << SDIO_IF_CARD_Pos) +#define SDIO_IF_ERROR_Pos 15 +#define SDIO_IF_ERROR_Msk (0x01 << SDIO_IF_ERROR_Pos) +#define SDIO_IF_CMDTIMEOUT_Pos 16 +#define SDIO_IF_CMDTIMEOUT_Msk (0x01 << SDIO_IF_CMDTIMEOUT_Pos) +#define SDIO_IF_CMDCRCERR_Pos 17 +#define SDIO_IF_CMDCRCERR_Msk (0x01 << SDIO_IF_CMDCRCERR_Pos) +#define SDIO_IF_CMDENDERR_Pos 18 +#define SDIO_IF_CMDENDERR_Msk (0x01 << SDIO_IF_CMDENDCERR_Pos) +#define SDIO_IF_CMDIDXERR_Pos 19 +#define SDIO_IF_CMDIDXERR_Msk (0x01 << SDIO_IF_CMDIDXCERR_Pos) +#define SDIO_IF_DATTIMEOUT_Pos 20 +#define SDIO_IF_DATTIMEOUT_Msk (0x01 << SDIO_IF_DATTIMEOUT_Pos) +#define SDIO_IF_DATCRCERR_Pos 21 +#define SDIO_IF_DATCRCERR_Msk (0x01 << SDIO_IF_DATCRCERR_Pos) +#define SDIO_IF_DATENDERR_Pos 22 +#define SDIO_IF_DATENDERR_Msk (0x01 << SDIO_IF_DATENDCERR_Pos) +#define SDIO_IF_CURLIMERR_Pos 23 +#define SDIO_IF_CURLIMERR_Msk (0x01 << SDIO_IF_CURLIMERR_Pos) +#define SDIO_IF_CMD12ERR_Pos 24 +#define SDIO_IF_CMD12ERR_Msk (0x01 << SDIO_IF_CMD12ERR_Pos) +#define SDIO_IF_DMAERR_Pos 25 +#define SDIO_IF_DMAERR_Msk (0x01 << SDIO_IF_DMAERR_Pos) +#define SDIO_IF_RESPERR_Pos 28 +#define SDIO_IF_RESPERR_Msk (0x01 << SDIO_IF_RESPERR_Pos) + +#define SDIO_IE_CMDDONE_Pos 0 //Command Complete Status Enable +#define SDIO_IE_CMDDONE_Msk (0x01 << SDIO_IE_CMDDONE_Pos) +#define SDIO_IE_TRXDONE_Pos 1 //Transfer Complete Status Enable +#define SDIO_IE_TRXDONE_Msk (0x01 << SDIO_IE_TRXDONE_Pos) +#define SDIO_IE_BLKGAP_Pos 2 //Block Gap Event Status Enable +#define SDIO_IE_BLKGAP_Msk (0x01 << SDIO_IE_BLKGAP_Pos) +#define SDIO_IE_DMADONE_Pos 3 //DMA Interrupt Status Enable +#define SDIO_IE_DMADONE_Msk (0x01 << SDIO_IE_DMADONE_Pos) +#define SDIO_IE_BUFWRRDY_Pos 4 //Buffer Write Ready Status Enable +#define SDIO_IE_BUFWRRDY_Msk (0x01 << SDIO_IE_BUFWRRDY_Pos) +#define SDIO_IE_BUFRDRDY_Pos 5 //Buffer Read Ready Status Enable +#define SDIO_IE_BUFRDRDY_Msk (0x01 << SDIO_IE_BUFRDRDY_Pos) +#define SDIO_IE_CARDINSR_Pos 6 //Card Insertion Status Enable +#define SDIO_IE_CARDINSR_Msk (0x01 << SDIO_IE_CARDINSR_Pos) +#define SDIO_IE_CARDRMOV_Pos 7 //Card Removal Status Enable +#define SDIO_IE_CARDRMOV_Msk (0x01 << SDIO_IE_CARDRMOV_Pos) +#define SDIO_IE_CARD_Pos 8 +#define SDIO_IE_CARD_Msk (0x01 << SDIO_IE_CARD_Pos) +#define SDIO_IE_CMDTIMEOUT_Pos 16 //Command Timeout Error Status Enable +#define SDIO_IE_CMDTIMEOUT_Msk (0x01 << SDIO_IE_CMDTIMEOUT_Pos) +#define SDIO_IE_CMDCRCERR_Pos 17 //Command CRC Error Status Enable +#define SDIO_IE_CMDCRCERR_Msk (0x01 << SDIO_IE_CMDCRCERR_Pos) +#define SDIO_IE_CMDENDERR_Pos 18 //Command End Bit Error Status Enable +#define SDIO_IE_CMDENDERR_Msk (0x01 << SDIO_IE_CMDENDCERR_Pos) +#define SDIO_IE_CMDIDXERR_Pos 19 //Command Index Error Status Enable +#define SDIO_IE_CMDIDXERR_Msk (0x01 << SDIO_IE_CMDIDXCERR_Pos) +#define SDIO_IE_DATTIMEOUT_Pos 20 //Data Timeout Error Status Enable +#define SDIO_IE_DATTIMEOUT_Msk (0x01 << SDIO_IE_DATTIMEOUT_Pos) +#define SDIO_IE_DATCRCERR_Pos 21 //Data CRC Error Status Enable +#define SDIO_IE_DATCRCERR_Msk (0x01 << SDIO_IE_DATCRCERR_Pos) +#define SDIO_IE_DATENDERR_Pos 22 //Data End Bit Error Status Enable +#define SDIO_IE_DATENDERR_Msk (0x01 << SDIO_IE_DATENDCERR_Pos) +#define SDIO_IE_CURLIMERR_Pos 23 //Current Limit Error Status Enable +#define SDIO_IE_CURLIMERR_Msk (0x01 << SDIO_IE_CURLIMERR_Pos) +#define SDIO_IE_CMD12ERR_Pos 24 //Auto CMD12 Error Status Enable +#define SDIO_IE_CMD12ERR_Msk (0x01 << SDIO_IE_CMD12ERR_Pos) +#define SDIO_IE_DMAERR_Pos 25 //ADMA Error Status Enable +#define SDIO_IE_DMAERR_Msk (0x01 << SDIO_IE_DMAERR_Pos) +#define SDIO_IE_RESPERR_Pos 28 //Target Response Error Status Enable +#define SDIO_IE_RESPERR_Msk (0x01 << SDIO_IE_RESPERR_Pos) + +#define SDIO_IM_CMDDONE_Pos 0 +#define SDIO_IM_CMDDONE_Msk (0x01 << SDIO_IM_CMDDONE_Pos) +#define SDIO_IM_TRXDONE_Pos 1 +#define SDIO_IM_TRXDONE_Msk (0x01 << SDIO_IM_TRXDONE_Pos) +#define SDIO_IM_BLKGAP_Pos 2 +#define SDIO_IM_BLKGAP_Msk (0x01 << SDIO_IM_BLKGAP_Pos) +#define SDIO_IM_DMADONE_Pos 3 +#define SDIO_IM_DMADONE_Msk (0x01 << SDIO_IM_DMADONE_Pos) +#define SDIO_IM_BUFWRRDY_Pos 4 +#define SDIO_IM_BUFWRRDY_Msk (0x01 << SDIO_IM_BUFWRRDY_Pos) +#define SDIO_IM_BUFRDRDY_Pos 5 +#define SDIO_IM_BUFRDRDY_Msk (0x01 << SDIO_IM_BUFRDRDY_Pos) +#define SDIO_IM_CARDINSR_Pos 6 +#define SDIO_IM_CARDINSR_Msk (0x01 << SDIO_IM_CARDINSR_Pos) +#define SDIO_IM_CARDRMOV_Pos 7 +#define SDIO_IM_CARDRMOV_Msk (0x01 << SDIO_IM_CARDRMOV_Pos) +#define SDIO_IM_CARD_Pos 8 +#define SDIO_IM_CARD_Msk (0x01 << SDIO_IM_CARD_Pos) +#define SDIO_IM_CMDTIMEOUT_Pos 16 +#define SDIO_IM_CMDTIMEOUT_Msk (0x01 << SDIO_IM_CMDTIMEOUT_Pos) +#define SDIO_IM_CMDCRCERR_Pos 17 +#define SDIO_IM_CMDCRCERR_Msk (0x01 << SDIO_IM_CMDCRCERR_Pos) +#define SDIO_IM_CMDENDERR_Pos 18 +#define SDIO_IM_CMDENDERR_Msk (0x01 << SDIO_IM_CMDENDCERR_Pos) +#define SDIO_IM_CMDIDXERR_Pos 19 +#define SDIO_IM_CMDIDXERR_Msk (0x01 << SDIO_IM_CMDIDXCERR_Pos) +#define SDIO_IM_DATTIMEOUT_Pos 20 +#define SDIO_IM_DATTIMEOUT_Msk (0x01 << SDIO_IM_DATTIMEOUT_Pos) +#define SDIO_IM_DATCRCERR_Pos 21 +#define SDIO_IM_DATCRCERR_Msk (0x01 << SDIO_IM_DATCRCERR_Pos) +#define SDIO_IM_DATENDERR_Pos 22 +#define SDIO_IM_DATENDERR_Msk (0x01 << SDIO_IM_DATENDCERR_Pos) +#define SDIO_IM_CURLIMERR_Pos 23 +#define SDIO_IM_CURLIMERR_Msk (0x01 << SDIO_IM_CURLIMERR_Pos) +#define SDIO_IM_CMD12ERR_Pos 24 +#define SDIO_IM_CMD12ERR_Msk (0x01 << SDIO_IM_CMD12ERR_Pos) +#define SDIO_IM_DMAERR_Pos 25 +#define SDIO_IM_DMAERR_Msk (0x01 << SDIO_IM_DMAERR_Pos) +#define SDIO_IM_RESPERR_Pos 28 +#define SDIO_IM_RESPERR_Msk (0x01 << SDIO_IM_RESPERR_Pos) + + + + +typedef struct { + __IO uint32_t DATA; + __IO uint32_t ADDR; + __IO uint32_t ERASE; + __IO uint32_t CACHE; + __IO uint32_t CFG0; + __IO uint32_t CFG1; + __IO uint32_t CFG2; + __IO uint32_t CFG3; + __IO uint32_t STAT; } FLASH_Typedef; -#define FLASH_ERASE_REQ_Pos 31 -#define FLASH_ERASE_REQ_Msk (0x01u << FLASH_ERASE_REQ_Pos) -#define FLASH_CACHE_PROG_Pos 2 -#define FLASH_CACHE_PROG_Msk (0x01 << FLASH_CACHE_PROG_Pos) -#define FLASH_CACHE_CLEAR_Pos 3 -#define FLASH_CACHE_CLEAR_Msk (0x01 << FLASH_CACHE_CLEAR_Pos) +#define FLASH_ERASE_REQ_Pos 31 +#define FLASH_ERASE_REQ_Msk (0x01u<< FLASH_ERASE_REQ_Pos) -#define FLASH_STAT_ERASE_GOING_Pos 0 -#define FLASH_STAT_ERASE_GOING_Msk (0X01 << FLASH_STAT_ERASE_GOING_Pos) -#define FLASH_STAT_PROG_GOING_Pos 1 -#define FLASH_STAT_PROG_GOING_Msk (0x01 << FLASH_STAT_PROG_GOING_Pos) -#define FALSH_STAT_FIFO_EMPTY_Pos 3 -#define FLASH_STAT_FIFO_EMPTY_Msk (0x01 << FALSH_STAT_FIFO_EMPTY_Pos) -#define FALSH_STAT_FIFO_FULL_Pos 4 -#define FLASH_STAT_FIFO_FULL_Msk (0x01 << FALSH_STAT_FIFO_FULL_Pos) +#define FLASH_CACHE_PROG_Pos 2 +#define FLASH_CACHE_PROG_Msk (0x01 << FLASH_CACHE_PROG_Pos) +#define FLASH_CACHE_CLEAR_Pos 3 +#define FLASH_CACHE_CLEAR_Msk (0x01 << FLASH_CACHE_CLEAR_Pos) -typedef struct -{ +#define FLASH_STAT_ERASE_GOING_Pos 0 +#define FLASH_STAT_ERASE_GOING_Msk (0X01 << FLASH_STAT_ERASE_GOING_Pos) +#define FLASH_STAT_PROG_GOING_Pos 1 +#define FLASH_STAT_PROG_GOING_Msk (0x01 << FLASH_STAT_PROG_GOING_Pos) +#define FALSH_STAT_FIFO_EMPTY_Pos 3 +#define FLASH_STAT_FIFO_EMPTY_Msk (0x01 << FALSH_STAT_FIFO_EMPTY_Pos) +#define FALSH_STAT_FIFO_FULL_Pos 4 +#define FLASH_STAT_FIFO_FULL_Msk (0x01 << FALSH_STAT_FIFO_FULL_Pos) + + + + +typedef struct { __IO uint32_t CR; } SRAMC_TypeDef; -#define SRAMC_CR_RWTIME_Pos 0 //读写操作持续多少个时钟周期。0表示1个时钟周期。最小设置为4 -#define SRAMC_CR_RWTIME_Msk (0x0F << SRAMC_CR_RWTIME_Pos) -#define SRAMC_CR_BYTEIF_Pos 4 //外部SRAM数据宽度，0 16位 1 8位 -#define SRAMC_CR_BYTEIF_Msk (0x01 << SRAMC_CR_BYTEIF_Pos) -#define SRAMC_CR_HBLBDIS_Pos 5 //1 ADDR[23:22]为地址线 0 ADDR[23]为高字节使能，ADDR[22]为低字节使能 -#define SRAMC_CR_HBLBDIS_Msk (0x01 << SRAMC_CR_HBLBDIS_Pos) -typedef struct -{ - __IO uint32_t CR0; - - __IO uint32_t CR1; +#define SRAMC_CR_RWTIME_Pos 0 //дٸʱڡ0ʾ1ʱڡСΪ4 +#define SRAMC_CR_RWTIME_Msk (0x0F << SRAMC_CR_RWTIME_Pos) +#define SRAMC_CR_BYTEIF_Pos 4 //ⲿSRAMݿȣ0 16λ 1 8λ +#define SRAMC_CR_BYTEIF_Msk (0x01 << SRAMC_CR_BYTEIF_Pos) +#define SRAMC_CR_HBLBDIS_Pos 5 //1 ADDR[23:22]Ϊַ 0 ADDR[23]ΪֽʹܣADDR[22]Ϊֽʹ +#define SRAMC_CR_HBLBDIS_Msk (0x01 << SRAMC_CR_HBLBDIS_Pos) - __IO uint32_t REFRESH; - __IO uint32_t NOPNUM; //[15:0] 初始化完成后，在正常操作之前，发送多少个NOP命令 +typedef struct { + __IO uint32_t CR0; + + __IO uint32_t CR1; + + __IO uint32_t REFRESH; + + __IO uint32_t NOPNUM; //[15:0] ʼɺ֮ǰͶٸNOP + __IO uint32_t LATCH; - - __IO uint32_t REFDONE; //[0] Frefresh Done，上电初始化完成 + + __IO uint32_t REFDONE; //[0] Frefresh Doneϵʼ } SDRAMC_TypeDef; -#define SDRAMC_CR0_BURSTLEN_Pos 0 //必须取2，表示Burst Length为4 -#define SDRAMC_CR0_BURSTLEN_Msk (0x07 << SDRAMC_CR0_BURSTLEN_Pos) -#define SDRAMC_CR0_CASDELAY_Pos 4 //CAS Latency， 2 2 3 3 -#define SDRAMC_CR0_CASDELAY_Msk (0x07 << SDRAMC_CR0_CASDELAY_Pos) - -#define SDRAMC_CR1_TRP_Pos 0 -#define SDRAMC_CR1_TRP_Msk (0x07 << SDRAMC_CR1_TRP_Pos) -#define SDRAMC_CR1_TRCD_Pos 3 -#define SDRAMC_CR1_TRCD_Msk (0x07 << SDRAMC_CR1_TRCD_Pos) -#define SDRAMC_CR1_TRC_Pos 6 -#define SDRAMC_CR1_TRC_Msk (0x0F << SDRAMC_CR1_TRC_Pos) -#define SDRAMC_CR1_TRAS_Pos 10 -#define SDRAMC_CR1_TRAS_Msk (0x07 << SDRAMC_CR1_TRAS_Pos) -#define SDRAMC_CR1_TRRD_Pos 13 -#define SDRAMC_CR1_TRRD_Msk (0x03 << SDRAMC_CR1_TRRD_Pos) -#define SDRAMC_CR1_TMRD_Pos 15 -#define SDRAMC_CR1_TMRD_Msk (0x07 << SDRAMC_CR1_TMRD_Pos) -#define SDRAMC_CR1_32BIT_Pos 18 //SDRAMC的接口数据位宽，1 32bit 0 16bit -#define SDRAMC_CR1_32BIT_Msk (0x01 << SDRAMC_CR1_32BIT_Pos) -#define SDRAMC_CR1_BANK_Pos 19 //SDRAM每个颗粒有几个bank，0 2 banks 1 4 banks -#define SDRAMC_CR1_BANK_Msk (0x01 << SDRAMC_CR1_BANK_Pos) -#define SDRAMC_CR1_CELL32BIT_Pos 20 //SDRAM颗粒的位宽，1 32bit 0 16bit -#define SDRAMC_CR1_CELL32BIT_Msk (0x01 << SDRAMC_CR1_CELL32BIT_Pos) -#define SDRAMC_CR1_CELLSIZE_Pos 21 //SDRAM颗粒的容量，0 64Mb 1 128Mb 2 256Mb 3 16Mb -#define SDRAMC_CR1_CELLSIZE_Msk (0x03 << SDRAMC_CR1_CELLSIZE_Pos) -#define SDRAMC_CR1_HIGHSPEED_Pos 23 //当hclk大于100MHz时，这一位必须配置为1，否则为0 -#define SDRAMC_CR1_HIGHSPEED_Msk (0x01 << SDRAMC_CR1_HIGHSPEED_Pos) - -#define SDRAMC_REFRESH_RATE_Pos 0 -#define SDRAMC_REFRESH_RATE_Msk (0xFFF << SDRAMC_REFRESH_RATE_Pos) -#define SDRAMC_REFRESH_EN_Pos 12 -#define SDRAMC_REFRESH_EN_Msk (0x01 << SDRAMC_REFRESH_EN_Pos) - -#define SDRAMC_LATCH_INEDGE_Pos 0 //哪个沿来锁存从SDRAM中读回的数据，0 上升沿 1 下降沿 -#define SDRAMC_LATCH_INEDGE_Msk (0x01 << SDRAMC_LATCH_INEDGE_Pos) -#define SDRAMC_LATCH_OUTEDGE_Pos 1 //哪个沿去锁存送给SDRAM的数据，1 上升沿 0 下降沿 -#define SDRAMC_LATCH_OUTEDGE_Msk (0x01 << SDRAMC_LATCH_OUTEDGE_Pos) -#define SDRAMC_LATCH_WAITST_Pos 2 -#define SDRAMC_LATCH_WAITST_Msk (0x01 << SDRAMC_LATCH_WAITST_Pos) - -typedef struct -{ - __IO uint32_t IE; - - __IO uint32_t IF; //写1清零 +#define SDRAMC_CR0_BURSTLEN_Pos 0 //ȡ2ʾBurst LengthΪ4 +#define SDRAMC_CR0_BURSTLEN_Msk (0x07 << SDRAMC_CR0_BURSTLEN_Pos) +#define SDRAMC_CR0_CASDELAY_Pos 4 //CAS Latency 2 2 3 3 +#define SDRAMC_CR0_CASDELAY_Msk (0x07 << SDRAMC_CR0_CASDELAY_Pos) + +#define SDRAMC_CR1_TRP_Pos 0 +#define SDRAMC_CR1_TRP_Msk (0x07 << SDRAMC_CR1_TRP_Pos) +#define SDRAMC_CR1_TRCD_Pos 3 +#define SDRAMC_CR1_TRCD_Msk (0x07 << SDRAMC_CR1_TRCD_Pos) +#define SDRAMC_CR1_TRC_Pos 6 +#define SDRAMC_CR1_TRC_Msk (0x0F << SDRAMC_CR1_TRC_Pos) +#define SDRAMC_CR1_TRAS_Pos 10 +#define SDRAMC_CR1_TRAS_Msk (0x07 << SDRAMC_CR1_TRAS_Pos) +#define SDRAMC_CR1_TRRD_Pos 13 +#define SDRAMC_CR1_TRRD_Msk (0x03 << SDRAMC_CR1_TRRD_Pos) +#define SDRAMC_CR1_TMRD_Pos 15 +#define SDRAMC_CR1_TMRD_Msk (0x07 << SDRAMC_CR1_TMRD_Pos) +#define SDRAMC_CR1_32BIT_Pos 18 //SDRAMCĽӿλ1 32bit 0 16bit +#define SDRAMC_CR1_32BIT_Msk (0x01 << SDRAMC_CR1_32BIT_Pos) +#define SDRAMC_CR1_BANK_Pos 19 //SDRAMÿмbank0 2 banks 1 4 banks +#define SDRAMC_CR1_BANK_Msk (0x01 << SDRAMC_CR1_BANK_Pos) +#define SDRAMC_CR1_CELL32BIT_Pos 20 //SDRAMλ1 32bit 0 16bit +#define SDRAMC_CR1_CELL32BIT_Msk (0x01 << SDRAMC_CR1_CELL32BIT_Pos) +#define SDRAMC_CR1_CELLSIZE_Pos 21 //SDRAM0 64Mb 1 128Mb 2 256Mb 3 16Mb +#define SDRAMC_CR1_CELLSIZE_Msk (0x03 << SDRAMC_CR1_CELLSIZE_Pos) +#define SDRAMC_CR1_HIGHSPEED_Pos 23 //hclk100MHzʱһλΪ1Ϊ0 +#define SDRAMC_CR1_HIGHSPEED_Msk (0x01 << SDRAMC_CR1_HIGHSPEED_Pos) + +#define SDRAMC_REFRESH_RATE_Pos 0 +#define SDRAMC_REFRESH_RATE_Msk (0xFFF << SDRAMC_REFRESH_RATE_Pos) +#define SDRAMC_REFRESH_EN_Pos 12 +#define SDRAMC_REFRESH_EN_Msk (0x01 << SDRAMC_REFRESH_EN_Pos) + +#define SDRAMC_LATCH_INEDGE_Pos 0 //ĸSDRAMжصݣ0 1 ½ +#define SDRAMC_LATCH_INEDGE_Msk (0x01 << SDRAMC_LATCH_INEDGE_Pos) +#define SDRAMC_LATCH_OUTEDGE_Pos 1 //ĸȥ͸SDRAMݣ1 0 ½ +#define SDRAMC_LATCH_OUTEDGE_Msk (0x01 << SDRAMC_LATCH_OUTEDGE_Pos) +#define SDRAMC_LATCH_WAITST_Pos 2 +#define SDRAMC_LATCH_WAITST_Msk (0x01 << SDRAMC_LATCH_WAITST_Pos) + + + + +typedef struct { + __IO uint32_t IE; + + __IO uint32_t IF; //д1 + __IO uint32_t IM; - + __IO uint32_t CR; - + __IO uint32_t ADDR; - + __IO uint32_t CMD; } NORFLC_TypeDef; -#define NORFLC_IE_FINISH_Pos 0 -#define NORFLC_IE_FINISH_Msk (0x01 << NORFLC_IE_FINISH_Pos) -#define NORFLC_IE_TIMEOUT_Pos 1 -#define NORFLC_IE_TIMEOUT_Msk (0x01 << NORFLC_IE_TIMEOUT_Pos) - -#define NORFLC_IF_FINISH_Pos 0 -#define NORFLC_IF_FINISH_Msk (0x01 << NORFLC_IF_FINISH_Pos) -#define NORFLC_IF_TIMEOUT_Pos 1 -#define NORFLC_IF_TIMEOUT_Msk (0x01 << NORFLC_IF_TIMEOUT_Pos) - -#define NORFLC_IM_FINISH_Pos 0 -#define NORFLC_IM_FINISH_Msk (0x01 << NORFLC_IM_FINISH_Pos) -#define NORFLC_IM_TIMEOUT_Pos 1 -#define NORFLC_IM_TIMEOUT_Msk (0x01 << NORFLC_IM_TIMEOUT_Pos) - -#define NORFLC_CR_RDTIME_Pos 0 //Oen下降沿后多少个时钟周期后采样读回的数据。0表示1个时钟周期 -#define NORFLC_CR_RDTIME_Msk (0x1F << NORFLC_CR_RDTIME_Pos) -#define NORFLC_CR_WRTIME_Pos 5 //输出Wen的低电平宽度。0表示1个时钟周期 -#define NORFLC_CR_WRTIME_Msk (0x07 << NORFLC_CR_WRTIME_Pos) -#define NORFLC_CR_BYTEIF_Pos 8 //外部NOR FLASH数据宽度，1 8位 0 16位 -#define NORFLC_CR_BYTEIF_Msk (0x01 << NORFLC_CR_BYTEIF_Pos) - -#define NORFLC_CMD_DATA_Pos 0 //在PROGRAM命令中，DATA是要写入NOR FLASH的数据；在READ命令中，DATA是从NOR FLASH读回的数据 -#define NORFLC_CMD_DATA_Msk (0xFFFF << NORFLC_CMD_DATA_Pos) -#define NORFLC_CMD_CMD_Pos 16 //需要执行的命令，0 READ 1 RESET 2 AUTOMATIC SELECT 3 PROGRAM 4 CHIP ERASE 5 SECTOR ERASE -#define NORFLC_CMD_CMD_Msk (0x07 << NORFLC_CMD_CMD_Pos) - -typedef struct -{ - __IO uint32_t CR; - __O uint32_t DATAIN; +#define NORFLC_IE_FINISH_Pos 0 +#define NORFLC_IE_FINISH_Msk (0x01 << NORFLC_IE_FINISH_Pos) +#define NORFLC_IE_TIMEOUT_Pos 1 +#define NORFLC_IE_TIMEOUT_Msk (0x01 << NORFLC_IE_TIMEOUT_Pos) - __IO uint32_t INIVAL; +#define NORFLC_IF_FINISH_Pos 0 +#define NORFLC_IF_FINISH_Msk (0x01 << NORFLC_IF_FINISH_Pos) +#define NORFLC_IF_TIMEOUT_Pos 1 +#define NORFLC_IF_TIMEOUT_Msk (0x01 << NORFLC_IF_TIMEOUT_Pos) - __I uint32_t RESULT; -} CRC_TypeDef; +#define NORFLC_IM_FINISH_Pos 0 +#define NORFLC_IM_FINISH_Msk (0x01 << NORFLC_IM_FINISH_Pos) +#define NORFLC_IM_TIMEOUT_Pos 1 +#define NORFLC_IM_TIMEOUT_Msk (0x01 << NORFLC_IM_TIMEOUT_Pos) -#define CRC_CR_EN_Pos 0 -#define CRC_CR_EN_Msk (0x01 << CRC_CR_EN_Pos) -#define CRC_CR_OREV_Pos 1 //输出结果是否翻转 -#define CRC_CR_OREV_Msk (0x01 << CRC_CR_OREV_Pos) -#define CRC_CR_ONOT_Pos 2 //输出结果是否取反 -#define CRC_CR_ONOT_Msk (0x01 << CRC_CR_ONOT_Pos) -#define CRC_CR_CRC16_Pos 3 //1 CRC16 0 CRC32 -#define CRC_CR_CRC16_Msk (0x01 << CRC_CR_CRC16_Pos) -#define CRC_CR_IBITS_Pos 4 //输入数据有效位数 0 32位 1 16位 2 8位 -#define CRC_CR_IBITS_Msk (0x03 << CRC_CR_IBITS_Pos) - -typedef struct -{ - __IO uint32_t MINSEC; //分秒计数 +#define NORFLC_CR_RDTIME_Pos 0 //Oen½غٸʱںصݡ0ʾ1ʱ +#define NORFLC_CR_RDTIME_Msk (0x1F << NORFLC_CR_RDTIME_Pos) +#define NORFLC_CR_WRTIME_Pos 5 //Wenĵ͵ƽȡ0ʾ1ʱ +#define NORFLC_CR_WRTIME_Msk (0x07 << NORFLC_CR_WRTIME_Pos) +#define NORFLC_CR_BYTEIF_Pos 8 //ⲿNOR FLASHݿȣ1 8λ 0 16λ +#define NORFLC_CR_BYTEIF_Msk (0x01 << NORFLC_CR_BYTEIF_Pos) - __IO uint32_t DATHUR; //日时计数 +#define NORFLC_CMD_DATA_Pos 0 //PROGRAMУDATAҪдNOR FLASHݣREADУDATAǴNOR FLASHص +#define NORFLC_CMD_DATA_Msk (0xFFFF << NORFLC_CMD_DATA_Pos) +#define NORFLC_CMD_CMD_Pos 16 //Ҫִе0 READ 1 RESET 2 AUTOMATIC SELECT 3 PROGRAM 4 CHIP ERASE 5 SECTOR ERASE +#define NORFLC_CMD_CMD_Msk (0x07 << NORFLC_CMD_CMD_Pos) - __IO uint32_t MONDAY; //月周计数 - __IO uint32_t YEAR; //[11:0] 年计数，支持1901-2199 - __IO uint32_t MINSECAL; //分秒闹铃设置 - __IO uint32_t DAYHURAL; //周时闹铃设置 +typedef struct { + __IO uint32_t CR; + + __O uint32_t DATAIN; + + __IO uint32_t INIVAL; + + __I uint32_t RESULT; +} CRC_TypeDef; - __IO uint32_t LOAD; //将设置寄存器中的值同步到RTC中，同步完成自动清零 +#define CRC_CR_EN_Pos 0 +#define CRC_CR_EN_Msk (0x01 << CRC_CR_EN_Pos) +#define CRC_CR_OREV_Pos 1 //Ƿת +#define CRC_CR_OREV_Msk (0x01 << CRC_CR_OREV_Pos) +#define CRC_CR_ONOT_Pos 2 //Ƿȡ +#define CRC_CR_ONOT_Msk (0x01 << CRC_CR_ONOT_Pos) +#define CRC_CR_CRC16_Pos 3 //1 CRC16 0 CRC32 +#define CRC_CR_CRC16_Msk (0x01 << CRC_CR_CRC16_Pos) +#define CRC_CR_IBITS_Pos 4 //Чλ 0 32λ 1 16λ 2 8λ +#define CRC_CR_IBITS_Msk (0x03 << CRC_CR_IBITS_Pos) + + + + +typedef struct { + __IO uint32_t MINSEC; // + + __IO uint32_t DATHUR; //ʱ + + __IO uint32_t MONDAY; //ܼ + + __IO uint32_t YEAR; //[11:0] ֧1901-2199 + + __IO uint32_t MINSECAL; // + + __IO uint32_t DAYHURAL; //ʱ + + __IO uint32_t LOAD; //üĴеֵͬRTCУͬԶ + __IO uint32_t IE; - - __IO uint32_t IF; //写1清零 - - __IO uint32_t EN; //[0] 1 RTC使能 - - __IO uint32_t CFGABLE; //[0] 1 RTC可配置 - - __IO uint32_t TRIM; //时钟调整 - - __IO uint32_t TRIMM; //时钟微调整 + + __IO uint32_t IF; //д1 + + __IO uint32_t EN; //[0] 1 RTCʹ + + __IO uint32_t CFGABLE; //[0] 1 RTC + + __IO uint32_t TRIM; //ʱӵ + + __IO uint32_t TRIMM; //ʱ΢ } RTC_TypeDef; -#define RTC_LOAD_TIME_Pos 0 -#define RTC_LOAD_TIME_Msk (0x01 << RTC_LOAD_TIME_Pos) -#define RTC_LOAD_ALARM_Pos 1 -#define RTC_LOAD_ALARM_Msk (0x01 << RTC_LOAD_ALARM_Pos) - -#define RTC_MINSEC_SEC_Pos 0 //秒计数，取值0--59 -#define RTC_MINSEC_SEC_Msk (0x3F << RTC_MINSEC_SEC_Pos) -#define RTC_MINSEC_MIN_Pos 6 //分钟计数，取值0--59 -#define RTC_MINSEC_MIN_Msk (0x3F << RTC_MINSEC_MIN_Pos) - -#define RTC_DATHUR_HOUR_Pos 0 //小时计数，取值0--23 -#define RTC_DATHUR_HOUR_Msk (0x1F << RTC_DATHUR_HOUR_Pos) -#define RTC_DATHUR_DATE_Pos 5 //date of month，取值1--31 -#define RTC_DATHUR_DATE_Msk (0x1F << RTC_DATHUR_DATE_Pos) - -#define RTC_MONDAY_DAY_Pos 0 //day of week，取值0--6 -#define RTC_MONDAY_DAY_Msk (0x07 << RTC_MONDAY_DAY_Pos) -#define RTC_MONDAY_MON_Pos 3 //月份计数，取值1--12 -#define RTC_MONDAY_MON_Msk (0x0F << RTC_MONDAY_MON_Pos) - -#define RTC_MINSECAL_SEC_Pos 0 //闹钟秒设置 -#define RTC_MINSECAL_SEC_Msk (0x3F << RTC_MINSECAL_SEC_Pos) -#define RTC_MINSECAL_MIN_Pos 6 //闹钟分钟设置 -#define RTC_MINSECAL_MIN_Msk (0x3F << RTC_MINSECAL_MIN_Pos) - -#define RTC_DAYHURAL_HOUR_Pos 0 //闹钟小时设置 -#define RTC_DAYHURAL_HOUR_Msk (0x1F << RTC_DAYHURAL_HOUR_Pos) -#define RTC_DAYHURAL_SUN_Pos 5 //周日闹钟有效 -#define RTC_DAYHURAL_SUN_Msk (0x01 << RTC_DAYHURAL_SUN_Pos) -#define RTC_DAYHURAL_MON_Pos 6 //周一闹钟有效 -#define RTC_DAYHURAL_MON_Msk (0x01 << RTC_DAYHURAL_MON_Pos) -#define RTC_DAYHURAL_TUE_Pos 7 //周二闹钟有效 -#define RTC_DAYHURAL_TUE_Msk (0x01 << RTC_DAYHURAL_TUE_Pos) -#define RTC_DAYHURAL_WED_Pos 8 //周三闹钟有效 -#define RTC_DAYHURAL_WED_Msk (0x01 << RTC_DAYHURAL_WED_Pos) -#define RTC_DAYHURAL_THU_Pos 9 //周四闹钟有效 -#define RTC_DAYHURAL_THU_Msk (0x01 << RTC_DAYHURAL_THU_Pos) -#define RTC_DAYHURAL_FRI_Pos 10 //周五闹钟有效 -#define RTC_DAYHURAL_FRI_Msk (0x01 << RTC_DAYHURAL_FRI_Pos) -#define RTC_DAYHURAL_SAT_Pos 11 //周六闹钟有效 -#define RTC_DAYHURAL_SAT_Msk (0x01 << RTC_DAYHURAL_SAT_Pos) - -#define RTC_IE_SEC_Pos 0 //秒中断使能 -#define RTC_IE_SEC_Msk (0x01 << RTC_IE_SEC_Pos) -#define RTC_IE_MIN_Pos 1 -#define RTC_IE_MIN_Msk (0x01 << RTC_IE_MIN_Pos) -#define RTC_IE_HOUR_Pos 2 -#define RTC_IE_HOUR_Msk (0x01 << RTC_IE_HOUR_Pos) -#define RTC_IE_DATE_Pos 3 -#define RTC_IE_DATE_Msk (0x01 << RTC_IE_DATE_Pos) -#define RTC_IE_ALARM_Pos 4 -#define RTC_IE_ALARM_Msk (0x01 << RTC_IE_ALARM_Pos) - -#define RTC_IF_SEC_Pos 0 //写1清零 -#define RTC_IF_SEC_Msk (0x01 << RTC_IF_SEC_Pos) -#define RTC_IF_MIN_Pos 1 -#define RTC_IF_MIN_Msk (0x01 << RTC_IF_MIN_Pos) -#define RTC_IF_HOUR_Pos 2 -#define RTC_IF_HOUR_Msk (0x01 << RTC_IF_HOUR_Pos) -#define RTC_IF_DATE_Pos 3 -#define RTC_IF_DATE_Msk (0x01 << RTC_IF_DATE_Pos) -#define RTC_IF_ALARM_Pos 4 -#define RTC_IF_ALARM_Msk (0x01 << RTC_IF_ALARM_Pos) - -#define RTC_TRIM_ADJ_Pos 0 //用于调整BASECNT的计数周期，默认为32768，如果DEC为1，则计数周期调整为32768-ADJ，否则调整为32768+ADJ -#define RTC_TRIM_ADJ_Msk (0xFF << RTC_TRIM_ADJ_Pos) -#define RTC_TRIM_DEC_Pos 8 -#define RTC_TRIM_DEC_Msk (0x01 << RTC_TRIM_DEC_Pos) - -#define RTC_TRIMM_CYCLE_Pos 0 //用于计数周期微调，如果INC为1，则第n个计数周期调整为(32768±ADJ)+1,否则调整为(32768±ADJ)-1 \ - //cycles=0时，不进行微调整；cycles=1，则n为2；cycles=7，则n为8；以此类推 -#define RTC_TRIMM_CYCLE_Msk (0x07 << RTC_TRIMM_CYCLE_Pos) -#define RTC_TRIMM_INC_Pos 3 -#define RTC_TRIMM_INC_Msk (0x01 << RTC_TRIMM_INC_Pos) - -typedef struct -{ - __IO uint32_t LOAD; //喂狗使计数器装载LOAD值 - - __I uint32_t VALUE; - __IO uint32_t CR; +#define RTC_LOAD_TIME_Pos 0 +#define RTC_LOAD_TIME_Msk (0x01 << RTC_LOAD_TIME_Pos) +#define RTC_LOAD_ALARM_Pos 1 +#define RTC_LOAD_ALARM_Msk (0x01 << RTC_LOAD_ALARM_Pos) + +#define RTC_MINSEC_SEC_Pos 0 //ȡֵ0--59 +#define RTC_MINSEC_SEC_Msk (0x3F << RTC_MINSEC_SEC_Pos) +#define RTC_MINSEC_MIN_Pos 6 //Ӽȡֵ0--59 +#define RTC_MINSEC_MIN_Msk (0x3F << RTC_MINSEC_MIN_Pos) + +#define RTC_DATHUR_HOUR_Pos 0 //Сʱȡֵ0--23 +#define RTC_DATHUR_HOUR_Msk (0x1F << RTC_DATHUR_HOUR_Pos) +#define RTC_DATHUR_DATE_Pos 5 //date of monthȡֵ1--31 +#define RTC_DATHUR_DATE_Msk (0x1F << RTC_DATHUR_DATE_Pos) + +#define RTC_MONDAY_DAY_Pos 0 //day of weekȡֵ0--6 +#define RTC_MONDAY_DAY_Msk (0x07 << RTC_MONDAY_DAY_Pos) +#define RTC_MONDAY_MON_Pos 3 //·ݼȡֵ1--12 +#define RTC_MONDAY_MON_Msk (0x0F << RTC_MONDAY_MON_Pos) + +#define RTC_MINSECAL_SEC_Pos 0 // +#define RTC_MINSECAL_SEC_Msk (0x3F << RTC_MINSECAL_SEC_Pos) +#define RTC_MINSECAL_MIN_Pos 6 //ӷ +#define RTC_MINSECAL_MIN_Msk (0x3F << RTC_MINSECAL_MIN_Pos) + +#define RTC_DAYHURAL_HOUR_Pos 0 //Сʱ +#define RTC_DAYHURAL_HOUR_Msk (0x1F << RTC_DAYHURAL_HOUR_Pos) +#define RTC_DAYHURAL_SUN_Pos 5 //Ч +#define RTC_DAYHURAL_SUN_Msk (0x01 << RTC_DAYHURAL_SUN_Pos) +#define RTC_DAYHURAL_MON_Pos 6 //һЧ +#define RTC_DAYHURAL_MON_Msk (0x01 << RTC_DAYHURAL_MON_Pos) +#define RTC_DAYHURAL_TUE_Pos 7 //ܶЧ +#define RTC_DAYHURAL_TUE_Msk (0x01 << RTC_DAYHURAL_TUE_Pos) +#define RTC_DAYHURAL_WED_Pos 8 //Ч +#define RTC_DAYHURAL_WED_Msk (0x01 << RTC_DAYHURAL_WED_Pos) +#define RTC_DAYHURAL_THU_Pos 9 //Ч +#define RTC_DAYHURAL_THU_Msk (0x01 << RTC_DAYHURAL_THU_Pos) +#define RTC_DAYHURAL_FRI_Pos 10 //Ч +#define RTC_DAYHURAL_FRI_Msk (0x01 << RTC_DAYHURAL_FRI_Pos) +#define RTC_DAYHURAL_SAT_Pos 11 //Ч +#define RTC_DAYHURAL_SAT_Msk (0x01 << RTC_DAYHURAL_SAT_Pos) + +#define RTC_IE_SEC_Pos 0 //жʹ +#define RTC_IE_SEC_Msk (0x01 << RTC_IE_SEC_Pos) +#define RTC_IE_MIN_Pos 1 +#define RTC_IE_MIN_Msk (0x01 << RTC_IE_MIN_Pos) +#define RTC_IE_HOUR_Pos 2 +#define RTC_IE_HOUR_Msk (0x01 << RTC_IE_HOUR_Pos) +#define RTC_IE_DATE_Pos 3 +#define RTC_IE_DATE_Msk (0x01 << RTC_IE_DATE_Pos) +#define RTC_IE_ALARM_Pos 4 +#define RTC_IE_ALARM_Msk (0x01 << RTC_IE_ALARM_Pos) + +#define RTC_IF_SEC_Pos 0 //д1 +#define RTC_IF_SEC_Msk (0x01 << RTC_IF_SEC_Pos) +#define RTC_IF_MIN_Pos 1 +#define RTC_IF_MIN_Msk (0x01 << RTC_IF_MIN_Pos) +#define RTC_IF_HOUR_Pos 2 +#define RTC_IF_HOUR_Msk (0x01 << RTC_IF_HOUR_Pos) +#define RTC_IF_DATE_Pos 3 +#define RTC_IF_DATE_Msk (0x01 << RTC_IF_DATE_Pos) +#define RTC_IF_ALARM_Pos 4 +#define RTC_IF_ALARM_Msk (0x01 << RTC_IF_ALARM_Pos) + +#define RTC_TRIM_ADJ_Pos 0 //ڵBASECNTļڣĬΪ32768DECΪ1ڵΪ32768-ADJΪ32768+ADJ +#define RTC_TRIM_ADJ_Msk (0xFF << RTC_TRIM_ADJ_Pos) +#define RTC_TRIM_DEC_Pos 8 +#define RTC_TRIM_DEC_Msk (0x01 << RTC_TRIM_DEC_Pos) + +#define RTC_TRIMM_CYCLE_Pos 0 //ڼ΢INCΪ1nڵΪ(32768ADJ)+1,Ϊ(32768ADJ)-1 + //cycles=0ʱ΢cycles=1nΪ2cycles=7nΪ8Դ +#define RTC_TRIMM_CYCLE_Msk (0x07 << RTC_TRIMM_CYCLE_Pos) +#define RTC_TRIMM_INC_Pos 3 +#define RTC_TRIMM_INC_Msk (0x01 << RTC_TRIMM_INC_Pos) + + + + +typedef struct { + __IO uint32_t LOAD; //ιʹװLOADֵ + + __I uint32_t VALUE; + + __IO uint32_t CR; + + __IO uint32_t IF; //0ʱӲλд1־ + + __IO uint32_t FEED; //д0x55ι +} WDT_TypeDef; - __IO uint32_t IF; //计数到0时硬件置位，软件写1清除标志 - __IO uint32_t FEED; //写0x55喂狗 -} WDT_TypeDef; +#define WDT_CR_EN_Pos 0 +#define WDT_CR_EN_Msk (0x01 << WDT_CR_EN_Pos) +#define WDT_CR_RSTEN_Pos 1 +#define WDT_CR_RSTEN_Msk (0x01 << WDT_CR_RSTEN_Pos) -#define WDT_CR_EN_Pos 0 -#define WDT_CR_EN_Msk (0x01 << WDT_CR_EN_Pos) -#define WDT_CR_RSTEN_Pos 1 -#define WDT_CR_RSTEN_Msk (0x01 << WDT_CR_RSTEN_Pos) /******************************************************************************/ /* Peripheral memory map */ /******************************************************************************/ -#define RAM_BASE 0x20000000 -#define AHB_BASE 0x40000000 -#define APB_BASE 0x40010000 +#define RAM_BASE 0x20000000 +#define AHB_BASE 0x40000000 +#define APB_BASE 0x40010000 -#define NORFLC_BASE 0x60000000 -#define NORFLM_BASE 0x61000000 +#define NORFLC_BASE 0x60000000 +#define NORFLM_BASE 0x61000000 -#define SRAMC_BASE 0x68000000 -#define SRAMM_BASE 0x69000000 +#define SRAMC_BASE 0x68000000 +#define SRAMM_BASE 0x69000000 -#define SDRAMC_BASE 0x78000000 -#define SDRAMM_BASE 0x70000000 +#define SDRAMC_BASE 0x78000000 +#define SDRAMM_BASE 0x70000000 /* AHB Peripheral memory map */ -#define SYS_BASE (AHB_BASE + 0x00000) +#define SYS_BASE (AHB_BASE + 0x00000) -#define DMA_BASE (AHB_BASE + 0x01000) +#define DMA_BASE (AHB_BASE + 0x01000) -#define LCD_BASE (AHB_BASE + 0x02000) +#define LCD_BASE (AHB_BASE + 0x02000) -#define CRC_BASE (AHB_BASE + 0x03000) +#define CRC_BASE (AHB_BASE + 0x03000) -#define SDIO_BASE (AHB_BASE + 0x04000) +#define SDIO_BASE (AHB_BASE + 0x04000) /* APB Peripheral memory map */ -#define PORT_BASE (APB_BASE + 0x00000) +#define PORT_BASE (APB_BASE + 0x00000) -#define GPIOA_BASE (APB_BASE + 0x01000) -#define GPIOB_BASE (APB_BASE + 0x02000) -#define GPIOC_BASE (APB_BASE + 0x03000) -#define GPIOD_BASE (APB_BASE + 0x04000) -#define GPIOM_BASE (APB_BASE + 0x05000) -#define GPION_BASE (APB_BASE + 0x06000) -#define GPIOP_BASE (APB_BASE + 0x08000) +#define GPIOA_BASE (APB_BASE + 0x01000) +#define GPIOB_BASE (APB_BASE + 0x02000) +#define GPIOC_BASE (APB_BASE + 0x03000) +#define GPIOD_BASE (APB_BASE + 0x04000) +#define GPIOM_BASE (APB_BASE + 0x05000) +#define GPION_BASE (APB_BASE + 0x06000) +#define GPIOP_BASE (APB_BASE + 0x08000) -#define TIMR0_BASE (APB_BASE + 0x07000) -#define TIMR1_BASE (APB_BASE + 0x0700C) -#define TIMR2_BASE (APB_BASE + 0x07018) -#define TIMR3_BASE (APB_BASE + 0x07024) -#define TIMR4_BASE (APB_BASE + 0x07030) -#define TIMR5_BASE (APB_BASE + 0x0703C) -#define TIMRG_BASE (APB_BASE + 0x07060) +#define TIMR0_BASE (APB_BASE + 0x07000) +#define TIMR1_BASE (APB_BASE + 0x0700C) +#define TIMR2_BASE (APB_BASE + 0x07018) +#define TIMR3_BASE (APB_BASE + 0x07024) +#define TIMR4_BASE (APB_BASE + 0x07030) +#define TIMR5_BASE (APB_BASE + 0x0703C) +#define TIMRG_BASE (APB_BASE + 0x07060) -#define WDT_BASE (APB_BASE + 0x09000) +#define WDT_BASE (APB_BASE + 0x09000) -#define PWM0_BASE (APB_BASE + 0x0A000) -#define PWM1_BASE (APB_BASE + 0x0A020) -#define PWM2_BASE (APB_BASE + 0x0A040) -#define PWM3_BASE (APB_BASE + 0x0A060) -#define PWM4_BASE (APB_BASE + 0x0A080) -#define PWM5_BASE (APB_BASE + 0x0A0A0) -#define PWMG_BASE (APB_BASE + 0x0A180) +#define PWM0_BASE (APB_BASE + 0x0A000) +#define PWM1_BASE (APB_BASE + 0x0A020) +#define PWM2_BASE (APB_BASE + 0x0A040) +#define PWM3_BASE (APB_BASE + 0x0A060) +#define PWM4_BASE (APB_BASE + 0x0A080) +#define PWM5_BASE (APB_BASE + 0x0A0A0) +#define PWMG_BASE (APB_BASE + 0x0A180) -#define RTC_BASE (APB_BASE + 0x0B000) +#define RTC_BASE (APB_BASE + 0x0B000) -#define ADC0_BASE (APB_BASE + 0x0C000) -#define ADC1_BASE (APB_BASE + 0x0D000) +#define ADC0_BASE (APB_BASE + 0x0C000) +#define ADC1_BASE (APB_BASE + 0x0D000) -#define FLASH_BASE (APB_BASE + 0x0F000) +#define FLASH_BASE (APB_BASE + 0x0F000) -#define UART0_BASE (APB_BASE + 0x10000) -#define UART1_BASE (APB_BASE + 0x11000) -#define UART2_BASE (APB_BASE + 0x12000) -#define UART3_BASE (APB_BASE + 0x13000) +#define UART0_BASE (APB_BASE + 0x10000) +#define UART1_BASE (APB_BASE + 0x11000) +#define UART2_BASE (APB_BASE + 0x12000) +#define UART3_BASE (APB_BASE + 0x13000) -#define I2C0_BASE (APB_BASE + 0x18000) -#define I2C1_BASE (APB_BASE + 0x19000) +#define I2C0_BASE (APB_BASE + 0x18000) +#define I2C1_BASE (APB_BASE + 0x19000) -#define SPI0_BASE (APB_BASE + 0x1C000) -#define SPI1_BASE (APB_BASE + 0x1D000) +#define SPI0_BASE (APB_BASE + 0x1C000) +#define SPI1_BASE (APB_BASE + 0x1D000) + +#define CAN_BASE (APB_BASE + 0x20000) -#define CAN_BASE (APB_BASE + 0x20000) /******************************************************************************/ /* Peripheral declaration */ /******************************************************************************/ -#define SYS ((SYS_TypeDef *)SYS_BASE) +#define SYS ((SYS_TypeDef *) SYS_BASE) + +#define PORT ((PORT_TypeDef *) PORT_BASE) -#define PORT ((PORT_TypeDef *)PORT_BASE) +#define GPIOA ((GPIO_TypeDef *) GPIOA_BASE) +#define GPIOB ((GPIO_TypeDef *) GPIOB_BASE) +#define GPIOC ((GPIO_TypeDef *) GPIOC_BASE) +#define GPIOM ((GPIO_TypeDef *) GPIOM_BASE) +#define GPION ((GPIO_TypeDef *) GPION_BASE) +#define GPIOP ((GPIO_TypeDef *) GPIOP_BASE) -#define GPIOA ((GPIO_TypeDef *)GPIOA_BASE) -#define GPIOB ((GPIO_TypeDef *)GPIOB_BASE) -#define GPIOC ((GPIO_TypeDef *)GPIOC_BASE) -#define GPIOM ((GPIO_TypeDef *)GPIOM_BASE) -#define GPION ((GPIO_TypeDef *)GPION_BASE) -#define GPIOP ((GPIO_TypeDef *)GPIOP_BASE) +#define TIMR0 ((TIMR_TypeDef *) TIMR0_BASE) +#define TIMR1 ((TIMR_TypeDef *) TIMR1_BASE) +#define TIMR2 ((TIMR_TypeDef *) TIMR2_BASE) +#define TIMR3 ((TIMR_TypeDef *) TIMR3_BASE) +#define TIMR4 ((TIMR_TypeDef *) TIMR4_BASE) +#define TIMR5 ((TIMR_TypeDef *) TIMR5_BASE) +#define TIMRG ((TIMRG_TypeDef*) TIMRG_BASE) -#define TIMR0 ((TIMR_TypeDef *)TIMR0_BASE) -#define TIMR1 ((TIMR_TypeDef *)TIMR1_BASE) -#define TIMR2 ((TIMR_TypeDef *)TIMR2_BASE) -#define TIMR3 ((TIMR_TypeDef *)TIMR3_BASE) -#define TIMR4 ((TIMR_TypeDef *)TIMR4_BASE) -#define TIMR5 ((TIMR_TypeDef *)TIMR5_BASE) -#define TIMRG ((TIMRG_TypeDef *)TIMRG_BASE) +#define UART0 ((UART_TypeDef *) UART0_BASE) +#define UART1 ((UART_TypeDef *) UART1_BASE) +#define UART2 ((UART_TypeDef *) UART2_BASE) +#define UART3 ((UART_TypeDef *) UART3_BASE) -#define UART0 ((UART_TypeDef *)UART0_BASE) -#define UART1 ((UART_TypeDef *)UART1_BASE) -#define UART2 ((UART_TypeDef *)UART2_BASE) -#define UART3 ((UART_TypeDef *)UART3_BASE) +#define SPI0 ((SPI_TypeDef *) SPI0_BASE) +#define SPI1 ((SPI_TypeDef *) SPI1_BASE) -#define SPI0 ((SPI_TypeDef *)SPI0_BASE) -#define SPI1 ((SPI_TypeDef *)SPI1_BASE) +#define I2C0 ((I2C_TypeDef *) I2C0_BASE) +#define I2C1 ((I2C_TypeDef *) I2C1_BASE) -#define I2C0 ((I2C_TypeDef *)I2C0_BASE) -#define I2C1 ((I2C_TypeDef *)I2C1_BASE) +#define ADC0 ((ADC_TypeDef *) ADC0_BASE) +#define ADC1 ((ADC_TypeDef *) ADC1_BASE) -#define ADC0 ((ADC_TypeDef *)ADC0_BASE) -#define ADC1 ((ADC_TypeDef *)ADC1_BASE) +#define PWM0 ((PWM_TypeDef *) PWM0_BASE) +#define PWM1 ((PWM_TypeDef *) PWM1_BASE) +#define PWM2 ((PWM_TypeDef *) PWM2_BASE) +#define PWM3 ((PWM_TypeDef *) PWM3_BASE) +#define PWM4 ((PWM_TypeDef *) PWM4_BASE) +#define PWM5 ((PWM_TypeDef *) PWM5_BASE) +#define PWMG ((PWMG_TypeDef *) PWMG_BASE) -#define PWM0 ((PWM_TypeDef *)PWM0_BASE) -#define PWM1 ((PWM_TypeDef *)PWM1_BASE) -#define PWM2 ((PWM_TypeDef *)PWM2_BASE) -#define PWM3 ((PWM_TypeDef *)PWM3_BASE) -#define PWM4 ((PWM_TypeDef *)PWM4_BASE) -#define PWM5 ((PWM_TypeDef *)PWM5_BASE) -#define PWMG ((PWMG_TypeDef *)PWMG_BASE) +#define SDIO ((SDIO_TypeDef *) SDIO_BASE) -#define SDIO ((SDIO_TypeDef *)SDIO_BASE) +#define DMA ((DMA_TypeDef *) DMA_BASE) -#define DMA ((DMA_TypeDef *)DMA_BASE) +#define CAN ((CAN_TypeDef *) CAN_BASE) -#define CAN ((CAN_TypeDef *)CAN_BASE) +#define LCD ((LCD_TypeDef *) LCD_BASE) -#define LCD ((LCD_TypeDef *)LCD_BASE) +#define CRC ((CRC_TypeDef *) CRC_BASE) -#define CRC ((CRC_TypeDef *)CRC_BASE) +#define RTC ((RTC_TypeDef *) RTC_BASE) -#define RTC ((RTC_TypeDef *)RTC_BASE) +#define WDT ((WDT_TypeDef *) WDT_BASE) -#define WDT ((WDT_TypeDef *)WDT_BASE) +#define FLASH ((FLASH_Typedef*) FLASH_BASE) -#define FLASH ((FLASH_Typedef *)FLASH_BASE) +#define SRAMC ((SRAMC_TypeDef*) SRAMC_BASE) -#define SRAMC ((SRAMC_TypeDef *)SRAMC_BASE) +#define NORFLC ((NORFLC_TypeDef*) NORFLC_BASE) -#define NORFLC ((NORFLC_TypeDef *)NORFLC_BASE) +#define SDRAMC ((SDRAMC_TypeDef*) SDRAMC_BASE) -#define SDRAMC ((SDRAMC_TypeDef *)SDRAMC_BASE) -typedef void (*Func_void_void)(void); + +typedef void (* Func_void_void) (void); + #include "SWM320_port.h" #include "SWM320_gpio.h" @@ -3564,4 +3622,5 @@ typedef void (*Func_void_void)(void); #include "SWM320_rtc.h" #include "SWM320_wdt.h" + #endif //__SWM320_H__ diff --git a/bsp/swm320/libraries/CMSIS/DeviceSupport/system_SWM320.c b/bsp/swm320/libraries/CMSIS/DeviceSupport/system_SWM320.c index c367b17d1127febd8b5cb9d189972beea2d7d86b..a99fa78fc9ffe2e63204cceb77f40fa1d37d37ae 100644 --- a/bsp/swm320/libraries/CMSIS/DeviceSupport/system_SWM320.c +++ b/bsp/swm320/libraries/CMSIS/DeviceSupport/system_SWM320.c @@ -1,262 +1,280 @@ -/****************************************************************************************************************************************** -* 文件名称: system_SWM320.c -* 功能说明: SWM320单片机的时钟设置 -* 技术支持: http://www.synwit.com.cn/e/tool/gbook/?bid=1 -* 注意事项: -* 版本日期: V1.1.0 2017年10月25日 -* 升级记录: +/****************************************************************************************************************************************** +* ļ: system_SWM320.c +* ˵: SWM320Ƭʱ +* ֧: http://www.synwit.com.cn/e/tool/gbook/?bid=1 +* ע: +* 汾: V1.1.0 20171025 +* ¼: * * ******************************************************************************************************************************************* * @attention * -* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS WITH CODING INFORMATION -* REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. AS A RESULT, SYNWIT SHALL NOT BE HELD LIABLE -* FOR ANY DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT +* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS WITH CODING INFORMATION +* REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. AS A RESULT, SYNWIT SHALL NOT BE HELD LIABLE +* FOR ANY DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT * OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION CONTAINED HEREIN IN CONN- * -ECTION WITH THEIR PRODUCTS. * * COPYRIGHT 2012 Synwit Technology -*******************************************************************************************************************************************/ +*******************************************************************************************************************************************/ #include #include "SWM320.h" + /****************************************************************************************************************************************** - * 系统时钟设定 + * ϵͳʱ趨 *****************************************************************************************************************************************/ -#define SYS_CLK_20MHz 0 //0 内部高频20MHz RC振荡器 -#define SYS_CLK_40MHz 1 //1 内部高频40MHz RC振荡器 -#define SYS_CLK_32KHz 2 //2 内部低频32KHz RC振荡器 -#define SYS_CLK_XTAL 3 //3 外部晶体振荡器（2-30MHz） -#define SYS_CLK_PLL 4 //4 片内锁相环输出 +#define SYS_CLK_20MHz 0 //0 ڲƵ20MHz RC +#define SYS_CLK_40MHz 1 //1 ڲƵ40MHz RC +#define SYS_CLK_32KHz 2 //2 ڲƵ32KHz RC +#define SYS_CLK_XTAL 3 //3 ⲿ2-30MHz +#define SYS_CLK_PLL 4 //4 Ƭ໷ -#define SYS_CLK SYS_CLK_PLL +#define SYS_CLK SYS_CLK_PLL -#define SYS_CLK_DIV_1 0 -#define SYS_CLK_DIV_2 1 -#define SYS_CLK_DIV SYS_CLK_DIV_1 +#define SYS_CLK_DIV_1 0 +#define SYS_CLK_DIV_2 1 -#define __HSI (20000000UL) //高速内部时钟 -#define __LSI (32000UL) //低速内部时钟 -#define __HSE (20000000UL) //高速外部时钟 +#define SYS_CLK_DIV SYS_CLK_DIV_1 -/********************************** PLL 设定 ********************************************** - * VCO输出频率 = PLL输入时钟 / INDIV * 4 * FBDIV - * PLL输出频率 = PLL输入时钟 / INDIV * 4 * FBDIV / OUTDIV = VCO输出频率 / OUTDIV - *****************************************************************************************/ -#define SYS_PLL_SRC SYS_CLK_20MHz //可取值SYS_CLK_20MHz、SYS_CLK_XTAL -#define PLL_IN_DIV 5 +#define __HSI (20000000UL) //ڲʱ +#define __LSI ( 32000UL) //ڲʱ +#define __HSE (20000000UL) //ⲿʱ -#define PLL_FB_DIV 60 -#define PLL_OUT_DIV8 0 -#define PLL_OUT_DIV4 1 -#define PLL_OUT_DIV2 2 +/********************************** PLL 趨 ********************************************** + * VCOƵ = PLLʱ / INDIV * 4 * FBDIV + * PLLƵ = PLLʱ / INDIV * 4 * FBDIV / OUTDIV = VCOƵ / OUTDIV + *****************************************************************************************/ +#define SYS_PLL_SRC SYS_CLK_20MHz //ȡֵSYS_CLK_20MHzSYS_CLK_XTAL -#define PLL_OUT_DIV PLL_OUT_DIV8 +#define PLL_IN_DIV 5 -uint32_t SystemCoreClock = __HSI; //System Clock Frequency (Core Clock) -uint32_t CyclesPerUs = (__HSI / 1000000); //Cycles per micro second +#define PLL_FB_DIV 60 -/****************************************************************************************************************************************** -* 函数名称: -* 功能说明: This function is used to update the variable SystemCoreClock and must be called whenever the core clock is changed -* 输 入: -* 输 出: -* 注意事项: -******************************************************************************************************************************************/ -void SystemCoreClockUpdate(void) -{ - if (SYS->CLKSEL & SYS_CLKSEL_SYS_Msk) //SYS_CLK <= HFCK - { - if (SYS->CLKSEL & SYS_CLKSEL_HFCK_Msk) //HFCK <= XTAL - { - SystemCoreClock = __HSE; - } - else //HFCK <= HRC - { - if (SYS->HRCCR & SYS_HRCCR_DBL_Msk) //HRC = 40MHz - { - SystemCoreClock = __HSI * 2; - } - else //HRC = 20MHz - { - SystemCoreClock = __HSI; - } - } - } - else //SYS_CLK <= LFCK - { - if (SYS->CLKSEL & SYS_CLKSEL_LFCK_Msk) //LFCK <= PLL - { - if (SYS->PLLCR & SYS_PLLCR_INSEL_Msk) //PLL_SRC <= HRC - { - SystemCoreClock = __HSI; - } - else //PLL_SRC <= XTAL - { - SystemCoreClock = __HSE; - } - SystemCoreClock = SystemCoreClock / PLL_IN_DIV * PLL_FB_DIV * 4 / (2 << (2 - PLL_OUT_DIV)); - } - else //LFCK <= LRC - { - SystemCoreClock = __LSI; - } - } +#define PLL_OUT_DIV8 0 +#define PLL_OUT_DIV4 1 +#define PLL_OUT_DIV2 2 - if (SYS->CLKDIV & SYS_CLKDIV_SYS_Msk) - SystemCoreClock /= 2; +#define PLL_OUT_DIV PLL_OUT_DIV8 - CyclesPerUs = SystemCoreClock / 1000000; -} - -/****************************************************************************************************************************************** -* 函数名称: -* 功能说明: The necessary initializaiton of systerm -* 输 入: -* 输 出: -* 注意事项: -******************************************************************************************************************************************/ -void SystemInit(void) -{ - SYS->CLKEN |= (1 << SYS_CLKEN_ANAC_Pos); - switch (SYS_CLK) - { - case SYS_CLK_20MHz: //0 内部高频20MHz RC振荡器 - switchCLK_20MHz(); - break; - case SYS_CLK_40MHz: //1 内部高频40MHz RC振荡器 - switchCLK_40MHz(); - break; +uint32_t SystemCoreClock = __HSI; //System Clock Frequency (Core Clock) +uint32_t CyclesPerUs = (__HSI / 1000000); //Cycles per micro second - case SYS_CLK_32KHz: //2 内部低频32KHz RC振荡器 - switchCLK_32KHz(); - break; - case SYS_CLK_XTAL: //3 外部晶体振荡器（2-30MHz） - switchCLK_XTAL(); - break; - - case SYS_CLK_PLL: //4 片内锁相环输出 - switchCLK_PLL(); - break; - } - - SYS->CLKDIV &= ~SYS_CLKDIV_SYS_Msk; - SYS->CLKDIV |= (SYS_CLK_DIV << SYS_CLKDIV_SYS_Pos); +/****************************************************************************************************************************************** +* : +* ˵: This function is used to update the variable SystemCoreClock and must be called whenever the core clock is changed +* : +* : +* ע: +******************************************************************************************************************************************/ +void SystemCoreClockUpdate(void) +{ + if(SYS->CLKSEL & SYS_CLKSEL_SYS_Msk) //SYS_CLK <= HFCK + { + if(SYS->CLKSEL & SYS_CLKSEL_HFCK_Msk) //HFCK <= XTAL + { + SystemCoreClock = __HSE; + } + else //HFCK <= HRC + { + if(SYS->HRCCR & SYS_HRCCR_DBL_Msk) //HRC = 40MHz + { + SystemCoreClock = __HSI*2; + } + else //HRC = 20MHz + { + SystemCoreClock = __HSI; + } + } + } + else //SYS_CLK <= LFCK + { + if(SYS->CLKSEL & SYS_CLKSEL_LFCK_Msk) //LFCK <= PLL + { + if(SYS->PLLCR & SYS_PLLCR_INSEL_Msk) //PLL_SRC <= HRC + { + SystemCoreClock = __HSI; + } + else //PLL_SRC <= XTAL + { + SystemCoreClock = __HSE; + } + + SystemCoreClock = SystemCoreClock / PLL_IN_DIV * PLL_FB_DIV * 4 / (2 << (2 - PLL_OUT_DIV)); + } + else //LFCK <= LRC + { + SystemCoreClock = __LSI; + } + } + + if(SYS->CLKDIV & SYS_CLKDIV_SYS_Msk) SystemCoreClock /= 2; + + CyclesPerUs = SystemCoreClock / 1000000; +} - SystemCoreClockUpdate(); +/****************************************************************************************************************************************** +* : +* ˵: The necessary initializaiton of systerm +* : +* : +* ע: +******************************************************************************************************************************************/ +void SystemInit(void) +{ + SYS->CLKEN |= (1 << SYS_CLKEN_ANAC_Pos); + + Flash_Param_at_xMHz(120); + + switch(SYS_CLK) + { + case SYS_CLK_20MHz: //0 ڲƵ20MHz RC + switchCLK_20MHz(); + break; + + case SYS_CLK_40MHz: //1 ڲƵ40MHz RC + switchCLK_40MHz(); + break; + + case SYS_CLK_32KHz: //2 ڲƵ32KHz RC + switchCLK_32KHz(); + break; + + case SYS_CLK_XTAL: //3 ⲿ2-30MHz + switchCLK_XTAL(); + break; + + case SYS_CLK_PLL: //4 Ƭ໷ + switchCLK_PLL(); + break; + } + + SYS->CLKDIV &= ~SYS_CLKDIV_SYS_Msk; + SYS->CLKDIV |= (SYS_CLK_DIV << SYS_CLKDIV_SYS_Pos); + + SystemCoreClockUpdate(); + + if(SystemCoreClock > 80000000) + { + Flash_Param_at_xMHz(120); + } + else if(SystemCoreClock > 40000000) + { + Flash_Param_at_xMHz(80); + } + else if(SystemCoreClock > 30000000) + { + Flash_Param_at_xMHz(40); + } + else + { + Flash_Param_at_xMHz(30); + } } void switchCLK_20MHz(void) { - uint32_t i; - - SYS->HRCCR = (0 << SYS_HRCCR_OFF_Pos) | - (0 << SYS_HRCCR_DBL_Pos); //HRC = 20MHz - - for (i = 0; i < 1000; i++) - __NOP(); - - SYS->CLKSEL &= ~SYS_CLKSEL_HFCK_Msk; //HFCK <= HRC - SYS->CLKSEL |= (1 << SYS_CLKSEL_SYS_Pos); //SYS_CLK <= HFCK + uint32_t i; + + SYS->HRCCR = (0 << SYS_HRCCR_OFF_Pos) | + (0 << SYS_HRCCR_DBL_Pos); //HRC = 20MHz + + for(i = 0; i < 1000; i++) __NOP(); + + SYS->CLKSEL &= ~SYS_CLKSEL_HFCK_Msk; //HFCK <= HRC + SYS->CLKSEL |= (1 << SYS_CLKSEL_SYS_Pos); //SYS_CLK <= HFCK } void switchCLK_40MHz(void) { - uint32_t i; - - SYS->HRCCR = (0 << SYS_HRCCR_OFF_Pos) | - (1 << SYS_HRCCR_DBL_Pos); //HRC = 40MHz - - for (i = 0; i < 1000; i++) - __NOP(); - - SYS->CLKSEL &= ~SYS_CLKSEL_HFCK_Msk; //HFCK <= HRC - SYS->CLKSEL |= (1 << SYS_CLKSEL_SYS_Pos); //SYS_CLK <= HFCK + uint32_t i; + + SYS->HRCCR = (0 << SYS_HRCCR_OFF_Pos) | + (1 << SYS_HRCCR_DBL_Pos); //HRC = 40MHz + + for(i = 0; i < 1000; i++) __NOP(); + + SYS->CLKSEL &= ~SYS_CLKSEL_HFCK_Msk; //HFCK <= HRC + SYS->CLKSEL |= (1 << SYS_CLKSEL_SYS_Pos); //SYS_CLK <= HFCK } void switchCLK_32KHz(void) { - uint32_t i; - - SYS->CLKEN |= (1 << SYS_CLKEN_RTCBKP_Pos); - - SYS->LRCCR &= ~(1 << SYS_LRCCR_OFF_Pos); - - for (i = 0; i < 100; i++) - __NOP(); - - SYS->CLKSEL &= ~SYS_CLKSEL_LFCK_Msk; //LFCK <= LRC - SYS->CLKSEL &= ~SYS_CLKSEL_SYS_Msk; //SYS_CLK <= LFCK + uint32_t i; + + SYS->CLKEN |= (1 << SYS_CLKEN_RTCBKP_Pos); + + SYS->LRCCR &= ~(1 << SYS_LRCCR_OFF_Pos); + + for(i = 0; i < 100; i++) __NOP(); + + SYS->CLKSEL &= ~SYS_CLKSEL_LFCK_Msk; //LFCK <= LRC + SYS->CLKSEL &= ~SYS_CLKSEL_SYS_Msk; //SYS_CLK <= LFCK } void switchCLK_XTAL(void) { - uint32_t i; - - SYS->XTALCR = (1 << SYS_XTALCR_EN_Pos); - - for (i = 0; i < 1000; i++) - __NOP(); - - SYS->CLKSEL |= (1 << SYS_CLKSEL_HFCK_Pos); //HFCK <= XTAL - SYS->CLKSEL |= (1 << SYS_CLKSEL_SYS_Pos); //SYS_CLK <= HFCK + uint32_t i; + + SYS->XTALCR = (1 << SYS_XTALCR_EN_Pos); + + for(i = 0; i < 1000; i++) __NOP(); + + SYS->CLKSEL |= (1 << SYS_CLKSEL_HFCK_Pos); //HFCK <= XTAL + SYS->CLKSEL |= (1 << SYS_CLKSEL_SYS_Pos); //SYS_CLK <= HFCK } void switchCLK_PLL(void) { - uint32_t i; - - PLLInit(); - SYS->PLLCR |= (1 << SYS_PLLCR_OUTEN_Pos); - - for (i = 0; i < 10000; i++) - __NOP(); - - SYS->CLKSEL |= (1 << SYS_CLKSEL_LFCK_Pos); //LFCK <= PLL - SYS->CLKSEL &= ~SYS_CLKSEL_SYS_Msk; //SYS_CLK <= LFCK + uint32_t i; + + PLLInit(); + SYS->PLLCR |= (1 << SYS_PLLCR_OUTEN_Pos); + + for(i = 0; i < 10000; i++) __NOP(); + + SYS->CLKSEL |= (1 << SYS_CLKSEL_LFCK_Pos); //LFCK <= PLL + SYS->CLKSEL &= ~SYS_CLKSEL_SYS_Msk; //SYS_CLK <= LFCK } void PLLInit(void) { - uint32_t i; - - if (SYS_PLL_SRC == SYS_CLK_20MHz) - { - SYS->HRCCR = (0 << SYS_HRCCR_OFF_Pos) | - (0 << SYS_HRCCR_DBL_Pos); //HRC = 20MHz - - for (i = 0; i < 1000; i++) - __NOP(); - - SYS->PLLCR |= (1 << SYS_PLLCR_INSEL_Pos); //PLL_SRC <= HRC - } - else if (SYS_PLL_SRC == SYS_CLK_XTAL) - { - SYS->XTALCR = (1 << SYS_XTALCR_EN_Pos); - - for (i = 0; i < 20000; i++) - ; - - SYS->PLLCR &= ~(1 << SYS_PLLCR_INSEL_Pos); //PLL_SRC <= XTAL - } - - SYS->PLLDIV &= ~(SYS_PLLDIV_INDIV_Msk | - SYS_PLLDIV_FBDIV_Msk | - SYS_PLLDIV_OUTDIV_Msk); - SYS->PLLDIV |= (PLL_IN_DIV << SYS_PLLDIV_INDIV_Pos) | - (PLL_FB_DIV << SYS_PLLDIV_FBDIV_Pos) | - (PLL_OUT_DIV << SYS_PLLDIV_OUTDIV_Pos); - - SYS->PLLCR &= ~(1 << SYS_PLLCR_OFF_Pos); - - while (SYS->PLLLOCK == 0) - ; //等待PLL锁定 + uint32_t i; + + if(SYS_PLL_SRC == SYS_CLK_20MHz) + { + SYS->HRCCR = (0 << SYS_HRCCR_OFF_Pos) | + (0 << SYS_HRCCR_DBL_Pos); //HRC = 20MHz + + for(i = 0; i < 1000; i++) __NOP(); + + SYS->PLLCR |= (1 << SYS_PLLCR_INSEL_Pos); //PLL_SRC <= HRC + } + else if(SYS_PLL_SRC == SYS_CLK_XTAL) + { + SYS->XTALCR = (1 << SYS_XTALCR_EN_Pos); + + for(i = 0; i < 20000; i++); + + SYS->PLLCR &= ~(1 << SYS_PLLCR_INSEL_Pos); //PLL_SRC <= XTAL + } + + SYS->PLLDIV &= ~(SYS_PLLDIV_INDIV_Msk | + SYS_PLLDIV_FBDIV_Msk | + SYS_PLLDIV_OUTDIV_Msk); + SYS->PLLDIV |= (PLL_IN_DIV << SYS_PLLDIV_INDIV_Pos) | + (PLL_FB_DIV << SYS_PLLDIV_FBDIV_Pos) | + (PLL_OUT_DIV<< SYS_PLLDIV_OUTDIV_Pos); + + SYS->PLLCR &= ~(1 << SYS_PLLCR_OFF_Pos); + + while(SYS->PLLLOCK == 0); //ȴPLL } diff --git a/bsp/swm320/libraries/CMSIS/DeviceSupport/system_SWM320.h b/bsp/swm320/libraries/CMSIS/DeviceSupport/system_SWM320.h index 4db7f29433bf25dbe05cdb3a3347d997921865d2..3967e4059cad9177e6ce5ea3ab66cc33c59a45eb 100644 --- a/bsp/swm320/libraries/CMSIS/DeviceSupport/system_SWM320.h +++ b/bsp/swm320/libraries/CMSIS/DeviceSupport/system_SWM320.h @@ -2,24 +2,28 @@ #define __SYSTEM_SWM320_H__ #ifdef __cplusplus -extern "C" -{ + extern "C" { #endif - extern uint32_t SystemCoreClock; // System Clock Frequency (Core Clock) - extern uint32_t CyclesPerUs; // Cycles per micro second - extern void SystemInit(void); +extern uint32_t SystemCoreClock; // System Clock Frequency (Core Clock) +extern uint32_t CyclesPerUs; // Cycles per micro second - extern void SystemCoreClockUpdate(void); - extern void switchCLK_20MHz(void); - extern void switchCLK_40MHz(void); - extern void switchCLK_32KHz(void); - extern void switchCLK_XTAL(void); - extern void switchCLK_PLL(void); +extern void SystemInit(void); + +extern void SystemCoreClockUpdate (void); + + + +extern void switchCLK_20MHz(void); +extern void switchCLK_40MHz(void); +extern void switchCLK_32KHz(void); +extern void switchCLK_XTAL(void); +extern void switchCLK_PLL(void); + +extern void PLLInit(void); - extern void PLLInit(void); #ifdef __cplusplus } diff --git a/bsp/swm320/libraries/SWM320_StdPeriph_Driver/SWM320_adc.c b/bsp/swm320/libraries/SWM320_StdPeriph_Driver/SWM320_adc.c index 7f5f64e84ea47bcab00b56a172e83619ff83c949..8f73ec62c98a2b85b3eb5920305769dc3f31ccad 100644 --- a/bsp/swm320/libraries/SWM320_StdPeriph_Driver/SWM320_adc.c +++ b/bsp/swm320/libraries/SWM320_StdPeriph_Driver/SWM320_adc.c @@ -1,10 +1,10 @@ /****************************************************************************************************************************************** -* ļ: SWM320_adc.c -* ˵: SWM320ƬADCģת -* ֧: http://www.synwit.com.cn/e/tool/gbook/?bid=1 -* ע: -* 汾: V1.1.0 20171025 -* ¼: +* 文件名称: SWM320_adc.c +* 功能说明: SWM320单片机的ADC数模转换器功能驱动库 +* 技术支持: http://www.synwit.com.cn/e/tool/gbook/?bid=1 +* 注意事项: +* 版本日期: V1.1.0 2017年10月25日 +* 升级记录: ******************************************************************************************************************************************* * @attention * @@ -21,12 +21,12 @@ /****************************************************************************************************************************************** -* : ADC_Init() -* ˵: ADCģתʼ -* : ADC_TypeDef * ADCx ָҪõADCЧֵADC0ADC1 -* ADC_InitStructure * initStruct ADCضֵĽṹ -* : -* ע: +* 函数名称: ADC_Init() +* 功能说明: ADC模数转换器初始化 +* 输 入: ADC_TypeDef * ADCx 指定要被设置的ADC，有效值包括ADC0、ADC1 +* ADC_InitStructure * initStruct 包含ADC各相关定值的结构体 +* 输 出: 无 +* 注意事项: 无 ******************************************************************************************************************************************/ void ADC_Init(ADC_TypeDef * ADCx, ADC_InitStructure * initStruct) { @@ -41,7 +41,7 @@ void ADC_Init(ADC_TypeDef * ADCx, ADC_InitStructure * initStruct) break; } - ADC_Close(ADCx); //һЩؼĴֻADCرʱ + ADC_Close(ADCx); //一些关键寄存器只能在ADC关闭时设置 if(initStruct->clk_src == ADC_CLKSRC_HRC) { @@ -80,7 +80,7 @@ void ADC_Init(ADC_TypeDef * ADCx, ADC_InitStructure * initStruct) (initStruct->trig_src << ADC_CTRL_TRIG_Pos) | (initStruct->Continue << ADC_CTRL_CONT_Pos); - ADCx->IF = 0xFFFFFFFF; //жϱ־ + ADCx->IF = 0xFFFFFFFF; //清除中断标志 ADCx->IE &= ~(ADC_IE_CH0EOC_Msk | ADC_IE_CH1EOC_Msk | ADC_IE_CH2EOC_Msk | ADC_IE_CH3EOC_Msk | ADC_IE_CH4EOC_Msk | ADC_IE_CH5EOC_Msk | ADC_IE_CH6EOC_Msk | ADC_IE_CH7EOC_Msk); @@ -153,11 +153,11 @@ void ADC_Init(ADC_TypeDef * ADCx, ADC_InitStructure * initStruct) } /****************************************************************************************************************************************** -* : ADC_Open() -* ˵: ADCӲADCת -* : ADC_TypeDef * ADCx ָҪõADCȡֵADC -* : -* ע: +* 函数名称: ADC_Open() +* 功能说明: ADC开启，可以软件启动、或硬件触发ADC转换 +* 输 入: ADC_TypeDef * ADCx 指定要被设置的ADC，可取值包括ADC +* 输 出: 无 +* 注意事项: 无 ******************************************************************************************************************************************/ void ADC_Open(ADC_TypeDef * ADCx) { @@ -165,11 +165,11 @@ void ADC_Open(ADC_TypeDef * ADCx) } /****************************************************************************************************************************************** -* : ADC_Close() -* ˵: ADCرգ޷ӲADCת -* : ADC_TypeDef * ADCx ָҪõADCȡֵADC -* : -* ע: +* 函数名称: ADC_Close() +* 功能说明: ADC关闭，无法软件启动、或硬件触发ADC转换 +* 输 入: ADC_TypeDef * ADCx 指定要被设置的ADC，可取值包括ADC +* 输 出: 无 +* 注意事项: 无 ******************************************************************************************************************************************/ void ADC_Close(ADC_TypeDef * ADCx) { @@ -177,11 +177,11 @@ void ADC_Close(ADC_TypeDef * ADCx) } /****************************************************************************************************************************************** -* : ADC_Start() -* ˵: ģʽADCת -* : ADC_TypeDef * ADCx ָҪõADCȡֵADC -* : -* ע: +* 函数名称: ADC_Start() +* 功能说明: 软件触发模式下启动ADC转换 +* 输 入: ADC_TypeDef * ADCx 指定要被设置的ADC，可取值包括ADC +* 输 出: 无 +* 注意事项: 无 ******************************************************************************************************************************************/ void ADC_Start(ADC_TypeDef * ADCx) { @@ -189,11 +189,11 @@ void ADC_Start(ADC_TypeDef * ADCx) } /****************************************************************************************************************************************** -* : ADC_Stop() -* ˵: ģʽֹͣADCת -* : ADC_TypeDef * ADCx ָҪõADCȡֵADC -* : -* ע: +* 函数名称: ADC_Stop() +* 功能说明: 软件触发模式下停止ADC转换 +* 输 入: ADC_TypeDef * ADCx 指定要被设置的ADC，可取值包括ADC +* 输 出: 无 +* 注意事项: 无 ******************************************************************************************************************************************/ void ADC_Stop(ADC_TypeDef * ADCx) { @@ -220,12 +220,12 @@ static uint32_t chn2idx(uint32_t chn) } /****************************************************************************************************************************************** -* : ADC_Read() -* ˵: ָͨȡת -* : ADC_TypeDef * ADCx ָҪõADCȡֵADC -* uint32_t chn ҪȡתͨЧֵADC_CH0ADC_CH1... ... ADC_CH7 -* : uint32_t ȡת -* ע: +* 函数名称: ADC_Read() +* 功能说明: 从指定通道读取转换结果 +* 输 入: ADC_TypeDef * ADCx 指定要被设置的ADC，可取值包括ADC +* uint32_t chn 要读取转换结果的通道，有效值ADC_CH0、ADC_CH1、... ... 、ADC_CH7 +* 输 出: uint32_t 读取到的转换结果 +* 注意事项: 无 ******************************************************************************************************************************************/ uint32_t ADC_Read(ADC_TypeDef * ADCx, uint32_t chn) { @@ -234,18 +234,18 @@ uint32_t ADC_Read(ADC_TypeDef * ADCx, uint32_t chn) dat = ADCx->CH[idx].DATA; - ADCx->CH[idx].STAT = 0x01; //EOC־ + ADCx->CH[idx].STAT = 0x01; //清除EOC标志 return dat; } /****************************************************************************************************************************************** -* : ADC_IsEOC() -* ˵: ָͨǷEnd Of Conversion -* : ADC_TypeDef * ADCx ָҪõADCȡֵADC -* uint32_t chn Ҫѯ״̬ͨЧֵADC_CH0ADC_CH1... ... ADC_CH7 -* : uint32_t 1 ͨת 0 ͨδת -* ע: +* 函数名称: ADC_IsEOC() +* 功能说明: 指定通道是否End Of Conversion +* 输 入: ADC_TypeDef * ADCx 指定要被设置的ADC，可取值包括ADC +* uint32_t chn 要查询状态的通道，有效值ADC_CH0、ADC_CH1、... ... 、ADC_CH7 +* 输 出: uint32_t 1 该通道完成了转换 0 该通道未完成转换 +* 注意事项: 无 ******************************************************************************************************************************************/ uint32_t ADC_IsEOC(ADC_TypeDef * ADCx, uint32_t chn) { @@ -255,12 +255,12 @@ uint32_t ADC_IsEOC(ADC_TypeDef * ADCx, uint32_t chn) } /****************************************************************************************************************************************** -* : ADC_ChnSelect() -* ˵: ADCͨѡͨģתѡͨͨβת -* : ADC_TypeDef * ADCx ָҪõADCȡֵADC -* uint32_t chns ҪѡͨͨЧֵADC_CH0ADC_CH1... ... ADC_CH7ϣλ㣩 -* : -* ע: +* 函数名称: ADC_ChnSelect() +* 功能说明: ADC通道选通，模数转换会在选通的通道上依次采样转换 +* 输 入: ADC_TypeDef * ADCx 指定要被设置的ADC，可取值包括ADC +* uint32_t chns 要选通的通道，有效值ADC_CH0、ADC_CH1、... ... 、ADC_CH7及其组合（即“按位或”运算） +* 输 出: 无 +* 注意事项: 无 ******************************************************************************************************************************************/ void ADC_ChnSelect(ADC_TypeDef * ADCx, uint32_t chns) { @@ -270,12 +270,12 @@ void ADC_ChnSelect(ADC_TypeDef * ADCx, uint32_t chns) /****************************************************************************************************************************************** -* : ADC_IntEOCEn() -* ˵: תжʹ -* : ADC_TypeDef * ADCx ָҪõADCȡֵADC -* uint32_t chn ҪõͨЧֵADC_CH0ADC_CH1... ... ADC_CH7 -* : -* ע: +* 函数名称: ADC_IntEOCEn() +* 功能说明: 转换完成中断使能 +* 输 入: ADC_TypeDef * ADCx 指定要被设置的ADC，可取值包括ADC +* uint32_t chn 要设置的通道，有效值ADC_CH0、ADC_CH1、... ... 、ADC_CH7 +* 输 出: 无 +* 注意事项: 无 ******************************************************************************************************************************************/ void ADC_IntEOCEn(ADC_TypeDef * ADCx, uint32_t chn) { @@ -285,12 +285,12 @@ void ADC_IntEOCEn(ADC_TypeDef * ADCx, uint32_t chn) } /****************************************************************************************************************************************** -* : ADC_IntEOCDis() -* ˵: תжϽֹ -* : ADC_TypeDef * ADCx ָҪõADCȡֵADC -* uint32_t chn ҪõͨЧֵADC_CH0ADC_CH1... ... ADC_CH7 -* : -* ע: +* 函数名称: ADC_IntEOCDis() +* 功能说明: 转换完成中断禁止 +* 输 入: ADC_TypeDef * ADCx 指定要被设置的ADC，可取值包括ADC +* uint32_t chn 要设置的通道，有效值ADC_CH0、ADC_CH1、... ... 、ADC_CH7 +* 输 出: 无 +* 注意事项: 无 ******************************************************************************************************************************************/ void ADC_IntEOCDis(ADC_TypeDef * ADCx, uint32_t chn) { @@ -300,12 +300,12 @@ void ADC_IntEOCDis(ADC_TypeDef * ADCx, uint32_t chn) } /****************************************************************************************************************************************** -* : ADC_IntEOCClr() -* ˵: תжϱ־ -* : ADC_TypeDef * ADCx ָҪõADCȡֵADC -* uint32_t chn ҪõͨЧֵADC_CH0ADC_CH1... ... ADC_CH7 -* : -* ע: +* 函数名称: ADC_IntEOCClr() +* 功能说明: 转换完成中断标志清除 +* 输 入: ADC_TypeDef * ADCx 指定要被设置的ADC，可取值包括ADC +* uint32_t chn 要设置的通道，有效值ADC_CH0、ADC_CH1、... ... 、ADC_CH7 +* 输 出: 无 +* 注意事项: 无 ******************************************************************************************************************************************/ void ADC_IntEOCClr(ADC_TypeDef * ADCx, uint32_t chn) { @@ -315,12 +315,12 @@ void ADC_IntEOCClr(ADC_TypeDef * ADCx, uint32_t chn) } /****************************************************************************************************************************************** -* : ADC_IntEOCStat() -* ˵: תж״̬ -* : ADC_TypeDef * ADCx ָҪõADCȡֵADC -* uint32_t chn ҪѯͨЧֵADC_CH0ADC_CH1... ... ADC_CH7 -* : uint32_t 1 ͨת 0 ͨδת -* ע: +* 函数名称: ADC_IntEOCStat() +* 功能说明: 转换完成中断状态 +* 输 入: ADC_TypeDef * ADCx 指定要被设置的ADC，可取值包括ADC +* uint32_t chn 要查询的通道，有效值ADC_CH0、ADC_CH1、... ... 、ADC_CH7 +* 输 出: uint32_t 1 该通道完成了转换 0 该通道未完成转换 +* 注意事项: 无 ******************************************************************************************************************************************/ uint32_t ADC_IntEOCStat(ADC_TypeDef * ADCx, uint32_t chn) { @@ -330,12 +330,12 @@ uint32_t ADC_IntEOCStat(ADC_TypeDef * ADCx, uint32_t chn) } /****************************************************************************************************************************************** -* : ADC_IntOVFEn() -* ˵: жʹ -* : ADC_TypeDef * ADCx ָҪõADCȡֵADC -* uint32_t chn ҪõͨЧֵADC_CH0ADC_CH1... ... ADC_CH7 -* : -* ע: +* 函数名称: ADC_IntOVFEn() +* 功能说明: 数据溢出中断使能 +* 输 入: ADC_TypeDef * ADCx 指定要被设置的ADC，可取值包括ADC +* uint32_t chn 要设置的通道，有效值ADC_CH0、ADC_CH1、... ... 、ADC_CH7 +* 输 出: 无 +* 注意事项: 无 ******************************************************************************************************************************************/ void ADC_IntOVFEn(ADC_TypeDef * ADCx, uint32_t chn) { @@ -345,12 +345,12 @@ void ADC_IntOVFEn(ADC_TypeDef * ADCx, uint32_t chn) } /****************************************************************************************************************************************** -* : ADC_IntOVFDis() -* ˵: жϽֹ -* : ADC_TypeDef * ADCx ָҪõADCȡֵADC -* uint32_t chn ҪõͨЧֵADC_CH0ADC_CH1... ... ADC_CH7 -* : -* ע: +* 函数名称: ADC_IntOVFDis() +* 功能说明: 数据溢出中断禁止 +* 输 入: ADC_TypeDef * ADCx 指定要被设置的ADC，可取值包括ADC +* uint32_t chn 要设置的通道，有效值ADC_CH0、ADC_CH1、... ... 、ADC_CH7 +* 输 出: 无 +* 注意事项: 无 ******************************************************************************************************************************************/ void ADC_IntOVFDis(ADC_TypeDef * ADCx, uint32_t chn) { @@ -360,12 +360,12 @@ void ADC_IntOVFDis(ADC_TypeDef * ADCx, uint32_t chn) } /****************************************************************************************************************************************** -* : ADC_IntOVFClr() -* ˵: жϱ־ -* : ADC_TypeDef * ADCx ָҪõADCȡֵADC -* uint32_t chn ҪõͨЧֵADC_CH0ADC_CH1... ... ADC_CH7 -* : -* ע: +* 函数名称: ADC_IntOVFClr() +* 功能说明: 数据溢出中断标志清除 +* 输 入: ADC_TypeDef * ADCx 指定要被设置的ADC，可取值包括ADC +* uint32_t chn 要设置的通道，有效值ADC_CH0、ADC_CH1、... ... 、ADC_CH7 +* 输 出: 无 +* 注意事项: 无 ******************************************************************************************************************************************/ void ADC_IntOVFClr(ADC_TypeDef * ADCx, uint32_t chn) { @@ -375,12 +375,12 @@ void ADC_IntOVFClr(ADC_TypeDef * ADCx, uint32_t chn) } /****************************************************************************************************************************************** -* : ADC_IntOVFStat() -* ˵: ж״̬ -* : ADC_TypeDef * ADCx ָҪõADCȡֵADC -* uint32_t chn ҪѯͨЧֵADC_CH0ADC_CH1... ... ADC_CH7 -* : uint32_t 1 ͨת 0 ͨδת -* ע: +* 函数名称: ADC_IntOVFStat() +* 功能说明: 数据溢出中断状态 +* 输 入: ADC_TypeDef * ADCx 指定要被设置的ADC，可取值包括ADC +* uint32_t chn 要查询的通道，有效值ADC_CH0、ADC_CH1、... ... 、ADC_CH7 +* 输 出: uint32_t 1 该通道完成了转换 0 该通道未完成转换 +* 注意事项: 无 ******************************************************************************************************************************************/ uint32_t ADC_IntOVFStat(ADC_TypeDef * ADCx, uint32_t chn) { @@ -390,12 +390,12 @@ uint32_t ADC_IntOVFStat(ADC_TypeDef * ADCx, uint32_t chn) } /****************************************************************************************************************************************** -* : ADC_IntHFULLEn() -* ˵: FIFOжʹ -* : ADC_TypeDef * ADCx ָҪõADCȡֵADC -* uint32_t chn ҪõͨЧֵADC_CH0ADC_CH1... ... ADC_CH7 -* : -* ע: +* 函数名称: ADC_IntHFULLEn() +* 功能说明: FIFO半满中断使能 +* 输 入: ADC_TypeDef * ADCx 指定要被设置的ADC，可取值包括ADC +* uint32_t chn 要设置的通道，有效值ADC_CH0、ADC_CH1、... ... 、ADC_CH7 +* 输 出: 无 +* 注意事项: 无 ******************************************************************************************************************************************/ void ADC_IntHFULLEn(ADC_TypeDef * ADCx, uint32_t chn) { @@ -405,12 +405,12 @@ void ADC_IntHFULLEn(ADC_TypeDef * ADCx, uint32_t chn) } /****************************************************************************************************************************************** -* : ADC_IntHFULLDis() -* ˵: FIFOжϽֹ -* : ADC_TypeDef * ADCx ָҪõADCȡֵADC -* uint32_t chn ҪõͨЧֵADC_CH0ADC_CH1... ... ADC_CH7 -* : -* ע: +* 函数名称: ADC_IntHFULLDis() +* 功能说明: FIFO半满中断禁止 +* 输 入: ADC_TypeDef * ADCx 指定要被设置的ADC，可取值包括ADC +* uint32_t chn 要设置的通道，有效值ADC_CH0、ADC_CH1、... ... 、ADC_CH7 +* 输 出: 无 +* 注意事项: 无 ******************************************************************************************************************************************/ void ADC_IntHFULLDis(ADC_TypeDef * ADCx, uint32_t chn) { @@ -420,12 +420,12 @@ void ADC_IntHFULLDis(ADC_TypeDef * ADCx, uint32_t chn) } /****************************************************************************************************************************************** -* : ADC_IntHFULLClr() -* ˵: FIFOжϱ־ -* : ADC_TypeDef * ADCx ָҪõADCȡֵADC -* uint32_t chn ҪõͨЧֵADC_CH0ADC_CH1... ... ADC_CH7 -* : -* ע: +* 函数名称: ADC_IntHFULLClr() +* 功能说明: FIFO半满中断标志清除 +* 输 入: ADC_TypeDef * ADCx 指定要被设置的ADC，可取值包括ADC +* uint32_t chn 要设置的通道，有效值ADC_CH0、ADC_CH1、... ... 、ADC_CH7 +* 输 出: 无 +* 注意事项: 无 ******************************************************************************************************************************************/ void ADC_IntHFULLClr(ADC_TypeDef * ADCx, uint32_t chn) { @@ -435,12 +435,12 @@ void ADC_IntHFULLClr(ADC_TypeDef * ADCx, uint32_t chn) } /****************************************************************************************************************************************** -* : ADC_IntHFULLStat() -* ˵: FIFOж״̬ -* : ADC_TypeDef * ADCx ָҪõADCȡֵADC -* uint32_t chn ҪѯͨЧֵADC_CH0ADC_CH1... ... ADC_CH7 -* : uint32_t 1 ͨת 0 ͨδת -* ע: +* 函数名称: ADC_IntHFULLStat() +* 功能说明: FIFO半满中断状态 +* 输 入: ADC_TypeDef * ADCx 指定要被设置的ADC，可取值包括ADC +* uint32_t chn 要查询的通道，有效值ADC_CH0、ADC_CH1、... ... 、ADC_CH7 +* 输 出: uint32_t 1 该通道完成了转换 0 该通道未完成转换 +* 注意事项: 无 ******************************************************************************************************************************************/ uint32_t ADC_IntHFULLStat(ADC_TypeDef * ADCx, uint32_t chn) { @@ -450,12 +450,12 @@ uint32_t ADC_IntHFULLStat(ADC_TypeDef * ADCx, uint32_t chn) } /****************************************************************************************************************************************** -* : ADC_IntFULLEn() -* ˵: FIFOжʹ -* : ADC_TypeDef * ADCx ָҪõADCȡֵADC -* uint32_t chn ҪõͨЧֵADC_CH0ADC_CH1... ... ADC_CH7 -* : -* ע: +* 函数名称: ADC_IntFULLEn() +* 功能说明: FIFO满中断使能 +* 输 入: ADC_TypeDef * ADCx 指定要被设置的ADC，可取值包括ADC +* uint32_t chn 要设置的通道，有效值ADC_CH0、ADC_CH1、... ... 、ADC_CH7 +* 输 出: 无 +* 注意事项: 无 ******************************************************************************************************************************************/ void ADC_IntFULLEn(ADC_TypeDef * ADCx, uint32_t chn) { @@ -465,12 +465,12 @@ void ADC_IntFULLEn(ADC_TypeDef * ADCx, uint32_t chn) } /****************************************************************************************************************************************** -* : ADC_IntFULLDis() -* ˵: FIFOжϽֹ -* : ADC_TypeDef * ADCx ָҪõADCȡֵADC -* uint32_t chn ҪõͨЧֵADC_CH0ADC_CH1... ... ADC_CH7 -* : -* ע: +* 函数名称: ADC_IntFULLDis() +* 功能说明: FIFO满中断禁止 +* 输 入: ADC_TypeDef * ADCx 指定要被设置的ADC，可取值包括ADC +* uint32_t chn 要设置的通道，有效值ADC_CH0、ADC_CH1、... ... 、ADC_CH7 +* 输 出: 无 +* 注意事项: 无 ******************************************************************************************************************************************/ void ADC_IntFULLDis(ADC_TypeDef * ADCx, uint32_t chn) { @@ -480,12 +480,12 @@ void ADC_IntFULLDis(ADC_TypeDef * ADCx, uint32_t chn) } /****************************************************************************************************************************************** -* : ADC_IntFULLClr() -* ˵: FIFOжϱ־ -* : ADC_TypeDef * ADCx ָҪõADCȡֵADC -* uint32_t chn ҪõͨЧֵADC_CH0ADC_CH1... ... ADC_CH7 -* : -* ע: +* 函数名称: ADC_IntFULLClr() +* 功能说明: FIFO满中断标志清除 +* 输 入: ADC_TypeDef * ADCx 指定要被设置的ADC，可取值包括ADC +* uint32_t chn 要设置的通道，有效值ADC_CH0、ADC_CH1、... ... 、ADC_CH7 +* 输 出: 无 +* 注意事项: 无 ******************************************************************************************************************************************/ void ADC_IntFULLClr(ADC_TypeDef * ADCx, uint32_t chn) { @@ -495,12 +495,12 @@ void ADC_IntFULLClr(ADC_TypeDef * ADCx, uint32_t chn) } /****************************************************************************************************************************************** -* : ADC_IntFULLStat() -* ˵: FIFOж״̬ -* : ADC_TypeDef * ADCx ָҪõADCȡֵADC -* uint32_t chn ҪѯͨЧֵADC_CH0ADC_CH1... ... ADC_CH7 -* : uint32_t 1 ͨת 0 ͨδת -* ע: +* 函数名称: ADC_IntFULLStat() +* 功能说明: FIFO满中断状态 +* 输 入: ADC_TypeDef * ADCx 指定要被设置的ADC，可取值包括ADC +* uint32_t chn 要查询的通道，有效值ADC_CH0、ADC_CH1、... ... 、ADC_CH7 +* 输 出: uint32_t 1 该通道完成了转换 0 该通道未完成转换 +* 注意事项: 无 ******************************************************************************************************************************************/ uint32_t ADC_IntFULLStat(ADC_TypeDef * ADCx, uint32_t chn) { diff --git a/bsp/swm320/libraries/SWM320_StdPeriph_Driver/SWM320_adc.h b/bsp/swm320/libraries/SWM320_StdPeriph_Driver/SWM320_adc.h index 56f93c66d8f5ccf30b993a65031d1836d2d73042..96e10972e39bfc11a7009aebfd12b10ee4f99917 100644 --- a/bsp/swm320/libraries/SWM320_StdPeriph_Driver/SWM320_adc.h +++ b/bsp/swm320/libraries/SWM320_StdPeriph_Driver/SWM320_adc.h @@ -2,18 +2,18 @@ #define __SWM320_ADC_H__ typedef struct { - uint8_t clk_src; //ADCתʱԴADC_CLKSRC_HRCADC_CLKSRC_VCO_DIV16ADC_CLKSRC_VCO_DIV32ADC_CLKSRC_VCO_DIV32 - uint8_t clk_div; //ADCתʱӷƵȡֵ1--31 - uint8_t pga_ref; //PGA׼PGA_REF_INTERNALPGA_REF_EXTERNAL - uint8_t channels; //ADCתͨѡУADC_CH0ADC_CH1... ... ADC_CH7ϣλ㣩 - uint8_t samplAvg; //ȡƽADCתADCһͨתΣǵƽֵΪͨת - uint8_t trig_src; //ADCʽADC_TRIGSRC_SWADC_TRIGSRC_PWMADC_TRIGSRC_TIMR2ADC_TRIGSRC_TIMR3 - uint8_t Continue; //ģʽ£1 תģʽһֱתֱSTARTλ - // 0 תģʽתɺSTARTλԶֹͣת - uint8_t EOC_IEn; //EOCжʹܣÿͨãЧֵΪADC_CH0ADC_CH1... ... ADC_CH7ϣλ㣩 - uint8_t OVF_IEn; //OVFжʹܣÿͨãЧֵΪADC_CH0ADC_CH1... ... ADC_CH7ϣλ㣩 - uint8_t HFULL_IEn; //FIFOжʹܣÿͨãЧֵΪADC_CH0ADC_CH1... ... ADC_CH7ϣλ㣩 - uint8_t FULL_IEn; //FIFO жʹܣÿͨãЧֵΪADC_CH0ADC_CH1... ... ADC_CH7ϣλ㣩 + uint8_t clk_src; //ADC转换时钟源：ADC_CLKSRC_HRC、ADC_CLKSRC_VCO_DIV16、ADC_CLKSRC_VCO_DIV32、ADC_CLKSRC_VCO_DIV32 + uint8_t clk_div; //ADC转换时钟分频，取值1--31 + uint8_t pga_ref; //PGA基准：PGA_REF_INTERNAL、PGA_REF_EXTERNAL + uint8_t channels; //ADC转换通道选中，ADC_CH0、ADC_CH1、... ... 、ADC_CH7及其组合（即“按位或”运算） + uint8_t samplAvg; //采样取平均，触发启动ADC转换后，ADC在一个通道上连续采样、转换多次，并将它们的平均值作为该通道转换结果 + uint8_t trig_src; //ADC触发方式：ADC_TRIGSRC_SW、ADC_TRIGSRC_PWM、ADC_TRIGSRC_TIMR2、ADC_TRIGSRC_TIMR3 + uint8_t Continue; //在软件触发模式下：1 连续转换模式，启动后一直采样、转换，直到软件清除START位 + // 0 单次转换模式，转换完成后START位自动清除停止转换 + uint8_t EOC_IEn; //EOC中断使能，可针对每个通道设置，其有效值为ADC_CH0、ADC_CH1、... ... 、ADC_CH7及其组合（即“按位或”运算） + uint8_t OVF_IEn; //OVF中断使能，可针对每个通道设置，其有效值为ADC_CH0、ADC_CH1、... ... 、ADC_CH7及其组合（即“按位或”运算） + uint8_t HFULL_IEn; //FIFO半满中断使能，可针对每个通道设置，其有效值为ADC_CH0、ADC_CH1、... ... 、ADC_CH7及其组合（即“按位或”运算） + uint8_t FULL_IEn; //FIFO 满中断使能，可针对每个通道设置，其有效值为ADC_CH0、ADC_CH1、... ... 、ADC_CH7及其组合（即“按位或”运算） } ADC_InitStructure; #define ADC_CH0 0x01 @@ -31,49 +31,49 @@ typedef struct { #define ADC_CLKSRC_VCO_DIV64 4 #define ADC_AVG_SAMPLE1 0 -#define ADC_AVG_SAMPLE2 1 //һת2ΣνƽֵΪת +#define ADC_AVG_SAMPLE2 1 //一次启动连续采样、转换2次，并计算两次结果的平均值作为转换结果 #define ADC_AVG_SAMPLE4 3 #define ADC_AVG_SAMPLE8 7 #define ADC_AVG_SAMPLE16 15 -#define ADC_TRIGSRC_SW 0 //ADC->START.GOд1ת +#define ADC_TRIGSRC_SW 0 //软件触发，即ADC->START.GO写1启动转换 #define ADC_TRIGSRC_PWM 1 -#define PGA_REF_INTERNAL 1 //PGA빲ģƽڲ·ADC_REFPADC_REFN -#define PGA_REF_EXTERNAL 0 //PGA빲ģƽⲿṩ(ADC_REFP + ADC_REFN) ƽֵͬ +#define PGA_REF_INTERNAL 1 //PGA输入共模电平由内部电路产生，ADC_REFP和ADC_REFN可悬空 +#define PGA_REF_EXTERNAL 0 //PGA输入共模电平由外部引脚提供，(ADC_REFP + ADC_REFN) 电平值须与量程相同 -void ADC_Init(ADC_TypeDef * ADCx, ADC_InitStructure * initStruct); //ADCģתʼ -void ADC_Open(ADC_TypeDef * ADCx); //ADCӲADCת -void ADC_Close(ADC_TypeDef * ADCx); //ADCرգ޷ӲADCת -void ADC_Start(ADC_TypeDef * ADCx); //ָADCʼģת -void ADC_Stop(ADC_TypeDef * ADCx); //رָADCֹͣģת +void ADC_Init(ADC_TypeDef * ADCx, ADC_InitStructure * initStruct); //ADC模数转换器初始化 +void ADC_Open(ADC_TypeDef * ADCx); //ADC开启，可以软件启动、或硬件触发ADC转换 +void ADC_Close(ADC_TypeDef * ADCx); //ADC关闭，无法软件启动、或硬件触发ADC转换 +void ADC_Start(ADC_TypeDef * ADCx); //启动指定ADC，开始模数转换 +void ADC_Stop(ADC_TypeDef * ADCx); //关闭指定ADC，停止模数转换 -uint32_t ADC_Read(ADC_TypeDef * ADCx, uint32_t chn); //ָͨȡת -uint32_t ADC_IsEOC(ADC_TypeDef * ADCx, uint32_t chn); //ָͨǷEnd Of Conversion +uint32_t ADC_Read(ADC_TypeDef * ADCx, uint32_t chn); //从指定通道读取转换结果 +uint32_t ADC_IsEOC(ADC_TypeDef * ADCx, uint32_t chn); //指定通道是否End Of Conversion void ADC_ChnSelect(ADC_TypeDef * ADCx, uint32_t chns); -void ADC_IntEOCEn(ADC_TypeDef * ADCx, uint32_t chn); //תжʹ -void ADC_IntEOCDis(ADC_TypeDef * ADCx, uint32_t chn); //תжϽֹ -void ADC_IntEOCClr(ADC_TypeDef * ADCx, uint32_t chn); //תжϱ־ -uint32_t ADC_IntEOCStat(ADC_TypeDef * ADCx, uint32_t chn); //תж״̬ +void ADC_IntEOCEn(ADC_TypeDef * ADCx, uint32_t chn); //转换完成中断使能 +void ADC_IntEOCDis(ADC_TypeDef * ADCx, uint32_t chn); //转换完成中断禁止 +void ADC_IntEOCClr(ADC_TypeDef * ADCx, uint32_t chn); //转换完成中断标志清除 +uint32_t ADC_IntEOCStat(ADC_TypeDef * ADCx, uint32_t chn); //转换完成中断状态 -void ADC_IntOVFEn(ADC_TypeDef * ADCx, uint32_t chn); //жʹ -void ADC_IntOVFDis(ADC_TypeDef * ADCx, uint32_t chn); //жϽֹ -void ADC_IntOVFClr(ADC_TypeDef * ADCx, uint32_t chn); //жϱ־ -uint32_t ADC_IntOVFStat(ADC_TypeDef * ADCx, uint32_t chn); //ж״̬ +void ADC_IntOVFEn(ADC_TypeDef * ADCx, uint32_t chn); //数据溢出中断使能 +void ADC_IntOVFDis(ADC_TypeDef * ADCx, uint32_t chn); //数据溢出中断禁止 +void ADC_IntOVFClr(ADC_TypeDef * ADCx, uint32_t chn); //数据溢出中断标志清除 +uint32_t ADC_IntOVFStat(ADC_TypeDef * ADCx, uint32_t chn); //数据溢出中断状态 -void ADC_IntHFULLEn(ADC_TypeDef * ADCx, uint32_t chn); //FIFOжʹ -void ADC_IntHFULLDis(ADC_TypeDef * ADCx, uint32_t chn); //FIFOжϽֹ -void ADC_IntHFULLClr(ADC_TypeDef * ADCx, uint32_t chn); //FIFOжϱ־ -uint32_t ADC_IntHFULLStat(ADC_TypeDef * ADCx, uint32_t chn);//FIFOж״̬ +void ADC_IntHFULLEn(ADC_TypeDef * ADCx, uint32_t chn); //FIFO半满中断使能 +void ADC_IntHFULLDis(ADC_TypeDef * ADCx, uint32_t chn); //FIFO半满中断禁止 +void ADC_IntHFULLClr(ADC_TypeDef * ADCx, uint32_t chn); //FIFO半满中断标志清除 +uint32_t ADC_IntHFULLStat(ADC_TypeDef * ADCx, uint32_t chn);//FIFO半满中断状态 -void ADC_IntFULLEn(ADC_TypeDef * ADCx, uint32_t chn); //FIFOжʹ -void ADC_IntFULLDis(ADC_TypeDef * ADCx, uint32_t chn); //FIFOжϽֹ -void ADC_IntFULLClr(ADC_TypeDef * ADCx, uint32_t chn); //FIFOжϱ־ -uint32_t ADC_IntFULLStat(ADC_TypeDef * ADCx, uint32_t chn); //FIFOж״̬ +void ADC_IntFULLEn(ADC_TypeDef * ADCx, uint32_t chn); //FIFO满中断使能 +void ADC_IntFULLDis(ADC_TypeDef * ADCx, uint32_t chn); //FIFO满中断禁止 +void ADC_IntFULLClr(ADC_TypeDef * ADCx, uint32_t chn); //FIFO满中断标志清除 +uint32_t ADC_IntFULLStat(ADC_TypeDef * ADCx, uint32_t chn); //FIFO满中断状态 #endif //__SWM320_ADC_H__ diff --git a/bsp/swm320/libraries/SWM320_StdPeriph_Driver/SWM320_can.c b/bsp/swm320/libraries/SWM320_StdPeriph_Driver/SWM320_can.c index c5c5f34a4583f3f7d211aef169e6ea19880d9af4..e7b30e3cb280090564a1fde568900be3778af215 100644 --- a/bsp/swm320/libraries/SWM320_StdPeriph_Driver/SWM320_can.c +++ b/bsp/swm320/libraries/SWM320_StdPeriph_Driver/SWM320_can.c @@ -411,18 +411,6 @@ void CAN_INTRXNotEmptyDis(CAN_TypeDef * CANx) CANx->IE &= ~(1 << CAN_IE_RXDA_Pos); } -/****************************************************************************************************************************************** -* : CAN_INTRXNotEmptyStat() -* ˵: RX FIFOǿжǷ񴥷 -* : CAN_TypeDef * CANx ָҪõCANӿڣЧֵCAN -* : uint32_t 1 Ѵ 0 δ -* ע: -******************************************************************************************************************************************/ -uint32_t CAN_INTRXNotEmptyStat(CAN_TypeDef * CANx) -{ - return (CANx->IF & CAN_IF_RXDA_Msk) ? 1 : 0; -} - /****************************************************************************************************************************************** * : CAN_INTTXBufEmptyEn() * ˵: TX Bufferʱжʹ @@ -447,18 +435,6 @@ void CAN_INTTXBufEmptyDis(CAN_TypeDef * CANx) CANx->IE &= ~(1 << CAN_IE_TXBR_Pos); } -/****************************************************************************************************************************************** -* : CAN_INTTXBufEmptyStat() -* ˵: TX BufferжǷ񴥷 -* : CAN_TypeDef * CANx ָҪõCANӿڣЧֵCAN -* : uint32_t 1 Ѵ 0 δ -* ע: -******************************************************************************************************************************************/ -uint32_t CAN_INTTXBufEmptyStat(CAN_TypeDef * CANx) -{ - return (CANx->IF & CAN_IF_TXBR_Msk) ? 1 : 0; -} - /****************************************************************************************************************************************** * : CAN_INTErrWarningEn() * ˵: TXERR/RXERRֵﵽError Warning Limitʱжʹ @@ -483,18 +459,6 @@ void CAN_INTErrWarningDis(CAN_TypeDef * CANx) CANx->IE &= ~(1 << CAN_IE_ERRWARN_Pos); } -/****************************************************************************************************************************************** -* : CAN_INTErrWarningStat() -* ˵: TXERR/RXERRֵﵽError Warning LimitжǷ񴥷 -* : CAN_TypeDef * CANx ָҪõCANӿڣЧֵCAN -* : uint32_t 1 Ѵ 0 δ -* ע: -******************************************************************************************************************************************/ -uint32_t CAN_INTErrWarningStat(CAN_TypeDef * CANx) -{ - return (CANx->IF & CAN_IF_ERRWARN_Msk) ? 1 : 0; -} - /****************************************************************************************************************************************** * : CAN_INTRXOverflowEn() * ˵: RX FIFO ʱжʹ @@ -519,18 +483,6 @@ void CAN_INTRXOverflowDis(CAN_TypeDef * CANx) CANx->IE &= ~(1 << CAN_IE_RXOV_Pos); } -/****************************************************************************************************************************************** -* : CAN_INTRXOverflowStat() -* ˵: RX FIFO жǷ񴥷 -* : CAN_TypeDef * CANx ָҪõCANӿڣЧֵCAN -* : uint32_t 1 Ѵ 0 δ -* ע: -******************************************************************************************************************************************/ -uint32_t CAN_INTRXOverflowStat(CAN_TypeDef * CANx) -{ - return (CANx->IF & CAN_IF_RXOV_Msk) ? 1 : 0; -} - /****************************************************************************************************************************************** * : CAN_INTRXOverflowClear() * ˵: RX FIFO ж @@ -567,18 +519,6 @@ void CAN_INTWakeupDis(CAN_TypeDef * CANx) CANx->IE &= ~(1 << CAN_IE_WKUP_Pos); } -/****************************************************************************************************************************************** -* : CAN_INTWakeupStat() -* ˵: ¼жǷ񴥷 -* : CAN_TypeDef * CANx ָҪõCANӿڣЧֵCAN -* : uint32_t 1 Ѵ 0 δ -* ע: -******************************************************************************************************************************************/ -uint32_t CAN_INTWakeupStat(CAN_TypeDef * CANx) -{ - return (CANx->IF & CAN_IF_WKUP_Msk) ? 1 : 0; -} - /****************************************************************************************************************************************** * : CAN_INTErrPassiveEn() * ˵: TXERR/RXERRֵﵽ127ʱжʹ @@ -603,18 +543,6 @@ void CAN_INTErrPassiveDis(CAN_TypeDef * CANx) CANx->IE &= ~(1 << CAN_IE_ERRPASS_Pos); } -/****************************************************************************************************************************************** -* : CAN_INTErrPassiveStat() -* ˵: TXERR/RXERRֵﵽ127жǷ񴥷 -* : CAN_TypeDef * CANx ָҪõCANӿڣЧֵCAN -* : uint32_t 1 Ѵ 0 δ -* ע: -******************************************************************************************************************************************/ -uint32_t CAN_INTErrPassiveStat(CAN_TypeDef * CANx) -{ - return (CANx->IF & CAN_IF_ERRPASS_Msk) ? 1 : 0; -} - /****************************************************************************************************************************************** * : CAN_INTArbitrLostEn() * ˵: ٲʧжʹ @@ -639,18 +567,6 @@ void CAN_INTArbitrLostDis(CAN_TypeDef * CANx) CANx->IE &= ~(1 << CAN_IE_ARBLOST_Pos); } -/****************************************************************************************************************************************** -* : CAN_INTArbitrLostStat() -* ˵: ٲʧжǷ񴥷 -* : CAN_TypeDef * CANx ָҪõCANӿڣЧֵCAN -* : uint32_t 1 Ѵ 0 δ -* ע: -******************************************************************************************************************************************/ -uint32_t CAN_INTArbitrLostStat(CAN_TypeDef * CANx) -{ - return (CANx->IF & CAN_IF_ARBLOST_Msk) ? 1 : 0; -} - /****************************************************************************************************************************************** * : CAN_INTBusErrorEn() * ˵: ߴжʹ @@ -676,13 +592,13 @@ void CAN_INTBusErrorDis(CAN_TypeDef * CANx) } /****************************************************************************************************************************************** -* : CAN_INTBusErrorStat() -* ˵: ߴжǷ񴥷 +* : CAN_INTStat() +* ˵: ѯж״̬ * : CAN_TypeDef * CANx ָҪõCANӿڣЧֵCAN -* : uint32_t 1 Ѵ 0 δ -* ע: +* : uint32_t ǰж״̬ +* ע: CANx->IFȡ㣬жISRֻܶȡһΣܶζȡ ******************************************************************************************************************************************/ -uint32_t CAN_INTBusErrorStat(CAN_TypeDef * CANx) +uint32_t CAN_INTStat(CAN_TypeDef * CANx) { - return (CANx->IF & CAN_IF_BUSERR_Msk) ? 1 : 0; + return CANx->IF; } diff --git a/bsp/swm320/libraries/SWM320_StdPeriph_Driver/SWM320_can.h b/bsp/swm320/libraries/SWM320_StdPeriph_Driver/SWM320_can.h index 7b66ee4d5c4745f0f2571b1b44bbf69a80b98764..7cdd751ca50463dfac974fb9f48d87181de0b759 100644 --- a/bsp/swm320/libraries/SWM320_StdPeriph_Driver/SWM320_can.h +++ b/bsp/swm320/libraries/SWM320_StdPeriph_Driver/SWM320_can.h @@ -5,14 +5,14 @@ #define CAN_FRAME_EXT 1 typedef struct { - uint8_t Mode; //CAN_MODE_NORMALCAN_MODE_LISTENCAN_MODE_SELFTEST - uint8_t CAN_BS1; //CAN_BS1_1tqCAN_BS1_2tq... ... CAN_BS1_16tq - uint8_t CAN_BS2; //CAN_BS2_1tqCAN_BS2_2tq... ... CAN_BS2_8tq - uint8_t CAN_SJW; //CAN_SJW_1tqCAN_SJW_2tqCAN_SJW_3tqCAN_SJW_4tq - uint32_t Baudrate; //ʣλʣȡֵ1--1000000 - uint8_t FilterMode; //CAN_FILTER_16bCAN_FILTER_32b + uint8_t Mode; //CAN_MODE_NORMAL、CAN_MODE_LISTEN、CAN_MODE_SELFTEST + uint8_t CAN_BS1; //CAN_BS1_1tq、CAN_BS1_2tq、... ... 、CAN_BS1_16tq + uint8_t CAN_BS2; //CAN_BS2_1tq、CAN_BS2_2tq、... ... 、CAN_BS2_8tq + uint8_t CAN_SJW; //CAN_SJW_1tq、CAN_SJW_2tq、CAN_SJW_3tq、CAN_SJW_4tq + uint32_t Baudrate; //波特率，即位传输速率，取值1--1000000 + uint8_t FilterMode; //CAN_FILTER_16b、CAN_FILTER_32b union { - uint32_t FilterMask32b; //FilterCheck & (~FilterMask) == ID & (~FilterMask)Messageͨ + uint32_t FilterMask32b; //FilterCheck & (~FilterMask) == ID & (~FilterMask)的Message通过过滤 struct { // 0 must match 1 don't care uint16_t FilterMask16b1; uint16_t FilterMask16b2; @@ -25,15 +25,15 @@ typedef struct { uint16_t FilterCheck16b2; }; }; - uint8_t RXNotEmptyIEn; //FIFOǿգݿɶ - uint8_t RXOverflowIEn; //FIFOݶʧ - uint8_t ArbitrLostIEn; //ʧٲñɽշ - uint8_t ErrPassiveIEn; ///ʹֵﵽ127 + uint8_t RXNotEmptyIEn; //接收FIFO非空，有数据可读 + uint8_t RXOverflowIEn; //接收FIFO溢出，有数据丢失 + uint8_t ArbitrLostIEn; //控制器丢失仲裁变成接收方 + uint8_t ErrPassiveIEn; //接收/发送错误计数值达到127 } CAN_InitStructure; -#define CAN_MODE_NORMAL 0 //ģʽ -#define CAN_MODE_LISTEN 1 //ģʽ -#define CAN_MODE_SELFTEST 2 //Բģʽ +#define CAN_MODE_NORMAL 0 //常规模式 +#define CAN_MODE_LISTEN 1 //监听模式 +#define CAN_MODE_SELFTEST 2 //自测模式 #define CAN_BS1_1tq 0 #define CAN_BS1_2tq 1 @@ -66,15 +66,15 @@ typedef struct { #define CAN_SJW_3tq 2 #define CAN_SJW_4tq 3 -#define CAN_FILTER_16b 0 //16λ -#define CAN_FILTER_32b 1 //һ32λ +#define CAN_FILTER_16b 0 //两个16位过滤器 +#define CAN_FILTER_32b 1 //一个32位过滤器 typedef struct { - uint32_t id; //ϢID - uint8_t format; //֡ʽCAN_FRAME_STDCAN_FRAME_EXT - uint8_t remote; //ϢǷΪԶ֡ - uint8_t size; //յݸ - uint8_t data[8]; //յ + uint32_t id; //消息ID + uint8_t format; //帧格式：CAN_FRAME_STD、CAN_FRAME_EXT + uint8_t remote; //消息是否为远程帧 + uint8_t size; //接收到的数据个数 + uint8_t data[8]; //接收到的数据 } CAN_RXMessage; @@ -102,35 +102,29 @@ void CAN_SetFilter16b(CAN_TypeDef * CANx, uint16_t check1, uint16_t mask1, uint1 void CAN_INTRXNotEmptyEn(CAN_TypeDef * CANx); void CAN_INTRXNotEmptyDis(CAN_TypeDef * CANx); -uint32_t CAN_INTRXNotEmptyStat(CAN_TypeDef * CANx); void CAN_INTTXBufEmptyEn(CAN_TypeDef * CANx); void CAN_INTTXBufEmptyDis(CAN_TypeDef * CANx); -uint32_t CAN_INTTXBufEmptyStat(CAN_TypeDef * CANx); void CAN_INTErrWarningEn(CAN_TypeDef * CANx); void CAN_INTErrWarningDis(CAN_TypeDef * CANx); -uint32_t CAN_INTErrWarningStat(CAN_TypeDef * CANx); void CAN_INTRXOverflowEn(CAN_TypeDef * CANx); void CAN_INTRXOverflowDis(CAN_TypeDef * CANx); -uint32_t CAN_INTRXOverflowStat(CAN_TypeDef * CANx); void CAN_INTRXOverflowClear(CAN_TypeDef * CANx); void CAN_INTWakeupEn(CAN_TypeDef * CANx); void CAN_INTWakeupDis(CAN_TypeDef * CANx); -uint32_t CAN_INTWakeupStat(CAN_TypeDef * CANx); void CAN_INTErrPassiveEn(CAN_TypeDef * CANx); void CAN_INTErrPassiveDis(CAN_TypeDef * CANx); -uint32_t CAN_INTErrPassiveStat(CAN_TypeDef * CANx); void CAN_INTArbitrLostEn(CAN_TypeDef * CANx); void CAN_INTArbitrLostDis(CAN_TypeDef * CANx); -uint32_t CAN_INTArbitrLostStat(CAN_TypeDef * CANx); void CAN_INTBusErrorEn(CAN_TypeDef * CANx); void CAN_INTBusErrorDis(CAN_TypeDef * CANx); -uint32_t CAN_INTBusErrorStat(CAN_TypeDef * CANx); + +uint32_t CAN_INTStat(CAN_TypeDef * CANx); #endif //__SWM320_CAN_H__ diff --git a/bsp/swm320/libraries/SWM320_StdPeriph_Driver/SWM320_crc.h b/bsp/swm320/libraries/SWM320_StdPeriph_Driver/SWM320_crc.h index ce9f1f3731b2bde8f0c346237239636b6f35bf26..6a5dd2f781babe8dc01f03379b737eb695e187c1 100644 --- a/bsp/swm320/libraries/SWM320_StdPeriph_Driver/SWM320_crc.h +++ b/bsp/swm320/libraries/SWM320_StdPeriph_Driver/SWM320_crc.h @@ -2,22 +2,22 @@ #define __SWM320_CRC_H__ -#define CRC32_IN32 0 //CRC32㷨32λ -#define CRC32_IN16 2 //CRC32㷨16λ -#define CRC32_IN8 4 //CRC32㷨 8λ -#define CRC16_IN16 3 //CRC16㷨16λ -#define CRC16_IN8 5 //CRC16㷨 8λ +#define CRC32_IN32 0 //CRC32算法，输入数据32位 +#define CRC32_IN16 2 //CRC32算法，输入数据16位 +#define CRC32_IN8 4 //CRC32算法，输入数据 8位 +#define CRC16_IN16 3 //CRC16算法，输入数据16位 +#define CRC16_IN8 5 //CRC16算法，输入数据 8位 void CRC_Init(CRC_TypeDef * CRCx, uint32_t mode, uint32_t out_not, uint32_t out_rev, uint32_t ini_val); /****************************************************************************************************************************************** -* : CRC_Write() -* ˵: CRCд -* : uint32_t data Ҫд -* : -* ע: +* 函数名称: CRC_Write() +* 功能说明: CRC写入数据 +* 输 入: uint32_t data 要写入的数据 +* 输 出: 无 +* 注意事项: 无 ******************************************************************************************************************************************/ static __INLINE void CRC_Write(uint32_t data) { @@ -25,11 +25,11 @@ static __INLINE void CRC_Write(uint32_t data) } /****************************************************************************************************************************************** -* : CRC_Result() -* ˵: ȡCRC -* : -* : uint32_t CRC -* ע: +* 函数名称: CRC_Result() +* 功能说明: 获取CRC计算结果 +* 输 入: 无 +* 输 出: uint32_t CRC 计算结果 +* 注意事项: 无 ******************************************************************************************************************************************/ static __INLINE uint32_t CRC_Result(void) { diff --git a/bsp/swm320/libraries/SWM320_StdPeriph_Driver/SWM320_dma.h b/bsp/swm320/libraries/SWM320_StdPeriph_Driver/SWM320_dma.h index 817162cd65a1c5612c9bf2fd348e7e7756ec4801..0857f7d02312d79e2bf7ec7258bd83709e49cbbd 100644 --- a/bsp/swm320/libraries/SWM320_StdPeriph_Driver/SWM320_dma.h +++ b/bsp/swm320/libraries/SWM320_StdPeriph_Driver/SWM320_dma.h @@ -7,14 +7,14 @@ #define DMA_CH2 2 -void DMA_CHM_Config(uint32_t chn, uint32_t src_addr, uint32_t src_addr_incr, uint32_t dst_addr, uint32_t dst_addr_incr, uint32_t num_word, uint32_t int_en); //DMAͨãڴ洢䣨FlashRAM䣩 -void DMA_CH_Open(uint32_t chn); //DMAͨ -void DMA_CH_Close(uint32_t chn); //DMAͨر +void DMA_CHM_Config(uint32_t chn, uint32_t src_addr, uint32_t src_addr_incr, uint32_t dst_addr, uint32_t dst_addr_incr, uint32_t num_word, uint32_t int_en); //DMA通道配置，用于存储器间（如Flash和RAM间）搬运数据 +void DMA_CH_Open(uint32_t chn); //DMA通道打开 +void DMA_CH_Close(uint32_t chn); //DMA通道关闭 -void DMA_CH_INTEn(uint32_t chn); //DMAжʹܣݰɺ󴥷ж -void DMA_CH_INTDis(uint32_t chn); //DMAжϽֹݰɺ󲻴ж -void DMA_CH_INTClr(uint32_t chn); //DMAжϱ־ -uint32_t DMA_CH_INTStat(uint32_t chn); //DMAж״̬ѯ1 ݰ 0 ݰδ +void DMA_CH_INTEn(uint32_t chn); //DMA中断使能，数据搬运完成后触发中断 +void DMA_CH_INTDis(uint32_t chn); //DMA中断禁止，数据搬运完成后不触发中断 +void DMA_CH_INTClr(uint32_t chn); //DMA中断标志清除 +uint32_t DMA_CH_INTStat(uint32_t chn); //DMA中断状态查询，1 数据搬运完成 0 数据搬运未完成 #endif //__SWM320_DMA_H__ diff --git a/bsp/swm320/libraries/SWM320_StdPeriph_Driver/SWM320_exti.h b/bsp/swm320/libraries/SWM320_StdPeriph_Driver/SWM320_exti.h index 088cd9a6197131f6d697d70826feaac8be41d349..529770e6a6d07dfd7c4a21c51ffed72d23555d88 100644 --- a/bsp/swm320/libraries/SWM320_StdPeriph_Driver/SWM320_exti.h +++ b/bsp/swm320/libraries/SWM320_StdPeriph_Driver/SWM320_exti.h @@ -1,20 +1,20 @@ #ifndef __SWM320_EXTI_H__ #define __SWM320_EXTI_H__ -void EXTI_Init(GPIO_TypeDef * GPIOx, uint32_t n, uint32_t mode); //ָⲿжϳʼ -void EXTI_Open(GPIO_TypeDef * GPIOx, uint32_t n); //ָⲿжϴ򿪣ʹܣ -void EXTI_Close(GPIO_TypeDef * GPIOx, uint32_t n); //ָⲿжϹرգܣ +void EXTI_Init(GPIO_TypeDef * GPIOx, uint32_t n, uint32_t mode); //指定引脚外部中断初始化 +void EXTI_Open(GPIO_TypeDef * GPIOx, uint32_t n); //指定引脚外部中断打开（即使能） +void EXTI_Close(GPIO_TypeDef * GPIOx, uint32_t n); //指定引脚外部中断关闭（即禁能） -uint32_t EXTI_State(GPIO_TypeDef * GPIOx, uint32_t n); //ָǷ񴥷ж -uint32_t EXTI_RawState(GPIO_TypeDef * GPIOx, uint32_t n); //ָǷ/жϴжϹرʱͨô˺ԲѯķʽǷ/жϴ -void EXTI_Clear(GPIO_TypeDef * GPIOx, uint32_t n); //ָⲿжжϱ־ٴνжϣ +uint32_t EXTI_State(GPIO_TypeDef * GPIOx, uint32_t n); //指定引脚是否触发了中断 +uint32_t EXTI_RawState(GPIO_TypeDef * GPIOx, uint32_t n); //指定引脚是否满足过/了中断触发条件，当此中断关闭时可通过调用此函数以查询的方式检测引脚上是否满足过/了中断触发条件 +void EXTI_Clear(GPIO_TypeDef * GPIOx, uint32_t n); //指定引脚外部中断清除（即清除中断标志，以免再次进入此中断） -#define EXTI_FALL_EDGE 0x00 //½شж -#define EXTI_RISE_EDGE 0x01 //شж -#define EXTI_BOTH_EDGE 0x02 //˫شж -#define EXTI_LOW_LEVEL 0x10 //͵ƽж -#define EXTI_HIGH_LEVEL 0x11 //ߵƽж +#define EXTI_FALL_EDGE 0x00 //下降沿触发中断 +#define EXTI_RISE_EDGE 0x01 //上升沿触发中断 +#define EXTI_BOTH_EDGE 0x02 //双边沿触发中断 +#define EXTI_LOW_LEVEL 0x10 //低电平触发中断 +#define EXTI_HIGH_LEVEL 0x11 //高电平触发中断 #endif //__SWM320_EXTI_H__ diff --git a/bsp/swm320/libraries/SWM320_StdPeriph_Driver/SWM320_flash.c b/bsp/swm320/libraries/SWM320_StdPeriph_Driver/SWM320_flash.c index dbd0eca4bfc4a6236ffb58e0abc46ef3ef98fa0d..d384125db3d2696213052340e2e458b75eedcc48 100644 --- a/bsp/swm320/libraries/SWM320_StdPeriph_Driver/SWM320_flash.c +++ b/bsp/swm320/libraries/SWM320_StdPeriph_Driver/SWM320_flash.c @@ -1,10 +1,10 @@ /****************************************************************************************************************************************** -* ļ: SWM320_flash.c -* ˵: ʹоƬIAPܽƬFlashģEEPROMݣ󲻶ʧ -* ֧: http://www.synwit.com.cn/e/tool/gbook/?bid=1 -* ע: -* 汾: V1.1.0 20171025 -* ¼: +* 文件名称: SWM320_flash.c +* 功能说明: 使用芯片的IAP功能将片上Flash模拟成EEPROM来保存数据，掉电后不丢失 +* 技术支持: http://www.synwit.com.cn/e/tool/gbook/?bid=1 +* 注意事项: +* 版本日期: V1.1.0 2017年10月25日 +* 升级记录: ******************************************************************************************************************************************* * @attention * @@ -27,11 +27,11 @@ IAP_Flash_Write_t IAP_Flash_Write = (IAP_Flash_Write_t)0x11000801; /****************************************************************************************************************************************** -* : FLASH_Erase() -* ˵: ƬFlash -* : uint32_t addr ַСΪ4K Byte -* : -* ע: +* 函数名称: FLASH_Erase() +* 功能说明: 片内Flash擦除 +* 输 入: uint32_t addr 擦除地址，扇区大小为4K Byte +* 输 出: 无 +* 注意事项: 无 ******************************************************************************************************************************************/ void FLASH_Erase(uint32_t addr) { @@ -45,13 +45,13 @@ void FLASH_Erase(uint32_t addr) } /****************************************************************************************************************************************** -* : FLASH_Write() -* ˵: ƬFlashд -* : uint32_t addr дַ -* uint32_t buff[] Ҫд -* uint32_t count ҪдݵĸΪλұ4д4 -* : -* ע: дݸ4д4 +* 函数名称: FLASH_Write() +* 功能说明: 片内Flash写入 +* 输 入: uint32_t addr 写入地址 +* uint32_t buff[] 要写入的数据 +* uint32_t count 要写入数据的个数，以字为单位，且必须是4的整数倍，即最少写入4个字 +* 输 出: 无 +* 注意事项: 写入数据个数必须是4的整数倍，即最少写入4个字 ******************************************************************************************************************************************/ void FLASH_Write(uint32_t addr, uint32_t buff[], uint32_t count) { @@ -65,17 +65,33 @@ void FLASH_Write(uint32_t addr, uint32_t buff[], uint32_t count) } /****************************************************************************************************************************************** -* : Flash_Param_at_120MHz() -* ˵: Flashó120MHzƵʱIJ -* : -* : -* ע: +* 函数名称: Flash_Param_at_xMHz() +* 功能说明: 将Flash参数设置成xMHz主频下运行时所需的参数 +* 输 入: uint32_t x 可取值 +* 输 出: 无 +* 注意事项: 无 ******************************************************************************************************************************************/ -void Flash_Param_at_120MHz(void) +void Flash_Param_at_xMHz(uint32_t x) { __disable_irq(); + switch(x) + { + case 30: + IAP_Flash_Param(0x489, 0xabf41f25); + break; - IAP_Flash_Param(0x48a, 0xabfc7a6e); + case 40: + IAP_Flash_Param(0x489, 0xabf42929); + break; + case 80: + IAP_Flash_Param(0x489, 0xabf8524d); + break; + + case 120: + default: + IAP_Flash_Param(0x48a, 0xabfc7a6e); + break; + } __enable_irq(); } diff --git a/bsp/swm320/libraries/SWM320_StdPeriph_Driver/SWM320_flash.h b/bsp/swm320/libraries/SWM320_StdPeriph_Driver/SWM320_flash.h index 113e2a2e0708715b92799bf5c2609b9c560c1e43..40f64fac4238ff8be176552e516cbe4337273000 100644 --- a/bsp/swm320/libraries/SWM320_StdPeriph_Driver/SWM320_flash.h +++ b/bsp/swm320/libraries/SWM320_StdPeriph_Driver/SWM320_flash.h @@ -5,7 +5,7 @@ void FLASH_Erase(uint32_t addr); void FLASH_Write(uint32_t addr, uint32_t buff[], uint32_t count); -void Flash_Param_at_120MHz(void); +void Flash_Param_at_xMHz(uint32_t x); diff --git a/bsp/swm320/libraries/SWM320_StdPeriph_Driver/SWM320_gpio.c b/bsp/swm320/libraries/SWM320_StdPeriph_Driver/SWM320_gpio.c index 1d2aa3a2ab42db595c96af39d98bcad6928aa2f6..932608a9e9e1ae1ea45e5ef060138919e360437a 100644 --- a/bsp/swm320/libraries/SWM320_StdPeriph_Driver/SWM320_gpio.c +++ b/bsp/swm320/libraries/SWM320_StdPeriph_Driver/SWM320_gpio.c @@ -31,7 +31,7 @@ * uint32_t pull_up 裬0 ر 1 * uint32_t pull_down 裬0 ر 1 * : -* ע: GPIOAGPIOCGPIOMGPIOPֻGPIOBGPIONֻ +* ע: GPIOAGPIOCGPIOMGPIOPֻGPIOBGPIONֻPN0PN1PN2û ******************************************************************************************************************************************/ void GPIO_Init(GPIO_TypeDef * GPIOx, uint32_t n, uint32_t dir, uint32_t pull_up, uint32_t pull_down) { diff --git a/bsp/swm320/libraries/SWM320_StdPeriph_Driver/SWM320_gpio.h b/bsp/swm320/libraries/SWM320_StdPeriph_Driver/SWM320_gpio.h index bcb59b0bee6f4ba4f42ec212cc7b2800b3eb1a44..3ced2d736e372f95f71182168517c7e54ad781e8 100644 --- a/bsp/swm320/libraries/SWM320_StdPeriph_Driver/SWM320_gpio.h +++ b/bsp/swm320/libraries/SWM320_StdPeriph_Driver/SWM320_gpio.h @@ -2,16 +2,16 @@ #define __SWM320_GPIO_H__ -void GPIO_Init(GPIO_TypeDef * GPIOx, uint32_t n, uint32_t dir, uint32_t pull_up, uint32_t pull_down); //ųʼŷ衢 +void GPIO_Init(GPIO_TypeDef * GPIOx, uint32_t n, uint32_t dir, uint32_t pull_up, uint32_t pull_down); //引脚初始化，包含引脚方向、上拉电阻、下拉电阻 -void GPIO_SetBit(GPIO_TypeDef * GPIOx, uint32_t n); //ָŵƽø -void GPIO_ClrBit(GPIO_TypeDef * GPIOx, uint32_t n); //ָŵƽõ -void GPIO_InvBit(GPIO_TypeDef * GPIOx, uint32_t n); //ָŵƽת -uint32_t GPIO_GetBit(GPIO_TypeDef * GPIOx, uint32_t n); //ȡָŵĵƽ״̬ -void GPIO_SetBits(GPIO_TypeDef * GPIOx, uint32_t n, uint32_t w); //ָĴnʼwλŵĵƽø -void GPIO_ClrBits(GPIO_TypeDef * GPIOx, uint32_t n, uint32_t w); //ָĴnʼwλŵĵƽõ -void GPIO_InvBits(GPIO_TypeDef * GPIOx, uint32_t n, uint32_t w); //ָĴnʼwλŵĵƽת -uint32_t GPIO_GetBits(GPIO_TypeDef * GPIOx, uint32_t n, uint32_t w); //ȡָĴnʼwλŵĵƽ״̬ +void GPIO_SetBit(GPIO_TypeDef * GPIOx, uint32_t n); //将参数指定的引脚电平置高 +void GPIO_ClrBit(GPIO_TypeDef * GPIOx, uint32_t n); //将参数指定的引脚电平置低 +void GPIO_InvBit(GPIO_TypeDef * GPIOx, uint32_t n); //将参数指定的引脚电平反转 +uint32_t GPIO_GetBit(GPIO_TypeDef * GPIOx, uint32_t n); //读取参数指定的引脚的电平状态 +void GPIO_SetBits(GPIO_TypeDef * GPIOx, uint32_t n, uint32_t w); //将参数指定的从n开始的w位连续引脚的电平置高 +void GPIO_ClrBits(GPIO_TypeDef * GPIOx, uint32_t n, uint32_t w); //将参数指定的从n开始的w位连续引脚的电平置低 +void GPIO_InvBits(GPIO_TypeDef * GPIOx, uint32_t n, uint32_t w); //将参数指定的从n开始的w位连续引脚的电平反转 +uint32_t GPIO_GetBits(GPIO_TypeDef * GPIOx, uint32_t n, uint32_t w); //读取参数指定的从n开始的w位连续引脚的电平状态 void GPIO_AtomicSetBit(GPIO_TypeDef * GPIOx, uint32_t n); void GPIO_AtomicClrBit(GPIO_TypeDef * GPIOx, uint32_t n); diff --git a/bsp/swm320/libraries/SWM320_StdPeriph_Driver/SWM320_i2c.h b/bsp/swm320/libraries/SWM320_StdPeriph_Driver/SWM320_i2c.h index fc52e9265ecd8b44cfe386a54777b07efec06f99..02f1292a28be6f564853924ea61af50af637962a 100644 --- a/bsp/swm320/libraries/SWM320_StdPeriph_Driver/SWM320_i2c.h +++ b/bsp/swm320/libraries/SWM320_StdPeriph_Driver/SWM320_i2c.h @@ -2,19 +2,19 @@ #define __SWM320_I2C_H__ typedef struct { - uint8_t Master; //1 ģʽ - uint8_t Addr7b; //1 7λַ 0 10λַ + uint8_t Master; //1 主机模式 + uint8_t Addr7b; //1 7位地址 0 10位地址 - uint32_t MstClk; //ʱƵ - uint8_t MstIEn; //ģʽжʹ + uint32_t MstClk; //主机传输时钟频率 + uint8_t MstIEn; //主机模式中断使能 - uint16_t SlvAddr; //ӻַ - uint8_t SlvRxEndIEn; //ӻжʹ - uint8_t SlvTxEndIEn; //ӻжʹ - uint8_t SlvSTADetIEn; //ӻ⵽ʼжʹ - uint8_t SlvSTODetIEn; //ӻ⵽ֹжʹ - uint8_t SlvRdReqIEn; //ӻյжʹ - uint8_t SlvWrReqIEn; //ӻյджʹ + uint16_t SlvAddr; //从机地址 + uint8_t SlvRxEndIEn; //从机接收完成中断使能 + uint8_t SlvTxEndIEn; //从机发送完成中断使能 + uint8_t SlvSTADetIEn; //从机检测到起始中断使能 + uint8_t SlvSTODetIEn; //从机检测到终止中断使能 + uint8_t SlvRdReqIEn; //从机接收到读请求中断使能 + uint8_t SlvWrReqIEn; //从机接收到写请求中断使能 } I2C_InitStructure; diff --git a/bsp/swm320/libraries/SWM320_StdPeriph_Driver/SWM320_lcd.c b/bsp/swm320/libraries/SWM320_StdPeriph_Driver/SWM320_lcd.c index 5220cb80469583f15370991bb7ec4e73ddf1488d..c26ea71f9da16605477a048f764b359e9456b648 100644 --- a/bsp/swm320/libraries/SWM320_StdPeriph_Driver/SWM320_lcd.c +++ b/bsp/swm320/libraries/SWM320_StdPeriph_Driver/SWM320_lcd.c @@ -1,10 +1,10 @@ /****************************************************************************************************************************************** -* ļ: SWM320_lcd.c -* ˵: SWM320ƬLCD -* ֧: http://www.synwit.com.cn/e/tool/gbook/?bid=1 -* ע: -* 汾: V1.1.0 20171025 -* ¼: +* 文件名称: SWM320_lcd.c +* 功能说明: SWM320单片机的LCD功能驱动库 +* 技术支持: http://www.synwit.com.cn/e/tool/gbook/?bid=1 +* 注意事项: +* 版本日期: V1.1.0 2017年10月25日 +* 升级记录: * * ******************************************************************************************************************************************* @@ -24,12 +24,12 @@ #include /****************************************************************************************************************************************** -* : LCD_Init() -* ˵: LCDʼ -* : LCD_TypeDef * LCDx ָҪõLCDЧֵLCD -* LCD_InitStructure * initStruct LCD趨ֵĽṹ -* : -* ע: +* 函数名称: LCD_Init() +* 功能说明: LCD初始化 +* 输 入: LCD_TypeDef * LCDx 指定要被设置的LCD，有效值包括LCD +* LCD_InitStructure * initStruct 包含LCD相关设定值的结构体 +* 输 出: 无 +* 注意事项: 无 ******************************************************************************************************************************************/ void LCD_Init(LCD_TypeDef * LCDx, LCD_InitStructure * initStruct) { @@ -39,30 +39,21 @@ void LCD_Init(LCD_TypeDef * LCDx, LCD_InitStructure * initStruct) SYS->CLKEN |= (0x01 << SYS_CLKEN_LCD_Pos); break; } - - if(initStruct->Interface == LCD_INTERFACE_RGB) - { - LCDx->START = (0 << LCD_START_MPUEN_Pos); - - LCDx->CR0 = ((initStruct->HnPixel - 1) << LCD_CR0_HPIX_Pos) | - ((initStruct->VnPixel - 1) << LCD_CR0_VPIX_Pos) | - (initStruct->ClkAlways << LCD_CR0_DCLK_Pos) | - (initStruct->HsyncWidth << LCD_CR0_HLOW_Pos); - - LCDx->CR1 = ((initStruct->Hfp - 1) << LCD_CR1_HFP_Pos) | - ((initStruct->Hbp - 1) << LCD_CR1_HBP_Pos) | - ((initStruct->Vfp - 1) << LCD_CR1_VFP_Pos) | - ((initStruct->Vbp - 1) << LCD_CR1_VBP_Pos) | - (initStruct->ClkDiv << LCD_CR1_DCLKDIV_Pos) | - (initStruct->SamplEdge << LCD_CR1_DCLKINV_Pos); - } - else if(initStruct->Interface == LCD_INTERFACE_I80) - { - // - } + + LCDx->CR0 = ((initStruct->HnPixel - 1) << LCD_CR0_HPIX_Pos) | + ((initStruct->VnPixel - 1) << LCD_CR0_VPIX_Pos) | + (initStruct->ClkAlways << LCD_CR0_DCLK_Pos) | + (initStruct->HsyncWidth << LCD_CR0_HLOW_Pos); + + LCDx->CR1 = ((initStruct->Hfp - 1) << LCD_CR1_HFP_Pos) | + ((initStruct->Hbp - 1) << LCD_CR1_HBP_Pos) | + ((initStruct->Vfp - 1) << LCD_CR1_VFP_Pos) | + ((initStruct->Vbp - 1) << LCD_CR1_VBP_Pos) | + (initStruct->ClkDiv << LCD_CR1_DCLKDIV_Pos) | + (initStruct->SamplEdge << LCD_CR1_DCLKINV_Pos); LCDx->IE = 1; - LCDx->IF = 1; //־ + LCDx->IF = 1; //清除标志 if(initStruct->IntEOTEn) LCD_INTEn(LCDx); else LCD_INTDis(LCDx); @@ -82,11 +73,11 @@ void LCD_Init(LCD_TypeDef * LCDx, LCD_InitStructure * initStruct) } /****************************************************************************************************************************************** -* : LCD_Start() -* ˵: һݴ -* : LCD_TypeDef * LCDx ָҪõLCDЧֵLCD -* : -* ע: +* 函数名称: LCD_Start() +* 功能说明: 启动一次数据传输 +* 输 入: LCD_TypeDef * LCDx 指定要被设置的LCD，有效值包括LCD +* 输 出: 无 +* 注意事项: 无 ******************************************************************************************************************************************/ void LCD_Start(LCD_TypeDef * LCDx) { @@ -94,11 +85,11 @@ void LCD_Start(LCD_TypeDef * LCDx) } /****************************************************************************************************************************************** -* : LCD_IsBusy() -* ˵: Ƿڽݴ -* : LCD_TypeDef * LCDx ָҪõLCDЧֵLCD -* : uint32_t 1 ڴ 0 ݴ -* ע: +* 函数名称: LCD_IsBusy() +* 功能说明: 是否正在进行数据传输 +* 输 入: LCD_TypeDef * LCDx 指定要被设置的LCD，有效值包括LCD +* 输 出: uint32_t 1 正在传输数据 0 数据传输已完成 +* 注意事项: 无 ******************************************************************************************************************************************/ uint32_t LCD_IsBusy(LCD_TypeDef * LCDx) { @@ -106,11 +97,11 @@ uint32_t LCD_IsBusy(LCD_TypeDef * LCDx) } /****************************************************************************************************************************************** -* : LCD_INTEn() -* ˵: LCDжʹܣָȵݴʱж -* : LCD_TypeDef * LCDx ָҪõLCDЧֵLCD -* : -* ע: +* 函数名称: LCD_INTEn() +* 功能说明: LCD中断使能，完成指定长度的数据传输时触发中断 +* 输 入: LCD_TypeDef * LCDx 指定要被设置的LCD，有效值包括LCD +* 输 出: 无 +* 注意事项: 无 ******************************************************************************************************************************************/ void LCD_INTEn(LCD_TypeDef * LCDx) { @@ -118,11 +109,11 @@ void LCD_INTEn(LCD_TypeDef * LCDx) } /****************************************************************************************************************************************** -* : LCD_INTDis() -* ˵: LCDжϽָֹȵݴʱж -* : LCD_TypeDef * LCDx ָҪõLCDЧֵLCD -* : -* ע: +* 函数名称: LCD_INTDis() +* 功能说明: LCD中断禁止，完成指定长度的数据传输时不触发中断 +* 输 入: LCD_TypeDef * LCDx 指定要被设置的LCD，有效值包括LCD +* 输 出: 无 +* 注意事项: 无 ******************************************************************************************************************************************/ void LCD_INTDis(LCD_TypeDef * LCDx) { @@ -130,11 +121,11 @@ void LCD_INTDis(LCD_TypeDef * LCDx) } /****************************************************************************************************************************************** -* : LCD_INTClr() -* ˵: LCDжϱ־ -* : LCD_TypeDef * LCDx ָҪõLCDЧֵLCD -* : -* ע: +* 函数名称: LCD_INTClr() +* 功能说明: LCD中断标志清除 +* 输 入: LCD_TypeDef * LCDx 指定要被设置的LCD，有效值包括LCD +* 输 出: 无 +* 注意事项: 无 ******************************************************************************************************************************************/ void LCD_INTClr(LCD_TypeDef * LCDx) { @@ -142,11 +133,11 @@ void LCD_INTClr(LCD_TypeDef * LCDx) } /****************************************************************************************************************************************** -* : LCD_INTStat() -* ˵: LCDж״̬ѯ -* : LCD_TypeDef * LCDx ָҪõLCDЧֵLCD -* : uint32_t 1 ָȵݴ 0 δָȵݴ -* ע: +* 函数名称: LCD_INTStat() +* 功能说明: LCD中断状态查询 +* 输 入: LCD_TypeDef * LCDx 指定要被设置的LCD，有效值包括LCD +* 输 出: uint32_t 1 完成指定长度的数据传输 0 未完成指定长度的数据传输 +* 注意事项: 无 ******************************************************************************************************************************************/ uint32_t LCD_INTStat(LCD_TypeDef * LCDx) { diff --git a/bsp/swm320/libraries/SWM320_StdPeriph_Driver/SWM320_lcd.h b/bsp/swm320/libraries/SWM320_StdPeriph_Driver/SWM320_lcd.h index 490af3162fc451e716a12867e30a5c1fc720932f..8091a88f035d9bf192d26f7c7e52071a0105c123 100644 --- a/bsp/swm320/libraries/SWM320_StdPeriph_Driver/SWM320_lcd.h +++ b/bsp/swm320/libraries/SWM320_StdPeriph_Driver/SWM320_lcd.h @@ -2,10 +2,7 @@ #define __SWM320_LCD_H__ -typedef struct { - uint8_t Interface; //LCDӿڣLCD_INTERFACE_RGBLCD_INTERFACE_I80LCD_INTERFACE_M68 - - /* RGBͬӿڲ */ +typedef struct { uint16_t HnPixel; //ˮƽظȡֵ1024 uint16_t VnPixel; //ֱظȡֵ 768 uint8_t Hfp; //horizonal front porchȡֵ32 @@ -21,10 +18,6 @@ typedef struct { } LCD_InitStructure; -#define LCD_INTERFACE_RGB 0 -#define LCD_INTERFACE_I80 1 -#define LCD_INTERFACE_M68 2 - #define LCD_SAMPLEDGE_RISE 0 //ĻDOTCLKز #define LCD_SAMPLEDGE_FALL 1 //ĻDOTCLK½ز diff --git a/bsp/swm320/libraries/SWM320_StdPeriph_Driver/SWM320_norflash.h b/bsp/swm320/libraries/SWM320_StdPeriph_Driver/SWM320_norflash.h index 23f7e5f902f192cc4dce78e4854030cfc7e6042c..1714454dd7a3ef38b4fac22cf3ccbb1cd120590f 100644 --- a/bsp/swm320/libraries/SWM320_StdPeriph_Driver/SWM320_norflash.h +++ b/bsp/swm320/libraries/SWM320_StdPeriph_Driver/SWM320_norflash.h @@ -2,12 +2,12 @@ #define __SWM320_NORFLASH_H__ typedef struct { - uint8_t DataWidth; // 816 + uint8_t DataWidth; // 8、16 - uint8_t WELowPulseTime; // WE# pulse widthλΪϵͳʱڣֵΪ7 - uint8_t OEPreValidTime; // Valid data output after OE# lowλΪϵͳʱڣֵΪ15 + uint8_t WELowPulseTime; // WE# pulse width，单位为系统时钟周期，最大值为7 + uint8_t OEPreValidTime; // Valid data output after OE# low，单位为系统时钟周期，最大值为15 - uint8_t OperFinishIEn; // (д롢)жʹ + uint8_t OperFinishIEn; // 操作(写入、擦除)完成中断使能 uint8_t OperTimeoutIEn; } NORFL_InitStructure; @@ -21,7 +21,7 @@ uint32_t NORFL_Read(uint32_t addr); uint16_t NORFL_ReadID(uint32_t id_addr); -/* ǰ汾߶ֶֻ֧ +/* 当前版本总线读只支持字读 #define NORFL_Read8(addr) *((volatile uint8_t *)(NORFLM_BASE + addr)) #define NORFL_Read16(addr) *((volatile uint16_t *)(NORFLM_BASE + addr)) */ #define NORFL_Read32(addr) *((volatile uint32_t *)(NORFLM_BASE + addr)) diff --git a/bsp/swm320/libraries/SWM320_StdPeriph_Driver/SWM320_port.c b/bsp/swm320/libraries/SWM320_StdPeriph_Driver/SWM320_port.c index af21c1ffebd27feaacbb24c4f0db5348d90288c7..55967f7cac3ca738f853790b235c1c4c48fb57fe 100644 --- a/bsp/swm320/libraries/SWM320_StdPeriph_Driver/SWM320_port.c +++ b/bsp/swm320/libraries/SWM320_StdPeriph_Driver/SWM320_port.c @@ -1,10 +1,10 @@ /****************************************************************************************************************************************** -* ļ: SWM320_port.c -* ˵: SWM320ƬĶ˿Źѡ⺯ -* ֧: http://www.synwit.com.cn/e/tool/gbook/?bid=1 -* ע: -* 汾: V1.1.0 20171025 -* ¼: +* 文件名称: SWM320_port.c +* 功能说明: SWM320单片机的端口引脚功能选择库函数 +* 技术支持: http://www.synwit.com.cn/e/tool/gbook/?bid=1 +* 注意事项: +* 版本日期: V1.1.0 2017年10月25日 +* 升级记录: * * ******************************************************************************************************************************************* @@ -23,15 +23,15 @@ /****************************************************************************************************************************************** -* : PORT_Init() -* ˵: ˿Źѡ񣬿õĹܼ"SWM320_port.h"ļ -* : uint32_t PORTx ָPORT˿ڣЧֵPORTAPORTBPORTCPORTMPORTNPORTP -* uint32_t n ָPORTţЧֵPIN0PIN1PIN2... ... PIN22PIN23 -* uint32_t func ָ˿Ҫ趨Ĺܣȡֵ"SWM320_port.h"ļ -* uint32_t digit_in_en ʹ -* : -* ע: űnΪżʱfuncȡֵֻFUNMUX0ͷģFUNMUX0_UART0_RXD -* űnΪʱfuncȡֵֻFUNMUX1ͷģFUNMUX1_UART0_TXD +* 函数名称: PORT_Init() +* 功能说明: 端口引脚功能选择，可用的功能见"SWM320_port.h"文件 +* 输 入: uint32_t PORTx 指定PORT端口，有效值包括PORTA、PORTB、PORTC、PORTM、PORTN、PORTP +* uint32_t n 指定PORT引脚，有效值包括PIN0、PIN1、PIN2、... ... PIN22、PIN23 +* uint32_t func 指定端口引脚要设定的功能，其可取值见"SWM320_port.h"文件 +* uint32_t digit_in_en 数字输入使能 +* 输 出: 无 +* 注意事项: 当引脚标号n为偶数时，func取值只能是FUNMUX0开头的，如FUNMUX0_UART0_RXD +* 当引脚标号n为奇数时，func取值只能是FUNMUX1开头的，如FUNMUX1_UART0_TXD ******************************************************************************************************************************************/ void PORT_Init(uint32_t PORTx, uint32_t n, uint32_t func, uint32_t digit_in_en) { diff --git a/bsp/swm320/libraries/SWM320_StdPeriph_Driver/SWM320_port.h b/bsp/swm320/libraries/SWM320_StdPeriph_Driver/SWM320_port.h index 1e2f4f2244f02c49e4f3d9806f7d5297a599caeb..9fa2a24b12c1ceb4af16aa1810351125879da2ff 100644 --- a/bsp/swm320/libraries/SWM320_StdPeriph_Driver/SWM320_port.h +++ b/bsp/swm320/libraries/SWM320_StdPeriph_Driver/SWM320_port.h @@ -1,7 +1,7 @@ #ifndef __SWM320_PORT_H__ #define __SWM320_PORT_H__ -void PORT_Init(uint32_t PORTx, uint32_t n, uint32_t func, uint32_t digit_in_en); //˿Źѡȡֵ£ +void PORT_Init(uint32_t PORTx, uint32_t n, uint32_t func, uint32_t digit_in_en); //端口引脚功能选择，其可取值如下： #define PORTA 0 #define PORTB 1 @@ -425,8 +425,8 @@ void PORT_Init(uint32_t PORTx, uint32_t n, uint32_t func, uint32_t digit_in_en); -/* 궨ȡֵȫȷֵĻϡ100궨ֵӶ⺯ıд*/ -/* ЩֵżŵĹȡֵPIN0PIN2... */ +/* 下面宏定义的取值全部在正确值的基础上“加100”，以区分上面宏定义的值，从而方便库函数的编写*/ +/* 下面这些值是偶数编号引脚的功能取值，如PIN0、PIN2、... */ #define FUNMUX0_UART0_RXD 100 #define FUNMUX0_UART1_RXD 101 #define FUNMUX0_UART2_RXD 102 @@ -452,7 +452,7 @@ void PORT_Init(uint32_t PORTx, uint32_t n, uint32_t func, uint32_t digit_in_en); #define FUNMUX0_UART2_CTS 123 #define FUNMUX0_UART3_CTS 124 -/* ЩֵŵĹȡֵPIN1PIN3... */ +/* 下面这些值是奇数编号引脚的功能取值，如PIN1、PIN3、... */ #define FUNMUX1_UART0_TXD 100 #define FUNMUX1_UART1_TXD 101 #define FUNMUX1_UART2_TXD 102 diff --git a/bsp/swm320/libraries/SWM320_StdPeriph_Driver/SWM320_pwm.c b/bsp/swm320/libraries/SWM320_StdPeriph_Driver/SWM320_pwm.c index e74334fc93a4e7dc879d2c6ce5cdca70f48bc088..2c8e87cd9b74c55cf2b427628ef5ce0fcf19297c 100644 --- a/bsp/swm320/libraries/SWM320_StdPeriph_Driver/SWM320_pwm.c +++ b/bsp/swm320/libraries/SWM320_StdPeriph_Driver/SWM320_pwm.c @@ -1,10 +1,10 @@ /****************************************************************************************************************************************** -* ļ: SWM320_pwm.c -* ˵: SWM320ƬPWM -* ֧: http://www.synwit.com.cn/e/tool/gbook/?bid=1 -* ע: -* 汾: V1.1.0 20171025 -* ¼: +* 文件名称: SWM320_pwm.c +* 功能说明: SWM320单片机的PWM功能驱动库 +* 技术支持: http://www.synwit.com.cn/e/tool/gbook/?bid=1 +* 注意事项: +* 版本日期: V1.1.0 2017年10月25日 +* 升级记录: * * ******************************************************************************************************************************************* @@ -23,12 +23,12 @@ /****************************************************************************************************************************************** -* : PWM_Init() -* ˵: PWMʼ -* : PWM_TypeDef * PWMx ָҪõPWMЧֵPWM0PWM1PWM2PWM3PWM4PWM5 -* PWM_InitStructure * initStruct PWM趨ֵĽṹ -* : -* ע: +* 函数名称: PWM_Init() +* 功能说明: PWM初始化 +* 输 入: PWM_TypeDef * PWMx 指定要被设置的PWM，有效值包括PWM0、PWM1、PWM2、PWM3、PWM4、PWM5 +* PWM_InitStructure * initStruct 包含PWM相关设定值的结构体 +* 输 出: 无 +* 注意事项: 无 ******************************************************************************************************************************************/ void PWM_Init(PWM_TypeDef * PWMx, PWM_InitStructure * initStruct) { @@ -39,7 +39,7 @@ void PWM_Init(PWM_TypeDef * PWMx, PWM_InitStructure * initStruct) SYS->CLKDIV &= ~SYS_CLKDIV_PWM_Msk; SYS->CLKDIV |= (initStruct->clk_div << SYS_CLKDIV_PWM_Pos); - PWM_Stop(PWMx, 1, 1); //һЩؼĴֻPWMֹͣʱ + PWM_Stop(PWMx, 1, 1); //一些关键寄存器只能在PWM停止时设置 PWMx->MODE = initStruct->mode; @@ -84,7 +84,7 @@ void PWM_Init(PWM_TypeDef * PWMx, PWM_InitStructure * initStruct) break; } - PWMG->IRS = ((0x01 << bit_offset) | (0x01 << (bit_offset+1)) | (0x01 << (bit_offset+12)) | (0x01 << (bit_offset+13))); //жϱ־ + PWMG->IRS = ((0x01 << bit_offset) | (0x01 << (bit_offset+1)) | (0x01 << (bit_offset+12)) | (0x01 << (bit_offset+13))); //清除中断标志 PWMG->IE &= ~((0x01 << bit_offset) | (0x01 << (bit_offset+1)) | (0x01 << (bit_offset+12)) | (0x01 << (bit_offset+13))); PWMG->IE |= (initStruct->NCycleAIEn << bit_offset) | (initStruct->NCycleBIEn << (bit_offset+1)) | (initStruct->HEndAIEn << (bit_offset+12)) | (initStruct->HEndBIEn << (bit_offset+13)); @@ -100,13 +100,13 @@ void PWM_Init(PWM_TypeDef * PWMx, PWM_InitStructure * initStruct) } /****************************************************************************************************************************************** -* : PWM_Start() -* ˵: PWMʼPWM -* : PWM_TypeDef * PWMx ָҪõPWMЧֵPWM0PWM1PWM2PWM3PWM4PWM5 -* uint32_t chA 0 ͨA 1 ͨA -* uint32_t chB 0 ͨB 1 ͨB -* : -* ע: +* 函数名称: PWM_Start() +* 功能说明: 启动PWM，开始PWM输出 +* 输 入: PWM_TypeDef * PWMx 指定要被设置的PWM，有效值包括PWM0、PWM1、PWM2、PWM3、PWM4、PWM5 +* uint32_t chA 0 通道A不启动 1 通道A启动 +* uint32_t chB 0 通道B不启动 1 通道B启动 +* 输 出: 无 +* 注意事项: 无 ******************************************************************************************************************************************/ void PWM_Start(PWM_TypeDef * PWMx, uint32_t chA, uint32_t chB) { @@ -139,13 +139,13 @@ void PWM_Start(PWM_TypeDef * PWMx, uint32_t chA, uint32_t chB) } /****************************************************************************************************************************************** -* : PWM_Stop() -* ˵: رPWMֹͣPWM -* : PWM_TypeDef * PWMx ָҪõPWMЧֵPWM0PWM1PWM2PWM3PWM4PWM5 -* uint32_t chA 0 ͨAر 1 ͨAر -* uint32_t chB 0 ͨBر 1 ͨBر -* : -* ע: +* 函数名称: PWM_Stop() +* 功能说明: 关闭PWM，停止PWM输出 +* 输 入: PWM_TypeDef * PWMx 指定要被设置的PWM，有效值包括PWM0、PWM1、PWM2、PWM3、PWM4、PWM5 +* uint32_t chA 0 通道A不关闭 1 通道A关闭 +* uint32_t chB 0 通道B不关闭 1 通道B关闭 +* 输 出: 无 +* 注意事项: 无 ******************************************************************************************************************************************/ void PWM_Stop(PWM_TypeDef * PWMx, uint32_t chA, uint32_t chB) { @@ -178,13 +178,13 @@ void PWM_Stop(PWM_TypeDef * PWMx, uint32_t chA, uint32_t chB) } /****************************************************************************************************************************************** -* : PWM_SetCycle() -* ˵: -* : PWM_TypeDef * PWMx ָҪõPWMЧֵPWM0PWM1PWM2PWM3PWM4PWM5 -* uint32_t chn ѡҪĸͨЧֵPWM_CH_APWM_CH_B -* uint16_t cycle Ҫ趨ֵ -* : -* ע: +* 函数名称: PWM_SetCycle() +* 功能说明: 设置周期 +* 输 入: PWM_TypeDef * PWMx 指定要被设置的PWM，有效值包括PWM0、PWM1、PWM2、PWM3、PWM4、PWM5 +* uint32_t chn 选择要设置哪个通道，有效值：PWM_CH_A、PWM_CH_B +* uint16_t cycle 要设定的周期值 +* 输 出: 无 +* 注意事项: 无 ******************************************************************************************************************************************/ void PWM_SetCycle(PWM_TypeDef * PWMx, uint32_t chn, uint16_t cycle) { @@ -195,12 +195,12 @@ void PWM_SetCycle(PWM_TypeDef * PWMx, uint32_t chn, uint16_t cycle) } /****************************************************************************************************************************************** -* : PWM_GetCycle() -* ˵: ȡ -* : PWM_TypeDef * PWMx ָҪõPWMЧֵPWM0PWM1PWM2PWM3PWM4PWM5 -* uint32_t chn ѡҪѯĸͨЧֵPWM_CH_APWM_CH_B -* : uint16_t ȡֵ -* ע: +* 函数名称: PWM_GetCycle() +* 功能说明: 获取周期 +* 输 入: PWM_TypeDef * PWMx 指定要被设置的PWM，有效值包括PWM0、PWM1、PWM2、PWM3、PWM4、PWM5 +* uint32_t chn 选择要查询哪个通道，有效值：PWM_CH_A、PWM_CH_B +* 输 出: uint16_t 获取到的周期值 +* 注意事项: 无 ******************************************************************************************************************************************/ uint16_t PWM_GetCycle(PWM_TypeDef * PWMx, uint32_t chn) { @@ -215,13 +215,13 @@ uint16_t PWM_GetCycle(PWM_TypeDef * PWMx, uint32_t chn) } /****************************************************************************************************************************************** -* : PWM_SetHDuty() -* ˵: øߵƽʱ -* : PWM_TypeDef * PWMx ָҪõPWMЧֵPWM0PWM1PWM2PWM3PWM4PWM5 -* uint32_t chn ѡҪĸͨЧֵPWM_CH_APWM_CH_B -* uint16_t hduty Ҫ趨ĸߵƽʱ -* : -* ע: +* 函数名称: PWM_SetHDuty() +* 功能说明: 设置高电平时长 +* 输 入: PWM_TypeDef * PWMx 指定要被设置的PWM，有效值包括PWM0、PWM1、PWM2、PWM3、PWM4、PWM5 +* uint32_t chn 选择要设置哪个通道，有效值：PWM_CH_A、PWM_CH_B +* uint16_t hduty 要设定的高电平时长 +* 输 出: 无 +* 注意事项: 无 ******************************************************************************************************************************************/ void PWM_SetHDuty(PWM_TypeDef * PWMx, uint32_t chn, uint16_t hduty) { @@ -232,12 +232,12 @@ void PWM_SetHDuty(PWM_TypeDef * PWMx, uint32_t chn, uint16_t hduty) } /****************************************************************************************************************************************** -* : PWM_GetHDuty() -* ˵: ȡߵƽʱ -* : PWM_TypeDef * PWMx ָҪõPWMЧֵPWM0PWM1PWM2PWM3PWM4PWM5 -* uint32_t chn ѡҪѯĸͨЧֵPWM_CH_APWM_CH_B -* : uint16_t ȡĸߵƽʱ -* ע: +* 函数名称: PWM_GetHDuty() +* 功能说明: 获取高电平时长 +* 输 入: PWM_TypeDef * PWMx 指定要被设置的PWM，有效值包括PWM0、PWM1、PWM2、PWM3、PWM4、PWM5 +* uint32_t chn 选择要查询哪个通道，有效值：PWM_CH_A、PWM_CH_B +* 输 出: uint16_t 获取到的高电平时长 +* 注意事项: 无 ******************************************************************************************************************************************/ uint16_t PWM_GetHDuty(PWM_TypeDef * PWMx, uint32_t chn) { @@ -252,13 +252,13 @@ uint16_t PWM_GetHDuty(PWM_TypeDef * PWMx, uint32_t chn) } /****************************************************************************************************************************************** -* : PWM_SetDeadzone() -* ˵: ʱ -* : PWM_TypeDef * PWMx ָҪõPWMЧֵPWM0PWM1PWM2PWM3PWM4PWM5 -* uint32_t chn ѡҪĸͨЧֵPWM_CH_APWM_CH_B -* uint8_t deadzone Ҫ趨ʱ -* : -* ע: +* 函数名称: PWM_SetDeadzone() +* 功能说明: 设置死区时长 +* 输 入: PWM_TypeDef * PWMx 指定要被设置的PWM，有效值包括PWM0、PWM1、PWM2、PWM3、PWM4、PWM5 +* uint32_t chn 选择要设置哪个通道，有效值：PWM_CH_A、PWM_CH_B +* uint8_t deadzone 要设定的死区时长 +* 输 出: 无 +* 注意事项: 无 ******************************************************************************************************************************************/ void PWM_SetDeadzone(PWM_TypeDef * PWMx, uint32_t chn, uint8_t deadzone) { @@ -269,12 +269,12 @@ void PWM_SetDeadzone(PWM_TypeDef * PWMx, uint32_t chn, uint8_t deadzone) } /****************************************************************************************************************************************** -* : PWM_GetDeadzone() -* ˵: ȡʱ -* : PWM_TypeDef * PWMx ָҪõPWMЧֵPWM0PWM1PWM2PWM3PWM4PWM5 -* uint32_t chn ѡҪѯĸͨЧֵPWM_CH_APWM_CH_B -* : uint8_t ȡʱ -* ע: +* 函数名称: PWM_GetDeadzone() +* 功能说明: 获取死区时长 +* 输 入: PWM_TypeDef * PWMx 指定要被设置的PWM，有效值包括PWM0、PWM1、PWM2、PWM3、PWM4、PWM5 +* uint32_t chn 选择要查询哪个通道，有效值：PWM_CH_A、PWM_CH_B +* 输 出: uint8_t 获取到的死区时长 +* 注意事项: 无 ******************************************************************************************************************************************/ uint8_t PWM_GetDeadzone(PWM_TypeDef * PWMx, uint32_t chn) { @@ -290,12 +290,12 @@ uint8_t PWM_GetDeadzone(PWM_TypeDef * PWMx, uint32_t chn) /****************************************************************************************************************************************** -* : PWM_IntNCycleEn() -* ˵: ڿʼжʹ -* : PWM_TypeDef * PWMx ָҪõPWMЧֵPWM0PWM1PWM2PWM3PWM4PWM5 -* uint32_t chn ѡҪĸͨЧֵPWM_CH_APWM_CH_B -* : -* ע: +* 函数名称: PWM_IntNCycleEn() +* 功能说明: 新周期开始中断使能 +* 输 入: PWM_TypeDef * PWMx 指定要被设置的PWM，有效值包括PWM0、PWM1、PWM2、PWM3、PWM4、PWM5 +* uint32_t chn 选择要设置哪个通道，有效值：PWM_CH_A、PWM_CH_B +* 输 出: 无 +* 注意事项: 无 ******************************************************************************************************************************************/ void PWM_IntNCycleEn(PWM_TypeDef * PWMx, uint32_t chn) { @@ -334,12 +334,12 @@ void PWM_IntNCycleEn(PWM_TypeDef * PWMx, uint32_t chn) } /****************************************************************************************************************************************** -* : PWM_IntNCycleDis() -* ˵: ڿʼжϽ -* : PWM_TypeDef * PWMx ָҪõPWMЧֵPWM0PWM1PWM2PWM3PWM4PWM5 -* uint32_t chn ѡҪĸͨЧֵPWM_CH_APWM_CH_B -* : -* ע: +* 函数名称: PWM_IntNCycleDis() +* 功能说明: 新周期开始中断禁能 +* 输 入: PWM_TypeDef * PWMx 指定要被设置的PWM，有效值包括PWM0、PWM1、PWM2、PWM3、PWM4、PWM5 +* uint32_t chn 选择要设置哪个通道，有效值：PWM_CH_A、PWM_CH_B +* 输 出: 无 +* 注意事项: 无 ******************************************************************************************************************************************/ void PWM_IntNCycleDis(PWM_TypeDef * PWMx, uint32_t chn) { @@ -378,12 +378,12 @@ void PWM_IntNCycleDis(PWM_TypeDef * PWMx, uint32_t chn) } /****************************************************************************************************************************************** -* : PWM_IntNCycleClr() -* ˵: ڿʼжϱ־ -* : PWM_TypeDef * PWMx ָҪõPWMЧֵPWM0PWM1PWM2PWM3PWM4PWM5 -* uint32_t chn ѡҪĸͨЧֵPWM_CH_APWM_CH_B -* : -* ע: +* 函数名称: PWM_IntNCycleClr() +* 功能说明: 新周期开始中断标志清除 +* 输 入: PWM_TypeDef * PWMx 指定要被设置的PWM，有效值包括PWM0、PWM1、PWM2、PWM3、PWM4、PWM5 +* uint32_t chn 选择要设置哪个通道，有效值：PWM_CH_A、PWM_CH_B +* 输 出: 无 +* 注意事项: 无 ******************************************************************************************************************************************/ void PWM_IntNCycleClr(PWM_TypeDef * PWMx, uint32_t chn) { @@ -422,12 +422,12 @@ void PWM_IntNCycleClr(PWM_TypeDef * PWMx, uint32_t chn) } /****************************************************************************************************************************************** -* : PWM_IntNCycleStat() -* ˵: ڿʼжǷ -* : PWM_TypeDef * PWMx ָҪõPWMЧֵPWM0PWM1PWM2PWM3PWM4PWM5 -* uint32_t chn ѡҪĸͨЧֵPWM_CH_APWM_CH_B -* : uint32_t 1 ڿʼжѷ 0 ڿʼжδ -* ע: +* 函数名称: PWM_IntNCycleStat() +* 功能说明: 新周期开始中断是否发生 +* 输 入: PWM_TypeDef * PWMx 指定要被设置的PWM，有效值包括PWM0、PWM1、PWM2、PWM3、PWM4、PWM5 +* uint32_t chn 选择要设置哪个通道，有效值：PWM_CH_A、PWM_CH_B +* 输 出: uint32_t 1 新周期开始中断已发生 0 新周期开始中断未发生 +* 注意事项: 无 ******************************************************************************************************************************************/ uint32_t PWM_IntNCycleStat(PWM_TypeDef * PWMx, uint32_t chn) { @@ -471,12 +471,12 @@ uint32_t PWM_IntNCycleStat(PWM_TypeDef * PWMx, uint32_t chn) /****************************************************************************************************************************************** -* : PWM_IntHEndEn() -* ˵: ߵƽжʹ -* : PWM_TypeDef * PWMx ָҪõPWMЧֵPWM0PWM1PWM2PWM3PWM4PWM5 -* uint32_t chn ѡҪĸͨЧֵPWM_CH_APWM_CH_B -* : -* ע: +* 函数名称: PWM_IntHEndEn() +* 功能说明: 高电平结束中断使能 +* 输 入: PWM_TypeDef * PWMx 指定要被设置的PWM，有效值包括PWM0、PWM1、PWM2、PWM3、PWM4、PWM5 +* uint32_t chn 选择要设置哪个通道，有效值：PWM_CH_A、PWM_CH_B +* 输 出: 无 +* 注意事项: 无 ******************************************************************************************************************************************/ void PWM_IntHEndEn(PWM_TypeDef * PWMx, uint32_t chn) { @@ -515,12 +515,12 @@ void PWM_IntHEndEn(PWM_TypeDef * PWMx, uint32_t chn) } /****************************************************************************************************************************************** -* : PWM_IntHEndDis() -* ˵: ߵƽжϽ -* : PWM_TypeDef * PWMx ָҪõPWMЧֵPWM0PWM1PWM2PWM3PWM4PWM5 -* uint32_t chn ѡҪĸͨЧֵPWM_CH_APWM_CH_B -* : -* ע: +* 函数名称: PWM_IntHEndDis() +* 功能说明: 高电平结束中断禁能 +* 输 入: PWM_TypeDef * PWMx 指定要被设置的PWM，有效值包括PWM0、PWM1、PWM2、PWM3、PWM4、PWM5 +* uint32_t chn 选择要设置哪个通道，有效值：PWM_CH_A、PWM_CH_B +* 输 出: 无 +* 注意事项: 无 ******************************************************************************************************************************************/ void PWM_IntHEndDis(PWM_TypeDef * PWMx, uint32_t chn) { @@ -559,12 +559,12 @@ void PWM_IntHEndDis(PWM_TypeDef * PWMx, uint32_t chn) } /****************************************************************************************************************************************** -* : PWM_IntHEndClr() -* ˵: ߵƽжϱ־ -* : PWM_TypeDef * PWMx ָҪõPWMЧֵPWM0PWM1PWM2PWM3PWM4PWM5 -* uint32_t chn ѡҪĸͨЧֵPWM_CH_APWM_CH_B -* : -* ע: +* 函数名称: PWM_IntHEndClr() +* 功能说明: 高电平结束中断标志清除 +* 输 入: PWM_TypeDef * PWMx 指定要被设置的PWM，有效值包括PWM0、PWM1、PWM2、PWM3、PWM4、PWM5 +* uint32_t chn 选择要设置哪个通道，有效值：PWM_CH_A、PWM_CH_B +* 输 出: 无 +* 注意事项: 无 ******************************************************************************************************************************************/ void PWM_IntHEndClr(PWM_TypeDef * PWMx, uint32_t chn) { @@ -603,12 +603,12 @@ void PWM_IntHEndClr(PWM_TypeDef * PWMx, uint32_t chn) } /****************************************************************************************************************************************** -* : PWM_IntHEndStat() -* ˵: ߵƽжǷ -* : PWM_TypeDef * PWMx ָҪõPWMЧֵPWM0PWM1PWM2PWM3PWM4PWM5 -* uint32_t chn ѡҪĸͨЧֵPWM_CH_APWM_CH_B -* : uint32_t 1 ߵƽжѷ 0 ߵƽжδ -* ע: +* 函数名称: PWM_IntHEndStat() +* 功能说明: 高电平结束中断是否发生 +* 输 入: PWM_TypeDef * PWMx 指定要被设置的PWM，有效值包括PWM0、PWM1、PWM2、PWM3、PWM4、PWM5 +* uint32_t chn 选择要设置哪个通道，有效值：PWM_CH_A、PWM_CH_B +* 输 出: uint32_t 1 高电平结束中断已发生 0 高电平结束中断未发生 +* 注意事项: 无 ******************************************************************************************************************************************/ uint32_t PWM_IntHEndStat(PWM_TypeDef * PWMx, uint32_t chn) { diff --git a/bsp/swm320/libraries/SWM320_StdPeriph_Driver/SWM320_pwm.h b/bsp/swm320/libraries/SWM320_StdPeriph_Driver/SWM320_pwm.h index 4565a05a94e26f4fe77628c8eeba9bec6581e935..6f857fae3738e78b61d15707f47b8e285e0b6d95 100644 --- a/bsp/swm320/libraries/SWM320_StdPeriph_Driver/SWM320_pwm.h +++ b/bsp/swm320/libraries/SWM320_StdPeriph_Driver/SWM320_pwm.h @@ -2,57 +2,57 @@ #define __SWM320_PWM_H__ typedef struct { - uint8_t clk_div; //PWM_CLKDIV_1PWM_CLKDIV_8 + uint8_t clk_div; //PWM_CLKDIV_1、PWM_CLKDIV_8 - uint8_t mode; //PWM_MODE_INDEPPWM_MODE_COMPLPWM_MODE_INDEP_CALIGNPWM_MODE_COMPL_CALIGN + uint8_t mode; //PWM_MODE_INDEP、PWM_MODE_COMPL、PWM_MODE_INDEP_CALIGN、PWM_MODE_COMPL_CALIGN - uint16_t cycleA; //A· - uint16_t hdutyA; //A·ռձ - uint16_t deadzoneA; //A·ʱȡֵ0--1023 - uint8_t initLevelA; //A·ʼƽ0 ͵ƽ 1 ߵƽ + uint16_t cycleA; //A路周期 + uint16_t hdutyA; //A路占空比 + uint16_t deadzoneA; //A路死区时长，取值0--1023 + uint8_t initLevelA; //A路初始输出电平，0 低电平 1 高电平 - uint16_t cycleB; //B· - uint16_t hdutyB; //B·ռձ - uint16_t deadzoneB; //B·ʱȡֵ0--1023 - uint8_t initLevelB; //B·ʼƽ0 ͵ƽ 1 ߵƽ + uint16_t cycleB; //B路周期 + uint16_t hdutyB; //B路占空比 + uint16_t deadzoneB; //B路死区时长，取值0--1023 + uint8_t initLevelB; //B路初始输出电平，0 低电平 1 高电平 - uint8_t HEndAIEn; //A·ߵƽжʹ - uint8_t NCycleAIEn; //A·ڿʼжʹ - uint8_t HEndBIEn; //B·ߵƽжʹ - uint8_t NCycleBIEn; //B·ڿʼжʹ + uint8_t HEndAIEn; //A路高电平结束中断使能 + uint8_t NCycleAIEn; //A路新周期开始中断使能 + uint8_t HEndBIEn; //B路高电平结束中断使能 + uint8_t NCycleBIEn; //B路新周期开始中断使能 } PWM_InitStructure; #define PWM_CLKDIV_1 0 #define PWM_CLKDIV_8 1 -#define PWM_MODE_INDEP 0 //A·B·Ϊ· -#define PWM_MODE_COMPL 1 //A·B·Ϊһ· -#define PWM_MODE_INDEP_CALIGN 3 //A·B·Ϊ·Ķ -#define PWM_MODE_COMPL_CALIGN 4 //A·B·Ϊһ·Ķ +#define PWM_MODE_INDEP 0 //A路和B路为两路独立输出 +#define PWM_MODE_COMPL 1 //A路和B路为一路互补输出 +#define PWM_MODE_INDEP_CALIGN 3 //A路和B路为两路独立输出，中心对齐 +#define PWM_MODE_COMPL_CALIGN 4 //A路和B路为一路互补输出，中心对齐 #define PWM_CH_A 0 #define PWM_CH_B 1 -void PWM_Init(PWM_TypeDef * PWMx, PWM_InitStructure * initStruct); //PWMʼ -void PWM_Start(PWM_TypeDef * PWMx, uint32_t chA, uint32_t chB); //PWMʼPWM -void PWM_Stop(PWM_TypeDef * PWMx, uint32_t chA, uint32_t chB); //رPWMֹͣPWM - -void PWM_SetCycle(PWM_TypeDef * PWMx, uint32_t chn, uint16_t cycle); // -uint16_t PWM_GetCycle(PWM_TypeDef * PWMx, uint32_t chn); //ȡ -void PWM_SetHDuty(PWM_TypeDef * PWMx, uint32_t chn, uint16_t hduty); //øߵƽʱ -uint16_t PWM_GetHDuty(PWM_TypeDef * PWMx, uint32_t chn); //ȡߵƽʱ -void PWM_SetDeadzone(PWM_TypeDef * PWMx, uint32_t chn, uint8_t deadzone); //ʱ -uint8_t PWM_GetDeadzone(PWM_TypeDef * PWMx, uint32_t chn); //ȡʱ - -void PWM_IntNCycleEn(PWM_TypeDef * PWMx, uint32_t chn); //ڿʼжʹ -void PWM_IntNCycleDis(PWM_TypeDef * PWMx, uint32_t chn); //ڿʼжϽ -void PWM_IntNCycleClr(PWM_TypeDef * PWMx, uint32_t chn); //ڿʼжϱ־ -uint32_t PWM_IntNCycleStat(PWM_TypeDef * PWMx, uint32_t chn); //ڿʼжǷ -void PWM_IntHEndEn(PWM_TypeDef * PWMx, uint32_t chn); //ߵƽжʹ -void PWM_IntHEndDis(PWM_TypeDef * PWMx, uint32_t chn); //ߵƽжϽ -void PWM_IntHEndClr(PWM_TypeDef * PWMx, uint32_t chn); //ߵƽжϱ־ -uint32_t PWM_IntHEndStat(PWM_TypeDef * PWMx, uint32_t chn); //ߵƽжǷ +void PWM_Init(PWM_TypeDef * PWMx, PWM_InitStructure * initStruct); //PWM初始化 +void PWM_Start(PWM_TypeDef * PWMx, uint32_t chA, uint32_t chB); //启动PWM，开始PWM输出 +void PWM_Stop(PWM_TypeDef * PWMx, uint32_t chA, uint32_t chB); //关闭PWM，停止PWM输出 + +void PWM_SetCycle(PWM_TypeDef * PWMx, uint32_t chn, uint16_t cycle); //设置周期 +uint16_t PWM_GetCycle(PWM_TypeDef * PWMx, uint32_t chn); //获取周期 +void PWM_SetHDuty(PWM_TypeDef * PWMx, uint32_t chn, uint16_t hduty); //设置高电平时长 +uint16_t PWM_GetHDuty(PWM_TypeDef * PWMx, uint32_t chn); //获取高电平时长 +void PWM_SetDeadzone(PWM_TypeDef * PWMx, uint32_t chn, uint8_t deadzone); //设置死区时长 +uint8_t PWM_GetDeadzone(PWM_TypeDef * PWMx, uint32_t chn); //获取死区时长 + +void PWM_IntNCycleEn(PWM_TypeDef * PWMx, uint32_t chn); //新周期开始中断使能 +void PWM_IntNCycleDis(PWM_TypeDef * PWMx, uint32_t chn); //新周期开始中断禁能 +void PWM_IntNCycleClr(PWM_TypeDef * PWMx, uint32_t chn); //新周期开始中断标志清除 +uint32_t PWM_IntNCycleStat(PWM_TypeDef * PWMx, uint32_t chn); //新周期开始中断是否发生 +void PWM_IntHEndEn(PWM_TypeDef * PWMx, uint32_t chn); //高电平结束中断使能 +void PWM_IntHEndDis(PWM_TypeDef * PWMx, uint32_t chn); //高电平结束中断禁能 +void PWM_IntHEndClr(PWM_TypeDef * PWMx, uint32_t chn); //高电平结束中断标志清除 +uint32_t PWM_IntHEndStat(PWM_TypeDef * PWMx, uint32_t chn); //高电平结束中断是否发生 #endif //__SWM320_PWM_H__ diff --git a/bsp/swm320/libraries/SWM320_StdPeriph_Driver/SWM320_rtc.c b/bsp/swm320/libraries/SWM320_StdPeriph_Driver/SWM320_rtc.c index 2ce0f390b735fc714765d3b73f5a79d7f531b906..d43ee91f15a6bb2cf3d34537db82bb6f9dd05178 100644 --- a/bsp/swm320/libraries/SWM320_StdPeriph_Driver/SWM320_rtc.c +++ b/bsp/swm320/libraries/SWM320_StdPeriph_Driver/SWM320_rtc.c @@ -1,10 +1,10 @@ /****************************************************************************************************************************************** -* ļ: SWM320_rtc.c -* ˵: SWM320ƬRTC -* ֧: http://www.synwit.com.cn/e/tool/gbook/?bid=1 -* ע: -* 汾: V1.1.0 20171025 -* ¼: +* 文件名称: SWM320_rtc.c +* 功能说明: SWM320单片机的RTC驱动库 +* 技术支持: http://www.synwit.com.cn/e/tool/gbook/?bid=1 +* 注意事项: +* 版本日期: V1.1.0 2017年10月25日 +* 升级记录: * * ******************************************************************************************************************************************* @@ -24,18 +24,18 @@ static uint32_t calcWeekDay(uint32_t year, uint32_t month, uint32_t date); /****************************************************************************************************************************************** -* : RTC_Init() -* ˵: RTCʼ -* : RTC_TypeDef * RTCx ָҪõRTCЧֵRTC -* RTC_InitStructure * initStruct RTC趨ֵĽṹ -* : -* ע: +* 函数名称: RTC_Init() +* 功能说明: RTC初始化 +* 输 入: RTC_TypeDef * RTCx 指定要被设置的RTC，有效值包括RTC +* RTC_InitStructure * initStruct 包含RTC相关设定值的结构体 +* 输 出: 无 +* 注意事项: 无 ******************************************************************************************************************************************/ void RTC_Init(RTC_TypeDef * RTCx, RTC_InitStructure * initStruct) { SYS->CLKEN |= (1 << SYS_CLKEN_RTCBKP_Pos); - SYS->LRCCR &= ~(1 << SYS_LRCCR_OFF_Pos); //RTCʹ32KHz RCʱ + SYS->LRCCR &= ~(1 << SYS_LRCCR_OFF_Pos); //RTC使用32KHz RC时钟 SYS->CLKEN |= (1 << SYS_CLKEN_RTC_Pos) | ((uint32_t)1 << SYS_CLKEN_ALIVE_Pos); @@ -72,11 +72,11 @@ void RTC_Init(RTC_TypeDef * RTCx, RTC_InitStructure * initStruct) } /****************************************************************************************************************************************** -* : RTC_Start() -* ˵: RTC -* : RTC_TypeDef * RTCx ָҪõRTCȡֵRTC -* : -* ע: +* 函数名称: RTC_Start() +* 功能说明: 启动RTC +* 输 入: RTC_TypeDef * RTCx 指定要被设置的RTC，可取值包括RTC +* 输 出: 无 +* 注意事项: 无 ******************************************************************************************************************************************/ void RTC_Start(RTC_TypeDef * RTCx) { @@ -84,11 +84,11 @@ void RTC_Start(RTC_TypeDef * RTCx) } /****************************************************************************************************************************************** -* : RTC_Stop() -* ˵: ֹͣRTC -* : RTC_TypeDef * RTCx ָҪõRTCȡֵRTC -* : -* ע: +* 函数名称: RTC_Stop() +* 功能说明: 停止RTC +* 输 入: RTC_TypeDef * RTCx 指定要被设置的RTC，可取值包括RTC +* 输 出: 无 +* 注意事项: 无 ******************************************************************************************************************************************/ void RTC_Stop(RTC_TypeDef * RTCx) { @@ -96,12 +96,12 @@ void RTC_Stop(RTC_TypeDef * RTCx) } /****************************************************************************************************************************************** -* : RTC_GetDateTime() -* ˵: ȡǰʱ -* : RTC_TypeDef * RTCx ָҪõRTCЧֵRTC -* RTC_DateTime * dateTime ȡʱ䡢ֵָָĽṹ -* : -* ע: +* 函数名称: RTC_GetDateTime() +* 功能说明: 获取当前的时间和日期 +* 输 入: RTC_TypeDef * RTCx 指定要被设置的RTC，有效值包括RTC +* RTC_DateTime * dateTime 获取到的时间、日期值存入此指针指向的结构体 +* 输 出: 无 +* 注意事项: 无 ******************************************************************************************************************************************/ void RTC_GetDateTime(RTC_TypeDef * RTCx, RTC_DateTime * dateTime) { @@ -115,12 +115,12 @@ void RTC_GetDateTime(RTC_TypeDef * RTCx, RTC_DateTime * dateTime) } /****************************************************************************************************************************************** -* : RTC_AlarmSetup() -* ˵: RTC趨 -* : RTC_TypeDef * RTCx ָҪõRTCЧֵRTC -* RTC_AlarmStructure * alarmStruct RTC趨ֵĽṹ -* : -* ע: +* 函数名称: RTC_AlarmSetup() +* 功能说明: RTC闹钟设定 +* 输 入: RTC_TypeDef * RTCx 指定要被设置的RTC，有效值包括RTC +* RTC_AlarmStructure * alarmStruct 包含RTC闹钟设定值的结构体 +* 输 出: 无 +* 注意事项: 无 ******************************************************************************************************************************************/ void RTC_AlarmSetup(RTC_TypeDef * RTCx, RTC_AlarmStructure * alarmStruct) { @@ -143,13 +143,13 @@ void RTC_AlarmSetup(RTC_TypeDef * RTCx, RTC_AlarmStructure * alarmStruct) } /****************************************************************************************************************************************** -* : calcWeekDay() -* ˵: ָꡢ¡ڼ -* : uint32_t year -* uint32_t month -* uint32_t date -* : uint32_t 0 1 һ ... ... 6 -* ע: +* 函数名称: calcWeekDay() +* 功能说明: 计算指定年、月、日是星期几 +* 输 入: uint32_t year 年 +* uint32_t month 月 +* uint32_t date 日 +* 输 出: uint32_t 0 星期日 1 星期一 ... ... 6 星期六 +* 注意事项: 无 ******************************************************************************************************************************************/ static uint32_t calcWeekDay(uint32_t year, uint32_t month, uint32_t date) { @@ -173,11 +173,11 @@ static uint32_t calcWeekDay(uint32_t year, uint32_t month, uint32_t date) } /****************************************************************************************************************************************** -* : RTC_IntSecondEn() -* ˵: жʹ -* : RTC_TypeDef * RTCx ָҪõRTCȡֵRTC -* : -* ע: +* 函数名称: RTC_IntSecondEn() +* 功能说明: 秒中断使能 +* 输 入: RTC_TypeDef * RTCx 指定要被设置的RTC，可取值包括RTC +* 输 出: 无 +* 注意事项: 无 ******************************************************************************************************************************************/ void RTC_IntSecondEn(RTC_TypeDef * RTCx) { @@ -185,11 +185,11 @@ void RTC_IntSecondEn(RTC_TypeDef * RTCx) } /****************************************************************************************************************************************** -* : RTC_IntSecondDis() -* ˵: жϽֹ -* : RTC_TypeDef * RTCx ָҪõRTCȡֵRTC -* : -* ע: +* 函数名称: RTC_IntSecondDis() +* 功能说明: 秒中断禁止 +* 输 入: RTC_TypeDef * RTCx 指定要被设置的RTC，可取值包括RTC +* 输 出: 无 +* 注意事项: 无 ******************************************************************************************************************************************/ void RTC_IntSecondDis(RTC_TypeDef * RTCx) { @@ -197,11 +197,11 @@ void RTC_IntSecondDis(RTC_TypeDef * RTCx) } /****************************************************************************************************************************************** -* : RTC_IntSecondClr() -* ˵: жϱ־ -* : RTC_TypeDef * RTCx ָҪõRTCȡֵRTC -* : -* ע: +* 函数名称: RTC_IntSecondClr() +* 功能说明: 秒中断标志清除 +* 输 入: RTC_TypeDef * RTCx 指定要被设置的RTC，可取值包括RTC +* 输 出: 无 +* 注意事项: 无 ******************************************************************************************************************************************/ void RTC_IntSecondClr(RTC_TypeDef * RTCx) { @@ -209,11 +209,11 @@ void RTC_IntSecondClr(RTC_TypeDef * RTCx) } /****************************************************************************************************************************************** -* : RTC_IntSecondStat() -* ˵: ж״̬ -* : RTC_TypeDef * RTCx ָҪõRTCȡֵRTC -* : uint32_t 1 жϷ 0 жδ -* ע: +* 函数名称: RTC_IntSecondStat() +* 功能说明: 秒中断状态 +* 输 入: RTC_TypeDef * RTCx 指定要被设置的RTC，可取值包括RTC +* 输 出: uint32_t 1 秒中断发生 0 秒中断未发生 +* 注意事项: 无 ******************************************************************************************************************************************/ uint32_t RTC_IntSecondStat(RTC_TypeDef * RTCx) { @@ -221,11 +221,11 @@ uint32_t RTC_IntSecondStat(RTC_TypeDef * RTCx) } /****************************************************************************************************************************************** -* : RTC_IntMinuteEn() -* ˵: жʹ -* : RTC_TypeDef * RTCx ָҪõRTCȡֵRTC -* : -* ע: +* 函数名称: RTC_IntMinuteEn() +* 功能说明: 分中断使能 +* 输 入: RTC_TypeDef * RTCx 指定要被设置的RTC，可取值包括RTC +* 输 出: 无 +* 注意事项: 无 ******************************************************************************************************************************************/ void RTC_IntMinuteEn(RTC_TypeDef * RTCx) { @@ -233,11 +233,11 @@ void RTC_IntMinuteEn(RTC_TypeDef * RTCx) } /****************************************************************************************************************************************** -* : RTC_IntMinuteDis() -* ˵: жϽֹ -* : RTC_TypeDef * RTCx ָҪõRTCȡֵRTC -* : -* ע: +* 函数名称: RTC_IntMinuteDis() +* 功能说明: 分中断禁止 +* 输 入: RTC_TypeDef * RTCx 指定要被设置的RTC，可取值包括RTC +* 输 出: 无 +* 注意事项: 无 ******************************************************************************************************************************************/ void RTC_IntMinuteDis(RTC_TypeDef * RTCx) { @@ -245,11 +245,11 @@ void RTC_IntMinuteDis(RTC_TypeDef * RTCx) } /****************************************************************************************************************************************** -* : RTC_IntMinuteClr() -* ˵: жϱ־ -* : RTC_TypeDef * RTCx ָҪõRTCȡֵRTC -* : -* ע: +* 函数名称: RTC_IntMinuteClr() +* 功能说明: 分中断标志清除 +* 输 入: RTC_TypeDef * RTCx 指定要被设置的RTC，可取值包括RTC +* 输 出: 无 +* 注意事项: 无 ******************************************************************************************************************************************/ void RTC_IntMinuteClr(RTC_TypeDef * RTCx) { @@ -257,11 +257,11 @@ void RTC_IntMinuteClr(RTC_TypeDef * RTCx) } /****************************************************************************************************************************************** -* : RTC_IntMinuteStat() -* ˵: ж״̬ -* : RTC_TypeDef * RTCx ָҪõRTCȡֵRTC -* : uint32_t 1 жϷ 0 жδ -* ע: +* 函数名称: RTC_IntMinuteStat() +* 功能说明: 分中断状态 +* 输 入: RTC_TypeDef * RTCx 指定要被设置的RTC，可取值包括RTC +* 输 出: uint32_t 1 分中断发生 0 分中断未发生 +* 注意事项: 无 ******************************************************************************************************************************************/ uint32_t RTC_IntMinuteStat(RTC_TypeDef * RTCx) { @@ -269,11 +269,11 @@ uint32_t RTC_IntMinuteStat(RTC_TypeDef * RTCx) } /****************************************************************************************************************************************** -* : RTC_IntHourEn() -* ˵: ʱжʹ -* : RTC_TypeDef * RTCx ָҪõRTCȡֵRTC -* : -* ע: +* 函数名称: RTC_IntHourEn() +* 功能说明: 时中断使能 +* 输 入: RTC_TypeDef * RTCx 指定要被设置的RTC，可取值包括RTC +* 输 出: 无 +* 注意事项: 无 ******************************************************************************************************************************************/ void RTC_IntHourEn(RTC_TypeDef * RTCx) { @@ -281,11 +281,11 @@ void RTC_IntHourEn(RTC_TypeDef * RTCx) } /****************************************************************************************************************************************** -* : RTC_IntHourDis() -* ˵: ʱжϽֹ -* : RTC_TypeDef * RTCx ָҪõRTCȡֵRTC -* : -* ע: +* 函数名称: RTC_IntHourDis() +* 功能说明: 时中断禁止 +* 输 入: RTC_TypeDef * RTCx 指定要被设置的RTC，可取值包括RTC +* 输 出: 无 +* 注意事项: 无 ******************************************************************************************************************************************/ void RTC_IntHourDis(RTC_TypeDef * RTCx) { @@ -293,11 +293,11 @@ void RTC_IntHourDis(RTC_TypeDef * RTCx) } /****************************************************************************************************************************************** -* : RTC_IntHourClr() -* ˵: ʱжϱ־ -* : RTC_TypeDef * RTCx ָҪõRTCȡֵRTC -* : -* ע: +* 函数名称: RTC_IntHourClr() +* 功能说明: 时中断标志清除 +* 输 入: RTC_TypeDef * RTCx 指定要被设置的RTC，可取值包括RTC +* 输 出: 无 +* 注意事项: 无 ******************************************************************************************************************************************/ void RTC_IntHourClr(RTC_TypeDef * RTCx) { @@ -305,11 +305,11 @@ void RTC_IntHourClr(RTC_TypeDef * RTCx) } /****************************************************************************************************************************************** -* : RTC_IntHourStat() -* ˵: ʱж״̬ -* : RTC_TypeDef * RTCx ָҪõRTCȡֵRTC -* : uint32_t 1 ʱжϷ 0 ʱжδ -* ע: +* 函数名称: RTC_IntHourStat() +* 功能说明: 时中断状态 +* 输 入: RTC_TypeDef * RTCx 指定要被设置的RTC，可取值包括RTC +* 输 出: uint32_t 1 时中断发生 0 时中断未发生 +* 注意事项: 无 ******************************************************************************************************************************************/ uint32_t RTC_IntHourStat(RTC_TypeDef * RTCx) { @@ -317,11 +317,11 @@ uint32_t RTC_IntHourStat(RTC_TypeDef * RTCx) } /****************************************************************************************************************************************** -* : RTC_IntDateEn() -* ˵: жʹ -* : RTC_TypeDef * RTCx ָҪõRTCȡֵRTC -* : -* ע: +* 函数名称: RTC_IntDateEn() +* 功能说明: 日中断使能 +* 输 入: RTC_TypeDef * RTCx 指定要被设置的RTC，可取值包括RTC +* 输 出: 无 +* 注意事项: 无 ******************************************************************************************************************************************/ void RTC_IntDateEn(RTC_TypeDef * RTCx) { @@ -329,11 +329,11 @@ void RTC_IntDateEn(RTC_TypeDef * RTCx) } /****************************************************************************************************************************************** -* : RTC_IntDateDis() -* ˵: жϽֹ -* : RTC_TypeDef * RTCx ָҪõRTCȡֵRTC -* : -* ע: +* 函数名称: RTC_IntDateDis() +* 功能说明: 日中断禁止 +* 输 入: RTC_TypeDef * RTCx 指定要被设置的RTC，可取值包括RTC +* 输 出: 无 +* 注意事项: 无 ******************************************************************************************************************************************/ void RTC_IntDateDis(RTC_TypeDef * RTCx) { @@ -341,11 +341,11 @@ void RTC_IntDateDis(RTC_TypeDef * RTCx) } /****************************************************************************************************************************************** -* : RTC_IntDateClr() -* ˵: жϱ־ -* : RTC_TypeDef * RTCx ָҪõRTCȡֵRTC -* : -* ע: +* 函数名称: RTC_IntDateClr() +* 功能说明: 日中断标志清除 +* 输 入: RTC_TypeDef * RTCx 指定要被设置的RTC，可取值包括RTC +* 输 出: 无 +* 注意事项: 无 ******************************************************************************************************************************************/ void RTC_IntDateClr(RTC_TypeDef * RTCx) { @@ -353,11 +353,11 @@ void RTC_IntDateClr(RTC_TypeDef * RTCx) } /****************************************************************************************************************************************** -* : RTC_IntDateStat() -* ˵: ж״̬ -* : RTC_TypeDef * RTCx ָҪõRTCȡֵRTC -* : uint32_t 1 жϷ 0 жδ -* ע: +* 函数名称: RTC_IntDateStat() +* 功能说明: 日中断状态 +* 输 入: RTC_TypeDef * RTCx 指定要被设置的RTC，可取值包括RTC +* 输 出: uint32_t 1 日中断发生 0 日中断未发生 +* 注意事项: 无 ******************************************************************************************************************************************/ uint32_t RTC_IntDateStat(RTC_TypeDef * RTCx) { @@ -365,11 +365,11 @@ uint32_t RTC_IntDateStat(RTC_TypeDef * RTCx) } /****************************************************************************************************************************************** -* : RTC_IntAlarmEn() -* ˵: жʹ -* : RTC_TypeDef * RTCx ָҪõRTCȡֵRTC -* : -* ע: +* 函数名称: RTC_IntAlarmEn() +* 功能说明: 闹钟中断使能 +* 输 入: RTC_TypeDef * RTCx 指定要被设置的RTC，可取值包括RTC +* 输 出: 无 +* 注意事项: 无 ******************************************************************************************************************************************/ void RTC_IntAlarmEn(RTC_TypeDef * RTCx) { @@ -377,11 +377,11 @@ void RTC_IntAlarmEn(RTC_TypeDef * RTCx) } /****************************************************************************************************************************************** -* : RTC_IntAlarmDis() -* ˵: жϽֹ -* : RTC_TypeDef * RTCx ָҪõRTCȡֵRTC -* : -* ע: +* 函数名称: RTC_IntAlarmDis() +* 功能说明: 闹钟中断禁止 +* 输 入: RTC_TypeDef * RTCx 指定要被设置的RTC，可取值包括RTC +* 输 出: 无 +* 注意事项: 无 ******************************************************************************************************************************************/ void RTC_IntAlarmDis(RTC_TypeDef * RTCx) { @@ -389,11 +389,11 @@ void RTC_IntAlarmDis(RTC_TypeDef * RTCx) } /****************************************************************************************************************************************** -* : RTC_IntAlarmClr() -* ˵: жϱ־ -* : RTC_TypeDef * RTCx ָҪõRTCȡֵRTC -* : -* ע: +* 函数名称: RTC_IntAlarmClr() +* 功能说明: 闹钟中断标志清除 +* 输 入: RTC_TypeDef * RTCx 指定要被设置的RTC，可取值包括RTC +* 输 出: 无 +* 注意事项: 无 ******************************************************************************************************************************************/ void RTC_IntAlarmClr(RTC_TypeDef * RTCx) { @@ -401,11 +401,11 @@ void RTC_IntAlarmClr(RTC_TypeDef * RTCx) } /****************************************************************************************************************************************** -* : RTC_IntAlarmStat() -* ˵: ж״̬ -* : RTC_TypeDef * RTCx ָҪõRTCȡֵRTC -* : uint32_t 1 жϷ 0 жδ -* ע: +* 函数名称: RTC_IntAlarmStat() +* 功能说明: 闹钟中断状态 +* 输 入: RTC_TypeDef * RTCx 指定要被设置的RTC，可取值包括RTC +* 输 出: uint32_t 1 闹钟中断发生 0 闹钟中断未发生 +* 注意事项: 无 ******************************************************************************************************************************************/ uint32_t RTC_IntAlarmStat(RTC_TypeDef * RTCx) { diff --git a/bsp/swm320/libraries/SWM320_StdPeriph_Driver/SWM320_rtc.h b/bsp/swm320/libraries/SWM320_StdPeriph_Driver/SWM320_rtc.h index 513f885cf6f76383e631bad692ffdede8e20360f..13cd0e6785861f1d872dc079c3a6eb5dcda54f6b 100644 --- a/bsp/swm320/libraries/SWM320_StdPeriph_Driver/SWM320_rtc.h +++ b/bsp/swm320/libraries/SWM320_StdPeriph_Driver/SWM320_rtc.h @@ -13,17 +13,17 @@ typedef struct { uint16_t Year; - uint8_t Month; //ȡֵ1--12 - uint8_t Date; //ȡֵ1--31 - uint8_t Hour; //ȡֵ0--23 - uint8_t Minute; //ȡֵ0--59 - uint8_t Second; //ȡֵ0--59 + uint8_t Month; //取值1--12 + uint8_t Date; //取值1--31 + uint8_t Hour; //取值0--23 + uint8_t Minute; //取值0--59 + uint8_t Second; //取值0--59 uint8_t SecondIEn; uint8_t MinuteIEn; } RTC_InitStructure; typedef struct { - uint8_t Days; //RTC_SUNRTC_MONRTC_TUERTC_WEDRTC_THURTC_FRIRTC_SAT + uint8_t Days; //RTC_SUN、RTC_MON、RTC_TUE、RTC_WED、RTC_THU、RTC_FRI、RTC_SAT及其或运算组合 uint8_t Hour; uint8_t Minute; uint8_t Second; @@ -34,7 +34,7 @@ typedef struct { uint16_t Year; uint8_t Month; uint8_t Date; - uint8_t Day; //RTC_SUNRTC_MONRTC_TUERTC_WEDRTC_THURTC_FRIRTC_SAT + uint8_t Day; //RTC_SUN、RTC_MON、RTC_TUE、RTC_WED、RTC_THU、RTC_FRI、RTC_SAT uint8_t Hour; uint8_t Minute; uint8_t Second; diff --git a/bsp/swm320/libraries/SWM320_StdPeriph_Driver/SWM320_sdio.c b/bsp/swm320/libraries/SWM320_StdPeriph_Driver/SWM320_sdio.c index 2cb8b9e3e8952f7e39b093ffa07f65e9dc12242d..9175cce3872ffb7f11ab408e8affe944eb218727 100644 --- a/bsp/swm320/libraries/SWM320_StdPeriph_Driver/SWM320_sdio.c +++ b/bsp/swm320/libraries/SWM320_StdPeriph_Driver/SWM320_sdio.c @@ -1,10 +1,10 @@ /****************************************************************************************************************************************** -* ļ: SWM320_sdio.c -* ˵: SWM320ƬSDIOӿ -* ֧: http://www.synwit.com.cn/e/tool/gbook/?bid=1 -* ע: Ϊͨԡԡԣֻ֧512ֽΪλĶд -* 汾: V1.1.0 20171025 -* ¼: +* 文件名称: SWM320_sdio.c +* 功能说明: SWM320单片机的SDIO接口驱动库 +* 技术支持: http://www.synwit.com.cn/e/tool/gbook/?bid=1 +* 注意事项: 为了通用性、兼容性、易用性，只支持以512字节为单位的读写 +* 版本日期: V1.1.0 2017年10月25日 +* 升级记录: * * ******************************************************************************************************************************************* @@ -25,11 +25,11 @@ SD_CardInfo SD_cardInfo; /****************************************************************************************************************************************** -* : SDIO_Init() -* ˵: SDIOдSDʼʼɸ4ģʽд512ֽڴС -* : uint32_t freq SDIO_CLKʱƵ -* : uint32_t SD_RES_OK ɹ SD_RES_ERR ʧ SD_RES_TIMEOUT ʱ -* ע: +* 函数名称: SDIO_Init() +* 功能说明: SDIO读写SD卡初始化，初始化成高速4线模式、读写以512字节大小进行 +* 输 入: uint32_t freq SDIO_CLK时钟频率 +* 输 出: uint32_t SD_RES_OK 操作成功 SD_RES_ERR 操作失败 SD_RES_TIMEOUT 操作超时 +* 注意事项: 无 ******************************************************************************************************************************************/ uint32_t SDIO_Init(uint32_t freq) { @@ -37,7 +37,7 @@ uint32_t SDIO_Init(uint32_t freq) uint32_t resp, resps[4]; SYS->CLKDIV &= ~SYS_CLKDIV_SDIO_Msk; - if(SystemCoreClock > 80000000) //SDIOʱҪС52MHz + if(SystemCoreClock > 80000000) //SDIO时钟需要小于52MHz SYS->CLKDIV |= (2 << SYS_CLKDIV_SDIO_Pos); //SDCLK = SYSCLK / 4 else SYS->CLKDIV |= (1 << SYS_CLKDIV_SDIO_Pos); //SDCLK = SYSCLK / 2 @@ -64,7 +64,7 @@ uint32_t SDIO_Init(uint32_t freq) SDIO_SendCmd(SD_CMD_GO_IDLE_STATE, 0x00, SD_RESP_NO, 0); //CMD0: GO_IDLE_STATE - res = SDIO_SendCmd(SD_CMD_SEND_IF_COND, 0x1AA, SD_RESP_32b, &resp); //CMD8: SEND_IF_COND, ⹤ѹǷ֧SD 2.0 + res = SDIO_SendCmd(SD_CMD_SEND_IF_COND, 0x1AA, SD_RESP_32b, &resp); //CMD8: SEND_IF_COND, 检测工作电压、检测是否支持SD 2.0 if(res != SD_RES_OK) return res; @@ -77,50 +77,50 @@ uint32_t SDIO_Init(uint32_t freq) if(res != SD_RES_OK) return res; - if(resp != 0x120) return SD_RES_ERR; //SDMMC + if(resp != 0x120) return SD_RES_ERR; //不是SD卡，可能是MMC卡 if(SD_cardInfo.CardType == SDIO_STD_CAPACITY_SD_CARD_V2_0) SDIO_SendCmd(SD_CMD_SD_APP_OP_COND, 0x80100000|0x40000000, SD_RESP_32b, &resp); else SDIO_SendCmd(SD_CMD_SD_APP_OP_COND, 0x80100000|0x00000000, SD_RESP_32b, &resp); - } while(((resp >> 31) & 0x01) == 0); //ϵûʱresp[31] == 0 + } while(((resp >> 31) & 0x01) == 0); //上电没完成时resp[31] == 0 if(((resp >> 30) & 0x01) == 1) SD_cardInfo.CardType = SDIO_HIGH_CAPACITY_SD_CARD; - SDIO_SendCmd(SD_CMD_ALL_SEND_CID, 0x00, SD_RESP_128b, resps); //CMD2: SD_CMD_ALL_SEND_CIDȡCID + SDIO_SendCmd(SD_CMD_ALL_SEND_CID, 0x00, SD_RESP_128b, resps); //CMD2: SD_CMD_ALL_SEND_CID，获取CID parseCID(resps); - SDIO_SendCmd(SD_CMD_SET_REL_ADDR, 0x00, SD_RESP_32b, &resp); //CMD3: SD_CMD_SET_REL_ADDRRCA + SDIO_SendCmd(SD_CMD_SET_REL_ADDR, 0x00, SD_RESP_32b, &resp); //CMD3: SD_CMD_SET_REL_ADDR，设置RCA SD_cardInfo.RCA = resp >> 16; - SDIO_SendCmd(SD_CMD_SEND_CSD, SD_cardInfo.RCA << 16, SD_RESP_128b, resps); //CMD9: SD_CMD_SEND_CSDȡCSD + SDIO_SendCmd(SD_CMD_SEND_CSD, SD_cardInfo.RCA << 16, SD_RESP_128b, resps); //CMD9: SD_CMD_SEND_CSD，获取CSD parseCSD(resps); - if(SD_cardInfo.CardBlockSize < 0x200) return SD_RES_ERR; //ֻ֧512ֽΪλĶддλ벻С512 + if(SD_cardInfo.CardBlockSize < 0x200) return SD_RES_ERR; //本驱动只支持以512字节为单位的读写，所以最大读写单位必须不小于512 SDIO->CR2 &= ~(SDIO_CR2_SDCLKEN_Msk | SDIO_CR2_SDCLKDIV_Msk); SDIO->CR2 |= (1 << SDIO_CR2_SDCLKEN_Pos) | - (calcSDCLKDiv(freq) << SDIO_CR2_SDCLKDIV_Pos); //ʼɣSDCLKл + (calcSDCLKDiv(freq) << SDIO_CR2_SDCLKDIV_Pos); //初始化完成，SDCLK切换到高速 - SDIO_SendCmd(SD_CMD_SEL_DESEL_CARD, SD_cardInfo.RCA << 16, SD_RESP_32b_busy, &resp); //CMD7: ѡпStandyģʽTransferģʽ + SDIO_SendCmd(SD_CMD_SEL_DESEL_CARD, SD_cardInfo.RCA << 16, SD_RESP_32b_busy, &resp); //CMD7: 选中卡，从Standy模式进入Transfer模式 SDIO->IF = SDIO_IF_TRXDONE_Msk; SDIO_SendCmd(SD_CMD_APP_CMD, SD_cardInfo.RCA << 16, SD_RESP_32b, &resp); - SDIO_SendCmd(SD_CMD_APP_SD_SET_BUSWIDTH, SD_BUSWIDTH_4b, SD_RESP_32b, &resp); //л4λģʽ + SDIO_SendCmd(SD_CMD_APP_SD_SET_BUSWIDTH, SD_BUSWIDTH_4b, SD_RESP_32b, &resp); //切换成4位总线模式 SDIO->CR1 |= (1 << SDIO_CR1_4BIT_Pos); - SDIO_SendCmd(SD_CMD_SET_BLOCKLEN, 512, SD_RESP_32b, &resp); //̶Сλ512ֽ + SDIO_SendCmd(SD_CMD_SET_BLOCKLEN, 512, SD_RESP_32b, &resp); //固定块大小位512字节 SDIO->BLK = 512; @@ -128,12 +128,12 @@ uint32_t SDIO_Init(uint32_t freq) } /****************************************************************************************************************************************** -* : SDIO_BlockWrite() -* ˵: SDд -* : uint32_t block_addr SDַÿ512ֽ -* uint32_t buff[] Ҫд -* : uint32_t SD_RES_OK ɹ SD_RES_ERR ʧ SD_RES_TIMEOUT ʱ -* ע: +* 函数名称: SDIO_BlockWrite() +* 功能说明: 向SD卡写入数据 +* 输 入: uint32_t block_addr SD卡块地址，每块512字节 +* uint32_t buff[] 要写入的数据 +* 输 出: uint32_t SD_RES_OK 操作成功 SD_RES_ERR 操作失败 SD_RES_TIMEOUT 操作超时 +* 注意事项: 无 ******************************************************************************************************************************************/ uint32_t SDIO_BlockWrite(uint32_t block_addr, uint32_t buff[]) { @@ -159,13 +159,13 @@ uint32_t SDIO_BlockWrite(uint32_t block_addr, uint32_t buff[]) } /****************************************************************************************************************************************** -* : SDIO_MultiBlockWrite() -* ˵: SDд -* : uint32_t block_addr SDַÿ512ֽ -* uint16_t block_cnt ҪдĿ -* uint32_t buff[] Ҫд -* : uint32_t SD_RES_OK ɹ SD_RES_ERR ʧ SD_RES_TIMEOUT ʱ -* ע: +* 函数名称: SDIO_MultiBlockWrite() +* 功能说明: 向SD卡写入多块数据 +* 输 入: uint32_t block_addr SD卡块地址，每块512字节 +* uint16_t block_cnt 要写入的块数 +* uint32_t buff[] 要写入的数据 +* 输 出: uint32_t SD_RES_OK 操作成功 SD_RES_ERR 操作失败 SD_RES_TIMEOUT 操作超时 +* 注意事项: 无 ******************************************************************************************************************************************/ uint32_t SDIO_MultiBlockWrite(uint32_t block_addr, uint16_t block_cnt, uint32_t buff[]) { @@ -194,13 +194,13 @@ uint32_t SDIO_MultiBlockWrite(uint32_t block_addr, uint16_t block_cnt, uint32_t } /****************************************************************************************************************************************** -* : SDIO_DMABlockWrite() -* ˵: ͨDMASDд -* : uint32_t block_addr SDַÿ512ֽ -* uint16_t block_cnt ҪдĿ -* uint32_t buff[] Ҫд -* : uint32_t SD_RES_OK ɹ SD_RES_ERR ʧ SD_RES_TIMEOUT ʱ -* ע: +* 函数名称: SDIO_DMABlockWrite() +* 功能说明: 通过DMA向SD卡写入多块数据 +* 输 入: uint32_t block_addr SD卡块地址，每块512字节 +* uint16_t block_cnt 要写入的块数 +* uint32_t buff[] 要写入的数据 +* 输 出: uint32_t SD_RES_OK 操作成功 SD_RES_ERR 操作失败 SD_RES_TIMEOUT 操作超时 +* 注意事项: 无 ******************************************************************************************************************************************/ uint32_t SDIO_DMABlockWrite(uint32_t block_addr, uint16_t block_cnt, uint32_t buff[]) { @@ -223,12 +223,12 @@ uint32_t SDIO_DMABlockWrite(uint32_t block_addr, uint16_t block_cnt, uint32_t bu } /****************************************************************************************************************************************** -* : SDIO_BlockRead() -* ˵: SD -* : uint32_t block_addr SDַÿ512ֽ -* uint32_t buff[] -* : uint32_t SD_RES_OK ɹ SD_RES_ERR ʧ SD_RES_TIMEOUT ʱ -* ע: +* 函数名称: SDIO_BlockRead() +* 功能说明: 从SD卡读出数据 +* 输 入: uint32_t block_addr SD卡块地址，每块512字节 +* uint32_t buff[] 读出的数据 +* 输 出: uint32_t SD_RES_OK 操作成功 SD_RES_ERR 操作失败 SD_RES_TIMEOUT 操作超时 +* 注意事项: 无 ******************************************************************************************************************************************/ uint32_t SDIO_BlockRead(uint32_t block_addr, uint32_t buff[]) { @@ -254,13 +254,13 @@ uint32_t SDIO_BlockRead(uint32_t block_addr, uint32_t buff[]) } /****************************************************************************************************************************************** -* : SDIO_MultiBlockRead() -* ˵: SD -* : uint32_t block_addr SDַÿ512ֽ -* uint16_t block_cnt ҪĿ -* uint32_t buff[] -* : uint32_t SD_RES_OK ɹ SD_RES_ERR ʧ SD_RES_TIMEOUT ʱ -* ע: +* 函数名称: SDIO_MultiBlockRead() +* 功能说明: 从SD卡读出多块数据 +* 输 入: uint32_t block_addr SD卡块地址，每块512字节 +* uint16_t block_cnt 要读出的块数 +* uint32_t buff[] 读出的数据 +* 输 出: uint32_t SD_RES_OK 操作成功 SD_RES_ERR 操作失败 SD_RES_TIMEOUT 操作超时 +* 注意事项: 无 ******************************************************************************************************************************************/ uint32_t SDIO_MultiBlockRead(uint32_t block_addr, uint16_t block_cnt, uint32_t buff[]) { @@ -289,13 +289,13 @@ uint32_t SDIO_MultiBlockRead(uint32_t block_addr, uint16_t block_cnt, uint32_t b } /****************************************************************************************************************************************** -* : SDIO_DMABlockRead() -* ˵: ͨDMASD -* : uint32_t block_addr SDַÿ512ֽ -* uint16_t block_cnt ҪĿ -* uint32_t buff[] -* : uint32_t SD_RES_OK ɹ SD_RES_ERR ʧ SD_RES_TIMEOUT ʱ -* ע: +* 函数名称: SDIO_DMABlockRead() +* 功能说明: 通过DMA从SD卡读出多块数据 +* 输 入: uint32_t block_addr SD卡块地址，每块512字节 +* uint16_t block_cnt 要读出的块数 +* uint32_t buff[] 读出的数据 +* 输 出: uint32_t SD_RES_OK 操作成功 SD_RES_ERR 操作失败 SD_RES_TIMEOUT 操作超时 +* 注意事项: 无 ******************************************************************************************************************************************/ uint32_t SDIO_DMABlockRead(uint32_t block_addr, uint16_t block_cnt, uint32_t buff[]) { @@ -318,20 +318,20 @@ uint32_t SDIO_DMABlockRead(uint32_t block_addr, uint16_t block_cnt, uint32_t buf } /****************************************************************************************************************************************** -* : _SDIO_SendCmd() -* ˵: SDIOSD -* : uint32_t cmd -* uint32_t arg -* uint32_t _resp_type ӦͣȡֵSD_RESP_NOSD_RESP_32bSD_RESP_128bSD_RESP_32b_busy -* uint32_t *resp_data Ӧ -* uint32_t have_data Ƿݴ -* uint32_t data_read 1 SD 0 дSD -* uint16_t block_cnt д -* uint32_t use_dma 1 ʹDMA -* : uint32_t SD_RES_OK ɹ SD_RES_ERR ʧ SD_RES_TIMEOUT ʱ -* ע: +* 函数名称: _SDIO_SendCmd() +* 功能说明: SDIO向SD卡发送命令 +* 输 入: uint32_t cmd 命令索引 +* uint32_t arg 命令参数 +* uint32_t resp_type 响应类型，取值SD_RESP_NO、SD_RESP_32b、SD_RESP_128b、SD_RESP_32b_busy +* uint32_t *resp_data 响应内容 +* uint32_t have_data 是否有数据传输 +* uint32_t data_read 1 读SD卡 0 写SD卡 +* uint16_t block_cnt 读写块个数 +* uint32_t use_dma 1 使用DMA搬运数据 +* 输 出: uint32_t SD_RES_OK 操作成功 SD_RES_ERR 操作失败 SD_RES_TIMEOUT 操作超时 +* 注意事项: 无 ******************************************************************************************************************************************/ -uint32_t _SDIO_SendCmd(uint32_t cmd, uint32_t arg, uint32_t _resp_type, uint32_t *resp_data, uint32_t have_data, uint32_t data_read, uint16_t block_cnt, uint32_t use_dma) +uint32_t _SDIO_SendCmd(uint32_t cmd, uint32_t arg, uint32_t resp_type, uint32_t *resp_data, uint32_t have_data, uint32_t data_read, uint16_t block_cnt, uint32_t use_dma) { SDIO->BLK &= ~SDIO_BLK_COUNT_Msk; SDIO->BLK |= (block_cnt << SDIO_BLK_COUNT_Pos); @@ -341,7 +341,7 @@ uint32_t _SDIO_SendCmd(uint32_t cmd, uint32_t arg, uint32_t _resp_type, uint32_t (0 << SDIO_CMD_CMDTYPE_Pos) | (0 << SDIO_CMD_IDXCHECK_Pos) | (0 << SDIO_CMD_CRCCHECK_Pos) | - (_resp_type << SDIO_CMD_RESPTYPE_Pos) | + (resp_type << SDIO_CMD_RESPTYPE_Pos) | (have_data << SDIO_CMD_HAVEDATA_Pos) | (data_read << SDIO_CMD_DIRREAD_Pos) | ((block_cnt > 1) << SDIO_CMD_MULTBLK_Pos) | @@ -366,14 +366,14 @@ uint32_t _SDIO_SendCmd(uint32_t cmd, uint32_t arg, uint32_t _resp_type, uint32_t } SDIO->IF = SDIO_IF_CMDDONE_Msk; - if(_resp_type == SD_RESP_32b) + if(resp_type == SD_RESP_32b) { resp_data[0] = SDIO->RESP[0]; } - else if(_resp_type == SD_RESP_128b) + else if(resp_type == SD_RESP_128b) { - //ĴнCID/CSD[127-8]δRESP3-0[119-0]λCRC - //ʱ˳򣬽CID/CSD[127-8]resp_data0-3[127-8]8λ0x00 + //寄存器中将CID/CSD[127-8]依次存放在了RESP3-0[119-0]，最低位的CRC被丢掉 + //读出数据时调整了顺序，将CID/CSD[127-8]存放在resp_data0-3[127-8]，最低8位填充0x00 resp_data[0] = (SDIO->RESP[3] << 8) + ((SDIO->RESP[2] >> 24) & 0xFF); resp_data[1] = (SDIO->RESP[2] << 8) + ((SDIO->RESP[1] >> 24) & 0xFF); resp_data[2] = (SDIO->RESP[1] << 8) + ((SDIO->RESP[0] >> 24) & 0xFF); @@ -538,7 +538,7 @@ void parseCSD(uint32_t CSD_Tab[4]) /*!< Byte 10 */ tmp = (uint8_t)((CSD_Tab[2] & 0x0000FF00) >> 8); - SD_cardInfo.CardCapacity = (SD_cardInfo.SD_csd.DeviceSize + 1) * 512 * 1024; + SD_cardInfo.CardCapacity = (uint64_t)(SD_cardInfo.SD_csd.DeviceSize + 1) * 512 * 1024; SD_cardInfo.CardBlockSize = 512; } diff --git a/bsp/swm320/libraries/SWM320_StdPeriph_Driver/SWM320_sdio.h b/bsp/swm320/libraries/SWM320_StdPeriph_Driver/SWM320_sdio.h index ece2711ce45e60383b5570b76f838a87ce4e39c7..52552eed99409fe362427d5ca0506878f46aedbf 100644 --- a/bsp/swm320/libraries/SWM320_StdPeriph_Driver/SWM320_sdio.h +++ b/bsp/swm320/libraries/SWM320_StdPeriph_Driver/SWM320_sdio.h @@ -35,10 +35,10 @@ #define SD_CMD_SDIO_RW_EXTENDED ((uint8_t)53) -#define SD_RESP_NO 0 //0 Ӧ -#define SD_RESP_32b 2 //2 32λӦ -#define SD_RESP_128b 1 //1 128λӦ -#define SD_RESP_32b_busy 3 //3 32λӦcheck Busy after response +#define SD_RESP_NO 0 //0 无响应 +#define SD_RESP_32b 2 //2 32位响应 +#define SD_RESP_128b 1 //1 128位响应 +#define SD_RESP_32b_busy 3 //3 32位响应，check Busy after response #define SD_BUSWIDTH_1b 0 #define SD_BUSWIDTH_4b 2 @@ -133,11 +133,11 @@ uint32_t SDIO_MultiBlockRead(uint32_t block_addr, uint16_t block_cnt, uint32_t b uint32_t SDIO_DMABlockWrite(uint32_t block_addr, uint16_t block_cnt, uint32_t buff[]); uint32_t SDIO_DMABlockRead(uint32_t block_addr, uint16_t block_cnt, uint32_t buff[]); -uint32_t _SDIO_SendCmd(uint32_t cmd, uint32_t arg, uint32_t _resp_type, uint32_t *resp_data, uint32_t have_data, uint32_t data_read, uint16_t block_cnt, uint32_t use_dma); +uint32_t _SDIO_SendCmd(uint32_t cmd, uint32_t arg, uint32_t resp_type, uint32_t *resp_data, uint32_t have_data, uint32_t data_read, uint16_t block_cnt, uint32_t use_dma); -#define SDIO_SendCmd(cmd, arg, _resp_type, resp_data) _SDIO_SendCmd(cmd, arg, _resp_type, resp_data, 0, 0, 0, 0) -#define SDIO_SendCmdWithData(cmd, arg, _resp_type, resp_data, data_read, block_cnt) _SDIO_SendCmd(cmd, arg, _resp_type, resp_data, 1, data_read, block_cnt, 0) -#define SDIO_SendCmdWithDataByDMA(cmd, arg, _resp_type, resp_data, data_read, block_cnt) _SDIO_SendCmd(cmd, arg, _resp_type, resp_data, 1, data_read, block_cnt, 1) +#define SDIO_SendCmd(cmd, arg, resp_type, resp_data) _SDIO_SendCmd(cmd, arg, resp_type, resp_data, 0, 0, 0, 0) +#define SDIO_SendCmdWithData(cmd, arg, resp_type, resp_data, data_read, block_cnt) _SDIO_SendCmd(cmd, arg, resp_type, resp_data, 1, data_read, block_cnt, 0) +#define SDIO_SendCmdWithDataByDMA(cmd, arg, resp_type, resp_data, data_read, block_cnt) _SDIO_SendCmd(cmd, arg, resp_type, resp_data, 1, data_read, block_cnt, 1) void parseCID(uint32_t CID_Tab[4]); void parseCSD(uint32_t CID_Tab[4]); diff --git a/bsp/swm320/libraries/SWM320_StdPeriph_Driver/SWM320_sdram.c b/bsp/swm320/libraries/SWM320_StdPeriph_Driver/SWM320_sdram.c index 246f572eebf30e14ee5e53169415126a6ce07433..e1075564cb1bd9c8824863f73cdd038dc78698ca 100644 --- a/bsp/swm320/libraries/SWM320_StdPeriph_Driver/SWM320_sdram.c +++ b/bsp/swm320/libraries/SWM320_StdPeriph_Driver/SWM320_sdram.c @@ -1,10 +1,10 @@ /****************************************************************************************************************************************** -* ļ: SWM320_sdram.c -* ˵: SWM320ƬSDRAM -* ֧: http://www.synwit.com.cn/e/tool/gbook/?bid=1 -* ע: -* 汾: V1.1.0 20171025 -* ¼: +* 文件名称: SWM320_sdram.c +* 功能说明: SWM320单片机的SDRAM驱动程序 +* 技术支持: http://www.synwit.com.cn/e/tool/gbook/?bid=1 +* 注意事项: +* 版本日期: V1.1.0 2017年10月25日 +* 升级记录: * * ******************************************************************************************************************************************* @@ -22,11 +22,11 @@ #include "SWM320_sdram.h" /****************************************************************************************************************************************** -* : SDRAM_Init() -* ˵: SDRAMʼ -* : SDRAM_InitStructure * initStruct SDRAM 趨ֵĽṹ -* : -* ע: +* 函数名称: SDRAM_Init() +* 功能说明: SDRAM控制器初始化 +* 输 入: SDRAM_InitStructure * initStruct 包含 SDRAM 控制器相关设定值的结构体 +* 输 出: 无 +* 注意事项: 无 ******************************************************************************************************************************************/ void SDRAM_Init(SDRAM_InitStructure * initStruct) { @@ -35,9 +35,9 @@ void SDRAM_Init(SDRAM_InitStructure * initStruct) SYS->CLKEN |= (1 << SYS_CLKEN_SDRAM_Pos); SYS->CLKDIV &= ~SYS_CLKDIV_SDRAM_Msk; - SYS->CLKDIV |= (1 << SYS_CLKDIV_SDRAM_Pos); //2Ƶ + SYS->CLKDIV |= (1 << SYS_CLKDIV_SDRAM_Pos); //2分频 - SDRAMC->CR0 = (2 << SDRAMC_CR0_BURSTLEN_Pos) | //2 Burst LengthΪ4 + SDRAMC->CR0 = (2 << SDRAMC_CR0_BURSTLEN_Pos) | //2 Burst Length为4 (initStruct->CASLatency << SDRAMC_CR0_CASDELAY_Pos); SDRAMC->CR1 = (initStruct->CellSize << SDRAMC_CR1_CELLSIZE_Pos) | @@ -69,11 +69,11 @@ void SDRAM_Init(SDRAM_InitStructure * initStruct) } /****************************************************************************************************************************************** -* : SDRAM_Enable() -* ˵: SDRAMʹܣʹܺɶдSDRAM -* : -* : -* ע: +* 函数名称: SDRAM_Enable() +* 功能说明: SDRAM使能，使能后可读写SDRAM +* 输 入: 无 +* 输 出: 无 +* 注意事项: 无 ******************************************************************************************************************************************/ void SDRAM_Enable(void) { @@ -86,11 +86,11 @@ void SDRAM_Enable(void) } /****************************************************************************************************************************************** -* : SDRAM_Disable() -* ˵: SDRAMܣܺSDRAM͹ģʽˢ£ɶд -* : -* : -* ע: +* 函数名称: SDRAM_Disable() +* 功能说明: SDRAM禁能，禁能后SDRAM颗粒进入低功耗模式、并自刷新，不可读写 +* 输 入: 无 +* 输 出: 无 +* 注意事项: 无 ******************************************************************************************************************************************/ void SDRAM_Disable(void) { diff --git a/bsp/swm320/libraries/SWM320_StdPeriph_Driver/SWM320_sdram.h b/bsp/swm320/libraries/SWM320_StdPeriph_Driver/SWM320_sdram.h index 5659b3e330106f7c0e068d3de337c5b806e7ddee..d6f67612268aceef7aafb118d056de3219fd70ec 100644 --- a/bsp/swm320/libraries/SWM320_StdPeriph_Driver/SWM320_sdram.h +++ b/bsp/swm320/libraries/SWM320_StdPeriph_Driver/SWM320_sdram.h @@ -2,17 +2,17 @@ #define __SWM320_SDRAM_H__ typedef struct { - uint8_t CellSize; // SDRAMSDRAM_CELLSIZE_16MbSDRAM_CELLSIZE_64MbSDRAM_CELLSIZE_128MbSDRAM_CELLSIZE_256Mb - uint8_t CellBank; // SDRAMмbankSDRAM_CELLBANK_2SDRAM_CELLBANK_4 - uint8_t CellWidth; // SDRAMλSDRAM_CELLWIDTH_16SDRAM_CELLWIDTH_32 - uint8_t CASLatency; // еַЧSDRAM_CASLATENCY_2SDRAM_CASLATENCY_3 + uint8_t CellSize; // SDRAM颗粒的容量，SDRAM_CELLSIZE_16Mb、SDRAM_CELLSIZE_64Mb、SDRAM_CELLSIZE_128Mb、SDRAM_CELLSIZE_256Mb + uint8_t CellBank; // SDRAM颗粒有几个bank，SDRAM_CELLBANK_2、SDRAM_CELLBANK_4 + uint8_t CellWidth; // SDRAM颗粒的位宽，SDRAM_CELLWIDTH_16、SDRAM_CELLWIDTH_32 + uint8_t CASLatency; // 列地址到有效数据输出间隔，SDRAM_CASLATENCY_2、SDRAM_CASLATENCY_3 uint8_t TimeTMRD; // MRS to New Command uint8_t TimeTRRD; // Activate to activate on different banks - uint8_t TimeTRAS; // Self refresh timeСSelf-refresh - uint8_t TimeTRC; // Row cycle delayRefreshActivateʱҲRefreshʱ - uint8_t TimeTRCD; // Row to column delayеַеַʱҲActivateдʱ - uint8_t TimeTRP; // Row precharge delayPrechargeһʱ + uint8_t TimeTRAS; // Self refresh time，最小Self-refresh周期 + uint8_t TimeTRC; // Row cycle delay，Refresh命令到Activate命令间延时，也是两个连续Refresh命令间延时 + uint8_t TimeTRCD; // Row to column delay，行地址到列地址间延时，也即Activate命令到读写命令间延时 + uint8_t TimeTRP; // Row precharge delay，Precharge命令到另一个命令间延时 } SDRAM_InitStructure; #define SDRAM_CELLSIZE_16Mb 3 diff --git a/bsp/swm320/libraries/SWM320_StdPeriph_Driver/SWM320_spi.c b/bsp/swm320/libraries/SWM320_StdPeriph_Driver/SWM320_spi.c index fb38187a3f18b7f218e8a5388c699b76b4b22353..dcd618ec92ffa1a8290ab8e8ccbad6aa774bf1c5 100644 --- a/bsp/swm320/libraries/SWM320_StdPeriph_Driver/SWM320_spi.c +++ b/bsp/swm320/libraries/SWM320_StdPeriph_Driver/SWM320_spi.c @@ -1,10 +1,10 @@ /****************************************************************************************************************************************** -* ļ: SWM320_spi.c -* ˵: SWM320ƬSPI -* ֧: http://www.synwit.com.cn/e/tool/gbook/?bid=1 -* ע: -* 汾: V1.1.0 20171025 -* ¼: +* 文件名称: SWM320_spi.c +* 功能说明: SWM320单片机的SPI功能驱动库 +* 技术支持: http://www.synwit.com.cn/e/tool/gbook/?bid=1 +* 注意事项: +* 版本日期: V1.1.0 2017年10月25日 +* 升级记录: * * ******************************************************************************************************************************************* @@ -23,12 +23,12 @@ /****************************************************************************************************************************************** -* : SPI_Init() -* ˵: SPIͬнӿڳʼ֡趨ʱ趨ٶ趨ж趨FIFO趨 -* : SPI_TypeDef * SPIx ָҪõSPIЧֵSPI0SPI1 -* SPI_InitStructure * initStruct SPI趨ֵĽṹ -* : -* ע: +* 函数名称: SPI_Init() +* 功能说明: SPI同步串行接口初始化，包括帧长度设定、时序设定、速度设定、中断设定、FIFO触发设定 +* 输 入: SPI_TypeDef * SPIx 指定要被设置的SPI，有效值包括SPI0、SPI1 +* SPI_InitStructure * initStruct 包含SPI相关设定值的结构体 +* 输 出: 无 +* 注意事项: 无 ******************************************************************************************************************************************/ void SPI_Init(SPI_TypeDef * SPIx, SPI_InitStructure * initStruct) { @@ -39,11 +39,11 @@ void SPI_Init(SPI_TypeDef * SPIx, SPI_InitStructure * initStruct) break; case ((uint32_t)SPI1): - SYS->CLKEN |= (0x01 << SYS_CLKEN_SPI0_Pos); //SPI0ʹͬһλʱʹ + SYS->CLKEN |= (0x01 << SYS_CLKEN_SPI0_Pos); //与SPI0使用同一位时钟使能 break; } - SPI_Close(SPIx); //һЩؼĴֻSPIرʱ + SPI_Close(SPIx); //一些关键寄存器只能在SPI关闭时设置 SPIx->CTRL &= ~(SPI_CTRL_FFS_Msk | SPI_CTRL_CPHA_Msk | SPI_CTRL_CPOL_Msk | SPI_CTRL_SIZE_Msk | SPI_CTRL_MSTR_Msk | SPI_CTRL_CLKDIV_Msk | SPI_CTRL_SSN_H_Msk); @@ -55,7 +55,7 @@ void SPI_Init(SPI_TypeDef * SPIx, SPI_InitStructure * initStruct) (initStruct->clkDiv << SPI_CTRL_CLKDIV_Pos) | (0 << SPI_CTRL_SSN_H_Pos); - SPIx->IF = (0x01 << SPI_IF_RFOVF_Pos); //жϱ־ + SPIx->IF = (0x01 << SPI_IF_RFOVF_Pos); //清除中断标志 SPIx->IE &= ~(SPI_IE_RFHF_Msk | SPI_IE_TFHF_Msk | SPI_IE_FTC_Msk); SPIx->IE |= (initStruct->RXHFullIEn << SPI_IE_RFHF_Pos) | (initStruct->TXEmptyIEn << SPI_IE_TFHF_Pos) | @@ -88,11 +88,11 @@ void SPI_Init(SPI_TypeDef * SPIx, SPI_InitStructure * initStruct) } /****************************************************************************************************************************************** -* : SPI_Open() -* ˵: SPI򿪣շ -* : SPI_TypeDef * SPIx ָҪõSPIЧֵSPI0SPI1 -* : -* ע: +* 函数名称: SPI_Open() +* 功能说明: SPI打开，允许收发 +* 输 入: SPI_TypeDef * SPIx 指定要被设置的SPI，有效值包括SPI0、SPI1 +* 输 出: 无 +* 注意事项: 无 ******************************************************************************************************************************************/ void SPI_Open(SPI_TypeDef * SPIx) { @@ -100,11 +100,11 @@ void SPI_Open(SPI_TypeDef * SPIx) } /****************************************************************************************************************************************** -* : SPI_Close() -* ˵: SPIرգֹշ -* : SPI_TypeDef * SPIx ָҪõSPIЧֵSPI0SPI1 -* : -* ע: +* 函数名称: SPI_Close() +* 功能说明: SPI关闭，禁止收发 +* 输 入: SPI_TypeDef * SPIx 指定要被设置的SPI，有效值包括SPI0、SPI1 +* 输 出: 无 +* 注意事项: 无 ******************************************************************************************************************************************/ void SPI_Close(SPI_TypeDef * SPIx) { @@ -112,11 +112,11 @@ void SPI_Close(SPI_TypeDef * SPIx) } /****************************************************************************************************************************************** -* : SPI_Read() -* ˵: ȡһ -* : SPI_TypeDef * SPIx ָҪõSPIЧֵSPI0SPI1 -* : uint32_t ȡ -* ע: +* 函数名称: SPI_Read() +* 功能说明: 读取一个数据 +* 输 入: SPI_TypeDef * SPIx 指定要被设置的SPI，有效值包括SPI0、SPI1 +* 输 出: uint32_t 读取到的数据 +* 注意事项: 无 ******************************************************************************************************************************************/ uint32_t SPI_Read(SPI_TypeDef * SPIx) { @@ -124,12 +124,12 @@ uint32_t SPI_Read(SPI_TypeDef * SPIx) } /****************************************************************************************************************************************** -* : SPI_Write() -* ˵: дһ -* : SPI_TypeDef * SPIx ָҪõSPIЧֵSPI0SPI1 -* uint32_t Ҫд -* : -* ע: +* 函数名称: SPI_Write() +* 功能说明: 写入一个数据 +* 输 入: SPI_TypeDef * SPIx 指定要被设置的SPI，有效值包括SPI0、SPI1 +* uint32_t 要写入的数据 +* 输 出: 无 +* 注意事项: 无 ******************************************************************************************************************************************/ void SPI_Write(SPI_TypeDef * SPIx, uint32_t data) { @@ -137,12 +137,12 @@ void SPI_Write(SPI_TypeDef * SPIx, uint32_t data) } /****************************************************************************************************************************************** -* : SPI_WriteWithWait() -* ˵: дһݲȴȫͳȥ -* : SPI_TypeDef * SPIx ָҪõSPIЧֵSPI0SPI1SPI1 -* uint32_t Ҫд -* : -* ע: +* 函数名称: SPI_WriteWithWait() +* 功能说明: 写入一个数据并等待数据完全发送出去 +* 输 入: SPI_TypeDef * SPIx 指定要被设置的SPI，有效值包括SPI0、SPI1、SPI1 +* uint32_t 要写入的数据 +* 输 出: 无 +* 注意事项: 无 ******************************************************************************************************************************************/ void SPI_WriteWithWait(SPI_TypeDef * SPIx, uint32_t data) { @@ -154,12 +154,12 @@ void SPI_WriteWithWait(SPI_TypeDef * SPIx, uint32_t data) } /****************************************************************************************************************************************** -* : SPI_ReadWrite() -* ˵: һݣط͹нյ -* : SPI_TypeDef * SPIx ָҪõSPIЧֵSPI0SPI1 -* uint32_t data Ҫ͵ -* : uint32_t յ -* ע: ͬһSPIģ飬˺ӦSPI_Write()ãΪSPI_Write()SPI_STAT_RFNE״̬ +* 函数名称: SPI_ReadWrite() +* 功能说明: 发送一个数据，并返回发送过程中接收到的 +* 输 入: SPI_TypeDef * SPIx 指定要被设置的SPI，有效值包括SPI0、SPI1 +* uint32_t data 要发送的数据 +* 输 出: uint32_t 接收到的数据 +* 注意事项: 对于同一个SPI模块，此函数不应与SPI_Write()混着用，因为SPI_Write()不清除SPI_STAT_RFNE状态 ******************************************************************************************************************************************/ uint32_t SPI_ReadWrite(SPI_TypeDef * SPIx, uint32_t data) { @@ -170,11 +170,11 @@ uint32_t SPI_ReadWrite(SPI_TypeDef * SPIx, uint32_t data) } /****************************************************************************************************************************************** -* : SPI_IsRXEmpty() -* ˵: FIFOǷգԼSPI_Read() -* : SPI_TypeDef * SPIx ָҪõSPIЧֵSPI0SPI1 -* : uint32_t 1 FIFO 0 FIFOǿ -* ע: +* 函数名称: SPI_IsRXEmpty() +* 功能说明: 接收FIFO是否空，如果不空则可以继续SPI_Read() +* 输 入: SPI_TypeDef * SPIx 指定要被设置的SPI，有效值包括SPI0、SPI1 +* 输 出: uint32_t 1 接收FIFO空 0 接收FIFO非空 +* 注意事项: 无 ******************************************************************************************************************************************/ uint32_t SPI_IsRXEmpty(SPI_TypeDef * SPIx) { @@ -182,11 +182,11 @@ uint32_t SPI_IsRXEmpty(SPI_TypeDef * SPIx) } /****************************************************************************************************************************************** -* : SPI_IsTXFull() -* ˵: FIFOǷԼSPI_Write() -* : SPI_TypeDef * SPIx ָҪõSPIЧֵSPI0SPI1 -* : uint32_t 1 FIFO 0 FIFO -* ע: +* 函数名称: SPI_IsTXFull() +* 功能说明: 发送FIFO是否满，如果不满则可以继续SPI_Write() +* 输 入: SPI_TypeDef * SPIx 指定要被设置的SPI，有效值包括SPI0、SPI1 +* 输 出: uint32_t 1 发送FIFO满 0 发送FIFO不满 +* 注意事项: 无 ******************************************************************************************************************************************/ uint32_t SPI_IsTXFull(SPI_TypeDef * SPIx) { @@ -194,11 +194,11 @@ uint32_t SPI_IsTXFull(SPI_TypeDef * SPIx) } /****************************************************************************************************************************************** -* : SPI_IsTXEmpty() -* ˵: FIFOǷ -* : SPI_TypeDef * SPIx ָҪõSPIЧֵSPI0SPI1 -* : uint32_t 1 FIFO 0 FIFOǿ -* ע: +* 函数名称: SPI_IsTXEmpty() +* 功能说明: 发送FIFO是否空 +* 输 入: SPI_TypeDef * SPIx 指定要被设置的SPI，有效值包括SPI0、SPI1 +* 输 出: uint32_t 1 发送FIFO空 0 发送FIFO非空 +* 注意事项: 无 ******************************************************************************************************************************************/ uint32_t SPI_IsTXEmpty(SPI_TypeDef * SPIx) { @@ -207,11 +207,11 @@ uint32_t SPI_IsTXEmpty(SPI_TypeDef * SPIx) /****************************************************************************************************************************************** -* : SPI_INTRXHalfFullEn() -* ˵: FIFOжʹ -* : SPI_TypeDef * SPIx ָҪõSPIЧֵSPI0SPI1 -* : -* ע: +* 函数名称: SPI_INTRXHalfFullEn() +* 功能说明: 接收FIFO半满中断使能 +* 输 入: SPI_TypeDef * SPIx 指定要被设置的SPI，有效值包括SPI0、SPI1 +* 输 出: 无 +* 注意事项: 无 ******************************************************************************************************************************************/ void SPI_INTRXHalfFullEn(SPI_TypeDef * SPIx) { @@ -219,11 +219,11 @@ void SPI_INTRXHalfFullEn(SPI_TypeDef * SPIx) } /****************************************************************************************************************************************** -* : SPI_INTRXHalfFullDis() -* ˵: FIFOжϽֹ -* : SPI_TypeDef * SPIx ָҪõSPIЧֵSPI0SPI1 -* : -* ע: +* 函数名称: SPI_INTRXHalfFullDis() +* 功能说明: 接收FIFO半满中断禁止 +* 输 入: SPI_TypeDef * SPIx 指定要被设置的SPI，有效值包括SPI0、SPI1 +* 输 出: 无 +* 注意事项: 无 ******************************************************************************************************************************************/ void SPI_INTRXHalfFullDis(SPI_TypeDef * SPIx) { @@ -231,11 +231,11 @@ void SPI_INTRXHalfFullDis(SPI_TypeDef * SPIx) } /****************************************************************************************************************************************** -* : SPI_INTRXHalfFullClr() -* ˵: FIFOжϱ־ -* : SPI_TypeDef * SPIx ָҪõSPIЧֵSPI0SPI1 -* : -* ע: +* 函数名称: SPI_INTRXHalfFullClr() +* 功能说明: 接收FIFO半满中断标志清除 +* 输 入: SPI_TypeDef * SPIx 指定要被设置的SPI，有效值包括SPI0、SPI1 +* 输 出: 无 +* 注意事项: 无 ******************************************************************************************************************************************/ void SPI_INTRXHalfFullClr(SPI_TypeDef * SPIx) { @@ -243,11 +243,11 @@ void SPI_INTRXHalfFullClr(SPI_TypeDef * SPIx) } /****************************************************************************************************************************************** -* : SPI_INTRXHalfFullStat() -* ˵: FIFOж״̬ -* : SPI_TypeDef * SPIx ָҪõSPIЧֵSPI0SPI1 -* : uint32_t 1 FIFOﵽ 0 FIFOδﵽ -* ע: +* 函数名称: SPI_INTRXHalfFullStat() +* 功能说明: 接收FIFO半满中断状态 +* 输 入: SPI_TypeDef * SPIx 指定要被设置的SPI，有效值包括SPI0、SPI1 +* 输 出: uint32_t 1 接收FIFO达到半满 0 接收FIFO未达到半满 +* 注意事项: 无 ******************************************************************************************************************************************/ uint32_t SPI_INTRXHalfFullStat(SPI_TypeDef * SPIx) { @@ -255,11 +255,11 @@ uint32_t SPI_INTRXHalfFullStat(SPI_TypeDef * SPIx) } /****************************************************************************************************************************************** -* : SPI_INTRXFullEn() -* ˵: FIFOжʹ -* : SPI_TypeDef * SPIx ָҪõSPIЧֵSPI0SPI1 -* : -* ע: +* 函数名称: SPI_INTRXFullEn() +* 功能说明: 接收FIFO满中断使能 +* 输 入: SPI_TypeDef * SPIx 指定要被设置的SPI，有效值包括SPI0、SPI1 +* 输 出: 无 +* 注意事项: 无 ******************************************************************************************************************************************/ void SPI_INTRXFullEn(SPI_TypeDef * SPIx) { @@ -267,11 +267,11 @@ void SPI_INTRXFullEn(SPI_TypeDef * SPIx) } /****************************************************************************************************************************************** -* : SPI_INTRXFullDis() -* ˵: FIFOжϽֹ -* : SPI_TypeDef * SPIx ָҪõSPIЧֵSPI0SPI1 -* : -* ע: +* 函数名称: SPI_INTRXFullDis() +* 功能说明: 接收FIFO满中断禁止 +* 输 入: SPI_TypeDef * SPIx 指定要被设置的SPI，有效值包括SPI0、SPI1 +* 输 出: 无 +* 注意事项: 无 ******************************************************************************************************************************************/ void SPI_INTRXFullDis(SPI_TypeDef * SPIx) { @@ -279,11 +279,11 @@ void SPI_INTRXFullDis(SPI_TypeDef * SPIx) } /****************************************************************************************************************************************** -* : SPI_INTRXFullClr() -* ˵: FIFOжϱ־ -* : SPI_TypeDef * SPIx ָҪõSPIЧֵSPI0SPI1 -* : -* ע: +* 函数名称: SPI_INTRXFullClr() +* 功能说明: 接收FIFO满中断标志清除 +* 输 入: SPI_TypeDef * SPIx 指定要被设置的SPI，有效值包括SPI0、SPI1 +* 输 出: 无 +* 注意事项: 无 ******************************************************************************************************************************************/ void SPI_INTRXFullClr(SPI_TypeDef * SPIx) { @@ -291,11 +291,11 @@ void SPI_INTRXFullClr(SPI_TypeDef * SPIx) } /****************************************************************************************************************************************** -* : SPI_INTRXFullStat() -* ˵: FIFOж״̬ -* : SPI_TypeDef * SPIx ָҪõSPIЧֵSPI0SPI1 -* : uint32_t 1 FIFO 0 FIFOδ -* ע: +* 函数名称: SPI_INTRXFullStat() +* 功能说明: 接收FIFO满中断状态 +* 输 入: SPI_TypeDef * SPIx 指定要被设置的SPI，有效值包括SPI0、SPI1 +* 输 出: uint32_t 1 接收FIFO满 0 接收FIFO未满 +* 注意事项: 无 ******************************************************************************************************************************************/ uint32_t SPI_INTRXFullStat(SPI_TypeDef * SPIx) { @@ -303,11 +303,11 @@ uint32_t SPI_INTRXFullStat(SPI_TypeDef * SPIx) } /****************************************************************************************************************************************** -* : SPI_INTRXOverflowEn() -* ˵: FIFOжʹ -* : SPI_TypeDef * SPIx ָҪõSPIЧֵSPI0SPI1 -* : -* ע: +* 函数名称: SPI_INTRXOverflowEn() +* 功能说明: 接收FIFO溢出中断使能 +* 输 入: SPI_TypeDef * SPIx 指定要被设置的SPI，有效值包括SPI0、SPI1 +* 输 出: 无 +* 注意事项: 无 ******************************************************************************************************************************************/ void SPI_INTRXOverflowEn(SPI_TypeDef * SPIx) { @@ -315,11 +315,11 @@ void SPI_INTRXOverflowEn(SPI_TypeDef * SPIx) } /****************************************************************************************************************************************** -* : SPI_INTRXOverflowDis() -* ˵: FIFOжϽֹ -* : SPI_TypeDef * SPIx ָҪõSPIЧֵSPI0SPI1 -* : -* ע: +* 函数名称: SPI_INTRXOverflowDis() +* 功能说明: 接收FIFO溢出中断禁止 +* 输 入: SPI_TypeDef * SPIx 指定要被设置的SPI，有效值包括SPI0、SPI1 +* 输 出: 无 +* 注意事项: 无 ******************************************************************************************************************************************/ void SPI_INTRXOverflowDis(SPI_TypeDef * SPIx) { @@ -327,11 +327,11 @@ void SPI_INTRXOverflowDis(SPI_TypeDef * SPIx) } /****************************************************************************************************************************************** -* : SPI_INTRXOverflowClr() -* ˵: FIFOжϱ־ -* : SPI_TypeDef * SPIx ָҪõSPIЧֵSPI0SPI1 -* : -* ע: +* 函数名称: SPI_INTRXOverflowClr() +* 功能说明: 接收FIFO溢出中断标志清除 +* 输 入: SPI_TypeDef * SPIx 指定要被设置的SPI，有效值包括SPI0、SPI1 +* 输 出: 无 +* 注意事项: 无 ******************************************************************************************************************************************/ void SPI_INTRXOverflowClr(SPI_TypeDef * SPIx) { @@ -339,11 +339,11 @@ void SPI_INTRXOverflowClr(SPI_TypeDef * SPIx) } /****************************************************************************************************************************************** -* : SPI_INTRXOverflowStat() -* ˵: FIFOж״̬ -* : SPI_TypeDef * SPIx ָҪõSPIЧֵSPI0SPI1 -* : uint32_t 1 FIFO 0 FIFOδ -* ע: +* 函数名称: SPI_INTRXOverflowStat() +* 功能说明: 接收FIFO溢出中断状态 +* 输 入: SPI_TypeDef * SPIx 指定要被设置的SPI，有效值包括SPI0、SPI1 +* 输 出: uint32_t 1 接收FIFO溢出 0 接收FIFO未溢出 +* 注意事项: 无 ******************************************************************************************************************************************/ uint32_t SPI_INTRXOverflowStat(SPI_TypeDef * SPIx) { @@ -351,11 +351,11 @@ uint32_t SPI_INTRXOverflowStat(SPI_TypeDef * SPIx) } /****************************************************************************************************************************************** -* : SPI_INTTXHalfFullEn() -* ˵: FIFOжʹ -* : SPI_TypeDef * SPIx ָҪõSPIЧֵSPI0SPI1 -* : -* ע: +* 函数名称: SPI_INTTXHalfFullEn() +* 功能说明: 发送FIFO半满中断使能 +* 输 入: SPI_TypeDef * SPIx 指定要被设置的SPI，有效值包括SPI0、SPI1 +* 输 出: 无 +* 注意事项: 无 ******************************************************************************************************************************************/ void SPI_INTTXHalfFullEn(SPI_TypeDef * SPIx) { @@ -363,11 +363,11 @@ void SPI_INTTXHalfFullEn(SPI_TypeDef * SPIx) } /****************************************************************************************************************************************** -* : SPI_INTTXHalfFullDis() -* ˵: FIFOжϽֹ -* : SPI_TypeDef * SPIx ָҪõSPIЧֵSPI0SPI1 -* : -* ע: +* 函数名称: SPI_INTTXHalfFullDis() +* 功能说明: 发送FIFO半满中断禁止 +* 输 入: SPI_TypeDef * SPIx 指定要被设置的SPI，有效值包括SPI0、SPI1 +* 输 出: 无 +* 注意事项: 无 ******************************************************************************************************************************************/ void SPI_INTTXHalfFullDis(SPI_TypeDef * SPIx) { @@ -375,11 +375,11 @@ void SPI_INTTXHalfFullDis(SPI_TypeDef * SPIx) } /****************************************************************************************************************************************** -* : SPI_INTTXHalfFullClr() -* ˵: FIFOжϱ־ -* : SPI_TypeDef * SPIx ָҪõSPIЧֵSPI0SPI1 -* : -* ע: +* 函数名称: SPI_INTTXHalfFullClr() +* 功能说明: 发送FIFO半满中断标志清除 +* 输 入: SPI_TypeDef * SPIx 指定要被设置的SPI，有效值包括SPI0、SPI1 +* 输 出: 无 +* 注意事项: 无 ******************************************************************************************************************************************/ void SPI_INTTXHalfFullClr(SPI_TypeDef * SPIx) { @@ -387,11 +387,11 @@ void SPI_INTTXHalfFullClr(SPI_TypeDef * SPIx) } /****************************************************************************************************************************************** -* : SPI_INTTXHalfFullStat() -* ˵: FIFOж״̬ -* : SPI_TypeDef * SPIx ָҪõSPIЧֵSPI0SPI1 -* : uint32_t 1 FIFOﵽ 0 FIFOδﵽ -* ע: +* 函数名称: SPI_INTTXHalfFullStat() +* 功能说明: 发送FIFO半满中断状态 +* 输 入: SPI_TypeDef * SPIx 指定要被设置的SPI，有效值包括SPI0、SPI1 +* 输 出: uint32_t 1 发送FIFO达到半满 0 发送FIFO未达到半满 +* 注意事项: 无 ******************************************************************************************************************************************/ uint32_t SPI_INTTXHalfFullStat(SPI_TypeDef * SPIx) { @@ -399,11 +399,11 @@ uint32_t SPI_INTTXHalfFullStat(SPI_TypeDef * SPIx) } /****************************************************************************************************************************************** -* : SPI_INTTXEmptyEn() -* ˵: FIFOжʹ -* : SPI_TypeDef * SPIx ָҪõSPIЧֵSPI0SPI1 -* : -* ע: +* 函数名称: SPI_INTTXEmptyEn() +* 功能说明: 发送FIFO空中断使能 +* 输 入: SPI_TypeDef * SPIx 指定要被设置的SPI，有效值包括SPI0、SPI1 +* 输 出: 无 +* 注意事项: 无 ******************************************************************************************************************************************/ void SPI_INTTXEmptyEn(SPI_TypeDef * SPIx) { @@ -411,11 +411,11 @@ void SPI_INTTXEmptyEn(SPI_TypeDef * SPIx) } /****************************************************************************************************************************************** -* : SPI_INTTXEmptyDis() -* ˵: FIFOжϽֹ -* : SPI_TypeDef * SPIx ָҪõSPIЧֵSPI0SPI1 -* : -* ע: +* 函数名称: SPI_INTTXEmptyDis() +* 功能说明: 发送FIFO空中断禁止 +* 输 入: SPI_TypeDef * SPIx 指定要被设置的SPI，有效值包括SPI0、SPI1 +* 输 出: 无 +* 注意事项: 无 ******************************************************************************************************************************************/ void SPI_INTTXEmptyDis(SPI_TypeDef * SPIx) { @@ -423,11 +423,11 @@ void SPI_INTTXEmptyDis(SPI_TypeDef * SPIx) } /****************************************************************************************************************************************** -* : SPI_INTTXEmptyClr() -* ˵: FIFOжϱ־ -* : SPI_TypeDef * SPIx ָҪõSPIЧֵSPI0SPI1 -* : -* ע: +* 函数名称: SPI_INTTXEmptyClr() +* 功能说明: 发送FIFO空中断标志清除 +* 输 入: SPI_TypeDef * SPIx 指定要被设置的SPI，有效值包括SPI0、SPI1 +* 输 出: 无 +* 注意事项: 无 ******************************************************************************************************************************************/ void SPI_INTTXEmptyClr(SPI_TypeDef * SPIx) { @@ -435,11 +435,11 @@ void SPI_INTTXEmptyClr(SPI_TypeDef * SPIx) } /****************************************************************************************************************************************** -* : SPI_INTTXEmptyStat() -* ˵: FIFOж״̬ -* : SPI_TypeDef * SPIx ָҪõSPIЧֵSPI0SPI1 -* : uint32_t 1 FIFO 0 FIFOǿ -* ע: +* 函数名称: SPI_INTTXEmptyStat() +* 功能说明: 发送FIFO空中断状态 +* 输 入: SPI_TypeDef * SPIx 指定要被设置的SPI，有效值包括SPI0、SPI1 +* 输 出: uint32_t 1 发送FIFO空 0 发送FIFO非空 +* 注意事项: 无 ******************************************************************************************************************************************/ uint32_t SPI_INTTXEmptyStat(SPI_TypeDef * SPIx) { @@ -447,11 +447,11 @@ uint32_t SPI_INTTXEmptyStat(SPI_TypeDef * SPIx) } /****************************************************************************************************************************************** -* : SPI_INTTXCompleteEn() -* ˵: FIFOҷλĴжʹ -* : SPI_TypeDef * SPIx ָҪõSPIЧֵSPI0SPI1 -* : -* ע: +* 函数名称: SPI_INTTXCompleteEn() +* 功能说明: 发送FIFO空且发送移位寄存器空中断使能 +* 输 入: SPI_TypeDef * SPIx 指定要被设置的SPI，有效值包括SPI0、SPI1 +* 输 出: 无 +* 注意事项: 无 ******************************************************************************************************************************************/ void SPI_INTTXCompleteEn(SPI_TypeDef * SPIx) { @@ -459,11 +459,11 @@ void SPI_INTTXCompleteEn(SPI_TypeDef * SPIx) } /****************************************************************************************************************************************** -* : SPI_INTTXCompleteDis() -* ˵: FIFOҷλĴжϽֹ -* : SPI_TypeDef * SPIx ָҪõSPIЧֵSPI0SPI1 -* : -* ע: +* 函数名称: SPI_INTTXCompleteDis() +* 功能说明: 发送FIFO空且发送移位寄存器空中断禁止 +* 输 入: SPI_TypeDef * SPIx 指定要被设置的SPI，有效值包括SPI0、SPI1 +* 输 出: 无 +* 注意事项: 无 ******************************************************************************************************************************************/ void SPI_INTTXCompleteDis(SPI_TypeDef * SPIx) { @@ -471,11 +471,11 @@ void SPI_INTTXCompleteDis(SPI_TypeDef * SPIx) } /****************************************************************************************************************************************** -* : SPI_INTTXCompleteClr() -* ˵: FIFOҷλĴж״̬ -* : SPI_TypeDef * SPIx ָҪõSPIЧֵSPI0SPI1 -* : -* ע: +* 函数名称: SPI_INTTXCompleteClr() +* 功能说明: 发送FIFO空且发送移位寄存器空中断状态清除 +* 输 入: SPI_TypeDef * SPIx 指定要被设置的SPI，有效值包括SPI0、SPI1 +* 输 出: 无 +* 注意事项: 无 ******************************************************************************************************************************************/ void SPI_INTTXCompleteClr(SPI_TypeDef * SPIx) { @@ -483,11 +483,11 @@ void SPI_INTTXCompleteClr(SPI_TypeDef * SPIx) } /****************************************************************************************************************************************** -* : SPI_INTTXCompleteStat() -* ˵: FIFOҷλĴж״̬ -* : SPI_TypeDef * SPIx ָҪõSPIЧֵSPI0SPI1 -* : uint32_t 1 FIFOҷλĴ 0 FIFOλĴǿ -* ע: +* 函数名称: SPI_INTTXCompleteStat() +* 功能说明: 发送FIFO空且发送移位寄存器空中断状态 +* 输 入: SPI_TypeDef * SPIx 指定要被设置的SPI，有效值包括SPI0、SPI1 +* 输 出: uint32_t 1 发送FIFO空且发送移位寄存器空 0 发送FIFO或发送移位寄存器非空 +* 注意事项: 无 ******************************************************************************************************************************************/ uint32_t SPI_INTTXCompleteStat(SPI_TypeDef * SPIx) { @@ -495,11 +495,11 @@ uint32_t SPI_INTTXCompleteStat(SPI_TypeDef * SPIx) } /****************************************************************************************************************************************** -* : SPI_INTTXWordCompleteEn() -* ˵: FIFOַжʹ -* : SPI_TypeDef * SPIx ָҪõSPIЧֵSPI0SPI1 -* : -* ע: +* 函数名称: SPI_INTTXWordCompleteEn() +* 功能说明: 发送FIFO字发送完成中断使能 +* 输 入: SPI_TypeDef * SPIx 指定要被设置的SPI，有效值包括SPI0、SPI1 +* 输 出: 无 +* 注意事项: 无 ******************************************************************************************************************************************/ void SPI_INTTXWordCompleteEn(SPI_TypeDef * SPIx) { @@ -507,11 +507,11 @@ void SPI_INTTXWordCompleteEn(SPI_TypeDef * SPIx) } /****************************************************************************************************************************************** -* : SPI_INTTXWordCompleteDis() -* ˵: FIFOַжϽֹ -* : SPI_TypeDef * SPIx ָҪõSPIЧֵSPI0SPI1 -* : -* ע: +* 函数名称: SPI_INTTXWordCompleteDis() +* 功能说明: 发送FIFO字发送完成中断禁止 +* 输 入: SPI_TypeDef * SPIx 指定要被设置的SPI，有效值包括SPI0、SPI1 +* 输 出: 无 +* 注意事项: 无 ******************************************************************************************************************************************/ void SPI_INTTXWordCompleteDis(SPI_TypeDef * SPIx) { @@ -519,11 +519,11 @@ void SPI_INTTXWordCompleteDis(SPI_TypeDef * SPIx) } /****************************************************************************************************************************************** -* : SPI_INTTXWordCompleteClr() -* ˵: FIFOַжϱ־ -* : SPI_TypeDef * SPIx ָҪõSPIЧֵSPI0SPI1 -* : -* ע: +* 函数名称: SPI_INTTXWordCompleteClr() +* 功能说明: 发送FIFO字发送完成中断标志清除 +* 输 入: SPI_TypeDef * SPIx 指定要被设置的SPI，有效值包括SPI0、SPI1 +* 输 出: 无 +* 注意事项: 无 ******************************************************************************************************************************************/ void SPI_INTTXWordCompleteClr(SPI_TypeDef * SPIx) { @@ -531,11 +531,11 @@ void SPI_INTTXWordCompleteClr(SPI_TypeDef * SPIx) } /****************************************************************************************************************************************** -* : SPI_INTTXWordCompleteStat() -* ˵: FIFOַж״̬ -* : SPI_TypeDef * SPIx ָҪõSPIЧֵSPI0SPI1 -* : uint32_t 1 жѷ 0 жδ -* ע: +* 函数名称: SPI_INTTXWordCompleteStat() +* 功能说明: 发送FIFO字发送完成中断状态 +* 输 入: SPI_TypeDef * SPIx 指定要被设置的SPI，有效值包括SPI0、SPI1 +* 输 出: uint32_t 1 发送完成中断已发生 0 发送完成中断未发生 +* 注意事项: 无 ******************************************************************************************************************************************/ uint32_t SPI_INTTXWordCompleteStat(SPI_TypeDef * SPIx) { diff --git a/bsp/swm320/libraries/SWM320_StdPeriph_Driver/SWM320_spi.h b/bsp/swm320/libraries/SWM320_StdPeriph_Driver/SWM320_spi.h index 42c4d0cb707cdcfd5e0a00832b6fd074a80cb259..a7725ee24e482483a1d181fb5d27bcc0d27b0588 100644 --- a/bsp/swm320/libraries/SWM320_StdPeriph_Driver/SWM320_spi.h +++ b/bsp/swm320/libraries/SWM320_StdPeriph_Driver/SWM320_spi.h @@ -2,26 +2,26 @@ #define __SWM320_SPI_H__ typedef struct { - uint8_t FrameFormat; //֡ʽSPI_FORMAT_SPISPI_FORMAT_TI_SSI - uint8_t SampleEdge; //SPI֡ʽ£ѡݲأSPI_FIRST_EDGESPI_SECOND_EDGE - uint8_t IdleLevel; //SPI֡ʽ£ѡʱݴʱʱߵĵƽSPI_LOW_LEVELSPI_HIGH_LEVEL - uint8_t WordSize; //ֳ, Чֵ4-16 - uint8_t Master; //1 ģʽ 0 ӻģʽ - uint8_t clkDiv; //SPI_CLK = SYS_CLK / clkDivЧֵSPI_CLKDIV_4SPI_CLKDIV_8... ... SPI_CLKDIV_512 + uint8_t FrameFormat; //帧格式：SPI_FORMAT_SPI、SPI_FORMAT_TI_SSI + uint8_t SampleEdge; //在SPI帧格式下，选择数据采样边沿：SPI_FIRST_EDGE、SPI_SECOND_EDGE + uint8_t IdleLevel; //在SPI帧格式下，选择空闲时（无数据传输时）时钟线的电平：SPI_LOW_LEVEL、SPI_HIGH_LEVEL + uint8_t WordSize; //字长度, 有效值4-16 + uint8_t Master; //1 主机模式 0 从机模式 + uint8_t clkDiv; //SPI_CLK = SYS_CLK / clkDiv，有效值：SPI_CLKDIV_4、SPI_CLKDIV_8、... ... 、SPI_CLKDIV_512 - uint8_t RXHFullIEn; //FIFOжʹ - uint8_t TXEmptyIEn; //FIFO жʹ - uint8_t TXCompleteIEn; //FIFO ҷλĴжʹ + uint8_t RXHFullIEn; //接收FIFO半满中断使能 + uint8_t TXEmptyIEn; //发送FIFO 空中断使能 + uint8_t TXCompleteIEn; //发送FIFO 空且发送移位寄存器空中断使能 } SPI_InitStructure; -#define SPI_FORMAT_SPI 0 //Motorola SPI ʽ -#define SPI_FORMAT_TI_SSI 1 //TI SSI ʽ +#define SPI_FORMAT_SPI 0 //Motorola SPI 格式 +#define SPI_FORMAT_TI_SSI 1 //TI SSI 格式 -#define SPI_FIRST_EDGE 0 //һʱؿʼ -#define SPI_SECOND_EDGE 1 //ڶʱؿʼ +#define SPI_FIRST_EDGE 0 //第一个时钟沿开始采样 +#define SPI_SECOND_EDGE 1 //第二个时钟沿开始采样 -#define SPI_LOW_LEVEL 0 //ʱʱֵ߱͵ƽ -#define SPI_HIGH_LEVEL 1 //ʱʱָ߱ߵƽ +#define SPI_LOW_LEVEL 0 //空闲时时钟线保持低电平 +#define SPI_HIGH_LEVEL 1 //空闲时时钟线保持高电平 #define SPI_CLKDIV_4 0 #define SPI_CLKDIV_8 1 @@ -34,18 +34,18 @@ typedef struct { -void SPI_Init(SPI_TypeDef * SPIx, SPI_InitStructure * initStruct); //SPIʼ -void SPI_Open(SPI_TypeDef * SPIx); //SPI򿪣շ -void SPI_Close(SPI_TypeDef * SPIx); //SPIرգֹշ +void SPI_Init(SPI_TypeDef * SPIx, SPI_InitStructure * initStruct); //SPI初始化 +void SPI_Open(SPI_TypeDef * SPIx); //SPI打开，允许收发 +void SPI_Close(SPI_TypeDef * SPIx); //SPI关闭，禁止收发 uint32_t SPI_Read(SPI_TypeDef * SPIx); void SPI_Write(SPI_TypeDef * SPIx, uint32_t data); void SPI_WriteWithWait(SPI_TypeDef * SPIx, uint32_t data); uint32_t SPI_ReadWrite(SPI_TypeDef * SPIx, uint32_t data); -uint32_t SPI_IsRXEmpty(SPI_TypeDef * SPIx); //FIFOǷգԼSPI_Read() -uint32_t SPI_IsTXFull(SPI_TypeDef * SPIx); //FIFOǷԼSPI_Write() -uint32_t SPI_IsTXEmpty(SPI_TypeDef * SPIx); //FIFOǷ +uint32_t SPI_IsRXEmpty(SPI_TypeDef * SPIx); //接收FIFO是否空，如果不空则可以继续SPI_Read() +uint32_t SPI_IsTXFull(SPI_TypeDef * SPIx); //发送FIFO是否满，如果不满则可以继续SPI_Write() +uint32_t SPI_IsTXEmpty(SPI_TypeDef * SPIx); //发送FIFO是否空 void SPI_INTRXHalfFullEn(SPI_TypeDef * SPIx); diff --git a/bsp/swm320/libraries/SWM320_StdPeriph_Driver/SWM320_sram.c b/bsp/swm320/libraries/SWM320_StdPeriph_Driver/SWM320_sram.c index d1f421aabaf969e68ab890a279d1fb7ee7411bea..62e4c84eed104d4d4522cd08b190c8f37c08b9c9 100644 --- a/bsp/swm320/libraries/SWM320_StdPeriph_Driver/SWM320_sram.c +++ b/bsp/swm320/libraries/SWM320_StdPeriph_Driver/SWM320_sram.c @@ -1,10 +1,10 @@ /****************************************************************************************************************************************** -* ļ: SWM320_sram.c -* ˵: SWM320ƬSRAM -* ֧: http://www.synwit.com.cn/e/tool/gbook/?bid=1 -* ע: -* 汾: V1.1.0 20171025 -* ¼: +* 文件名称: SWM320_sram.c +* 功能说明: SWM320单片机的SRAM驱动程序 +* 技术支持: http://www.synwit.com.cn/e/tool/gbook/?bid=1 +* 注意事项: +* 版本日期: V1.1.0 2017年10月25日 +* 升级记录: * * ******************************************************************************************************************************************* @@ -23,17 +23,17 @@ /****************************************************************************************************************************************** -* : SRAM_Init() -* ˵: SRAMʼ -* : SRAM_InitStructure * initStruct SRAM 趨ֵĽṹ -* : -* ע: +* 函数名称: SRAM_Init() +* 功能说明: SRAM控制器初始化 +* 输 入: SRAM_InitStructure * initStruct 包含 SRAM 控制器相关设定值的结构体 +* 输 出: 无 +* 注意事项: 无 ******************************************************************************************************************************************/ void SRAM_Init(SRAM_InitStructure * initStruct) { uint32_t i; - // SRAMǰҪˢSDRAM + // 配置SRAM前需要刷新下SDRAM控制器 do { SYS->CLKEN |= (1 << SYS_CLKEN_SDRAM_Pos); @@ -49,5 +49,5 @@ void SRAM_Init(SRAM_InitStructure * initStruct) SRAMC->CR = (initStruct->ClkDiv << SRAMC_CR_RWTIME_Pos) | (initStruct->DataWidth << SRAMC_CR_BYTEIF_Pos) | - (0 << SRAMC_CR_HBLBDIS_Pos); // ʹֽڡַ + (0 << SRAMC_CR_HBLBDIS_Pos); // 使能字节、半字访问 } diff --git a/bsp/swm320/libraries/SWM320_StdPeriph_Driver/SWM320_sram.h b/bsp/swm320/libraries/SWM320_StdPeriph_Driver/SWM320_sram.h index 2ef71b24baae61b47e7e4ff5ac9fdfcb5d3ee36b..799b271a9993f4fd6679ad90e277c5aef172d849 100644 --- a/bsp/swm320/libraries/SWM320_StdPeriph_Driver/SWM320_sram.h +++ b/bsp/swm320/libraries/SWM320_StdPeriph_Driver/SWM320_sram.h @@ -2,8 +2,8 @@ #define __SWM320_SRAM_H__ typedef struct { - uint8_t ClkDiv; //SRAM_CLKDIV_5...SRAM_CLKDIV_16SRAMоƬܵƵѡʷƵ - uint8_t DataWidth; //SRAM_DATAWIDTH_8SRAM_DATAWIDTH_16 + uint8_t ClkDiv; //SRAM_CLKDIV_5...SRAM_CLKDIV_16，根据SRAM芯片所能跑的最高频率选择合适分频 + uint8_t DataWidth; //SRAM_DATAWIDTH_8、SRAM_DATAWIDTH_16 } SRAM_InitStructure; diff --git a/bsp/swm320/libraries/SWM320_StdPeriph_Driver/SWM320_timr.c b/bsp/swm320/libraries/SWM320_StdPeriph_Driver/SWM320_timr.c index d4cbe03238c5230dcb03db850d92571a6eccc131..b67711a49a8f3a2c45f9c9503a6ad43a595f3c03 100644 --- a/bsp/swm320/libraries/SWM320_StdPeriph_Driver/SWM320_timr.c +++ b/bsp/swm320/libraries/SWM320_StdPeriph_Driver/SWM320_timr.c @@ -1,10 +1,10 @@ /****************************************************************************************************************************************** -* ļ: SWM320_timr.c -* ˵: SWM320Ƭļ/ʱ -* ֧: http://www.synwit.com.cn/e/tool/gbook/?bid=1 -* ע: -* 汾: V1.1.0 20171025 -* ¼: +* 文件名称: SWM320_timr.c +* 功能说明: SWM320单片机的计数器/定时器功能驱动库 +* 技术支持: http://www.synwit.com.cn/e/tool/gbook/?bid=1 +* 注意事项: +* 版本日期: V1.1.0 2017年10月25日 +* 升级记录: * * ******************************************************************************************************************************************* @@ -23,20 +23,20 @@ /****************************************************************************************************************************************** -* : TIMR_Init() -* ˵: TIMRʱ/ʼ -* : TIMR_TypeDef * TIMRx ָҪõĶʱЧֵTIMR0TIMR1TIMR2TIMR3TIMR4TIMR5 -* uint32_t mode TIMR_MODE_TIMER ʱģʽ TIMR_MODE_COUNTER ģʽ -* uint32_t period ʱ/ -* uint32_t int_en жʹ -* : -* ע: +* 函数名称: TIMR_Init() +* 功能说明: TIMR定时器/计数器初始化 +* 输 入: TIMR_TypeDef * TIMRx 指定要被设置的定时器，有效值包括TIMR0、TIMR1、TIMR2、TIMR3、TIMR4、TIMR5 +* uint32_t mode TIMR_MODE_TIMER 定时器模式 TIMR_MODE_COUNTER 计数器模式 +* uint32_t period 定时/计数周期 +* uint32_t int_en 中断使能 +* 输 出: 无 +* 注意事项: 无 ******************************************************************************************************************************************/ void TIMR_Init(TIMR_TypeDef * TIMRx, uint32_t mode, uint32_t period, uint32_t int_en) { SYS->CLKEN |= (0x01 << SYS_CLKEN_TIMR_Pos); - TIMR_Stop(TIMRx); //һЩؼĴֻڶʱֹͣʱ + TIMR_Stop(TIMRx); //一些关键寄存器只能在定时器停止时设置 TIMRx->CTRL &= ~TIMR_CTRL_CLKSRC_Msk; TIMRx->CTRL |= mode << TIMR_CTRL_CLKSRC_Pos; @@ -46,7 +46,7 @@ void TIMR_Init(TIMR_TypeDef * TIMRx, uint32_t mode, uint32_t period, uint32_t in switch((uint32_t)TIMRx) { case ((uint32_t)TIMR0): - TIMRG->IF = (1 << TIMRG_IF_TIMR0_Pos); //ʹжǰжϱ־ + TIMRG->IF = (1 << TIMRG_IF_TIMR0_Pos); //使能中断前清除中断标志 TIMRG->IE &= ~TIMRG_IE_TIMR0_Msk; TIMRG->IE |= (int_en << TIMRG_IE_TIMR0_Pos); @@ -96,11 +96,11 @@ void TIMR_Init(TIMR_TypeDef * TIMRx, uint32_t mode, uint32_t period, uint32_t in } /****************************************************************************************************************************************** -* : TIMR_Start() -* ˵: ʱӳʼֵʼʱ/ -* : TIMR_TypeDef * TIMRx ָҪõĶʱȡֵTIMR0TIMR1TIMR2TIMR3TIMR4TIMR5 -* : -* ע: +* 函数名称: TIMR_Start() +* 功能说明: 启动定时器，从初始值开始计时/计数 +* 输 入: TIMR_TypeDef * TIMRx 指定要被设置的定时器，可取值包括TIMR0、TIMR1、TIMR2、TIMR3、TIMR4、TIMR5 +* 输 出: 无 +* 注意事项: 无 ******************************************************************************************************************************************/ void TIMR_Start(TIMR_TypeDef * TIMRx) { @@ -108,11 +108,11 @@ void TIMR_Start(TIMR_TypeDef * TIMRx) } /****************************************************************************************************************************************** -* : TIMR_Stop() -* ˵: ֹͣʱ -* : TIMR_TypeDef * TIMRx ָҪõĶʱȡֵTIMR0TIMR1TIMR2TIMR3TIMR4TIMR5 -* : -* ע: +* 函数名称: TIMR_Stop() +* 功能说明: 停止定时器 +* 输 入: TIMR_TypeDef * TIMRx 指定要被设置的定时器，可取值包括TIMR0、TIMR1、TIMR2、TIMR3、TIMR4、TIMR5 +* 输 出: 无 +* 注意事项: 无 ******************************************************************************************************************************************/ void TIMR_Stop(TIMR_TypeDef * TIMRx) { @@ -120,11 +120,11 @@ void TIMR_Stop(TIMR_TypeDef * TIMRx) } /****************************************************************************************************************************************** -* : TIMR_Halt() -* ˵: ͣʱֲֵ -* : TIMR_TypeDef * TIMRx ָҪõĶʱȡֵTIMR0TIMR1TIMR2TIMR3TIMR4TIMR5 -* : -* ע: +* 函数名称: TIMR_Halt() +* 功能说明: 暂停定时器，计数值保持不变 +* 输 入: TIMR_TypeDef * TIMRx 指定要被设置的定时器，可取值包括TIMR0、TIMR1、TIMR2、TIMR3、TIMR4、TIMR5 +* 输 出: 无 +* 注意事项: 无 ******************************************************************************************************************************************/ void TIMR_Halt(TIMR_TypeDef * TIMRx) { @@ -157,11 +157,11 @@ void TIMR_Halt(TIMR_TypeDef * TIMRx) } /****************************************************************************************************************************************** -* : TIMR_Resume() -* ˵: ָʱͣ -* : TIMR_TypeDef * TIMRx ָҪõĶʱȡֵTIMR0TIMR1TIMR2TIMR3TIMR4TIMR5 -* : -* ע: +* 函数名称: TIMR_Resume() +* 功能说明: 恢复定时器，从暂停处继续计数 +* 输 入: TIMR_TypeDef * TIMRx 指定要被设置的定时器，可取值包括TIMR0、TIMR1、TIMR2、TIMR3、TIMR4、TIMR5 +* 输 出: 无 +* 注意事项: 无 ******************************************************************************************************************************************/ void TIMR_Resume(TIMR_TypeDef * TIMRx) { @@ -194,12 +194,12 @@ void TIMR_Resume(TIMR_TypeDef * TIMRx) } /****************************************************************************************************************************************** -* : TIMR_SetPeriod() -* ˵: öʱ/ -* : TIMR_TypeDef * TIMRx ָҪõĶʱȡֵTIMR0TIMR1TIMR2TIMR3TIMR4TIMR5 -* uint32_t period ʱ/ -* : -* ע: +* 函数名称: TIMR_SetPeriod() +* 功能说明: 设置定时/计数周期 +* 输 入: TIMR_TypeDef * TIMRx 指定要被设置的定时器，可取值包括TIMR0、TIMR1、TIMR2、TIMR3、TIMR4、TIMR5 +* uint32_t period 定时/计数周期 +* 输 出: 无 +* 注意事项: 无 ******************************************************************************************************************************************/ void TIMR_SetPeriod(TIMR_TypeDef * TIMRx, uint32_t period) { @@ -207,11 +207,11 @@ void TIMR_SetPeriod(TIMR_TypeDef * TIMRx, uint32_t period) } /****************************************************************************************************************************************** -* : TIMR_GetPeriod() -* ˵: ȡʱ/ -* : TIMR_TypeDef * TIMRx ָҪõĶʱȡֵTIMR0TIMR1TIMR2TIMR3TIMR4TIMR5 -* : uint32_t ǰʱ/ -* ע: +* 函数名称: TIMR_GetPeriod() +* 功能说明: 获取定时/计数周期 +* 输 入: TIMR_TypeDef * TIMRx 指定要被设置的定时器，可取值包括TIMR0、TIMR1、TIMR2、TIMR3、TIMR4、TIMR5 +* 输 出: uint32_t 当前定时/计数周期 +* 注意事项: 无 ******************************************************************************************************************************************/ uint32_t TIMR_GetPeriod(TIMR_TypeDef * TIMRx) { @@ -219,11 +219,11 @@ uint32_t TIMR_GetPeriod(TIMR_TypeDef * TIMRx) } /****************************************************************************************************************************************** -* : TIMR_GetCurValue() -* ˵: ȡǰֵ -* : TIMR_TypeDef * TIMRx ָҪõĶʱȡֵTIMR0TIMR1TIMR2TIMR3TIMR4TIMR5 -* : uint32_t ǰֵ -* ע: +* 函数名称: TIMR_GetCurValue() +* 功能说明: 获取当前计数值 +* 输 入: TIMR_TypeDef * TIMRx 指定要被设置的定时器，可取值包括TIMR0、TIMR1、TIMR2、TIMR3、TIMR4、TIMR5 +* 输 出: uint32_t 当前计数值 +* 注意事项: 无 ******************************************************************************************************************************************/ uint32_t TIMR_GetCurValue(TIMR_TypeDef * TIMRx) { @@ -231,11 +231,11 @@ uint32_t TIMR_GetCurValue(TIMR_TypeDef * TIMRx) } /****************************************************************************************************************************************** -* : TIMR_INTEn() -* ˵: ʹж -* : TIMR_TypeDef * TIMRx ָҪõĶʱȡֵTIMR0TIMR1TIMR2TIMR3TIMR4TIMR5 -* : -* ע: +* 函数名称: TIMR_INTEn() +* 功能说明: 使能中断 +* 输 入: TIMR_TypeDef * TIMRx 指定要被设置的定时器，可取值包括TIMR0、TIMR1、TIMR2、TIMR3、TIMR4、TIMR5 +* 输 出: 无 +* 注意事项: 无 ******************************************************************************************************************************************/ void TIMR_INTEn(TIMR_TypeDef * TIMRx) { @@ -274,11 +274,11 @@ void TIMR_INTEn(TIMR_TypeDef * TIMRx) } /****************************************************************************************************************************************** -* : TIMR_INTDis() -* ˵: ж -* : TIMR_TypeDef * TIMRx ָҪõĶʱȡֵTIMR0TIMR1TIMR2TIMR3TIMR4TIMR5 -* : -* ע: +* 函数名称: TIMR_INTDis() +* 功能说明: 禁能中断 +* 输 入: TIMR_TypeDef * TIMRx 指定要被设置的定时器，可取值包括TIMR0、TIMR1、TIMR2、TIMR3、TIMR4、TIMR5 +* 输 出: 无 +* 注意事项: 无 ******************************************************************************************************************************************/ void TIMR_INTDis(TIMR_TypeDef * TIMRx) { @@ -311,11 +311,11 @@ void TIMR_INTDis(TIMR_TypeDef * TIMRx) } /****************************************************************************************************************************************** -* : TIMR_INTClr() -* ˵: жϱ־ -* : TIMR_TypeDef * TIMRx ָҪõĶʱȡֵTIMR0TIMR1TIMR2TIMR3TIMR4TIMR5 -* : -* ע: +* 函数名称: TIMR_INTClr() +* 功能说明: 清除中断标志 +* 输 入: TIMR_TypeDef * TIMRx 指定要被设置的定时器，可取值包括TIMR0、TIMR1、TIMR2、TIMR3、TIMR4、TIMR5 +* 输 出: 无 +* 注意事项: 无 ******************************************************************************************************************************************/ void TIMR_INTClr(TIMR_TypeDef * TIMRx) { @@ -348,11 +348,11 @@ void TIMR_INTClr(TIMR_TypeDef * TIMRx) } /****************************************************************************************************************************************** -* : TIMR_INTStat() -* ˵: ȡж״̬ -* : TIMR_TypeDef * TIMRx ָҪõĶʱȡֵTIMR0TIMR1TIMR2TIMR3TIMR4TIMR5 -* : uint32_t 0 TIMRxδж 1 TIMRxж -* ע: +* 函数名称: TIMR_INTStat() +* 功能说明: 获取中断状态 +* 输 入: TIMR_TypeDef * TIMRx 指定要被设置的定时器，可取值包括TIMR0、TIMR1、TIMR2、TIMR3、TIMR4、TIMR5 +* 输 出: uint32_t 0 TIMRx未产生中断 1 TIMRx产生了中断 +* 注意事项: 无 ******************************************************************************************************************************************/ uint32_t TIMR_INTStat(TIMR_TypeDef * TIMRx) { @@ -382,32 +382,32 @@ uint32_t TIMR_INTStat(TIMR_TypeDef * TIMRx) /****************************************************************************************************************************************** -* : Pulse_Init() -* ˵: ܳʼ -* : uint32_t pulse PULSE_LOW PULSE_HIGH -* uint32_t int_en Ƿʹж -* : -* ע: +* 函数名称: Pulse_Init() +* 功能说明: 脉宽测量功能初始化 +* 输 入: uint32_t pulse PULSE_LOW 测量低脉冲宽度 PULSE_HIGH 测量高脉冲宽度 +* uint32_t int_en 是否使能脉冲测量完成中断 +* 输 出: 无 +* 注意事项: 无 ******************************************************************************************************************************************/ void Pulse_Init(uint32_t pulse, uint32_t int_en) { SYS->CLKEN |= (0x01 << SYS_CLKEN_TIMR_Pos); - TIMRG->PCTRL = (0 << TIMRG_PCTRL_CLKSRC_Pos) | // ϵͳʱΪʱԴ + TIMRG->PCTRL = (0 << TIMRG_PCTRL_CLKSRC_Pos) | // 系统时钟作为时钟源 (pulse << TIMRG_PCTRL_HIGH_Pos) | (0 << TIMRG_PCTRL_EN_Pos); - TIMRG->IE |= (1 << TIMRG_IE_PULSE_Pos); //ʹܲܲѯжϱ־ + TIMRG->IE |= (1 << TIMRG_IE_PULSE_Pos); //使能才能查询中断标志 if(int_en) NVIC_EnableIRQ(PULSE_IRQn); } /****************************************************************************************************************************************** -* : Pulse_Start() -* ˵: Զرղ -* : -* : -* ע: +* 函数名称: Pulse_Start() +* 功能说明: 脉宽测量功能启动，测量到脉宽后会自动关闭测量功能 +* 输 入: 无 +* 输 出: 无 +* 注意事项: 无 ******************************************************************************************************************************************/ void Pulse_Start(void) { @@ -415,17 +415,17 @@ void Pulse_Start(void) } /****************************************************************************************************************************************** -* : Pulse_Done() -* ˵: Ƿ -* : -* : uint32_t 1 0 δ -* ע: +* 函数名称: Pulse_Done() +* 功能说明: 脉宽测量是否完成 +* 输 入: 无 +* 输 出: uint32_t 1 测量已完成 0 测量未完成 +* 注意事项: 无 ******************************************************************************************************************************************/ uint32_t Pulse_Done(void) { if(TIMRG->IF & TIMRG_IF_PULSE_Msk) { - TIMRG->IF = TIMRG_IF_PULSE_Msk; // жϱ־ + TIMRG->IF = TIMRG_IF_PULSE_Msk; // 清除中断标志 return 1; } diff --git a/bsp/swm320/libraries/SWM320_StdPeriph_Driver/SWM320_timr.h b/bsp/swm320/libraries/SWM320_StdPeriph_Driver/SWM320_timr.h index bd1aa2618d6a3b893be9994401bbd0fb4fba9670..5cfdce204d437a5ca060540c993b773adf99ce11 100644 --- a/bsp/swm320/libraries/SWM320_StdPeriph_Driver/SWM320_timr.h +++ b/bsp/swm320/libraries/SWM320_StdPeriph_Driver/SWM320_timr.h @@ -4,20 +4,20 @@ #define TIMR_MODE_TIMER 0 #define TIMR_MODE_COUNTER 1 -void TIMR_Init(TIMR_TypeDef * TIMRx, uint32_t mode, uint32_t period, uint32_t int_en); //ʱ/ʼ -void TIMR_Start(TIMR_TypeDef * TIMRx); //ʱӳʼֵʼʱ/ -void TIMR_Stop(TIMR_TypeDef * TIMRx); //ֹͣʱ -void TIMR_Halt(TIMR_TypeDef * TIMRx); //ͣʱֲֵ -void TIMR_Resume(TIMR_TypeDef * TIMRx); //ָʱͣ - -void TIMR_SetPeriod(TIMR_TypeDef * TIMRx, uint32_t period); //öʱ/ -uint32_t TIMR_GetPeriod(TIMR_TypeDef * TIMRx); //ȡʱ/ -uint32_t TIMR_GetCurValue(TIMR_TypeDef * TIMRx); //ȡǰֵ - -void TIMR_INTEn(TIMR_TypeDef * TIMRx); //ʹж -void TIMR_INTDis(TIMR_TypeDef * TIMRx); //ж -void TIMR_INTClr(TIMR_TypeDef * TIMRx); //жϱ־ -uint32_t TIMR_INTStat(TIMR_TypeDef * TIMRx); //ȡж״̬ +void TIMR_Init(TIMR_TypeDef * TIMRx, uint32_t mode, uint32_t period, uint32_t int_en); //定时器/计数器初始化 +void TIMR_Start(TIMR_TypeDef * TIMRx); //启动定时器，从初始值开始计时/计数 +void TIMR_Stop(TIMR_TypeDef * TIMRx); //停止定时器 +void TIMR_Halt(TIMR_TypeDef * TIMRx); //暂停定时器，计数值保持不变 +void TIMR_Resume(TIMR_TypeDef * TIMRx); //恢复定时器，从暂停处继续计数 + +void TIMR_SetPeriod(TIMR_TypeDef * TIMRx, uint32_t period); //设置定时/计数周期 +uint32_t TIMR_GetPeriod(TIMR_TypeDef * TIMRx); //获取定时/计数周期 +uint32_t TIMR_GetCurValue(TIMR_TypeDef * TIMRx); //获取当前计数值 + +void TIMR_INTEn(TIMR_TypeDef * TIMRx); //使能中断 +void TIMR_INTDis(TIMR_TypeDef * TIMRx); //禁能中断 +void TIMR_INTClr(TIMR_TypeDef * TIMRx); //清除中断标志 +uint32_t TIMR_INTStat(TIMR_TypeDef * TIMRx); //获取中断状态 diff --git a/bsp/swm320/libraries/SWM320_StdPeriph_Driver/SWM320_uart.c b/bsp/swm320/libraries/SWM320_StdPeriph_Driver/SWM320_uart.c index 6b3f046c75c246f70690a8694516370e2c6e4687..73f219f7aae41c86b4a9793e2106c8e7d4580e0b 100644 --- a/bsp/swm320/libraries/SWM320_StdPeriph_Driver/SWM320_uart.c +++ b/bsp/swm320/libraries/SWM320_StdPeriph_Driver/SWM320_uart.c @@ -1,10 +1,10 @@ /****************************************************************************************************************************************** -* ļ: SWM320_uart.c -* ˵: SWM320ƬUARTڹ -* ֧: http://www.synwit.com.cn/e/tool/gbook/?bid=1 -* ע: ûбдLINصĺ -* 汾: V1.1.0 20171025 -* ¼: +* 文件名称: SWM320_uart.c +* 功能说明: SWM320单片机的UART串口功能驱动库 +* 技术支持: http://www.synwit.com.cn/e/tool/gbook/?bid=1 +* 注意事项: 没有编写LIN功能相关的函数 +* 版本日期: V1.1.0 2017年10月25日 +* 升级记录: * * ******************************************************************************************************************************************* @@ -23,12 +23,12 @@ /****************************************************************************************************************************************** -* : UART_Init() -* ˵: UARTڳʼ -* : UART_TypeDef * UARTx ָҪõUARTڣЧֵUART0UART1UART2UART3 -* UART_InitStructure * initStruct UART趨ֵĽṹ -* : -* ע: +* 函数名称: UART_Init() +* 功能说明: UART串口初始化 +* 输 入: UART_TypeDef * UARTx 指定要被设置的UART串口，有效值包括UART0、UART1、UART2、UART3 +* UART_InitStructure * initStruct 包含UART串口相关设定值的结构体 +* 输 出: 无 +* 注意事项: 无 ******************************************************************************************************************************************/ void UART_Init(UART_TypeDef * UARTx, UART_InitStructure * initStruct) { @@ -51,7 +51,7 @@ void UART_Init(UART_TypeDef * UARTx, UART_InitStructure * initStruct) break; } - UART_Close(UARTx); //һЩؼĴֻڴڹرʱ + UART_Close(UARTx); //一些关键寄存器只能在串口关闭时设置 UARTx->CTRL |= (0x01 << UART_CTRL_BAUDEN_Pos); UARTx->BAUD &= ~UART_BAUD_BAUD_Msk; @@ -62,10 +62,10 @@ void UART_Init(UART_TypeDef * UARTx, UART_InitStructure * initStruct) (initStruct->Parity << UART_CTRL_PARITY_Pos) | (initStruct->StopBits << UART_CTRL_STOP2b_Pos); - /* SWM320У RXLVL >= RXTHR ʱжϣRXTHRΪ0Ļδյʱͻһֱжϣ - оƬУ RXLVL > RXTHR ʱжϣΪSWM320RXTHRΪ0⣬ͳһ⺯APIｫRXTHRֵһ + /* 在SWM320中，当 RXLVL >= RXTHR 时触发中断，如果RXTHR设置为0的话，在未接收到数据时就会一直触发中断； + 其他芯片中，当 RXLVL > RXTHR 时触发中断，为解决SWM320中RXTHR不能为0的问题，并统一库函数API，这里将RXTHR设置值加一 */ - switch((uint32_t)UARTx) // λ NVIC ĴֶĴ RXTHR ʱᵼһֱ ISR + switch((uint32_t)UARTx) // 软件复位不能清零 NVIC 寄存器，若不手动清除，下面的代码清零 RXTHR 时会导致一直进入 ISR { case ((uint32_t)UART0): NVIC_DisableIRQ(UART0_IRQn); break; case ((uint32_t)UART1): NVIC_DisableIRQ(UART1_IRQn); break; @@ -133,11 +133,11 @@ void UART_Init(UART_TypeDef * UARTx, UART_InitStructure * initStruct) } /****************************************************************************************************************************************** -* : UART_Open() -* ˵: UARTڴ -* : UART_TypeDef * UARTx ָҪõUARTڣЧֵUART0UART1UART2UART3 -* : -* ע: +* 函数名称: UART_Open() +* 功能说明: UART串口打开 +* 输 入: UART_TypeDef * UARTx 指定要被设置的UART串口，有效值包括UART0、UART1、UART2、UART3 +* 输 出: 无 +* 注意事项: 无 ******************************************************************************************************************************************/ void UART_Open(UART_TypeDef * UARTx) { @@ -145,11 +145,11 @@ void UART_Open(UART_TypeDef * UARTx) } /****************************************************************************************************************************************** -* : UART_Close() -* ˵: UARTڹر -* : UART_TypeDef * UARTx ָҪõUARTڣЧֵUART0UART1UART2UART3 -* : -* ע: +* 函数名称: UART_Close() +* 功能说明: UART串口关闭 +* 输 入: UART_TypeDef * UARTx 指定要被设置的UART串口，有效值包括UART0、UART1、UART2、UART3 +* 输 出: 无 +* 注意事项: 无 ******************************************************************************************************************************************/ void UART_Close(UART_TypeDef * UARTx) { @@ -157,12 +157,12 @@ void UART_Close(UART_TypeDef * UARTx) } /****************************************************************************************************************************************** -* : UART_WriteByte() -* ˵: һֽ -* : UART_TypeDef * UARTx ָҪõUARTڣȡֵUART0UART1UART2UART3UART4 -* uint32_t data Ҫ͵ֽ -* : -* ע: +* 函数名称: UART_WriteByte() +* 功能说明: 发送一个字节数据 +* 输 入: UART_TypeDef * UARTx 指定要被设置的UART串口，可取值包括UART0、UART1、UART2、UART3、UART4 +* uint32_t data 要发送的字节 +* 输 出: 无 +* 注意事项: 无 ******************************************************************************************************************************************/ void UART_WriteByte(UART_TypeDef * UARTx, uint32_t data) { @@ -170,12 +170,12 @@ void UART_WriteByte(UART_TypeDef * UARTx, uint32_t data) } /****************************************************************************************************************************************** -* : UART_ReadByte() -* ˵: ȡһֽݣָǷValid -* : UART_TypeDef * UARTx ָҪõUARTڣȡֵUART0UART1UART2UART3UART4 -* uint32_t * data յ -* : uint32_t 0 ޴ UART_ERR_PARITY żУ -* ע: +* 函数名称: UART_ReadByte() +* 功能说明: 读取一个字节数据，并指出数据是否Valid +* 输 入: UART_TypeDef * UARTx 指定要被设置的UART串口，可取值包括UART0、UART1、UART2、UART3、UART4 +* uint32_t * data 接收到的数据 +* 输 出: uint32_t 0 无错误 UART_ERR_PARITY 奇偶校验错误 +* 注意事项: 无 ******************************************************************************************************************************************/ uint32_t UART_ReadByte(UART_TypeDef * UARTx, uint32_t * data) { @@ -189,11 +189,11 @@ uint32_t UART_ReadByte(UART_TypeDef * UARTx, uint32_t * data) } /****************************************************************************************************************************************** -* : UART_IsTXBusy() -* ˵: UARTǷڷ -* : UART_TypeDef * UARTx ָҪõUARTڣЧֵUART0UART1UART2UART3 -* : uint32_t 1 UARTڷ 0 ѷ -* ע: +* 函数名称: UART_IsTXBusy() +* 功能说明: UART是否正在发送数据 +* 输 入: UART_TypeDef * UARTx 指定要被设置的UART串口，有效值包括UART0、UART1、UART2、UART3 +* 输 出: uint32_t 1 UART正在发送数据 0 数据已发完 +* 注意事项: 无 ******************************************************************************************************************************************/ uint32_t UART_IsTXBusy(UART_TypeDef * UARTx) { @@ -201,11 +201,11 @@ uint32_t UART_IsTXBusy(UART_TypeDef * UARTx) } /****************************************************************************************************************************************** -* : UART_IsRXFIFOEmpty() -* ˵: FIFOǷΪգ˵ݿԶȡ -* : UART_TypeDef * UARTx ָҪõUARTڣЧֵUART0UART1UART2UART3 -* : uint32_t 1 FIFO 0 FIFOǿ -* ע: +* 函数名称: UART_IsRXFIFOEmpty() +* 功能说明: 接收FIFO是否为空，如果不空则说明其中有数据可以读取 +* 输 入: UART_TypeDef * UARTx 指定要被设置的UART串口，有效值包括UART0、UART1、UART2、UART3 +* 输 出: uint32_t 1 接收FIFO空 0 接收FIFO非空 +* 注意事项: 无 ******************************************************************************************************************************************/ uint32_t UART_IsRXFIFOEmpty(UART_TypeDef * UARTx) { @@ -213,11 +213,11 @@ uint32_t UART_IsRXFIFOEmpty(UART_TypeDef * UARTx) } /****************************************************************************************************************************************** -* : UART_IsTXFIFOFull() -* ˵: FIFOǷΪԼд -* : UART_TypeDef * UARTx ָҪõUARTڣЧֵUART0UART1UART2UART3 -* : uint32_t 1 FIFO 0 FIFO -* ע: +* 函数名称: UART_IsTXFIFOFull() +* 功能说明: 发送FIFO是否为满，如果不满则可以继续向其中写入数据 +* 输 入: UART_TypeDef * UARTx 指定要被设置的UART串口，有效值包括UART0、UART1、UART2、UART3 +* 输 出: uint32_t 1 发送FIFO满 0 发送FIFO不满 +* 注意事项: 无 ******************************************************************************************************************************************/ uint32_t UART_IsTXFIFOFull(UART_TypeDef * UARTx) { @@ -225,12 +225,12 @@ uint32_t UART_IsTXFIFOFull(UART_TypeDef * UARTx) } /****************************************************************************************************************************************** -* : UART_SetBaudrate() -* ˵: ò -* : UART_TypeDef * UARTx ָҪõUARTڣЧֵUART0UART1UART2UART3 -* uint32_t baudrate ҪõIJ -* : -* ע: ҪڴڹʱIJʣʹô˺ǰȵUART_Close()رմ +* 函数名称: UART_SetBaudrate() +* 功能说明: 设置波特率 +* 输 入: UART_TypeDef * UARTx 指定要被设置的UART串口，有效值包括UART0、UART1、UART2、UART3 +* uint32_t baudrate 要设置的波特率 +* 输 出: 无 +* 注意事项: 不要在串口工作时更改波特率，使用此函数前请先调用UART_Close()关闭串口 ******************************************************************************************************************************************/ void UART_SetBaudrate(UART_TypeDef * UARTx, uint32_t baudrate) { @@ -239,11 +239,11 @@ void UART_SetBaudrate(UART_TypeDef * UARTx, uint32_t baudrate) } /****************************************************************************************************************************************** -* : UART_GetBaudrate() -* ˵: ѯ -* : UART_TypeDef * UARTx ָҪõUARTڣЧֵUART0UART1UART2UART3 -* : uint32_t ǰ -* ע: +* 函数名称: UART_GetBaudrate() +* 功能说明: 查询波特率 +* 输 入: UART_TypeDef * UARTx 指定要被设置的UART串口，有效值包括UART0、UART1、UART2、UART3 +* 输 出: uint32_t 当前波特率 +* 注意事项: 无 ******************************************************************************************************************************************/ uint32_t UART_GetBaudrate(UART_TypeDef * UARTx) { @@ -251,13 +251,13 @@ uint32_t UART_GetBaudrate(UART_TypeDef * UARTx) } /****************************************************************************************************************************************** -* : UART_CTSConfig() -* ˵: UART CTS -* : UART_TypeDef * UARTx ָҪõUARTڣЧֵUART0UART1UART2UART3 -* uint32_t enable 1 ʹCTS 0 ֹCTS -* uint32_t polarity 0 CTSΪͱʾԷ 1 CTSΪ߱ʾԷ -* : -* ע: +* 函数名称: UART_CTSConfig() +* 功能说明: UART CTS流控配置 +* 输 入: UART_TypeDef * UARTx 指定要被设置的UART串口，有效值包括UART0、UART1、UART2、UART3 +* uint32_t enable 1 使能CTS流控 0 禁止CTS流控 +* uint32_t polarity 0 CTS输入为低表示可以发送数据 1 CTS输入为高表示可以发送数据 +* 输 出: 无 +* 注意事项: 无 ******************************************************************************************************************************************/ void UART_CTSConfig(UART_TypeDef * UARTx, uint32_t enable, uint32_t polarity) { @@ -267,11 +267,11 @@ void UART_CTSConfig(UART_TypeDef * UARTx, uint32_t enable, uint32_t polarity) } /****************************************************************************************************************************************** -* : UART_CTSLineState() -* ˵: UART CTSߵǰ״̬ -* : UART_TypeDef * UARTx ָҪõUARTڣЧֵUART0UART1UART2UART3 -* : uint32_t 0 CTSߵǰΪ͵ƽ 1 CTSߵǰΪߵƽ -* ע: +* 函数名称: UART_CTSLineState() +* 功能说明: UART CTS线当前状态 +* 输 入: UART_TypeDef * UARTx 指定要被设置的UART串口，有效值包括UART0、UART1、UART2、UART3 +* 输 出: uint32_t 0 CTS线当前为低电平 1 CTS线当前为高电平 +* 注意事项: 无 ******************************************************************************************************************************************/ uint32_t UART_CTSLineState(UART_TypeDef * UARTx) { @@ -279,14 +279,14 @@ uint32_t UART_CTSLineState(UART_TypeDef * UARTx) } /****************************************************************************************************************************************** -* : UART_RTSConfig() -* ˵: UART RTS -* : UART_TypeDef * UARTx ָҪõUARTڣЧֵUART0UART1UART2UART3 -* uint32_t enable 1 ʹRTS 0 ֹRTS -* uint32_t polarity 0 RTSͱʾԽ 1 RTS߱ʾԽ -* uint32_t threshold RTSصĴֵȡֵUART_RTS_1BYTEUART_RTS_2BYTEUART_RTS_4BYTEUART_RTS_6BYTE -* : -* ע: +* 函数名称: UART_RTSConfig() +* 功能说明: UART RTS流控配置 +* 输 入: UART_TypeDef * UARTx 指定要被设置的UART串口，有效值包括UART0、UART1、UART2、UART3 +* uint32_t enable 1 使能RTS流控 0 禁止RTS流控 +* uint32_t polarity 0 RTS输出低表示可以接收数据 1 RTS输出高表示可以接收数据 +* uint32_t threshold RTS流控的触发阈值，可取值UART_RTS_1BYTE、UART_RTS_2BYTE、UART_RTS_4BYTE、UART_RTS_6BYTE +* 输 出: 无 +* 注意事项: 无 ******************************************************************************************************************************************/ void UART_RTSConfig(UART_TypeDef * UARTx, uint32_t enable, uint32_t polarity, uint32_t threshold) { @@ -297,11 +297,11 @@ void UART_RTSConfig(UART_TypeDef * UARTx, uint32_t enable, uint32_t polarity, ui } /****************************************************************************************************************************************** -* : UART_RTSLineState() -* ˵: UART RTSߵǰ״̬ -* : UART_TypeDef * UARTx ָҪõUARTڣЧֵUART0UART1UART2UART3 -* : uint32_t 0 RTSߵǰΪ͵ƽ 1 RTSߵǰΪߵƽ -* ע: +* 函数名称: UART_RTSLineState() +* 功能说明: UART RTS线当前状态 +* 输 入: UART_TypeDef * UARTx 指定要被设置的UART串口，有效值包括UART0、UART1、UART2、UART3 +* 输 出: uint32_t 0 RTS线当前为低电平 1 RTS线当前为高电平 +* 注意事项: 无 ******************************************************************************************************************************************/ uint32_t UART_RTSLineState(UART_TypeDef * UARTx) { @@ -309,13 +309,13 @@ uint32_t UART_RTSLineState(UART_TypeDef * UARTx) } /****************************************************************************************************************************************** -* : UART_LINConfig() -* ˵: UART LIN -* : UART_TypeDef * UARTx ָҪõUARTڣЧֵUART0UART1UART2UART3 -* uint32_t detectedIEn ⵽Breakжʹ -* uint32_t generatedIEn Breakжʹ -* : -* ע: +* 函数名称: UART_LINConfig() +* 功能说明: UART LIN功能配置 +* 输 入: UART_TypeDef * UARTx 指定要被设置的UART串口，有效值包括UART0、UART1、UART2、UART3 +* uint32_t detectedIEn 检测到Break中断使能 +* uint32_t generatedIEn Break发送完成中断使能 +* 输 出: 无 +* 注意事项: 无 ******************************************************************************************************************************************/ void UART_LINConfig(UART_TypeDef * UARTx, uint32_t detectedIEn, uint32_t generatedIEn) { @@ -325,11 +325,11 @@ void UART_LINConfig(UART_TypeDef * UARTx, uint32_t detectedIEn, uint32_t generat } /****************************************************************************************************************************************** -* : UART_LINGenerate() -* ˵: UART LIN/Break -* : UART_TypeDef * UARTx ָҪõUARTڣЧֵUART0UART1UART2UART3 -* : -* ע: +* 函数名称: UART_LINGenerate() +* 功能说明: UART LIN产生/发送Break +* 输 入: UART_TypeDef * UARTx 指定要被设置的UART串口，有效值包括UART0、UART1、UART2、UART3 +* 输 出: 无 +* 注意事项: 无 ******************************************************************************************************************************************/ void UART_LINGenerate(UART_TypeDef * UARTx) { @@ -337,11 +337,11 @@ void UART_LINGenerate(UART_TypeDef * UARTx) } /****************************************************************************************************************************************** -* : UART_LINIsDetected() -* ˵: UART LINǷ⵽Break -* : UART_TypeDef * UARTx ָҪõUARTڣЧֵUART0UART1UART2UART3 -* : uint32_t 1 ⵽LIN Break 0 δ⵽LIN Break -* ע: +* 函数名称: UART_LINIsDetected() +* 功能说明: UART LIN是否检测到Break +* 输 入: UART_TypeDef * UARTx 指定要被设置的UART串口，有效值包括UART0、UART1、UART2、UART3 +* 输 出: uint32_t 1 检测到LIN Break 0 未检测到LIN Break +* 注意事项: 无 ******************************************************************************************************************************************/ uint32_t UART_LINIsDetected(UART_TypeDef * UARTx) { @@ -349,11 +349,11 @@ uint32_t UART_LINIsDetected(UART_TypeDef * UARTx) } /****************************************************************************************************************************************** -* : UART_LINIsGenerated() -* ˵: UART LIN BreakǷ -* : UART_TypeDef * UARTx ָҪõUARTڣЧֵUART0UART1UART2UART3 -* : uint32_t 1 LIN Break 0 LIN Breakδ -* ע: +* 函数名称: UART_LINIsGenerated() +* 功能说明: UART LIN Break是否发送完成 +* 输 入: UART_TypeDef * UARTx 指定要被设置的UART串口，有效值包括UART0、UART1、UART2、UART3 +* 输 出: uint32_t 1 LIN Break 发送完成 0 LIN Break发送未完成 +* 注意事项: 无 ******************************************************************************************************************************************/ uint32_t UART_LINIsGenerated(UART_TypeDef * UARTx) { @@ -361,14 +361,14 @@ uint32_t UART_LINIsGenerated(UART_TypeDef * UARTx) } /****************************************************************************************************************************************** -* : UART_ABRStart() -* ˵: UART Զʼ⿪ʼ -* : UART_TypeDef * UARTx ָҪõUARTڣЧֵUART0UART1UART2UART3 -* uint32_t detectChar Զ⡢㲨ʵļַ -* 8λʱȡֵ0xFF0xFE0xF80x80ֱʾͷ뷢0xFF0xFE0xF80x80 -* 9λʱȡֵ0x1FF0x1FE0x1F80x180ֱʾͷ뷢0x1FF0x1FE0x1F80x180 -* : -* ע: ԶʼʱܿżУ +* 函数名称: UART_ABRStart() +* 功能说明: UART 自动波特率检测开始 +* 输 入: UART_TypeDef * UARTx 指定要被设置的UART串口，有效值包括UART0、UART1、UART2、UART3 +* uint32_t detectChar 用于自动检测、计算波特率的检测字符 +* 8位数据时可取值：0xFF、0xFE、0xF8、0x80，分别表示发送方必须发送0xFF、0xFE、0xF8、0x80 +* 9位数据时可取值：0x1FF、0x1FE、0x1F8、0x180，分别表示发送方必须发送0x1FF、0x1FE、0x1F8、0x180 +* 输 出: 无 +* 注意事项: 自动波特率检测时不能开启奇偶校验 ******************************************************************************************************************************************/ void UART_ABRStart(UART_TypeDef * UARTx, uint32_t detectChar) { @@ -386,11 +386,11 @@ void UART_ABRStart(UART_TypeDef * UARTx, uint32_t detectChar) } /****************************************************************************************************************************************** -* : UART_ABRIsDone() -* ˵: UART ԶǷ -* : UART_TypeDef * UARTx ָҪõUARTڣЧֵUART0UART1UART2UART3 -* : uint32_t 0 δ UART_ABR_RES_OK ɣҳɹ UART_ABR_RES_ERR ɣʧܡ -* ע: +* 函数名称: UART_ABRIsDone() +* 功能说明: UART 自动波特率是否完成 +* 输 入: UART_TypeDef * UARTx 指定要被设置的UART串口，有效值包括UART0、UART1、UART2、UART3 +* 输 出: uint32_t 0 未完成 UART_ABR_RES_OK 已完成，且成功 UART_ABR_RES_ERR 已完成，但失败、出错 +* 注意事项: 无 ******************************************************************************************************************************************/ uint32_t UART_ABRIsDone(UART_TypeDef * UARTx) { @@ -409,11 +409,11 @@ uint32_t UART_ABRIsDone(UART_TypeDef * UARTx) } /****************************************************************************************************************************************** -* : UART_INTRXThresholdEn() -* ˵: RX FIFOݸ >= RXThresholdʱ ж -* : UART_TypeDef * UARTx ָҪõUARTڣЧֵUART0UART1UART2UART3 -* : -* ע: +* 函数名称: UART_INTRXThresholdEn() +* 功能说明: 当RX FIFO中数据个数 >= RXThreshold时 触发中断 +* 输 入: UART_TypeDef * UARTx 指定要被设置的UART串口，有效值包括UART0、UART1、UART2、UART3 +* 输 出: 无 +* 注意事项: 无 ******************************************************************************************************************************************/ void UART_INTRXThresholdEn(UART_TypeDef * UARTx) { @@ -421,11 +421,11 @@ void UART_INTRXThresholdEn(UART_TypeDef * UARTx) } /****************************************************************************************************************************************** -* : UART_INTRXThresholdDis() -* ˵: RX FIFOݸ >= RXThresholdʱ ж -* : UART_TypeDef * UARTx ָҪõUARTڣЧֵUART0UART1UART2UART3 -* : -* ע: +* 函数名称: UART_INTRXThresholdDis() +* 功能说明: 当RX FIFO中数据个数 >= RXThreshold时 不触发中断 +* 输 入: UART_TypeDef * UARTx 指定要被设置的UART串口，有效值包括UART0、UART1、UART2、UART3 +* 输 出: 无 +* 注意事项: 无 ******************************************************************************************************************************************/ void UART_INTRXThresholdDis(UART_TypeDef * UARTx) { @@ -433,11 +433,11 @@ void UART_INTRXThresholdDis(UART_TypeDef * UARTx) } /****************************************************************************************************************************************** -* : UART_INTRXThresholdStat() -* ˵: ǷRX FIFOݸ >= RXThreshold -* : UART_TypeDef * UARTx ָҪõUARTڣЧֵUART0UART1UART2UART3 -* : uint32_t 1 RX FIFOݸ >= RXThreshold 0 RX FIFOݸ < RXThreshold -* ע: RXIF = RXTHRF & RXIE +* 函数名称: UART_INTRXThresholdStat() +* 功能说明: 是否RX FIFO中数据个数 >= RXThreshold +* 输 入: UART_TypeDef * UARTx 指定要被设置的UART串口，有效值包括UART0、UART1、UART2、UART3 +* 输 出: uint32_t 1 RX FIFO中数据个数 >= RXThreshold 0 RX FIFO中数据个数 < RXThreshold +* 注意事项: RXIF = RXTHRF & RXIE ******************************************************************************************************************************************/ uint32_t UART_INTRXThresholdStat(UART_TypeDef * UARTx) { @@ -445,11 +445,11 @@ uint32_t UART_INTRXThresholdStat(UART_TypeDef * UARTx) } /****************************************************************************************************************************************** -* : UART_INTTXThresholdEn() -* ˵: TX FIFOݸ <= TXThresholdʱ ж -* : UART_TypeDef * UARTx ָҪõUARTڣЧֵUART0UART1UART2UART3 -* : -* ע: +* 函数名称: UART_INTTXThresholdEn() +* 功能说明: 当TX FIFO中数据个数 <= TXThreshold时 触发中断 +* 输 入: UART_TypeDef * UARTx 指定要被设置的UART串口，有效值包括UART0、UART1、UART2、UART3 +* 输 出: 无 +* 注意事项: 无 ******************************************************************************************************************************************/ void UART_INTTXThresholdEn(UART_TypeDef * UARTx) { @@ -457,11 +457,11 @@ void UART_INTTXThresholdEn(UART_TypeDef * UARTx) } /****************************************************************************************************************************************** -* : UART_INTTXThresholdDis() -* ˵: TX FIFOݸ <= TXThresholdʱ ж -* : UART_TypeDef * UARTx ָҪõUARTڣЧֵUART0UART1UART2UART3 -* : -* ע: +* 函数名称: UART_INTTXThresholdDis() +* 功能说明: 当TX FIFO中数据个数 <= TXThreshold时 不触发中断 +* 输 入: UART_TypeDef * UARTx 指定要被设置的UART串口，有效值包括UART0、UART1、UART2、UART3 +* 输 出: 无 +* 注意事项: 无 ******************************************************************************************************************************************/ void UART_INTTXThresholdDis(UART_TypeDef * UARTx) { @@ -469,11 +469,11 @@ void UART_INTTXThresholdDis(UART_TypeDef * UARTx) } /****************************************************************************************************************************************** -* : UART_INTTXThresholdStat() -* ˵: ǷTX FIFOݸ <= TXThreshold -* : UART_TypeDef * UARTx ָҪõUARTڣЧֵUART0UART1UART2UART3 -* : uint32_t 1 TX FIFOݸ <= TXThreshold 0 TX FIFOݸ > TXThreshold -* ע: TXIF = TXTHRF & TXIE +* 函数名称: UART_INTTXThresholdStat() +* 功能说明: 是否TX FIFO中数据个数 <= TXThreshold +* 输 入: UART_TypeDef * UARTx 指定要被设置的UART串口，有效值包括UART0、UART1、UART2、UART3 +* 输 出: uint32_t 1 TX FIFO中数据个数 <= TXThreshold 0 TX FIFO中数据个数 > TXThreshold +* 注意事项: TXIF = TXTHRF & TXIE ******************************************************************************************************************************************/ uint32_t UART_INTTXThresholdStat(UART_TypeDef * UARTx) { @@ -481,11 +481,11 @@ uint32_t UART_INTTXThresholdStat(UART_TypeDef * UARTx) } /****************************************************************************************************************************************** -* : UART_INTTimeoutEn() -* ˵: շʱʱ ж -* : UART_TypeDef * UARTx ָҪõUARTڣЧֵUART0UART1UART2UART3 -* : -* ע: +* 函数名称: UART_INTTimeoutEn() +* 功能说明: 接收发生超时时 触发中断 +* 输 入: UART_TypeDef * UARTx 指定要被设置的UART串口，有效值包括UART0、UART1、UART2、UART3 +* 输 出: 无 +* 注意事项: 无 ******************************************************************************************************************************************/ void UART_INTTimeoutEn(UART_TypeDef * UARTx) { @@ -493,11 +493,11 @@ void UART_INTTimeoutEn(UART_TypeDef * UARTx) } /****************************************************************************************************************************************** -* : UART_INTTimeoutDis() -* ˵: շʱʱ ж -* : UART_TypeDef * UARTx ָҪõUARTڣЧֵUART0UART1UART2UART3 -* : -* ע: +* 函数名称: UART_INTTimeoutDis() +* 功能说明: 接收发生超时时 不触发中断 +* 输 入: UART_TypeDef * UARTx 指定要被设置的UART串口，有效值包括UART0、UART1、UART2、UART3 +* 输 出: 无 +* 注意事项: 无 ******************************************************************************************************************************************/ void UART_INTTimeoutDis(UART_TypeDef * UARTx) { @@ -505,11 +505,11 @@ void UART_INTTimeoutDis(UART_TypeDef * UARTx) } /****************************************************************************************************************************************** -* : UART_INTTimeoutStat() -* ˵: Ƿ˽ճʱ TimeoutTime/(Baudrate/10) ûRXϽյʱж -* : UART_TypeDef * UARTx ָҪõUARTڣЧֵUART0UART1UART2UART3 -* : uint32_t 1 ˽ճʱ 0 δճʱ -* ע: +* 函数名称: UART_INTTimeoutStat() +* 功能说明: 是否发生了接收超时，即超过 TimeoutTime/(Baudrate/10) 秒没有在RX线上接收到数据时触发中断 +* 输 入: UART_TypeDef * UARTx 指定要被设置的UART串口，有效值包括UART0、UART1、UART2、UART3 +* 输 出: uint32_t 1 发生了接收超时 0 未发生接收超时 +* 注意事项: 无 ******************************************************************************************************************************************/ uint32_t UART_INTTimeoutStat(UART_TypeDef * UARTx) { @@ -517,11 +517,11 @@ uint32_t UART_INTTimeoutStat(UART_TypeDef * UARTx) } /****************************************************************************************************************************************** -* : UART_INTTXDoneEn() -* ˵: FIFOҷλĴжʹ -* : UART_TypeDef * UARTx ָҪõUARTڣЧֵUART0UART1UART2UART3 -* : -* ע: +* 函数名称: UART_INTTXDoneEn() +* 功能说明: 发送FIFO空且发送移位寄存器空中断使能 +* 输 入: UART_TypeDef * UARTx 指定要被设置的UART串口，有效值包括UART0、UART1、UART2、UART3 +* 输 出: 无 +* 注意事项: 无 ******************************************************************************************************************************************/ void UART_INTTXDoneEn(UART_TypeDef * UARTx) { @@ -529,11 +529,11 @@ void UART_INTTXDoneEn(UART_TypeDef * UARTx) } /****************************************************************************************************************************************** -* : UART_INTTXDoneDis() -* ˵: FIFOҷλĴжϽֹ -* : UART_TypeDef * UARTx ָҪõUARTڣЧֵUART0UART1UART2UART3 -* : -* ע: +* 函数名称: UART_INTTXDoneDis() +* 功能说明: 发送FIFO空且发送移位寄存器空中断禁止 +* 输 入: UART_TypeDef * UARTx 指定要被设置的UART串口，有效值包括UART0、UART1、UART2、UART3 +* 输 出: 无 +* 注意事项: 无 ******************************************************************************************************************************************/ void UART_INTTXDoneDis(UART_TypeDef * UARTx) { @@ -541,11 +541,11 @@ void UART_INTTXDoneDis(UART_TypeDef * UARTx) } /****************************************************************************************************************************************** -* : UART_INTTXDoneStat() -* ˵: FIFOҷλĴж״̬ -* : UART_TypeDef * UARTx ָҪõUARTڣЧֵUART0UART1UART2UART3 -* : uint32_t 1 FIFOҷλĴ 0 FIFOλĴδ -* ע: +* 函数名称: UART_INTTXDoneStat() +* 功能说明: 发送FIFO空且发送移位寄存器空中断状态 +* 输 入: UART_TypeDef * UARTx 指定要被设置的UART串口，有效值包括UART0、UART1、UART2、UART3 +* 输 出: uint32_t 1 发送FIFO空且发送移位寄存器空 0 发送FIFO或发送移位寄存器未空 +* 注意事项: 无 ******************************************************************************************************************************************/ uint32_t UART_INTTXDoneStat(UART_TypeDef * UARTx) { diff --git a/bsp/swm320/libraries/SWM320_StdPeriph_Driver/SWM320_uart.h b/bsp/swm320/libraries/SWM320_StdPeriph_Driver/SWM320_uart.h index 1611744cb7a3116ceda08c0e28a614fb8cc13ced..bad63f420cf036a9bf919e3021acd75c33323dfb 100644 --- a/bsp/swm320/libraries/SWM320_StdPeriph_Driver/SWM320_uart.h +++ b/bsp/swm320/libraries/SWM320_StdPeriph_Driver/SWM320_uart.h @@ -4,20 +4,20 @@ typedef struct { uint32_t Baudrate; - uint8_t DataBits; //λλȡֵUART_DATA_8BITUART_DATA_9BIT + uint8_t DataBits; //数据位位数，可取值UART_DATA_8BIT、UART_DATA_9BIT - uint8_t Parity; //żУλȡֵUART_PARITY_NONEUART_PARITY_ODDUART_PARITY_EVENUART_PARITY_ONEUART_PARITY_ZERO + uint8_t Parity; //奇偶校验位，可取值UART_PARITY_NONE、UART_PARITY_ODD、UART_PARITY_EVEN、UART_PARITY_ONE、UART_PARITY_ZERO - uint8_t StopBits; //ֹͣλλȡֵUART_STOP_1BITUART_STOP_2BIT + uint8_t StopBits; //停止位位数，可取值UART_STOP_1BIT、UART_STOP_2BIT - uint8_t RXThreshold; //ȡֵ0--7 - uint8_t RXThresholdIEn; //RX FIFOݸ > RXThresholdʱж + uint8_t RXThreshold; //取值0--7 + uint8_t RXThresholdIEn; //当RX FIFO中数据个数 > RXThreshold时触发中断 - uint8_t TXThreshold; //ȡֵ0--7 - uint8_t TXThresholdIEn; //TX FIFOݸ <= TXThresholdʱж + uint8_t TXThreshold; //取值0--7 + uint8_t TXThresholdIEn; //当TX FIFO中数据个数 <= TXThreshold时触发中断 - uint8_t TimeoutTime; //ʱʱ = TimeoutTime/(Baudrate/10) - uint8_t TimeoutIEn; //ʱжϣRX FIFOǿգҳ TimeoutTime/(Baudrate/10) ûRXϽյʱж + uint8_t TimeoutTime; //超时时长 = TimeoutTime/(Baudrate/10) 秒 + uint8_t TimeoutIEn; //超时中断，RX FIFO非空，且超过 TimeoutTime/(Baudrate/10) 秒没有在RX线上接收到数据时触发中断 } UART_InitStructure; @@ -46,20 +46,20 @@ typedef struct { #define UART_ERR_NOISE 3 -void UART_Init(UART_TypeDef * UARTx, UART_InitStructure * initStruct); //UARTڳʼ +void UART_Init(UART_TypeDef * UARTx, UART_InitStructure * initStruct); //UART串口初始化 void UART_Open(UART_TypeDef * UARTx); void UART_Close(UART_TypeDef * UARTx); -void UART_WriteByte(UART_TypeDef * UARTx, uint32_t data); //һֽ -uint32_t UART_ReadByte(UART_TypeDef * UARTx, uint32_t * data); //ȡһֽݣָǷValid +void UART_WriteByte(UART_TypeDef * UARTx, uint32_t data); //发送一个字节数据 +uint32_t UART_ReadByte(UART_TypeDef * UARTx, uint32_t * data); //读取一个字节数据，并指出数据是否Valid uint32_t UART_IsTXBusy(UART_TypeDef * UARTx); -uint32_t UART_IsRXFIFOEmpty(UART_TypeDef * UARTx); //FIFOǷգԼUART_ReadByte() -uint32_t UART_IsTXFIFOFull(UART_TypeDef * UARTx); //FIFOǷԼUART_WriteByte() +uint32_t UART_IsRXFIFOEmpty(UART_TypeDef * UARTx); //接收FIFO是否空，如果不空则可以继续UART_ReadByte() +uint32_t UART_IsTXFIFOFull(UART_TypeDef * UARTx); //发送FIFO是否满，如果不满则可以继续UART_WriteByte() -void UART_SetBaudrate(UART_TypeDef * UARTx, uint32_t baudrate); //ò -uint32_t UART_GetBaudrate(UART_TypeDef * UARTx); //ȡǰʹõIJ +void UART_SetBaudrate(UART_TypeDef * UARTx, uint32_t baudrate); //设置波特率 +uint32_t UART_GetBaudrate(UART_TypeDef * UARTx); //获取当前使用的波特率 void UART_CTSConfig(UART_TypeDef * UARTx, uint32_t enable, uint32_t polarity); uint32_t UART_CTSLineState(UART_TypeDef * UARTx); diff --git a/bsp/swm320/libraries/SWM320_StdPeriph_Driver/SWM320_wdt.c b/bsp/swm320/libraries/SWM320_StdPeriph_Driver/SWM320_wdt.c index 762e79b3ae30815d41a902abe1790cef01c995d5..59a358b69e80527da7670e28dcd9b613bd6d5be7 100644 --- a/bsp/swm320/libraries/SWM320_StdPeriph_Driver/SWM320_wdt.c +++ b/bsp/swm320/libraries/SWM320_StdPeriph_Driver/SWM320_wdt.c @@ -1,10 +1,10 @@ /****************************************************************************************************************************************** -* ļ: SWM320_wdt.c -* ˵: SWM320ƬWDTŹ -* ֧: http://www.synwit.com.cn/e/tool/gbook/?bid=1 -* ע: -* 汾: V1.1.0 20171025 -* ¼: +* 文件名称: SWM320_wdt.c +* 功能说明: SWM320单片机的WDT看门狗功能驱动库 +* 技术支持: http://www.synwit.com.cn/e/tool/gbook/?bid=1 +* 注意事项: +* 版本日期: V1.1.0 2017年10月25日 +* 升级记录: * * ******************************************************************************************************************************************* @@ -23,19 +23,19 @@ /****************************************************************************************************************************************** -* : WDT_Init() -* ˵: WDTŹʼ -* : WDT_TypeDef * WDTx ָҪõĿŹЧֵWDT -* uint32_t peroid ȡֵ0--4294967295λΪƬϵͳʱ -* uint32_t mode WDT_MODE_RESET ʱλ WDT_MODE_INTERRUPT ʱж -* : -* ע: λʹʱжϲãΪڽʱоƬֱӸλˣ޷Ӧж +* 函数名称: WDT_Init() +* 功能说明: WDT看门狗初始化 +* 输 入: WDT_TypeDef * WDTx 指定要被设置的看门狗，有效值包括WDT +* uint32_t peroid 取值0--4294967295，单位为单片机系统时钟周期 +* uint32_t mode WDT_MODE_RESET 超时产生复位 WDT_MODE_INTERRUPT 超时产生中断 +* 输 出: 无 +* 注意事项: 复位使能时中断不起作用，因为计数周期结束时芯片直接复位了，无法响应中断 ******************************************************************************************************************************************/ void WDT_Init(WDT_TypeDef * WDTx, uint32_t peroid, uint32_t mode) { SYS->CLKEN |= (0x01 << SYS_CLKEN_WDT_Pos); - WDT_Stop(WDTx); //ǰȹر + WDT_Stop(WDTx); //设置前先关闭 WDTx->LOAD = peroid; @@ -54,11 +54,11 @@ void WDT_Init(WDT_TypeDef * WDTx, uint32_t peroid, uint32_t mode) } /****************************************************************************************************************************************** -* : WDT_Start() -* ˵: ָWDTʼʱ -* : WDT_TypeDef * WDTx ָҪõĿŹЧֵWDT -* : -* ע: +* 函数名称: WDT_Start() +* 功能说明: 启动指定WDT，开始倒计时 +* 输 入: WDT_TypeDef * WDTx 指定要被设置的看门狗，有效值包括WDT +* 输 出: 无 +* 注意事项: 无 ******************************************************************************************************************************************/ void WDT_Start(WDT_TypeDef * WDTx) { @@ -66,11 +66,11 @@ void WDT_Start(WDT_TypeDef * WDTx) } /****************************************************************************************************************************************** -* : WDT_Stop() -* ˵: رָWDTֹͣʱ -* : WDT_TypeDef * WDTx ָҪõĿŹЧֵWDT -* : -* ע: +* 函数名称: WDT_Stop() +* 功能说明: 关闭指定WDT，停止倒计时 +* 输 入: WDT_TypeDef * WDTx 指定要被设置的看门狗，有效值包括WDT +* 输 出: 无 +* 注意事项: 无 ******************************************************************************************************************************************/ void WDT_Stop(WDT_TypeDef * WDTx) { @@ -78,11 +78,11 @@ void WDT_Stop(WDT_TypeDef * WDTx) } /****************************************************************************************************************************************** -* : WDT_Feed() -* ˵: ι´װֵʼʱ -* : WDT_TypeDef * WDTx ָҪõĿŹЧֵWDT -* : -* ע: +* 函数名称: WDT_Feed() +* 功能说明: 喂狗，重新从装载值开始倒计时 +* 输 入: WDT_TypeDef * WDTx 指定要被设置的看门狗，有效值包括WDT +* 输 出: 无 +* 注意事项: 无 ******************************************************************************************************************************************/ void WDT_Feed(WDT_TypeDef * WDTx) { @@ -90,11 +90,11 @@ void WDT_Feed(WDT_TypeDef * WDTx) } /****************************************************************************************************************************************** -* : WDT_GetValue() -* ˵: ȡָŹʱĵǰʱֵ -* : WDT_TypeDef * WDTx ָҪõĿŹЧֵWDT -* : int32_t Źǰֵ -* ע: +* 函数名称: WDT_GetValue() +* 功能说明: 获取指定看门狗定时器的当前倒计时值 +* 输 入: WDT_TypeDef * WDTx 指定要被设置的看门狗，有效值包括WDT +* 输 出: int32_t 看门狗当前计数值 +* 注意事项: 无 ******************************************************************************************************************************************/ int32_t WDT_GetValue(WDT_TypeDef * WDTx) { @@ -102,11 +102,11 @@ int32_t WDT_GetValue(WDT_TypeDef * WDTx) } /****************************************************************************************************************************************** -* : WDT_INTClr() -* ˵: жϱ־ -* : WDT_TypeDef * WDTx ָҪõĿŹЧֵWDT -* : -* ע: +* 函数名称: WDT_INTClr() +* 功能说明: 中断标志清除 +* 输 入: WDT_TypeDef * WDTx 指定要被设置的看门狗，有效值包括WDT +* 输 出: 无 +* 注意事项: 无 ******************************************************************************************************************************************/ void WDT_INTClr(WDT_TypeDef * WDTx) { @@ -114,11 +114,11 @@ void WDT_INTClr(WDT_TypeDef * WDTx) } /****************************************************************************************************************************************** -* : WDT_INTStat() -* ˵: ж״̬ѯ -* : WDT_TypeDef * WDTx ָҪõĿŹЧֵWDT -* : int32_t 1 ж 0 δж -* ע: +* 函数名称: WDT_INTStat() +* 功能说明: 中断状态查询 +* 输 入: WDT_TypeDef * WDTx 指定要被设置的看门狗，有效值包括WDT +* 输 出: int32_t 1 发生中断溢出 0 未发生中断溢出 +* 注意事项: 无 ******************************************************************************************************************************************/ uint32_t WDT_INTStat(WDT_TypeDef * WDTx) { diff --git a/bsp/swm320/libraries/SWM320_StdPeriph_Driver/SWM320_wdt.h b/bsp/swm320/libraries/SWM320_StdPeriph_Driver/SWM320_wdt.h index 1d056ba2968da0fe0a1ad2fdc6e887350fdb4ba7..a02a60ba87866ee5015e6c898dcb0520808ece9f 100644 --- a/bsp/swm320/libraries/SWM320_StdPeriph_Driver/SWM320_wdt.h +++ b/bsp/swm320/libraries/SWM320_StdPeriph_Driver/SWM320_wdt.h @@ -4,16 +4,16 @@ #define WDT_MODE_RESET 0 #define WDT_MODE_INTERRUPT 1 -void WDT_Init(WDT_TypeDef * WDTx, uint32_t peroid, uint32_t mode); //WDTŹʼ -void WDT_Start(WDT_TypeDef * WDTx); //ָWDTʼʱ -void WDT_Stop(WDT_TypeDef * WDTx); //رָWDTֹͣʱ +void WDT_Init(WDT_TypeDef * WDTx, uint32_t peroid, uint32_t mode); //WDT看门狗初始化 +void WDT_Start(WDT_TypeDef * WDTx); //启动指定WDT，开始倒计时 +void WDT_Stop(WDT_TypeDef * WDTx); //关闭指定WDT，停止倒计时 -void WDT_Feed(WDT_TypeDef * WDTx); //ι´װֵʼʱ +void WDT_Feed(WDT_TypeDef * WDTx); //喂狗，重新从装载值开始倒计时 -int32_t WDT_GetValue(WDT_TypeDef * WDTx); //ȡָŹʱĵǰʱֵ +int32_t WDT_GetValue(WDT_TypeDef * WDTx); //获取指定看门狗定时器的当前倒计时值 -void WDT_INTClr(WDT_TypeDef * WDTx); //жϱ־ -uint32_t WDT_INTStat(WDT_TypeDef * WDTx); //ж״̬ѯ +void WDT_INTClr(WDT_TypeDef * WDTx); //中断标志清除 +uint32_t WDT_INTStat(WDT_TypeDef * WDTx); //中断状态查询 #endif //__SWM320_WDT_H__