From 484e1f11732449a46abed3acc0dfd4a74bcca4a7 Mon Sep 17 00:00:00 2001 From: Megvii Engine Team Date: Wed, 6 Apr 2022 19:43:42 +0800 Subject: [PATCH] fix(build): fix riscv64 gcc build with > O0 GitOrigin-RevId: 9ad348049206a024492646eb6974e8f3478fc611 --- src/gopt/impl/tensor_reformat.cpp | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/gopt/impl/tensor_reformat.cpp b/src/gopt/impl/tensor_reformat.cpp index 2fb4f17c0..4972e35be 100644 --- a/src/gopt/impl/tensor_reformat.cpp +++ b/src/gopt/impl/tensor_reformat.cpp @@ -1534,12 +1534,12 @@ void EnableNchwxxPass::fill_opr_convert_fun(size_t pack_c_size) { "The origin filter is not NCHW mode"); VarNodeArray temp_inp = new_inp; //! if src is nchwxx, should RelayoutPlaceholder to nchw - if (temp_inp[0]->shape().ndim == 5) { + if (new_inp[0]->shape().ndim == 5) { auto new_src = RelayoutPlaceholder::make(new_inp[0], src_to_nchw_mode); temp_inp[0] = new_src.node(); } //! the bias is nchwxx - if (new_inp.size() > 2 && temp_inp[2]->shape().ndim == 5) { + if (new_inp.size() > 2 && new_inp[2]->shape().ndim == 5) { auto new_bias = RelayoutPlaceholder::make(new_inp[2], src_to_nchw_mode); temp_inp[2] = new_bias.node(); } -- GitLab