From a2320f78b607542ec2fb2a50a0dd50b4e19e18af Mon Sep 17 00:00:00 2001
From: supperthomas <78900636@qq.com>
Date: Tue, 10 Aug 2021 20:15:33 +0800
Subject: [PATCH] fix the RAM size

---
 .../stm32l4r9-st-sensortile-box/board/board.h | 23 +++++++++++++------
 1 file changed, 16 insertions(+), 7 deletions(-)

diff --git a/bsp/stm32/stm32l4r9-st-sensortile-box/board/board.h b/bsp/stm32/stm32l4r9-st-sensortile-box/board/board.h
index 7d85022bb4..049be64f38 100644
--- a/bsp/stm32/stm32l4r9-st-sensortile-box/board/board.h
+++ b/bsp/stm32/stm32l4r9-st-sensortile-box/board/board.h
@@ -5,8 +5,7 @@
  *
  * Change Logs:
  * Date           Author       Notes
- * 2018-11-5      SummerGift   first version
- * 2019-04-09     jhb
+ * 2021-08-09     supperthomas first version
  */
 
 #ifndef __BOARD_H__
@@ -25,12 +24,22 @@ extern "C" {
 #define STM32_FLASH_SIZE               (2048 * 1024)
 #define STM32_FLASH_END_ADDRESS        ((uint32_t)(STM32_FLASH_START_ADRESS + STM32_FLASH_SIZE))
 
-#define STM32_SRAM3_SIZE               (384)
-#define STM32_SRAM3_START              (0x20040000)
-#define STM32_SRAM3_END                (STM32_SRAM3_START + STM32_SRAM3_SIZE * 1024)
+#define STM32_SRAM1_SIZE               (640)
+#define STM32_SRAM1_START              (0x20000000)
+#define STM32_SRAM1_END                (STM32_SRAM1_START + STM32_SRAM1_SIZE * 1024)
+
+#if defined(__CC_ARM) || defined(__CLANG_ARM)
+extern int Image$$RW_IRAM1$$ZI$$Limit;
+#define HEAP_BEGIN      ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
+#elif __ICCARM__
+#pragma section="CSTACK"
+#define HEAP_BEGIN      (__segment_end("CSTACK"))
+#else
+extern int __bss_end;
+#define HEAP_BEGIN      ((void *)&__bss_end)
+#endif
 
-#define HEAP_BEGIN                     STM32_SRAM3_START
-#define HEAP_END                       STM32_SRAM3_END
+#define HEAP_END                       STM32_SRAM1_END
 
 void SystemClock_Config(void);
 
-- 
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